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5769d3cd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ca557f44 | 2 | |
32d0add0 | 3 | Copyright (C) 2001-2015 Free Software Foundation, Inc. |
ca557f44 | 4 | |
5769d3cd AC |
5 | Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) |
6 | for IBM Deutschland Entwicklung GmbH, IBM Corporation. | |
7 | ||
8 | This file is part of GDB. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 12 | the Free Software Foundation; either version 3 of the License, or |
5769d3cd AC |
13 | (at your option) any later version. |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
5769d3cd | 22 | |
d0f54f9d | 23 | #include "defs.h" |
5769d3cd AC |
24 | #include "arch-utils.h" |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
45741a9c | 27 | #include "infrun.h" |
5769d3cd AC |
28 | #include "symtab.h" |
29 | #include "target.h" | |
30 | #include "gdbcore.h" | |
31 | #include "gdbcmd.h" | |
5769d3cd | 32 | #include "objfiles.h" |
5769d3cd AC |
33 | #include "floatformat.h" |
34 | #include "regcache.h" | |
a8c99f38 JB |
35 | #include "trad-frame.h" |
36 | #include "frame-base.h" | |
37 | #include "frame-unwind.h" | |
a431654a | 38 | #include "dwarf2-frame.h" |
d0f54f9d JB |
39 | #include "reggroups.h" |
40 | #include "regset.h" | |
fd0407d6 | 41 | #include "value.h" |
a89aa300 | 42 | #include "dis-asm.h" |
76a9d10f | 43 | #include "solib-svr4.h" |
3fc46200 | 44 | #include "prologue-value.h" |
70728992 | 45 | #include "linux-tdep.h" |
0e5fae36 | 46 | #include "s390-linux-tdep.h" |
4ac33720 | 47 | #include "auxv.h" |
237b092b | 48 | #include "xml-syscall.h" |
5769d3cd | 49 | |
55aa24fb SDJ |
50 | #include "stap-probe.h" |
51 | #include "ax.h" | |
52 | #include "ax-gdb.h" | |
53 | #include "user-regs.h" | |
54 | #include "cli/cli-utils.h" | |
55 | #include <ctype.h> | |
04a83fee | 56 | #include "elf/common.h" |
55aa24fb | 57 | |
7803799a | 58 | #include "features/s390-linux32.c" |
c642a434 UW |
59 | #include "features/s390-linux32v1.c" |
60 | #include "features/s390-linux32v2.c" | |
7803799a | 61 | #include "features/s390-linux64.c" |
c642a434 UW |
62 | #include "features/s390-linux64v1.c" |
63 | #include "features/s390-linux64v2.c" | |
4ac33720 | 64 | #include "features/s390-te-linux64.c" |
550bdf96 AA |
65 | #include "features/s390-vx-linux64.c" |
66 | #include "features/s390-tevx-linux64.c" | |
7803799a | 67 | #include "features/s390x-linux64.c" |
c642a434 UW |
68 | #include "features/s390x-linux64v1.c" |
69 | #include "features/s390x-linux64v2.c" | |
4ac33720 | 70 | #include "features/s390x-te-linux64.c" |
550bdf96 AA |
71 | #include "features/s390x-vx-linux64.c" |
72 | #include "features/s390x-tevx-linux64.c" | |
7803799a | 73 | |
237b092b AA |
74 | #define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml" |
75 | #define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml" | |
76 | ||
52059ffd TT |
77 | enum s390_abi_kind |
78 | { | |
79 | ABI_LINUX_S390, | |
80 | ABI_LINUX_ZSERIES | |
81 | }; | |
82 | ||
d0f54f9d JB |
83 | /* The tdep structure. */ |
84 | ||
85 | struct gdbarch_tdep | |
5769d3cd | 86 | { |
b0cf273e | 87 | /* ABI version. */ |
52059ffd | 88 | enum s390_abi_kind abi; |
b0cf273e | 89 | |
7803799a UW |
90 | /* Pseudo register numbers. */ |
91 | int gpr_full_regnum; | |
92 | int pc_regnum; | |
93 | int cc_regnum; | |
550bdf96 | 94 | int v0_full_regnum; |
7803799a | 95 | |
5aa82d05 AA |
96 | int have_linux_v1; |
97 | int have_linux_v2; | |
98 | int have_tdb; | |
d0f54f9d JB |
99 | }; |
100 | ||
101 | ||
7803799a UW |
102 | /* ABI call-saved register information. */ |
103 | ||
104 | static int | |
105 | s390_register_call_saved (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 106 | { |
7803799a UW |
107 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
108 | ||
109 | switch (tdep->abi) | |
6707b003 | 110 | { |
7803799a UW |
111 | case ABI_LINUX_S390: |
112 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
113 | || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM | |
114 | || regnum == S390_A0_REGNUM) | |
115 | return 1; | |
6707b003 | 116 | |
7803799a UW |
117 | break; |
118 | ||
119 | case ABI_LINUX_ZSERIES: | |
120 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
121 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) | |
122 | || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) | |
123 | return 1; | |
124 | ||
125 | break; | |
126 | } | |
127 | ||
128 | return 0; | |
5769d3cd AC |
129 | } |
130 | ||
c642a434 UW |
131 | static int |
132 | s390_cannot_store_register (struct gdbarch *gdbarch, int regnum) | |
133 | { | |
134 | /* The last-break address is read-only. */ | |
135 | return regnum == S390_LAST_BREAK_REGNUM; | |
136 | } | |
137 | ||
138 | static void | |
139 | s390_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
140 | { | |
141 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
142 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
143 | ||
144 | regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc); | |
145 | ||
146 | /* Set special SYSTEM_CALL register to 0 to prevent the kernel from | |
147 | messing with the PC we just installed, if we happen to be within | |
148 | an interrupted system call that the kernel wants to restart. | |
149 | ||
150 | Note that after we return from the dummy call, the SYSTEM_CALL and | |
151 | ORIG_R2 registers will be automatically restored, and the kernel | |
152 | continues to restart the system call at this point. */ | |
153 | if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0) | |
154 | regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0); | |
155 | } | |
156 | ||
7803799a | 157 | |
d0f54f9d JB |
158 | /* DWARF Register Mapping. */ |
159 | ||
2ccd1468 | 160 | static const short s390_dwarf_regmap[] = |
d0f54f9d | 161 | { |
550bdf96 | 162 | /* 0-15: General Purpose Registers. */ |
d0f54f9d JB |
163 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, |
164 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
165 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
166 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
167 | ||
550bdf96 | 168 | /* 16-31: Floating Point Registers / Vector Registers 0-15. */ |
d0f54f9d JB |
169 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, |
170 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, | |
171 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, | |
172 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, | |
173 | ||
550bdf96 | 174 | /* 32-47: Control Registers (not mapped). */ |
34201ae3 UW |
175 | -1, -1, -1, -1, -1, -1, -1, -1, |
176 | -1, -1, -1, -1, -1, -1, -1, -1, | |
d0f54f9d | 177 | |
550bdf96 | 178 | /* 48-63: Access Registers. */ |
d0f54f9d JB |
179 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, |
180 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, | |
181 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, | |
182 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, | |
183 | ||
550bdf96 | 184 | /* 64-65: Program Status Word. */ |
d0f54f9d | 185 | S390_PSWM_REGNUM, |
7803799a UW |
186 | S390_PSWA_REGNUM, |
187 | ||
550bdf96 AA |
188 | /* 66-67: Reserved. */ |
189 | -1, -1, | |
190 | ||
191 | /* 68-83: Vector Registers 16-31. */ | |
192 | S390_V16_REGNUM, S390_V18_REGNUM, S390_V20_REGNUM, S390_V22_REGNUM, | |
193 | S390_V17_REGNUM, S390_V19_REGNUM, S390_V21_REGNUM, S390_V23_REGNUM, | |
194 | S390_V24_REGNUM, S390_V26_REGNUM, S390_V28_REGNUM, S390_V30_REGNUM, | |
195 | S390_V25_REGNUM, S390_V27_REGNUM, S390_V29_REGNUM, S390_V31_REGNUM, | |
196 | ||
197 | /* End of "official" DWARF registers. The remainder of the map is | |
198 | for GDB internal use only. */ | |
199 | ||
7803799a UW |
200 | /* GPR Lower Half Access. */ |
201 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
202 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
203 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
204 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
d0f54f9d JB |
205 | }; |
206 | ||
550bdf96 AA |
207 | enum { s390_dwarf_reg_r0l = ARRAY_SIZE (s390_dwarf_regmap) - 16 }; |
208 | ||
d0f54f9d JB |
209 | /* Convert DWARF register number REG to the appropriate register |
210 | number used by GDB. */ | |
a78f21af | 211 | static int |
d3f73121 | 212 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
d0f54f9d | 213 | { |
7803799a | 214 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
550bdf96 | 215 | int gdb_reg = -1; |
7803799a | 216 | |
550bdf96 AA |
217 | /* In a 32-on-64 debug scenario, debug info refers to the full |
218 | 64-bit GPRs. Note that call frame information still refers to | |
219 | the 32-bit lower halves, because s390_adjust_frame_regnum uses | |
220 | special register numbers to access GPRs. */ | |
7803799a UW |
221 | if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) |
222 | return tdep->gpr_full_regnum + reg; | |
d0f54f9d | 223 | |
16aff9a6 | 224 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
550bdf96 AA |
225 | gdb_reg = s390_dwarf_regmap[reg]; |
226 | ||
227 | if (tdep->v0_full_regnum == -1) | |
228 | { | |
229 | if (gdb_reg >= S390_V16_REGNUM && gdb_reg <= S390_V31_REGNUM) | |
230 | gdb_reg = -1; | |
231 | } | |
232 | else | |
233 | { | |
234 | if (gdb_reg >= S390_F0_REGNUM && gdb_reg <= S390_F15_REGNUM) | |
235 | gdb_reg = gdb_reg - S390_F0_REGNUM + tdep->v0_full_regnum; | |
236 | } | |
d0f54f9d | 237 | |
550bdf96 | 238 | return gdb_reg; |
7803799a | 239 | } |
d0f54f9d | 240 | |
7803799a UW |
241 | /* Translate a .eh_frame register to DWARF register, or adjust a |
242 | .debug_frame register. */ | |
243 | static int | |
244 | s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) | |
245 | { | |
246 | /* See s390_dwarf_reg_to_regnum for comments. */ | |
550bdf96 | 247 | return (num >= 0 && num < 16) ? num + s390_dwarf_reg_r0l : num; |
d0f54f9d JB |
248 | } |
249 | ||
d0f54f9d | 250 | |
7803799a UW |
251 | /* Pseudo registers. */ |
252 | ||
2ccd1468 UW |
253 | static int |
254 | regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum) | |
255 | { | |
256 | return (tdep->gpr_full_regnum != -1 | |
257 | && regnum >= tdep->gpr_full_regnum | |
258 | && regnum <= tdep->gpr_full_regnum + 15); | |
259 | } | |
260 | ||
550bdf96 AA |
261 | /* Check whether REGNUM indicates a full vector register (v0-v15). |
262 | These pseudo-registers are composed of f0-f15 and v0l-v15l. */ | |
263 | ||
264 | static int | |
265 | regnum_is_vxr_full (struct gdbarch_tdep *tdep, int regnum) | |
266 | { | |
267 | return (tdep->v0_full_regnum != -1 | |
268 | && regnum >= tdep->v0_full_regnum | |
269 | && regnum <= tdep->v0_full_regnum + 15); | |
270 | } | |
271 | ||
87de11c0 AA |
272 | /* Return the name of register REGNO. Return the empty string for |
273 | registers that shouldn't be visible. */ | |
550bdf96 AA |
274 | |
275 | static const char * | |
276 | s390_register_name (struct gdbarch *gdbarch, int regnum) | |
277 | { | |
278 | if (regnum >= S390_V0_LOWER_REGNUM | |
279 | && regnum <= S390_V15_LOWER_REGNUM) | |
87de11c0 | 280 | return ""; |
550bdf96 AA |
281 | return tdesc_register_name (gdbarch, regnum); |
282 | } | |
283 | ||
7803799a UW |
284 | static const char * |
285 | s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 286 | { |
7803799a | 287 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 288 | |
7803799a UW |
289 | if (regnum == tdep->pc_regnum) |
290 | return "pc"; | |
d0f54f9d | 291 | |
7803799a UW |
292 | if (regnum == tdep->cc_regnum) |
293 | return "cc"; | |
d0f54f9d | 294 | |
2ccd1468 | 295 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a UW |
296 | { |
297 | static const char *full_name[] = { | |
298 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
299 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
300 | }; | |
301 | return full_name[regnum - tdep->gpr_full_regnum]; | |
d0f54f9d | 302 | } |
7803799a | 303 | |
550bdf96 AA |
304 | if (regnum_is_vxr_full (tdep, regnum)) |
305 | { | |
306 | static const char *full_name[] = { | |
307 | "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7", | |
308 | "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15" | |
309 | }; | |
310 | return full_name[regnum - tdep->v0_full_regnum]; | |
311 | } | |
312 | ||
7803799a | 313 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d JB |
314 | } |
315 | ||
7803799a UW |
316 | static struct type * |
317 | s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) | |
5769d3cd | 318 | { |
7803799a | 319 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 320 | |
7803799a UW |
321 | if (regnum == tdep->pc_regnum) |
322 | return builtin_type (gdbarch)->builtin_func_ptr; | |
d0f54f9d | 323 | |
7803799a UW |
324 | if (regnum == tdep->cc_regnum) |
325 | return builtin_type (gdbarch)->builtin_int; | |
d0f54f9d | 326 | |
2ccd1468 | 327 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a UW |
328 | return builtin_type (gdbarch)->builtin_uint64; |
329 | ||
550bdf96 AA |
330 | if (regnum_is_vxr_full (tdep, regnum)) |
331 | return tdesc_find_type (gdbarch, "vec128"); | |
332 | ||
7803799a | 333 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
5769d3cd AC |
334 | } |
335 | ||
05d1431c | 336 | static enum register_status |
7803799a UW |
337 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
338 | int regnum, gdb_byte *buf) | |
d0f54f9d | 339 | { |
7803799a | 340 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 341 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 342 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
343 | ULONGEST val; |
344 | ||
7803799a | 345 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 346 | { |
05d1431c PA |
347 | enum register_status status; |
348 | ||
349 | status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); | |
350 | if (status == REG_VALID) | |
351 | { | |
352 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
353 | val &= 0x7fffffff; | |
354 | store_unsigned_integer (buf, regsize, byte_order, val); | |
355 | } | |
356 | return status; | |
7803799a | 357 | } |
d0f54f9d | 358 | |
7803799a UW |
359 | if (regnum == tdep->cc_regnum) |
360 | { | |
05d1431c PA |
361 | enum register_status status; |
362 | ||
363 | status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); | |
364 | if (status == REG_VALID) | |
365 | { | |
366 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
367 | val = (val >> 12) & 3; | |
368 | else | |
369 | val = (val >> 44) & 3; | |
370 | store_unsigned_integer (buf, regsize, byte_order, val); | |
371 | } | |
372 | return status; | |
7803799a | 373 | } |
d0f54f9d | 374 | |
2ccd1468 | 375 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a | 376 | { |
05d1431c | 377 | enum register_status status; |
7803799a | 378 | ULONGEST val_upper; |
05d1431c | 379 | |
7803799a UW |
380 | regnum -= tdep->gpr_full_regnum; |
381 | ||
05d1431c PA |
382 | status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val); |
383 | if (status == REG_VALID) | |
384 | status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
385 | &val_upper); | |
386 | if (status == REG_VALID) | |
387 | { | |
388 | val |= val_upper << 32; | |
389 | store_unsigned_integer (buf, regsize, byte_order, val); | |
390 | } | |
391 | return status; | |
d0f54f9d | 392 | } |
7803799a | 393 | |
550bdf96 AA |
394 | if (regnum_is_vxr_full (tdep, regnum)) |
395 | { | |
396 | enum register_status status; | |
397 | ||
398 | regnum -= tdep->v0_full_regnum; | |
399 | ||
400 | status = regcache_raw_read (regcache, S390_F0_REGNUM + regnum, buf); | |
401 | if (status == REG_VALID) | |
402 | status = regcache_raw_read (regcache, | |
403 | S390_V0_LOWER_REGNUM + regnum, buf + 8); | |
404 | return status; | |
405 | } | |
406 | ||
7803799a | 407 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d JB |
408 | } |
409 | ||
410 | static void | |
7803799a UW |
411 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
412 | int regnum, const gdb_byte *buf) | |
d0f54f9d | 413 | { |
7803799a | 414 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 415 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 416 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
417 | ULONGEST val, psw; |
418 | ||
7803799a | 419 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 420 | { |
7803799a UW |
421 | val = extract_unsigned_integer (buf, regsize, byte_order); |
422 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
423 | { | |
424 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); | |
425 | val = (psw & 0x80000000) | (val & 0x7fffffff); | |
426 | } | |
427 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); | |
428 | return; | |
429 | } | |
d0f54f9d | 430 | |
7803799a UW |
431 | if (regnum == tdep->cc_regnum) |
432 | { | |
433 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
d0f54f9d | 434 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
7803799a UW |
435 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
436 | val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); | |
437 | else | |
438 | val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); | |
439 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); | |
440 | return; | |
441 | } | |
d0f54f9d | 442 | |
2ccd1468 | 443 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a UW |
444 | { |
445 | regnum -= tdep->gpr_full_regnum; | |
446 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
447 | regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, | |
448 | val & 0xffffffff); | |
449 | regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
450 | val >> 32); | |
451 | return; | |
d0f54f9d | 452 | } |
7803799a | 453 | |
550bdf96 AA |
454 | if (regnum_is_vxr_full (tdep, regnum)) |
455 | { | |
456 | regnum -= tdep->v0_full_regnum; | |
457 | regcache_raw_write (regcache, S390_F0_REGNUM + regnum, buf); | |
458 | regcache_raw_write (regcache, S390_V0_LOWER_REGNUM + regnum, buf + 8); | |
459 | return; | |
460 | } | |
461 | ||
7803799a | 462 | internal_error (__FILE__, __LINE__, _("invalid regnum")); |
d0f54f9d JB |
463 | } |
464 | ||
465 | /* 'float' values are stored in the upper half of floating-point | |
550bdf96 AA |
466 | registers, even though we are otherwise a big-endian platform. The |
467 | same applies to a 'float' value within a vector. */ | |
d0f54f9d | 468 | |
9acbedc0 | 469 | static struct value * |
2ed3c037 UW |
470 | s390_value_from_register (struct gdbarch *gdbarch, struct type *type, |
471 | int regnum, struct frame_id frame_id) | |
d0f54f9d | 472 | { |
550bdf96 | 473 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
2ed3c037 UW |
474 | struct value *value = default_value_from_register (gdbarch, type, |
475 | regnum, frame_id); | |
744a8059 SP |
476 | check_typedef (type); |
477 | ||
550bdf96 AA |
478 | if ((regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM |
479 | && TYPE_LENGTH (type) < 8) | |
480 | || regnum_is_vxr_full (tdep, regnum) | |
481 | || (regnum >= S390_V16_REGNUM && regnum <= S390_V31_REGNUM)) | |
9acbedc0 | 482 | set_value_offset (value, 0); |
d0f54f9d | 483 | |
9acbedc0 | 484 | return value; |
d0f54f9d JB |
485 | } |
486 | ||
487 | /* Register groups. */ | |
488 | ||
a78f21af | 489 | static int |
7803799a UW |
490 | s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
491 | struct reggroup *group) | |
d0f54f9d JB |
492 | { |
493 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
494 | ||
d6db1fab UW |
495 | /* We usually save/restore the whole PSW, which includes PC and CC. |
496 | However, some older gdbservers may not support saving/restoring | |
497 | the whole PSW yet, and will return an XML register description | |
498 | excluding those from the save/restore register groups. In those | |
499 | cases, we still need to explicitly save/restore PC and CC in order | |
500 | to push or pop frames. Since this doesn't hurt anything if we | |
501 | already save/restore the whole PSW (it's just redundant), we add | |
502 | PC and CC at this point unconditionally. */ | |
d0f54f9d | 503 | if (group == save_reggroup || group == restore_reggroup) |
7803799a | 504 | return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; |
d0f54f9d | 505 | |
550bdf96 AA |
506 | if (group == vector_reggroup) |
507 | return regnum_is_vxr_full (tdep, regnum); | |
508 | ||
509 | if (group == general_reggroup && regnum_is_vxr_full (tdep, regnum)) | |
510 | return 0; | |
511 | ||
d0f54f9d JB |
512 | return default_register_reggroup_p (gdbarch, regnum, group); |
513 | } | |
514 | ||
515 | ||
2ccd1468 | 516 | /* Maps for register sets. */ |
d0f54f9d | 517 | |
99b7da5d | 518 | static const struct regcache_map_entry s390_gregmap[] = |
2ccd1468 | 519 | { |
99b7da5d AA |
520 | { 1, S390_PSWM_REGNUM }, |
521 | { 1, S390_PSWA_REGNUM }, | |
522 | { 16, S390_R0_REGNUM }, | |
523 | { 16, S390_A0_REGNUM }, | |
524 | { 1, S390_ORIG_R2_REGNUM }, | |
525 | { 0 } | |
2ccd1468 | 526 | }; |
d0f54f9d | 527 | |
99b7da5d | 528 | static const struct regcache_map_entry s390_fpregmap[] = |
2ccd1468 | 529 | { |
99b7da5d AA |
530 | { 1, S390_FPC_REGNUM, 8 }, |
531 | { 16, S390_F0_REGNUM, 8 }, | |
532 | { 0 } | |
2ccd1468 | 533 | }; |
d0f54f9d | 534 | |
99b7da5d | 535 | static const struct regcache_map_entry s390_regmap_upper[] = |
2ccd1468 | 536 | { |
99b7da5d AA |
537 | { 16, S390_R0_UPPER_REGNUM, 4 }, |
538 | { 0 } | |
2ccd1468 | 539 | }; |
7803799a | 540 | |
99b7da5d | 541 | static const struct regcache_map_entry s390_regmap_last_break[] = |
2ccd1468 | 542 | { |
99b7da5d AA |
543 | { 1, REGCACHE_MAP_SKIP, 4 }, |
544 | { 1, S390_LAST_BREAK_REGNUM, 4 }, | |
545 | { 0 } | |
2ccd1468 | 546 | }; |
c642a434 | 547 | |
99b7da5d | 548 | static const struct regcache_map_entry s390x_regmap_last_break[] = |
2ccd1468 | 549 | { |
99b7da5d AA |
550 | { 1, S390_LAST_BREAK_REGNUM, 8 }, |
551 | { 0 } | |
2ccd1468 UW |
552 | }; |
553 | ||
99b7da5d | 554 | static const struct regcache_map_entry s390_regmap_system_call[] = |
2ccd1468 | 555 | { |
99b7da5d AA |
556 | { 1, S390_SYSTEM_CALL_REGNUM, 4 }, |
557 | { 0 } | |
2ccd1468 UW |
558 | }; |
559 | ||
99b7da5d | 560 | static const struct regcache_map_entry s390_regmap_tdb[] = |
2ccd1468 | 561 | { |
99b7da5d AA |
562 | { 1, S390_TDB_DWORD0_REGNUM, 8 }, |
563 | { 1, S390_TDB_ABORT_CODE_REGNUM, 8 }, | |
564 | { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 }, | |
565 | { 1, S390_TDB_ATIA_REGNUM, 8 }, | |
566 | { 12, REGCACHE_MAP_SKIP, 8 }, | |
567 | { 16, S390_TDB_R0_REGNUM, 8 }, | |
568 | { 0 } | |
2ccd1468 | 569 | }; |
c642a434 | 570 | |
550bdf96 AA |
571 | static const struct regcache_map_entry s390_regmap_vxrs_low[] = |
572 | { | |
573 | { 16, S390_V0_LOWER_REGNUM, 8 }, | |
574 | { 0 } | |
575 | }; | |
576 | ||
577 | static const struct regcache_map_entry s390_regmap_vxrs_high[] = | |
578 | { | |
579 | { 16, S390_V16_REGNUM, 16 }, | |
580 | { 0 } | |
581 | }; | |
582 | ||
4ac33720 | 583 | |
99b7da5d AA |
584 | /* Supply the TDB regset. Like regcache_supply_regset, but invalidate |
585 | the TDB registers unless the TDB format field is valid. */ | |
4ac33720 UW |
586 | |
587 | static void | |
588 | s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache, | |
589 | int regnum, const void *regs, size_t len) | |
590 | { | |
591 | ULONGEST tdw; | |
592 | enum register_status ret; | |
593 | int i; | |
594 | ||
99b7da5d | 595 | regcache_supply_regset (regset, regcache, regnum, regs, len); |
4ac33720 UW |
596 | ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw); |
597 | if (ret != REG_VALID || (tdw >> 56) != 1) | |
99b7da5d | 598 | regcache_supply_regset (regset, regcache, regnum, NULL, len); |
d0f54f9d JB |
599 | } |
600 | ||
99b7da5d AA |
601 | const struct regset s390_gregset = { |
602 | s390_gregmap, | |
603 | regcache_supply_regset, | |
604 | regcache_collect_regset | |
d0f54f9d JB |
605 | }; |
606 | ||
99b7da5d AA |
607 | const struct regset s390_fpregset = { |
608 | s390_fpregmap, | |
609 | regcache_supply_regset, | |
610 | regcache_collect_regset | |
d0f54f9d JB |
611 | }; |
612 | ||
7803799a | 613 | static const struct regset s390_upper_regset = { |
34201ae3 | 614 | s390_regmap_upper, |
99b7da5d AA |
615 | regcache_supply_regset, |
616 | regcache_collect_regset | |
7803799a UW |
617 | }; |
618 | ||
99b7da5d | 619 | const struct regset s390_last_break_regset = { |
c642a434 | 620 | s390_regmap_last_break, |
99b7da5d AA |
621 | regcache_supply_regset, |
622 | regcache_collect_regset | |
c642a434 UW |
623 | }; |
624 | ||
99b7da5d | 625 | const struct regset s390x_last_break_regset = { |
c642a434 | 626 | s390x_regmap_last_break, |
99b7da5d AA |
627 | regcache_supply_regset, |
628 | regcache_collect_regset | |
c642a434 UW |
629 | }; |
630 | ||
99b7da5d | 631 | const struct regset s390_system_call_regset = { |
c642a434 | 632 | s390_regmap_system_call, |
99b7da5d AA |
633 | regcache_supply_regset, |
634 | regcache_collect_regset | |
c642a434 UW |
635 | }; |
636 | ||
99b7da5d | 637 | const struct regset s390_tdb_regset = { |
4ac33720 UW |
638 | s390_regmap_tdb, |
639 | s390_supply_tdb_regset, | |
99b7da5d | 640 | regcache_collect_regset |
4ac33720 UW |
641 | }; |
642 | ||
550bdf96 AA |
643 | const struct regset s390_vxrs_low_regset = { |
644 | s390_regmap_vxrs_low, | |
645 | regcache_supply_regset, | |
646 | regcache_collect_regset | |
647 | }; | |
648 | ||
649 | const struct regset s390_vxrs_high_regset = { | |
650 | s390_regmap_vxrs_high, | |
651 | regcache_supply_regset, | |
652 | regcache_collect_regset | |
653 | }; | |
654 | ||
5aa82d05 AA |
655 | /* Iterate over supported core file register note sections. */ |
656 | ||
657 | static void | |
658 | s390_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
659 | iterate_over_regset_sections_cb *cb, | |
660 | void *cb_data, | |
661 | const struct regcache *regcache) | |
662 | { | |
663 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
8f0435f7 AA |
664 | const int gregset_size = (tdep->abi == ABI_LINUX_S390 ? |
665 | s390_sizeof_gregset : s390x_sizeof_gregset); | |
5aa82d05 | 666 | |
8f0435f7 AA |
667 | cb (".reg", gregset_size, &s390_gregset, NULL, cb_data); |
668 | cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data); | |
5aa82d05 AA |
669 | |
670 | if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1) | |
8f0435f7 AA |
671 | cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset, |
672 | "s390 GPR upper halves", cb_data); | |
5aa82d05 AA |
673 | |
674 | if (tdep->have_linux_v1) | |
8f0435f7 AA |
675 | cb (".reg-s390-last-break", 8, |
676 | (gdbarch_ptr_bit (gdbarch) == 32 | |
677 | ? &s390_last_break_regset : &s390x_last_break_regset), | |
678 | "s930 last-break address", cb_data); | |
5aa82d05 AA |
679 | |
680 | if (tdep->have_linux_v2) | |
8f0435f7 AA |
681 | cb (".reg-s390-system-call", 4, &s390_system_call_regset, |
682 | "s390 system-call", cb_data); | |
5aa82d05 AA |
683 | |
684 | /* If regcache is set, we are in "write" (gcore) mode. In this | |
685 | case, don't iterate over the TDB unless its registers are | |
686 | available. */ | |
687 | if (tdep->have_tdb | |
688 | && (regcache == NULL | |
689 | || REG_VALID == regcache_register_status (regcache, | |
690 | S390_TDB_DWORD0_REGNUM))) | |
8f0435f7 AA |
691 | cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset, |
692 | "s390 TDB", cb_data); | |
550bdf96 AA |
693 | |
694 | if (tdep->v0_full_regnum != -1) | |
695 | { | |
696 | cb (".reg-s390-vxrs-low", 16 * 8, &s390_vxrs_low_regset, | |
697 | "s390 vector registers 0-15 lower half", cb_data); | |
698 | cb (".reg-s390-vxrs-high", 16 * 16, &s390_vxrs_high_regset, | |
699 | "s390 vector registers 16-31", cb_data); | |
700 | } | |
5aa82d05 AA |
701 | } |
702 | ||
7803799a UW |
703 | static const struct target_desc * |
704 | s390_core_read_description (struct gdbarch *gdbarch, | |
705 | struct target_ops *target, bfd *abfd) | |
706 | { | |
7803799a | 707 | asection *section = bfd_get_section_by_name (abfd, ".reg"); |
04a83fee | 708 | CORE_ADDR hwcap = 0; |
550bdf96 | 709 | int high_gprs, v1, v2, te, vx; |
4ac33720 UW |
710 | |
711 | target_auxv_search (target, AT_HWCAP, &hwcap); | |
7803799a UW |
712 | if (!section) |
713 | return NULL; | |
714 | ||
550bdf96 AA |
715 | high_gprs = (bfd_get_section_by_name (abfd, ".reg-s390-high-gprs") |
716 | != NULL); | |
717 | v1 = (bfd_get_section_by_name (abfd, ".reg-s390-last-break") != NULL); | |
718 | v2 = (bfd_get_section_by_name (abfd, ".reg-s390-system-call") != NULL); | |
719 | vx = (hwcap & HWCAP_S390_VX); | |
720 | te = (hwcap & HWCAP_S390_TE); | |
721 | ||
7803799a UW |
722 | switch (bfd_section_size (abfd, section)) |
723 | { | |
724 | case s390_sizeof_gregset: | |
c642a434 | 725 | if (high_gprs) |
550bdf96 AA |
726 | return (te && vx ? tdesc_s390_tevx_linux64 : |
727 | vx ? tdesc_s390_vx_linux64 : | |
728 | te ? tdesc_s390_te_linux64 : | |
729 | v2 ? tdesc_s390_linux64v2 : | |
730 | v1 ? tdesc_s390_linux64v1 : tdesc_s390_linux64); | |
c642a434 | 731 | else |
550bdf96 AA |
732 | return (v2 ? tdesc_s390_linux32v2 : |
733 | v1 ? tdesc_s390_linux32v1 : tdesc_s390_linux32); | |
7803799a UW |
734 | |
735 | case s390x_sizeof_gregset: | |
550bdf96 AA |
736 | return (te && vx ? tdesc_s390x_tevx_linux64 : |
737 | vx ? tdesc_s390x_vx_linux64 : | |
738 | te ? tdesc_s390x_te_linux64 : | |
739 | v2 ? tdesc_s390x_linux64v2 : | |
740 | v1 ? tdesc_s390x_linux64v1 : tdesc_s390x_linux64); | |
7803799a UW |
741 | |
742 | default: | |
743 | return NULL; | |
744 | } | |
745 | } | |
746 | ||
d0f54f9d | 747 | |
4bc8c588 JB |
748 | /* Decoding S/390 instructions. */ |
749 | ||
750 | /* Named opcode values for the S/390 instructions we recognize. Some | |
751 | instructions have their opcode split across two fields; those are the | |
752 | op1_* and op2_* enums. */ | |
753 | enum | |
754 | { | |
a8c99f38 JB |
755 | op1_lhi = 0xa7, op2_lhi = 0x08, |
756 | op1_lghi = 0xa7, op2_lghi = 0x09, | |
00ce08ef | 757 | op1_lgfi = 0xc0, op2_lgfi = 0x01, |
4bc8c588 | 758 | op_lr = 0x18, |
a8c99f38 JB |
759 | op_lgr = 0xb904, |
760 | op_l = 0x58, | |
761 | op1_ly = 0xe3, op2_ly = 0x58, | |
762 | op1_lg = 0xe3, op2_lg = 0x04, | |
763 | op_lm = 0x98, | |
764 | op1_lmy = 0xeb, op2_lmy = 0x98, | |
765 | op1_lmg = 0xeb, op2_lmg = 0x04, | |
4bc8c588 | 766 | op_st = 0x50, |
a8c99f38 | 767 | op1_sty = 0xe3, op2_sty = 0x50, |
4bc8c588 | 768 | op1_stg = 0xe3, op2_stg = 0x24, |
a8c99f38 | 769 | op_std = 0x60, |
4bc8c588 | 770 | op_stm = 0x90, |
a8c99f38 | 771 | op1_stmy = 0xeb, op2_stmy = 0x90, |
4bc8c588 | 772 | op1_stmg = 0xeb, op2_stmg = 0x24, |
a8c99f38 JB |
773 | op1_aghi = 0xa7, op2_aghi = 0x0b, |
774 | op1_ahi = 0xa7, op2_ahi = 0x0a, | |
00ce08ef UW |
775 | op1_agfi = 0xc2, op2_agfi = 0x08, |
776 | op1_afi = 0xc2, op2_afi = 0x09, | |
777 | op1_algfi= 0xc2, op2_algfi= 0x0a, | |
778 | op1_alfi = 0xc2, op2_alfi = 0x0b, | |
a8c99f38 JB |
779 | op_ar = 0x1a, |
780 | op_agr = 0xb908, | |
781 | op_a = 0x5a, | |
782 | op1_ay = 0xe3, op2_ay = 0x5a, | |
783 | op1_ag = 0xe3, op2_ag = 0x08, | |
00ce08ef UW |
784 | op1_slgfi= 0xc2, op2_slgfi= 0x04, |
785 | op1_slfi = 0xc2, op2_slfi = 0x05, | |
a8c99f38 JB |
786 | op_sr = 0x1b, |
787 | op_sgr = 0xb909, | |
788 | op_s = 0x5b, | |
789 | op1_sy = 0xe3, op2_sy = 0x5b, | |
790 | op1_sg = 0xe3, op2_sg = 0x09, | |
791 | op_nr = 0x14, | |
792 | op_ngr = 0xb980, | |
793 | op_la = 0x41, | |
794 | op1_lay = 0xe3, op2_lay = 0x71, | |
795 | op1_larl = 0xc0, op2_larl = 0x00, | |
796 | op_basr = 0x0d, | |
797 | op_bas = 0x4d, | |
798 | op_bcr = 0x07, | |
799 | op_bc = 0x0d, | |
1db4e8a0 UW |
800 | op_bctr = 0x06, |
801 | op_bctgr = 0xb946, | |
802 | op_bct = 0x46, | |
803 | op1_bctg = 0xe3, op2_bctg = 0x46, | |
804 | op_bxh = 0x86, | |
805 | op1_bxhg = 0xeb, op2_bxhg = 0x44, | |
806 | op_bxle = 0x87, | |
807 | op1_bxleg= 0xeb, op2_bxleg= 0x45, | |
a8c99f38 JB |
808 | op1_bras = 0xa7, op2_bras = 0x05, |
809 | op1_brasl= 0xc0, op2_brasl= 0x05, | |
810 | op1_brc = 0xa7, op2_brc = 0x04, | |
811 | op1_brcl = 0xc0, op2_brcl = 0x04, | |
1db4e8a0 UW |
812 | op1_brct = 0xa7, op2_brct = 0x06, |
813 | op1_brctg= 0xa7, op2_brctg= 0x07, | |
814 | op_brxh = 0x84, | |
815 | op1_brxhg= 0xec, op2_brxhg= 0x44, | |
816 | op_brxle = 0x85, | |
817 | op1_brxlg= 0xec, op2_brxlg= 0x45, | |
237b092b | 818 | op_svc = 0x0a, |
4bc8c588 JB |
819 | }; |
820 | ||
821 | ||
a8c99f38 JB |
822 | /* Read a single instruction from address AT. */ |
823 | ||
824 | #define S390_MAX_INSTR_SIZE 6 | |
825 | static int | |
826 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) | |
827 | { | |
828 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
829 | int instrlen; | |
830 | ||
8defab1a | 831 | if (target_read_memory (at, &instr[0], 2)) |
a8c99f38 JB |
832 | return -1; |
833 | instrlen = s390_instrlen[instr[0] >> 6]; | |
834 | if (instrlen > 2) | |
835 | { | |
8defab1a | 836 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
34201ae3 | 837 | return -1; |
a8c99f38 JB |
838 | } |
839 | return instrlen; | |
840 | } | |
841 | ||
842 | ||
4bc8c588 JB |
843 | /* The functions below are for recognizing and decoding S/390 |
844 | instructions of various formats. Each of them checks whether INSN | |
845 | is an instruction of the given format, with the specified opcodes. | |
846 | If it is, it sets the remaining arguments to the values of the | |
847 | instruction's fields, and returns a non-zero value; otherwise, it | |
848 | returns zero. | |
849 | ||
850 | These functions' arguments appear in the order they appear in the | |
851 | instruction, not in the machine-language form. So, opcodes always | |
852 | come first, even though they're sometimes scattered around the | |
853 | instructions. And displacements appear before base and extension | |
854 | registers, as they do in the assembly syntax, not at the end, as | |
855 | they do in the machine language. */ | |
a78f21af | 856 | static int |
4bc8c588 JB |
857 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
858 | { | |
859 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
860 | { | |
861 | *r1 = (insn[1] >> 4) & 0xf; | |
862 | /* i2 is a 16-bit signed quantity. */ | |
863 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
864 | return 1; | |
865 | } | |
866 | else | |
867 | return 0; | |
868 | } | |
8ac0e65a | 869 | |
5769d3cd | 870 | |
4bc8c588 JB |
871 | static int |
872 | is_ril (bfd_byte *insn, int op1, int op2, | |
34201ae3 | 873 | unsigned int *r1, int *i2) |
4bc8c588 JB |
874 | { |
875 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
876 | { | |
877 | *r1 = (insn[1] >> 4) & 0xf; | |
878 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, | |
34201ae3 UW |
879 | no sign extension is necessary, but we don't want to assume |
880 | that. */ | |
4bc8c588 | 881 | *i2 = (((insn[2] << 24) |
34201ae3 UW |
882 | | (insn[3] << 16) |
883 | | (insn[4] << 8) | |
884 | | (insn[5])) ^ 0x80000000) - 0x80000000; | |
4bc8c588 JB |
885 | return 1; |
886 | } | |
887 | else | |
888 | return 0; | |
889 | } | |
890 | ||
891 | ||
892 | static int | |
893 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
894 | { | |
895 | if (insn[0] == op) | |
896 | { | |
897 | *r1 = (insn[1] >> 4) & 0xf; | |
898 | *r2 = insn[1] & 0xf; | |
899 | return 1; | |
900 | } | |
901 | else | |
902 | return 0; | |
903 | } | |
904 | ||
905 | ||
906 | static int | |
907 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
908 | { | |
909 | if (((insn[0] << 8) | insn[1]) == op) | |
910 | { | |
911 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ | |
912 | *r1 = (insn[3] >> 4) & 0xf; | |
913 | *r2 = insn[3] & 0xf; | |
914 | return 1; | |
915 | } | |
916 | else | |
917 | return 0; | |
918 | } | |
919 | ||
920 | ||
921 | static int | |
922 | is_rs (bfd_byte *insn, int op, | |
eb1bd1fb | 923 | unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) |
4bc8c588 JB |
924 | { |
925 | if (insn[0] == op) | |
926 | { | |
927 | *r1 = (insn[1] >> 4) & 0xf; | |
928 | *r3 = insn[1] & 0xf; | |
929 | *b2 = (insn[2] >> 4) & 0xf; | |
930 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
931 | return 1; | |
932 | } | |
933 | else | |
934 | return 0; | |
935 | } | |
936 | ||
937 | ||
938 | static int | |
a8c99f38 | 939 | is_rsy (bfd_byte *insn, int op1, int op2, |
34201ae3 | 940 | unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) |
4bc8c588 JB |
941 | { |
942 | if (insn[0] == op1 | |
4bc8c588 JB |
943 | && insn[5] == op2) |
944 | { | |
945 | *r1 = (insn[1] >> 4) & 0xf; | |
946 | *r3 = insn[1] & 0xf; | |
947 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 | 948 | /* The 'long displacement' is a 20-bit signed integer. */ |
34201ae3 | 949 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) |
a8c99f38 | 950 | ^ 0x80000) - 0x80000; |
4bc8c588 JB |
951 | return 1; |
952 | } | |
953 | else | |
954 | return 0; | |
955 | } | |
956 | ||
957 | ||
1db4e8a0 UW |
958 | static int |
959 | is_rsi (bfd_byte *insn, int op, | |
34201ae3 | 960 | unsigned int *r1, unsigned int *r3, int *i2) |
1db4e8a0 UW |
961 | { |
962 | if (insn[0] == op) | |
963 | { | |
964 | *r1 = (insn[1] >> 4) & 0xf; | |
965 | *r3 = insn[1] & 0xf; | |
966 | /* i2 is a 16-bit signed quantity. */ | |
967 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
968 | return 1; | |
969 | } | |
970 | else | |
971 | return 0; | |
972 | } | |
973 | ||
974 | ||
975 | static int | |
976 | is_rie (bfd_byte *insn, int op1, int op2, | |
34201ae3 | 977 | unsigned int *r1, unsigned int *r3, int *i2) |
1db4e8a0 UW |
978 | { |
979 | if (insn[0] == op1 | |
980 | && insn[5] == op2) | |
981 | { | |
982 | *r1 = (insn[1] >> 4) & 0xf; | |
983 | *r3 = insn[1] & 0xf; | |
984 | /* i2 is a 16-bit signed quantity. */ | |
985 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
986 | return 1; | |
987 | } | |
988 | else | |
989 | return 0; | |
990 | } | |
991 | ||
992 | ||
4bc8c588 JB |
993 | static int |
994 | is_rx (bfd_byte *insn, int op, | |
eb1bd1fb | 995 | unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) |
4bc8c588 JB |
996 | { |
997 | if (insn[0] == op) | |
998 | { | |
999 | *r1 = (insn[1] >> 4) & 0xf; | |
1000 | *x2 = insn[1] & 0xf; | |
1001 | *b2 = (insn[2] >> 4) & 0xf; | |
1002 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
1003 | return 1; | |
1004 | } | |
1005 | else | |
1006 | return 0; | |
1007 | } | |
1008 | ||
1009 | ||
1010 | static int | |
a8c99f38 | 1011 | is_rxy (bfd_byte *insn, int op1, int op2, |
34201ae3 | 1012 | unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) |
4bc8c588 JB |
1013 | { |
1014 | if (insn[0] == op1 | |
4bc8c588 JB |
1015 | && insn[5] == op2) |
1016 | { | |
1017 | *r1 = (insn[1] >> 4) & 0xf; | |
1018 | *x2 = insn[1] & 0xf; | |
1019 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 | 1020 | /* The 'long displacement' is a 20-bit signed integer. */ |
34201ae3 | 1021 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) |
a8c99f38 | 1022 | ^ 0x80000) - 0x80000; |
4bc8c588 JB |
1023 | return 1; |
1024 | } | |
1025 | else | |
1026 | return 0; | |
1027 | } | |
1028 | ||
1029 | ||
3fc46200 | 1030 | /* Prologue analysis. */ |
4bc8c588 | 1031 | |
d0f54f9d JB |
1032 | #define S390_NUM_GPRS 16 |
1033 | #define S390_NUM_FPRS 16 | |
4bc8c588 | 1034 | |
a8c99f38 JB |
1035 | struct s390_prologue_data { |
1036 | ||
ee1b3323 UW |
1037 | /* The stack. */ |
1038 | struct pv_area *stack; | |
1039 | ||
e17a4113 | 1040 | /* The size and byte-order of a GPR or FPR. */ |
a8c99f38 JB |
1041 | int gpr_size; |
1042 | int fpr_size; | |
e17a4113 | 1043 | enum bfd_endian byte_order; |
a8c99f38 JB |
1044 | |
1045 | /* The general-purpose registers. */ | |
3fc46200 | 1046 | pv_t gpr[S390_NUM_GPRS]; |
a8c99f38 JB |
1047 | |
1048 | /* The floating-point registers. */ | |
3fc46200 | 1049 | pv_t fpr[S390_NUM_FPRS]; |
a8c99f38 | 1050 | |
121d8485 UW |
1051 | /* The offset relative to the CFA where the incoming GPR N was saved |
1052 | by the function prologue. 0 if not saved or unknown. */ | |
1053 | int gpr_slot[S390_NUM_GPRS]; | |
4bc8c588 | 1054 | |
121d8485 UW |
1055 | /* Likewise for FPRs. */ |
1056 | int fpr_slot[S390_NUM_FPRS]; | |
4bc8c588 | 1057 | |
121d8485 UW |
1058 | /* Nonzero if the backchain was saved. This is assumed to be the |
1059 | case when the incoming SP is saved at the current SP location. */ | |
1060 | int back_chain_saved_p; | |
1061 | }; | |
4bc8c588 | 1062 | |
3fc46200 UW |
1063 | /* Return the effective address for an X-style instruction, like: |
1064 | ||
34201ae3 | 1065 | L R1, D2(X2, B2) |
3fc46200 UW |
1066 | |
1067 | Here, X2 and B2 are registers, and D2 is a signed 20-bit | |
1068 | constant; the effective address is the sum of all three. If either | |
1069 | X2 or B2 are zero, then it doesn't contribute to the sum --- this | |
1070 | means that r0 can't be used as either X2 or B2. */ | |
1071 | static pv_t | |
1072 | s390_addr (struct s390_prologue_data *data, | |
1073 | int d2, unsigned int x2, unsigned int b2) | |
1074 | { | |
1075 | pv_t result; | |
1076 | ||
1077 | result = pv_constant (d2); | |
1078 | if (x2) | |
1079 | result = pv_add (result, data->gpr[x2]); | |
1080 | if (b2) | |
1081 | result = pv_add (result, data->gpr[b2]); | |
1082 | ||
1083 | return result; | |
1084 | } | |
1085 | ||
1086 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ | |
a8c99f38 | 1087 | static void |
3fc46200 UW |
1088 | s390_store (struct s390_prologue_data *data, |
1089 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, | |
1090 | pv_t value) | |
4bc8c588 | 1091 | { |
3fc46200 | 1092 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 1093 | pv_t offset; |
121d8485 UW |
1094 | |
1095 | /* Check whether we are storing the backchain. */ | |
3fc46200 | 1096 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
121d8485 | 1097 | |
3fc46200 | 1098 | if (pv_is_constant (offset) && offset.k == 0) |
121d8485 | 1099 | if (size == data->gpr_size |
3fc46200 | 1100 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
121d8485 UW |
1101 | { |
1102 | data->back_chain_saved_p = 1; | |
1103 | return; | |
1104 | } | |
1105 | ||
1106 | ||
1107 | /* Check whether we are storing a register into the stack. */ | |
ee1b3323 UW |
1108 | if (!pv_area_store_would_trash (data->stack, addr)) |
1109 | pv_area_store (data->stack, addr, size, value); | |
4bc8c588 | 1110 | |
a8c99f38 | 1111 | |
121d8485 UW |
1112 | /* Note: If this is some store we cannot identify, you might think we |
1113 | should forget our cached values, as any of those might have been hit. | |
1114 | ||
1115 | However, we make the assumption that the register save areas are only | |
1116 | ever stored to once in any given function, and we do recognize these | |
1117 | stores. Thus every store we cannot recognize does not hit our data. */ | |
4bc8c588 | 1118 | } |
4bc8c588 | 1119 | |
3fc46200 UW |
1120 | /* Do a SIZE-byte load from D2(X2,B2). */ |
1121 | static pv_t | |
1122 | s390_load (struct s390_prologue_data *data, | |
1123 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) | |
34201ae3 | 1124 | |
4bc8c588 | 1125 | { |
3fc46200 | 1126 | pv_t addr = s390_addr (data, d2, x2, b2); |
4bc8c588 | 1127 | |
a8c99f38 JB |
1128 | /* If it's a load from an in-line constant pool, then we can |
1129 | simulate that, under the assumption that the code isn't | |
1130 | going to change between the time the processor actually | |
1131 | executed it creating the current frame, and the time when | |
1132 | we're analyzing the code to unwind past that frame. */ | |
3fc46200 | 1133 | if (pv_is_constant (addr)) |
4bc8c588 | 1134 | { |
0542c86d | 1135 | struct target_section *secp; |
3fc46200 | 1136 | secp = target_section_by_addr (¤t_target, addr.k); |
a8c99f38 | 1137 | if (secp != NULL |
34201ae3 | 1138 | && (bfd_get_section_flags (secp->the_bfd_section->owner, |
57e6060e | 1139 | secp->the_bfd_section) |
34201ae3 UW |
1140 | & SEC_READONLY)) |
1141 | return pv_constant (read_memory_integer (addr.k, size, | |
e17a4113 | 1142 | data->byte_order)); |
a8c99f38 | 1143 | } |
7666f43c | 1144 | |
121d8485 | 1145 | /* Check whether we are accessing one of our save slots. */ |
ee1b3323 UW |
1146 | return pv_area_fetch (data->stack, addr, size); |
1147 | } | |
121d8485 | 1148 | |
ee1b3323 UW |
1149 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
1150 | this to pv_area_scan. | |
121d8485 | 1151 | |
ee1b3323 UW |
1152 | If VALUE is a saved register, ADDR says it was saved at a constant |
1153 | offset from the frame base, and SIZE indicates that the whole | |
1154 | register was saved, record its offset in the reg_offset table in | |
1155 | PROLOGUE_UNTYPED. */ | |
1156 | static void | |
c378eb4e MS |
1157 | s390_check_for_saved (void *data_untyped, pv_t addr, |
1158 | CORE_ADDR size, pv_t value) | |
ee1b3323 UW |
1159 | { |
1160 | struct s390_prologue_data *data = data_untyped; | |
1161 | int i, offset; | |
1162 | ||
1163 | if (!pv_is_register (addr, S390_SP_REGNUM)) | |
1164 | return; | |
1165 | ||
1166 | offset = 16 * data->gpr_size + 32 - addr.k; | |
4bc8c588 | 1167 | |
ee1b3323 UW |
1168 | /* If we are storing the original value of a register, we want to |
1169 | record the CFA offset. If the same register is stored multiple | |
1170 | times, the stack slot with the highest address counts. */ | |
34201ae3 | 1171 | |
ee1b3323 UW |
1172 | for (i = 0; i < S390_NUM_GPRS; i++) |
1173 | if (size == data->gpr_size | |
1174 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) | |
1175 | if (data->gpr_slot[i] == 0 | |
1176 | || data->gpr_slot[i] > offset) | |
1177 | { | |
1178 | data->gpr_slot[i] = offset; | |
1179 | return; | |
1180 | } | |
1181 | ||
1182 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1183 | if (size == data->fpr_size | |
1184 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) | |
1185 | if (data->fpr_slot[i] == 0 | |
1186 | || data->fpr_slot[i] > offset) | |
1187 | { | |
1188 | data->fpr_slot[i] = offset; | |
1189 | return; | |
1190 | } | |
a8c99f38 | 1191 | } |
4bc8c588 | 1192 | |
a8c99f38 JB |
1193 | /* Analyze the prologue of the function starting at START_PC, |
1194 | continuing at most until CURRENT_PC. Initialize DATA to | |
1195 | hold all information we find out about the state of the registers | |
1196 | and stack slots. Return the address of the instruction after | |
1197 | the last one that changed the SP, FP, or back chain; or zero | |
1198 | on error. */ | |
1199 | static CORE_ADDR | |
1200 | s390_analyze_prologue (struct gdbarch *gdbarch, | |
1201 | CORE_ADDR start_pc, | |
1202 | CORE_ADDR current_pc, | |
1203 | struct s390_prologue_data *data) | |
4bc8c588 | 1204 | { |
a8c99f38 JB |
1205 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1206 | ||
4bc8c588 | 1207 | /* Our return value: |
a8c99f38 | 1208 | The address of the instruction after the last one that changed |
34201ae3 | 1209 | the SP, FP, or back chain; zero if we got an error trying to |
a8c99f38 JB |
1210 | read memory. */ |
1211 | CORE_ADDR result = start_pc; | |
4bc8c588 | 1212 | |
4bc8c588 JB |
1213 | /* The current PC for our abstract interpretation. */ |
1214 | CORE_ADDR pc; | |
1215 | ||
1216 | /* The address of the next instruction after that. */ | |
1217 | CORE_ADDR next_pc; | |
34201ae3 | 1218 | |
4bc8c588 JB |
1219 | /* Set up everything's initial value. */ |
1220 | { | |
1221 | int i; | |
1222 | ||
55f960e1 | 1223 | data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
ee1b3323 | 1224 | |
a8c99f38 JB |
1225 | /* For the purpose of prologue tracking, we consider the GPR size to |
1226 | be equal to the ABI word size, even if it is actually larger | |
1227 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ | |
1228 | data->gpr_size = word_size; | |
1229 | data->fpr_size = 8; | |
e17a4113 | 1230 | data->byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 | 1231 | |
4bc8c588 | 1232 | for (i = 0; i < S390_NUM_GPRS; i++) |
3fc46200 | 1233 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
4bc8c588 JB |
1234 | |
1235 | for (i = 0; i < S390_NUM_FPRS; i++) | |
3fc46200 | 1236 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
4bc8c588 | 1237 | |
121d8485 UW |
1238 | for (i = 0; i < S390_NUM_GPRS; i++) |
1239 | data->gpr_slot[i] = 0; | |
1240 | ||
1241 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1242 | data->fpr_slot[i] = 0; | |
4bc8c588 | 1243 | |
121d8485 | 1244 | data->back_chain_saved_p = 0; |
4bc8c588 JB |
1245 | } |
1246 | ||
a8c99f38 JB |
1247 | /* Start interpreting instructions, until we hit the frame's |
1248 | current PC or the first branch instruction. */ | |
1249 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) | |
5769d3cd | 1250 | { |
4bc8c588 | 1251 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
a788de9b | 1252 | int insn_len = s390_readinstruction (insn, pc); |
4bc8c588 | 1253 | |
3fc46200 UW |
1254 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
1255 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; | |
1256 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; | |
1257 | ||
4bc8c588 | 1258 | /* Fields for various kinds of instructions. */ |
a8c99f38 JB |
1259 | unsigned int b2, r1, r2, x2, r3; |
1260 | int i2, d2; | |
4bc8c588 | 1261 | |
121d8485 | 1262 | /* The values of SP and FP before this instruction, |
34201ae3 | 1263 | for detecting instructions that change them. */ |
3fc46200 | 1264 | pv_t pre_insn_sp, pre_insn_fp; |
121d8485 UW |
1265 | /* Likewise for the flag whether the back chain was saved. */ |
1266 | int pre_insn_back_chain_saved_p; | |
4bc8c588 JB |
1267 | |
1268 | /* If we got an error trying to read the instruction, report it. */ | |
1269 | if (insn_len < 0) | |
34201ae3 UW |
1270 | { |
1271 | result = 0; | |
1272 | break; | |
1273 | } | |
4bc8c588 JB |
1274 | |
1275 | next_pc = pc + insn_len; | |
1276 | ||
a8c99f38 JB |
1277 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1278 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
121d8485 | 1279 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
4bc8c588 | 1280 | |
4bc8c588 | 1281 | |
3fc46200 UW |
1282 | /* LHI r1, i2 --- load halfword immediate. */ |
1283 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ | |
1284 | /* LGFI r1, i2 --- load fullword immediate. */ | |
1285 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) | |
34201ae3 UW |
1286 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) |
1287 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) | |
3fc46200 UW |
1288 | data->gpr[r1] = pv_constant (i2); |
1289 | ||
1290 | /* LR r1, r2 --- load from register. */ | |
1291 | /* LGR r1, r2 --- load from register (64-bit version). */ | |
1292 | else if (is_rr (insn32, op_lr, &r1, &r2) | |
1293 | || is_rre (insn64, op_lgr, &r1, &r2)) | |
1294 | data->gpr[r1] = data->gpr[r2]; | |
1295 | ||
1296 | /* L r1, d2(x2, b2) --- load. */ | |
1297 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ | |
1298 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ | |
1299 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) | |
1300 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) | |
1301 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) | |
1302 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); | |
1303 | ||
1304 | /* ST r1, d2(x2, b2) --- store. */ | |
1305 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ | |
1306 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ | |
1307 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) | |
1308 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) | |
1309 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) | |
1310 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); | |
1311 | ||
1312 | /* STD r1, d2(x2,b2) --- store floating-point register. */ | |
4bc8c588 | 1313 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1314 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
1315 | ||
1316 | /* STM r1, r3, d2(b2) --- store multiple. */ | |
c378eb4e MS |
1317 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement |
1318 | version). */ | |
3fc46200 UW |
1319 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ |
1320 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) | |
1321 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) | |
1322 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) | |
34201ae3 UW |
1323 | { |
1324 | for (; r1 <= r3; r1++, d2 += data->gpr_size) | |
3fc46200 | 1325 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); |
34201ae3 | 1326 | } |
4bc8c588 | 1327 | |
3fc46200 UW |
1328 | /* AHI r1, i2 --- add halfword immediate. */ |
1329 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ | |
1330 | /* AFI r1, i2 --- add fullword immediate. */ | |
1331 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ | |
1332 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) | |
1333 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) | |
1334 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) | |
1335 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) | |
1336 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); | |
1337 | ||
1338 | /* ALFI r1, i2 --- add logical immediate. */ | |
1339 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ | |
1340 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) | |
1341 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) | |
1342 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1343 | (CORE_ADDR)i2 & 0xffffffff); | |
1344 | ||
1345 | /* AR r1, r2 -- add register. */ | |
1346 | /* AGR r1, r2 -- add register (64-bit version). */ | |
1347 | else if (is_rr (insn32, op_ar, &r1, &r2) | |
1348 | || is_rre (insn64, op_agr, &r1, &r2)) | |
1349 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); | |
1350 | ||
1351 | /* A r1, d2(x2, b2) -- add. */ | |
1352 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ | |
1353 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ | |
1354 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) | |
1355 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) | |
1356 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) | |
1357 | data->gpr[r1] = pv_add (data->gpr[r1], | |
1358 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1359 | ||
1360 | /* SLFI r1, i2 --- subtract logical immediate. */ | |
1361 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ | |
1362 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) | |
1363 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) | |
1364 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1365 | -((CORE_ADDR)i2 & 0xffffffff)); | |
1366 | ||
1367 | /* SR r1, r2 -- subtract register. */ | |
1368 | /* SGR r1, r2 -- subtract register (64-bit version). */ | |
1369 | else if (is_rr (insn32, op_sr, &r1, &r2) | |
1370 | || is_rre (insn64, op_sgr, &r1, &r2)) | |
1371 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); | |
1372 | ||
1373 | /* S r1, d2(x2, b2) -- subtract. */ | |
1374 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ | |
1375 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ | |
1376 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) | |
1377 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) | |
1378 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) | |
1379 | data->gpr[r1] = pv_subtract (data->gpr[r1], | |
1380 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1381 | ||
1382 | /* LA r1, d2(x2, b2) --- load address. */ | |
1383 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ | |
1384 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) | |
34201ae3 | 1385 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1386 | data->gpr[r1] = s390_addr (data, d2, x2, b2); |
1387 | ||
1388 | /* LARL r1, i2 --- load address relative long. */ | |
a8c99f38 | 1389 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
3fc46200 | 1390 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
a8c99f38 | 1391 | |
3fc46200 | 1392 | /* BASR r1, 0 --- branch and save. |
34201ae3 | 1393 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
a8c99f38 | 1394 | else if (is_rr (insn, op_basr, &r1, &r2) |
34201ae3 | 1395 | && r2 == 0) |
3fc46200 | 1396 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1397 | |
3fc46200 | 1398 | /* BRAS r1, i2 --- branch relative and save. */ |
a8c99f38 | 1399 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
34201ae3 UW |
1400 | { |
1401 | data->gpr[r1] = pv_constant (next_pc); | |
1402 | next_pc = pc + i2 * 2; | |
4bc8c588 | 1403 | |
34201ae3 UW |
1404 | /* We'd better not interpret any backward branches. We'll |
1405 | never terminate. */ | |
1406 | if (next_pc <= pc) | |
1407 | break; | |
1408 | } | |
4bc8c588 | 1409 | |
a8c99f38 JB |
1410 | /* Terminate search when hitting any other branch instruction. */ |
1411 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1412 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) | |
1413 | || is_rr (insn, op_bcr, &r1, &r2) | |
1414 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1415 | || is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1416 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1417 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) | |
1418 | break; | |
1419 | ||
4bc8c588 | 1420 | else |
d4fb63e1 TT |
1421 | { |
1422 | /* An instruction we don't know how to simulate. The only | |
1423 | safe thing to do would be to set every value we're tracking | |
1424 | to 'unknown'. Instead, we'll be optimistic: we assume that | |
1425 | we *can* interpret every instruction that the compiler uses | |
1426 | to manipulate any of the data we're interested in here -- | |
1427 | then we can just ignore anything else. */ | |
1428 | } | |
4bc8c588 JB |
1429 | |
1430 | /* Record the address after the last instruction that changed | |
34201ae3 UW |
1431 | the FP, SP, or backlink. Ignore instructions that changed |
1432 | them back to their original values --- those are probably | |
1433 | restore instructions. (The back chain is never restored, | |
1434 | just popped.) */ | |
4bc8c588 | 1435 | { |
34201ae3 UW |
1436 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1437 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
1438 | ||
1439 | if ((! pv_is_identical (pre_insn_sp, sp) | |
1440 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) | |
3fc46200 | 1441 | && sp.kind != pvk_unknown) |
34201ae3 UW |
1442 | || (! pv_is_identical (pre_insn_fp, fp) |
1443 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) | |
3fc46200 | 1444 | && fp.kind != pvk_unknown) |
34201ae3 UW |
1445 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
1446 | result = next_pc; | |
4bc8c588 | 1447 | } |
5769d3cd | 1448 | } |
4bc8c588 | 1449 | |
ee1b3323 UW |
1450 | /* Record where all the registers were saved. */ |
1451 | pv_area_scan (data->stack, s390_check_for_saved, data); | |
1452 | ||
1453 | free_pv_area (data->stack); | |
1454 | data->stack = NULL; | |
1455 | ||
4bc8c588 | 1456 | return result; |
5769d3cd AC |
1457 | } |
1458 | ||
34201ae3 | 1459 | /* Advance PC across any function entry prologue instructions to reach |
a8c99f38 JB |
1460 | some "real" code. */ |
1461 | static CORE_ADDR | |
6093d2eb | 1462 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
a8c99f38 JB |
1463 | { |
1464 | struct s390_prologue_data data; | |
f054145e AA |
1465 | CORE_ADDR skip_pc, func_addr; |
1466 | ||
1467 | if (find_pc_partial_function (pc, NULL, &func_addr, NULL)) | |
1468 | { | |
1469 | CORE_ADDR post_prologue_pc | |
1470 | = skip_prologue_using_sal (gdbarch, func_addr); | |
1471 | if (post_prologue_pc != 0) | |
1472 | return max (pc, post_prologue_pc); | |
1473 | } | |
1474 | ||
6093d2eb | 1475 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
a8c99f38 JB |
1476 | return skip_pc ? skip_pc : pc; |
1477 | } | |
1478 | ||
d0f54f9d JB |
1479 | /* Return true if we are in the functin's epilogue, i.e. after the |
1480 | instruction that destroyed the function's stack frame. */ | |
1481 | static int | |
1482 | s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1483 | { | |
1484 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
1485 | ||
1486 | /* In frameless functions, there's not frame to destroy and thus | |
1487 | we don't care about the epilogue. | |
1488 | ||
1489 | In functions with frame, the epilogue sequence is a pair of | |
1490 | a LM-type instruction that restores (amongst others) the | |
1491 | return register %r14 and the stack pointer %r15, followed | |
1492 | by a branch 'br %r14' --or equivalent-- that effects the | |
1493 | actual return. | |
1494 | ||
1495 | In that situation, this function needs to return 'true' in | |
1496 | exactly one case: when pc points to that branch instruction. | |
1497 | ||
1498 | Thus we try to disassemble the one instructions immediately | |
177b42fe | 1499 | preceding pc and check whether it is an LM-type instruction |
d0f54f9d JB |
1500 | modifying the stack pointer. |
1501 | ||
1502 | Note that disassembling backwards is not reliable, so there | |
1503 | is a slight chance of false positives here ... */ | |
1504 | ||
1505 | bfd_byte insn[6]; | |
1506 | unsigned int r1, r3, b2; | |
1507 | int d2; | |
1508 | ||
1509 | if (word_size == 4 | |
8defab1a | 1510 | && !target_read_memory (pc - 4, insn, 4) |
d0f54f9d JB |
1511 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
1512 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1513 | return 1; | |
1514 | ||
a8c99f38 | 1515 | if (word_size == 4 |
8defab1a | 1516 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 JB |
1517 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
1518 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1519 | return 1; | |
1520 | ||
d0f54f9d | 1521 | if (word_size == 8 |
8defab1a | 1522 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 | 1523 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
d0f54f9d JB |
1524 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
1525 | return 1; | |
1526 | ||
1527 | return 0; | |
1528 | } | |
5769d3cd | 1529 | |
1db4e8a0 UW |
1530 | /* Displaced stepping. */ |
1531 | ||
1532 | /* Fix up the state of registers and memory after having single-stepped | |
1533 | a displaced instruction. */ | |
1534 | static void | |
1535 | s390_displaced_step_fixup (struct gdbarch *gdbarch, | |
1536 | struct displaced_step_closure *closure, | |
1537 | CORE_ADDR from, CORE_ADDR to, | |
1538 | struct regcache *regs) | |
1539 | { | |
1540 | /* Since we use simple_displaced_step_copy_insn, our closure is a | |
1541 | copy of the instruction. */ | |
1542 | gdb_byte *insn = (gdb_byte *) closure; | |
1543 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
1544 | int insnlen = s390_instrlen[insn[0] >> 6]; | |
1545 | ||
1546 | /* Fields for various kinds of instructions. */ | |
1547 | unsigned int b2, r1, r2, x2, r3; | |
1548 | int i2, d2; | |
1549 | ||
1550 | /* Get current PC and addressing mode bit. */ | |
1551 | CORE_ADDR pc = regcache_read_pc (regs); | |
beaabab2 | 1552 | ULONGEST amode = 0; |
1db4e8a0 UW |
1553 | |
1554 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
1555 | { | |
1556 | regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); | |
1557 | amode &= 0x80000000; | |
1558 | } | |
1559 | ||
1560 | if (debug_displaced) | |
1561 | fprintf_unfiltered (gdb_stdlog, | |
0161e4b9 | 1562 | "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n", |
1db4e8a0 | 1563 | paddress (gdbarch, from), paddress (gdbarch, to), |
0161e4b9 | 1564 | paddress (gdbarch, pc), insnlen, (int) amode); |
1db4e8a0 UW |
1565 | |
1566 | /* Handle absolute branch and save instructions. */ | |
1567 | if (is_rr (insn, op_basr, &r1, &r2) | |
1568 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) | |
1569 | { | |
1570 | /* Recompute saved return address in R1. */ | |
1571 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1572 | amode | (from + insnlen)); | |
1573 | } | |
1574 | ||
1575 | /* Handle absolute branch instructions. */ | |
1576 | else if (is_rr (insn, op_bcr, &r1, &r2) | |
1577 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1578 | || is_rr (insn, op_bctr, &r1, &r2) | |
1579 | || is_rre (insn, op_bctgr, &r1, &r2) | |
1580 | || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) | |
1581 | || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) | |
1582 | || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) | |
1583 | || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) | |
1584 | || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) | |
1585 | || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) | |
1586 | { | |
1587 | /* Update PC iff branch was *not* taken. */ | |
1588 | if (pc == to + insnlen) | |
1589 | regcache_write_pc (regs, from + insnlen); | |
1590 | } | |
1591 | ||
1592 | /* Handle PC-relative branch and save instructions. */ | |
1593 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) | |
34201ae3 | 1594 | || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) |
1db4e8a0 UW |
1595 | { |
1596 | /* Update PC. */ | |
1597 | regcache_write_pc (regs, pc - to + from); | |
1598 | /* Recompute saved return address in R1. */ | |
1599 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1600 | amode | (from + insnlen)); | |
1601 | } | |
1602 | ||
1603 | /* Handle PC-relative branch instructions. */ | |
1604 | else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1605 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1606 | || is_ri (insn, op1_brct, op2_brct, &r1, &i2) | |
1607 | || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2) | |
1608 | || is_rsi (insn, op_brxh, &r1, &r3, &i2) | |
1609 | || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2) | |
1610 | || is_rsi (insn, op_brxle, &r1, &r3, &i2) | |
1611 | || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2)) | |
1612 | { | |
1613 | /* Update PC. */ | |
1614 | regcache_write_pc (regs, pc - to + from); | |
1615 | } | |
1616 | ||
1617 | /* Handle LOAD ADDRESS RELATIVE LONG. */ | |
1618 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) | |
1619 | { | |
0161e4b9 UW |
1620 | /* Update PC. */ |
1621 | regcache_write_pc (regs, from + insnlen); | |
34201ae3 | 1622 | /* Recompute output address in R1. */ |
1db4e8a0 | 1623 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, |
0161e4b9 | 1624 | amode | (from + i2 * 2)); |
1db4e8a0 UW |
1625 | } |
1626 | ||
1627 | /* If we executed a breakpoint instruction, point PC right back at it. */ | |
1628 | else if (insn[0] == 0x0 && insn[1] == 0x1) | |
1629 | regcache_write_pc (regs, from); | |
1630 | ||
1631 | /* For any other insn, PC points right after the original instruction. */ | |
1632 | else | |
1633 | regcache_write_pc (regs, from + insnlen); | |
0161e4b9 UW |
1634 | |
1635 | if (debug_displaced) | |
1636 | fprintf_unfiltered (gdb_stdlog, | |
1637 | "displaced: (s390) pc is now %s\n", | |
1638 | paddress (gdbarch, regcache_read_pc (regs))); | |
1db4e8a0 | 1639 | } |
a8c99f38 | 1640 | |
d6db1fab UW |
1641 | |
1642 | /* Helper routine to unwind pseudo registers. */ | |
1643 | ||
1644 | static struct value * | |
1645 | s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum) | |
1646 | { | |
1647 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
1648 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1649 | struct type *type = register_type (gdbarch, regnum); | |
1650 | ||
1651 | /* Unwind PC via PSW address. */ | |
1652 | if (regnum == tdep->pc_regnum) | |
1653 | { | |
1654 | struct value *val; | |
1655 | ||
1656 | val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM); | |
1657 | if (!value_optimized_out (val)) | |
1658 | { | |
1659 | LONGEST pswa = value_as_long (val); | |
1660 | ||
1661 | if (TYPE_LENGTH (type) == 4) | |
1662 | return value_from_pointer (type, pswa & 0x7fffffff); | |
1663 | else | |
1664 | return value_from_pointer (type, pswa); | |
1665 | } | |
1666 | } | |
1667 | ||
1668 | /* Unwind CC via PSW mask. */ | |
1669 | if (regnum == tdep->cc_regnum) | |
1670 | { | |
1671 | struct value *val; | |
1672 | ||
1673 | val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM); | |
1674 | if (!value_optimized_out (val)) | |
1675 | { | |
1676 | LONGEST pswm = value_as_long (val); | |
1677 | ||
1678 | if (TYPE_LENGTH (type) == 4) | |
1679 | return value_from_longest (type, (pswm >> 12) & 3); | |
1680 | else | |
1681 | return value_from_longest (type, (pswm >> 44) & 3); | |
1682 | } | |
1683 | } | |
1684 | ||
1685 | /* Unwind full GPRs to show at least the lower halves (as the | |
1686 | upper halves are undefined). */ | |
2ccd1468 | 1687 | if (regnum_is_gpr_full (tdep, regnum)) |
d6db1fab UW |
1688 | { |
1689 | int reg = regnum - tdep->gpr_full_regnum; | |
1690 | struct value *val; | |
1691 | ||
1692 | val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); | |
1693 | if (!value_optimized_out (val)) | |
1694 | return value_cast (type, val); | |
1695 | } | |
1696 | ||
1697 | return allocate_optimized_out_value (type); | |
1698 | } | |
1699 | ||
1700 | static struct value * | |
1701 | s390_trad_frame_prev_register (struct frame_info *this_frame, | |
1702 | struct trad_frame_saved_reg saved_regs[], | |
1703 | int regnum) | |
1704 | { | |
1705 | if (regnum < S390_NUM_REGS) | |
1706 | return trad_frame_get_prev_register (this_frame, saved_regs, regnum); | |
1707 | else | |
1708 | return s390_unwind_pseudo_register (this_frame, regnum); | |
1709 | } | |
1710 | ||
1711 | ||
a8c99f38 JB |
1712 | /* Normal stack frames. */ |
1713 | ||
1714 | struct s390_unwind_cache { | |
1715 | ||
1716 | CORE_ADDR func; | |
1717 | CORE_ADDR frame_base; | |
1718 | CORE_ADDR local_base; | |
1719 | ||
1720 | struct trad_frame_saved_reg *saved_regs; | |
1721 | }; | |
1722 | ||
a78f21af | 1723 | static int |
f089c433 | 1724 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1725 | struct s390_unwind_cache *info) |
5769d3cd | 1726 | { |
f089c433 | 1727 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 JB |
1728 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1729 | struct s390_prologue_data data; | |
3fc46200 UW |
1730 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
1731 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; | |
121d8485 UW |
1732 | int i; |
1733 | CORE_ADDR cfa; | |
a8c99f38 JB |
1734 | CORE_ADDR func; |
1735 | CORE_ADDR result; | |
1736 | ULONGEST reg; | |
1737 | CORE_ADDR prev_sp; | |
1738 | int frame_pointer; | |
1739 | int size; | |
edb3359d | 1740 | struct frame_info *next_frame; |
a8c99f38 JB |
1741 | |
1742 | /* Try to find the function start address. If we can't find it, we don't | |
1743 | bother searching for it -- with modern compilers this would be mostly | |
1744 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data | |
1745 | or else a valid backchain ... */ | |
f089c433 | 1746 | func = get_frame_func (this_frame); |
a8c99f38 JB |
1747 | if (!func) |
1748 | return 0; | |
5769d3cd | 1749 | |
a8c99f38 JB |
1750 | /* Try to analyze the prologue. */ |
1751 | result = s390_analyze_prologue (gdbarch, func, | |
f089c433 | 1752 | get_frame_pc (this_frame), &data); |
a8c99f38 | 1753 | if (!result) |
5769d3cd | 1754 | return 0; |
5769d3cd | 1755 | |
a8c99f38 | 1756 | /* If this was successful, we should have found the instruction that |
34201ae3 | 1757 | sets the stack pointer register to the previous value of the stack |
a8c99f38 | 1758 | pointer minus the frame size. */ |
3fc46200 | 1759 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
5769d3cd | 1760 | return 0; |
a8c99f38 | 1761 | |
34201ae3 | 1762 | /* A frame size of zero at this point can mean either a real |
a8c99f38 | 1763 | frameless function, or else a failure to find the prologue. |
34201ae3 | 1764 | Perform some sanity checks to verify we really have a |
a8c99f38 JB |
1765 | frameless function. */ |
1766 | if (sp->k == 0) | |
5769d3cd | 1767 | { |
34201ae3 UW |
1768 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
1769 | size zero. This is only possible if the next frame is a sentinel | |
a8c99f38 | 1770 | frame, a dummy frame, or a signal trampoline frame. */ |
0e100dab AC |
1771 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
1772 | needed, instead the code should simpliy rely on its | |
1773 | analysis. */ | |
edb3359d DJ |
1774 | next_frame = get_next_frame (this_frame); |
1775 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1776 | next_frame = get_next_frame (next_frame); | |
1777 | if (next_frame | |
f089c433 | 1778 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
5769d3cd | 1779 | return 0; |
5769d3cd | 1780 | |
a8c99f38 JB |
1781 | /* If we really have a frameless function, %r14 must be valid |
1782 | -- in particular, it must point to a different function. */ | |
f089c433 | 1783 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
a8c99f38 JB |
1784 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
1785 | if (get_pc_function_start (reg) == func) | |
5769d3cd | 1786 | { |
a8c99f38 JB |
1787 | /* However, there is one case where it *is* valid for %r14 |
1788 | to point to the same function -- if this is a recursive | |
1789 | call, and we have stopped in the prologue *before* the | |
1790 | stack frame was allocated. | |
1791 | ||
1792 | Recognize this case by looking ahead a bit ... */ | |
5769d3cd | 1793 | |
a8c99f38 | 1794 | struct s390_prologue_data data2; |
3fc46200 | 1795 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
a8c99f38 JB |
1796 | |
1797 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) | |
34201ae3 UW |
1798 | && pv_is_register (*sp, S390_SP_REGNUM) |
1799 | && sp->k != 0)) | |
a8c99f38 | 1800 | return 0; |
5769d3cd | 1801 | } |
5769d3cd | 1802 | } |
5769d3cd AC |
1803 | |
1804 | ||
a8c99f38 JB |
1805 | /* OK, we've found valid prologue data. */ |
1806 | size = -sp->k; | |
5769d3cd | 1807 | |
a8c99f38 JB |
1808 | /* If the frame pointer originally also holds the same value |
1809 | as the stack pointer, we're probably using it. If it holds | |
1810 | some other value -- even a constant offset -- it is most | |
1811 | likely used as temp register. */ | |
3fc46200 | 1812 | if (pv_is_identical (*sp, *fp)) |
a8c99f38 JB |
1813 | frame_pointer = S390_FRAME_REGNUM; |
1814 | else | |
1815 | frame_pointer = S390_SP_REGNUM; | |
1816 | ||
34201ae3 UW |
1817 | /* If we've detected a function with stack frame, we'll still have to |
1818 | treat it as frameless if we're currently within the function epilog | |
c378eb4e | 1819 | code at a point where the frame pointer has already been restored. |
a8c99f38 | 1820 | This can only happen in an innermost frame. */ |
0e100dab AC |
1821 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
1822 | instead the code should simpliy rely on its analysis. */ | |
edb3359d DJ |
1823 | next_frame = get_next_frame (this_frame); |
1824 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1825 | next_frame = get_next_frame (next_frame); | |
f089c433 | 1826 | if (size > 0 |
edb3359d | 1827 | && (next_frame == NULL |
f089c433 | 1828 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
5769d3cd | 1829 | { |
a8c99f38 JB |
1830 | /* See the comment in s390_in_function_epilogue_p on why this is |
1831 | not completely reliable ... */ | |
f089c433 | 1832 | if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) |
5769d3cd | 1833 | { |
a8c99f38 JB |
1834 | memset (&data, 0, sizeof (data)); |
1835 | size = 0; | |
1836 | frame_pointer = S390_SP_REGNUM; | |
5769d3cd | 1837 | } |
5769d3cd | 1838 | } |
5769d3cd | 1839 | |
a8c99f38 JB |
1840 | /* Once we know the frame register and the frame size, we can unwind |
1841 | the current value of the frame register from the next frame, and | |
34201ae3 | 1842 | add back the frame size to arrive that the previous frame's |
a8c99f38 | 1843 | stack pointer value. */ |
f089c433 | 1844 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
121d8485 | 1845 | cfa = prev_sp + 16*word_size + 32; |
5769d3cd | 1846 | |
7803799a UW |
1847 | /* Set up ABI call-saved/call-clobbered registers. */ |
1848 | for (i = 0; i < S390_NUM_REGS; i++) | |
1849 | if (!s390_register_call_saved (gdbarch, i)) | |
1850 | trad_frame_set_unknown (info->saved_regs, i); | |
1851 | ||
1852 | /* CC is always call-clobbered. */ | |
d6db1fab | 1853 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
7803799a | 1854 | |
121d8485 UW |
1855 | /* Record the addresses of all register spill slots the prologue parser |
1856 | has recognized. Consider only registers defined as call-saved by the | |
1857 | ABI; for call-clobbered registers the parser may have recognized | |
1858 | spurious stores. */ | |
5769d3cd | 1859 | |
7803799a UW |
1860 | for (i = 0; i < 16; i++) |
1861 | if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) | |
1862 | && data.gpr_slot[i] != 0) | |
121d8485 | 1863 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; |
a8c99f38 | 1864 | |
7803799a UW |
1865 | for (i = 0; i < 16; i++) |
1866 | if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) | |
1867 | && data.fpr_slot[i] != 0) | |
1868 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; | |
a8c99f38 JB |
1869 | |
1870 | /* Function return will set PC to %r14. */ | |
d6db1fab | 1871 | info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1872 | |
1873 | /* In frameless functions, we unwind simply by moving the return | |
1874 | address to the PC. However, if we actually stored to the | |
1875 | save area, use that -- we might only think the function frameless | |
1876 | because we're in the middle of the prologue ... */ | |
1877 | if (size == 0 | |
d6db1fab | 1878 | && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
a8c99f38 | 1879 | { |
d6db1fab | 1880 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
5769d3cd | 1881 | } |
a8c99f38 JB |
1882 | |
1883 | /* Another sanity check: unless this is a frameless function, | |
1884 | we should have found spill slots for SP and PC. | |
1885 | If not, we cannot unwind further -- this happens e.g. in | |
1886 | libc's thread_start routine. */ | |
1887 | if (size > 0) | |
5769d3cd | 1888 | { |
a8c99f38 | 1889 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
d6db1fab | 1890 | || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
a8c99f38 | 1891 | prev_sp = -1; |
5769d3cd | 1892 | } |
a8c99f38 JB |
1893 | |
1894 | /* We use the current value of the frame register as local_base, | |
1895 | and the top of the register save area as frame_base. */ | |
1896 | if (prev_sp != -1) | |
1897 | { | |
1898 | info->frame_base = prev_sp + 16*word_size + 32; | |
1899 | info->local_base = prev_sp - size; | |
1900 | } | |
1901 | ||
1902 | info->func = func; | |
1903 | return 1; | |
5769d3cd AC |
1904 | } |
1905 | ||
a78f21af | 1906 | static void |
f089c433 | 1907 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1908 | struct s390_unwind_cache *info) |
5769d3cd | 1909 | { |
f089c433 | 1910 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1911 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1912 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1913 | CORE_ADDR backchain; |
1914 | ULONGEST reg; | |
1915 | LONGEST sp; | |
7803799a UW |
1916 | int i; |
1917 | ||
1918 | /* Set up ABI call-saved/call-clobbered registers. */ | |
1919 | for (i = 0; i < S390_NUM_REGS; i++) | |
1920 | if (!s390_register_call_saved (gdbarch, i)) | |
1921 | trad_frame_set_unknown (info->saved_regs, i); | |
1922 | ||
1923 | /* CC is always call-clobbered. */ | |
d6db1fab | 1924 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
a8c99f38 JB |
1925 | |
1926 | /* Get the backchain. */ | |
f089c433 | 1927 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
e17a4113 | 1928 | backchain = read_memory_unsigned_integer (reg, word_size, byte_order); |
a8c99f38 JB |
1929 | |
1930 | /* A zero backchain terminates the frame chain. As additional | |
1931 | sanity check, let's verify that the spill slot for SP in the | |
1932 | save area pointed to by the backchain in fact links back to | |
1933 | the save area. */ | |
1934 | if (backchain != 0 | |
e17a4113 UW |
1935 | && safe_read_memory_integer (backchain + 15*word_size, |
1936 | word_size, byte_order, &sp) | |
a8c99f38 JB |
1937 | && (CORE_ADDR)sp == backchain) |
1938 | { | |
1939 | /* We don't know which registers were saved, but it will have | |
34201ae3 UW |
1940 | to be at least %r14 and %r15. This will allow us to continue |
1941 | unwinding, but other prev-frame registers may be incorrect ... */ | |
a8c99f38 JB |
1942 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; |
1943 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; | |
1944 | ||
1945 | /* Function return will set PC to %r14. */ | |
d6db1fab | 1946 | info->saved_regs[S390_PSWA_REGNUM] |
7803799a | 1947 | = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1948 | |
1949 | /* We use the current value of the frame register as local_base, | |
34201ae3 | 1950 | and the top of the register save area as frame_base. */ |
a8c99f38 JB |
1951 | info->frame_base = backchain + 16*word_size + 32; |
1952 | info->local_base = reg; | |
1953 | } | |
1954 | ||
f089c433 | 1955 | info->func = get_frame_pc (this_frame); |
5769d3cd AC |
1956 | } |
1957 | ||
a8c99f38 | 1958 | static struct s390_unwind_cache * |
f089c433 | 1959 | s390_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 JB |
1960 | void **this_prologue_cache) |
1961 | { | |
1962 | struct s390_unwind_cache *info; | |
62261490 | 1963 | |
a8c99f38 JB |
1964 | if (*this_prologue_cache) |
1965 | return *this_prologue_cache; | |
1966 | ||
1967 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); | |
1968 | *this_prologue_cache = info; | |
f089c433 | 1969 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1970 | info->func = -1; |
1971 | info->frame_base = -1; | |
1972 | info->local_base = -1; | |
1973 | ||
492d29ea | 1974 | TRY |
62261490 PA |
1975 | { |
1976 | /* Try to use prologue analysis to fill the unwind cache. | |
1977 | If this fails, fall back to reading the stack backchain. */ | |
1978 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) | |
1979 | s390_backchain_frame_unwind_cache (this_frame, info); | |
1980 | } | |
492d29ea | 1981 | CATCH (ex, RETURN_MASK_ERROR) |
7556d4a4 PA |
1982 | { |
1983 | if (ex.error != NOT_AVAILABLE_ERROR) | |
1984 | throw_exception (ex); | |
1985 | } | |
492d29ea | 1986 | END_CATCH |
a8c99f38 JB |
1987 | |
1988 | return info; | |
1989 | } | |
5769d3cd | 1990 | |
a78f21af | 1991 | static void |
f089c433 | 1992 | s390_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1993 | void **this_prologue_cache, |
1994 | struct frame_id *this_id) | |
5769d3cd | 1995 | { |
a8c99f38 | 1996 | struct s390_unwind_cache *info |
f089c433 | 1997 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
5769d3cd | 1998 | |
a8c99f38 JB |
1999 | if (info->frame_base == -1) |
2000 | return; | |
5769d3cd | 2001 | |
a8c99f38 | 2002 | *this_id = frame_id_build (info->frame_base, info->func); |
5769d3cd AC |
2003 | } |
2004 | ||
f089c433 UW |
2005 | static struct value * |
2006 | s390_frame_prev_register (struct frame_info *this_frame, | |
2007 | void **this_prologue_cache, int regnum) | |
a8c99f38 | 2008 | { |
7803799a | 2009 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 2010 | struct s390_unwind_cache *info |
f089c433 | 2011 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
7803799a | 2012 | |
d6db1fab | 2013 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2014 | } |
2015 | ||
2016 | static const struct frame_unwind s390_frame_unwind = { | |
2017 | NORMAL_FRAME, | |
8fbca658 | 2018 | default_frame_unwind_stop_reason, |
a8c99f38 | 2019 | s390_frame_this_id, |
f089c433 UW |
2020 | s390_frame_prev_register, |
2021 | NULL, | |
2022 | default_frame_sniffer | |
a8c99f38 JB |
2023 | }; |
2024 | ||
5769d3cd | 2025 | |
8e645ae7 AC |
2026 | /* Code stubs and their stack frames. For things like PLTs and NULL |
2027 | function calls (where there is no true frame and the return address | |
2028 | is in the RETADDR register). */ | |
a8c99f38 | 2029 | |
8e645ae7 AC |
2030 | struct s390_stub_unwind_cache |
2031 | { | |
a8c99f38 JB |
2032 | CORE_ADDR frame_base; |
2033 | struct trad_frame_saved_reg *saved_regs; | |
2034 | }; | |
2035 | ||
8e645ae7 | 2036 | static struct s390_stub_unwind_cache * |
f089c433 | 2037 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
8e645ae7 | 2038 | void **this_prologue_cache) |
5769d3cd | 2039 | { |
f089c433 | 2040 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 2041 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
8e645ae7 | 2042 | struct s390_stub_unwind_cache *info; |
a8c99f38 | 2043 | ULONGEST reg; |
5c3cf190 | 2044 | |
a8c99f38 JB |
2045 | if (*this_prologue_cache) |
2046 | return *this_prologue_cache; | |
5c3cf190 | 2047 | |
8e645ae7 | 2048 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
a8c99f38 | 2049 | *this_prologue_cache = info; |
f089c433 | 2050 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
2051 | |
2052 | /* The return address is in register %r14. */ | |
d6db1fab | 2053 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
a8c99f38 JB |
2054 | |
2055 | /* Retrieve stack pointer and determine our frame base. */ | |
f089c433 | 2056 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
a8c99f38 JB |
2057 | info->frame_base = reg + 16*word_size + 32; |
2058 | ||
2059 | return info; | |
5769d3cd AC |
2060 | } |
2061 | ||
a8c99f38 | 2062 | static void |
f089c433 | 2063 | s390_stub_frame_this_id (struct frame_info *this_frame, |
8e645ae7 AC |
2064 | void **this_prologue_cache, |
2065 | struct frame_id *this_id) | |
5769d3cd | 2066 | { |
8e645ae7 | 2067 | struct s390_stub_unwind_cache *info |
f089c433 UW |
2068 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
2069 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
a8c99f38 | 2070 | } |
5769d3cd | 2071 | |
f089c433 UW |
2072 | static struct value * |
2073 | s390_stub_frame_prev_register (struct frame_info *this_frame, | |
2074 | void **this_prologue_cache, int regnum) | |
8e645ae7 AC |
2075 | { |
2076 | struct s390_stub_unwind_cache *info | |
f089c433 | 2077 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
d6db1fab | 2078 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2079 | } |
2080 | ||
f089c433 UW |
2081 | static int |
2082 | s390_stub_frame_sniffer (const struct frame_unwind *self, | |
2083 | struct frame_info *this_frame, | |
2084 | void **this_prologue_cache) | |
a8c99f38 | 2085 | { |
93d42b30 | 2086 | CORE_ADDR addr_in_block; |
8e645ae7 AC |
2087 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
2088 | ||
2089 | /* If the current PC points to non-readable memory, we assume we | |
2090 | have trapped due to an invalid function pointer call. We handle | |
2091 | the non-existing current function like a PLT stub. */ | |
f089c433 | 2092 | addr_in_block = get_frame_address_in_block (this_frame); |
3e5d3a5a | 2093 | if (in_plt_section (addr_in_block) |
f089c433 UW |
2094 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
2095 | return 1; | |
2096 | return 0; | |
a8c99f38 | 2097 | } |
5769d3cd | 2098 | |
f089c433 UW |
2099 | static const struct frame_unwind s390_stub_frame_unwind = { |
2100 | NORMAL_FRAME, | |
8fbca658 | 2101 | default_frame_unwind_stop_reason, |
f089c433 UW |
2102 | s390_stub_frame_this_id, |
2103 | s390_stub_frame_prev_register, | |
2104 | NULL, | |
2105 | s390_stub_frame_sniffer | |
2106 | }; | |
2107 | ||
5769d3cd | 2108 | |
a8c99f38 | 2109 | /* Signal trampoline stack frames. */ |
5769d3cd | 2110 | |
a8c99f38 JB |
2111 | struct s390_sigtramp_unwind_cache { |
2112 | CORE_ADDR frame_base; | |
2113 | struct trad_frame_saved_reg *saved_regs; | |
2114 | }; | |
5769d3cd | 2115 | |
a8c99f38 | 2116 | static struct s390_sigtramp_unwind_cache * |
f089c433 | 2117 | s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 2118 | void **this_prologue_cache) |
5769d3cd | 2119 | { |
f089c433 | 2120 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 2121 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2122 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 2123 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
2124 | struct s390_sigtramp_unwind_cache *info; |
2125 | ULONGEST this_sp, prev_sp; | |
7803799a | 2126 | CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off; |
a8c99f38 JB |
2127 | int i; |
2128 | ||
2129 | if (*this_prologue_cache) | |
2130 | return *this_prologue_cache; | |
5769d3cd | 2131 | |
a8c99f38 JB |
2132 | info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); |
2133 | *this_prologue_cache = info; | |
f089c433 | 2134 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 | 2135 | |
f089c433 UW |
2136 | this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2137 | next_ra = get_frame_pc (this_frame); | |
a8c99f38 JB |
2138 | next_cfa = this_sp + 16*word_size + 32; |
2139 | ||
2140 | /* New-style RT frame: | |
2141 | retcode + alignment (8 bytes) | |
2142 | siginfo (128 bytes) | |
c378eb4e | 2143 | ucontext (contains sigregs at offset 5 words). */ |
a8c99f38 JB |
2144 | if (next_ra == next_cfa) |
2145 | { | |
f0f63663 | 2146 | sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); |
7803799a UW |
2147 | /* sigregs are followed by uc_sigmask (8 bytes), then by the |
2148 | upper GPR halves if present. */ | |
2149 | sigreg_high_off = 8; | |
a8c99f38 JB |
2150 | } |
2151 | ||
2152 | /* Old-style RT frame and all non-RT frames: | |
2153 | old signal mask (8 bytes) | |
c378eb4e | 2154 | pointer to sigregs. */ |
5769d3cd AC |
2155 | else |
2156 | { | |
e17a4113 UW |
2157 | sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, |
2158 | word_size, byte_order); | |
7803799a UW |
2159 | /* sigregs are followed by signo (4 bytes), then by the |
2160 | upper GPR halves if present. */ | |
2161 | sigreg_high_off = 4; | |
a8c99f38 | 2162 | } |
5769d3cd | 2163 | |
a8c99f38 | 2164 | /* The sigregs structure looks like this: |
34201ae3 UW |
2165 | long psw_mask; |
2166 | long psw_addr; | |
2167 | long gprs[16]; | |
2168 | int acrs[16]; | |
2169 | int fpc; | |
2170 | int __pad; | |
2171 | double fprs[16]; */ | |
5769d3cd | 2172 | |
7803799a UW |
2173 | /* PSW mask and address. */ |
2174 | info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr; | |
a8c99f38 | 2175 | sigreg_ptr += word_size; |
7803799a | 2176 | info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr; |
a8c99f38 JB |
2177 | sigreg_ptr += word_size; |
2178 | ||
2179 | /* Then the GPRs. */ | |
2180 | for (i = 0; i < 16; i++) | |
2181 | { | |
2182 | info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; | |
2183 | sigreg_ptr += word_size; | |
2184 | } | |
2185 | ||
2186 | /* Then the ACRs. */ | |
2187 | for (i = 0; i < 16; i++) | |
2188 | { | |
2189 | info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; | |
2190 | sigreg_ptr += 4; | |
5769d3cd | 2191 | } |
5769d3cd | 2192 | |
a8c99f38 JB |
2193 | /* The floating-point control word. */ |
2194 | info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; | |
2195 | sigreg_ptr += 8; | |
5769d3cd | 2196 | |
a8c99f38 JB |
2197 | /* And finally the FPRs. */ |
2198 | for (i = 0; i < 16; i++) | |
2199 | { | |
2200 | info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; | |
2201 | sigreg_ptr += 8; | |
2202 | } | |
2203 | ||
7803799a UW |
2204 | /* If we have them, the GPR upper halves are appended at the end. */ |
2205 | sigreg_ptr += sigreg_high_off; | |
2206 | if (tdep->gpr_full_regnum != -1) | |
2207 | for (i = 0; i < 16; i++) | |
2208 | { | |
34201ae3 | 2209 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr; |
7803799a UW |
2210 | sigreg_ptr += 4; |
2211 | } | |
2212 | ||
a8c99f38 JB |
2213 | /* Restore the previous frame's SP. */ |
2214 | prev_sp = read_memory_unsigned_integer ( | |
2215 | info->saved_regs[S390_SP_REGNUM].addr, | |
e17a4113 | 2216 | word_size, byte_order); |
5769d3cd | 2217 | |
a8c99f38 JB |
2218 | /* Determine our frame base. */ |
2219 | info->frame_base = prev_sp + 16*word_size + 32; | |
5769d3cd | 2220 | |
a8c99f38 | 2221 | return info; |
5769d3cd AC |
2222 | } |
2223 | ||
a8c99f38 | 2224 | static void |
f089c433 | 2225 | s390_sigtramp_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
2226 | void **this_prologue_cache, |
2227 | struct frame_id *this_id) | |
5769d3cd | 2228 | { |
a8c99f38 | 2229 | struct s390_sigtramp_unwind_cache *info |
f089c433 UW |
2230 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
2231 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
5769d3cd AC |
2232 | } |
2233 | ||
f089c433 UW |
2234 | static struct value * |
2235 | s390_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
2236 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
2237 | { |
2238 | struct s390_sigtramp_unwind_cache *info | |
f089c433 | 2239 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
d6db1fab | 2240 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2241 | } |
2242 | ||
f089c433 UW |
2243 | static int |
2244 | s390_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
2245 | struct frame_info *this_frame, | |
2246 | void **this_prologue_cache) | |
5769d3cd | 2247 | { |
f089c433 | 2248 | CORE_ADDR pc = get_frame_pc (this_frame); |
a8c99f38 | 2249 | bfd_byte sigreturn[2]; |
4c8287ac | 2250 | |
8defab1a | 2251 | if (target_read_memory (pc, sigreturn, 2)) |
f089c433 | 2252 | return 0; |
4c8287ac | 2253 | |
237b092b | 2254 | if (sigreturn[0] != op_svc) |
f089c433 | 2255 | return 0; |
5769d3cd | 2256 | |
a8c99f38 JB |
2257 | if (sigreturn[1] != 119 /* sigreturn */ |
2258 | && sigreturn[1] != 173 /* rt_sigreturn */) | |
f089c433 | 2259 | return 0; |
34201ae3 | 2260 | |
f089c433 | 2261 | return 1; |
5769d3cd AC |
2262 | } |
2263 | ||
f089c433 UW |
2264 | static const struct frame_unwind s390_sigtramp_frame_unwind = { |
2265 | SIGTRAMP_FRAME, | |
8fbca658 | 2266 | default_frame_unwind_stop_reason, |
f089c433 UW |
2267 | s390_sigtramp_frame_this_id, |
2268 | s390_sigtramp_frame_prev_register, | |
2269 | NULL, | |
2270 | s390_sigtramp_frame_sniffer | |
2271 | }; | |
2272 | ||
237b092b AA |
2273 | /* Retrieve the syscall number at a ptrace syscall-stop. Return -1 |
2274 | upon error. */ | |
2275 | ||
2276 | static LONGEST | |
2277 | s390_linux_get_syscall_number (struct gdbarch *gdbarch, | |
2278 | ptid_t ptid) | |
2279 | { | |
2280 | struct regcache *regs = get_thread_regcache (ptid); | |
2281 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2282 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
2283 | ULONGEST pc; | |
2284 | ULONGEST svc_number = -1; | |
2285 | unsigned opcode; | |
2286 | ||
2287 | /* Assume that the PC points after the 2-byte SVC instruction. We | |
2288 | don't currently support SVC via EXECUTE. */ | |
2289 | regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc); | |
2290 | pc -= 2; | |
2291 | opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order); | |
2292 | if (opcode != op_svc) | |
2293 | return -1; | |
2294 | ||
2295 | svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1, | |
2296 | byte_order); | |
2297 | if (svc_number == 0) | |
2298 | regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number); | |
2299 | ||
2300 | return svc_number; | |
2301 | } | |
2302 | ||
4c8287ac | 2303 | |
a8c99f38 JB |
2304 | /* Frame base handling. */ |
2305 | ||
2306 | static CORE_ADDR | |
f089c433 | 2307 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
4c8287ac | 2308 | { |
a8c99f38 | 2309 | struct s390_unwind_cache *info |
f089c433 | 2310 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2311 | return info->frame_base; |
2312 | } | |
2313 | ||
2314 | static CORE_ADDR | |
f089c433 | 2315 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
a8c99f38 JB |
2316 | { |
2317 | struct s390_unwind_cache *info | |
f089c433 | 2318 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2319 | return info->local_base; |
2320 | } | |
2321 | ||
2322 | static const struct frame_base s390_frame_base = { | |
2323 | &s390_frame_unwind, | |
2324 | s390_frame_base_address, | |
2325 | s390_local_base_address, | |
2326 | s390_local_base_address | |
2327 | }; | |
2328 | ||
2329 | static CORE_ADDR | |
2330 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2331 | { | |
7803799a | 2332 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2333 | ULONGEST pc; |
7803799a | 2334 | pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); |
a8c99f38 JB |
2335 | return gdbarch_addr_bits_remove (gdbarch, pc); |
2336 | } | |
2337 | ||
2338 | static CORE_ADDR | |
2339 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2340 | { | |
2341 | ULONGEST sp; | |
2342 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); | |
2343 | return gdbarch_addr_bits_remove (gdbarch, sp); | |
4c8287ac JB |
2344 | } |
2345 | ||
2346 | ||
a431654a AC |
2347 | /* DWARF-2 frame support. */ |
2348 | ||
7803799a UW |
2349 | static struct value * |
2350 | s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, | |
2351 | int regnum) | |
2352 | { | |
d6db1fab | 2353 | return s390_unwind_pseudo_register (this_frame, regnum); |
7803799a UW |
2354 | } |
2355 | ||
a431654a AC |
2356 | static void |
2357 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
34201ae3 | 2358 | struct dwarf2_frame_state_reg *reg, |
4a4e5149 | 2359 | struct frame_info *this_frame) |
a431654a AC |
2360 | { |
2361 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2362 | ||
d6db1fab UW |
2363 | /* The condition code (and thus PSW mask) is call-clobbered. */ |
2364 | if (regnum == S390_PSWM_REGNUM) | |
2365 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
2366 | ||
2367 | /* The PSW address unwinds to the return address. */ | |
2368 | else if (regnum == S390_PSWA_REGNUM) | |
2369 | reg->how = DWARF2_FRAME_REG_RA; | |
2370 | ||
7803799a UW |
2371 | /* Fixed registers are call-saved or call-clobbered |
2372 | depending on the ABI in use. */ | |
d6db1fab | 2373 | else if (regnum < S390_NUM_REGS) |
a431654a | 2374 | { |
7803799a | 2375 | if (s390_register_call_saved (gdbarch, regnum)) |
a431654a | 2376 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; |
7803799a | 2377 | else |
a431654a | 2378 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
7803799a | 2379 | } |
a431654a | 2380 | |
d6db1fab UW |
2381 | /* We install a special function to unwind pseudos. */ |
2382 | else | |
7803799a UW |
2383 | { |
2384 | reg->how = DWARF2_FRAME_REG_FN; | |
2385 | reg->loc.fn = s390_dwarf2_prev_register; | |
a431654a AC |
2386 | } |
2387 | } | |
2388 | ||
2389 | ||
b0cf273e JB |
2390 | /* Dummy function calls. */ |
2391 | ||
80f75320 AA |
2392 | /* Unwrap any single-field structs in TYPE and return the effective |
2393 | "inner" type. E.g., yield "float" for all these cases: | |
20a940cc | 2394 | |
80f75320 AA |
2395 | float x; |
2396 | struct { float x }; | |
2397 | struct { struct { float x; } x; }; | |
2398 | struct { struct { struct { float x; } x; } x; }; */ | |
20a940cc | 2399 | |
80f75320 AA |
2400 | static struct type * |
2401 | s390_effective_inner_type (struct type *type) | |
20a940cc | 2402 | { |
80f75320 AA |
2403 | while (TYPE_CODE (type) == TYPE_CODE_STRUCT |
2404 | && TYPE_NFIELDS (type) == 1) | |
2405 | type = check_typedef (TYPE_FIELD_TYPE (type, 0)); | |
2406 | return type; | |
20a940cc JB |
2407 | } |
2408 | ||
80f75320 AA |
2409 | /* Return non-zero if TYPE should be passed like "float" or |
2410 | "double". */ | |
20a940cc | 2411 | |
20a940cc | 2412 | static int |
80f75320 | 2413 | s390_function_arg_float (struct type *type) |
20a940cc | 2414 | { |
80f75320 AA |
2415 | /* Note that long double as well as complex types are intentionally |
2416 | excluded. */ | |
2417 | if (TYPE_LENGTH (type) > 8) | |
2418 | return 0; | |
20a940cc | 2419 | |
80f75320 AA |
2420 | /* A struct containing just a float or double is passed like a float |
2421 | or double. */ | |
2422 | type = s390_effective_inner_type (type); | |
20a940cc | 2423 | |
20a940cc | 2424 | return (TYPE_CODE (type) == TYPE_CODE_FLT |
80f75320 | 2425 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT); |
20a940cc JB |
2426 | } |
2427 | ||
6dbc9c04 | 2428 | /* Determine whether N is a power of two. */ |
20a940cc | 2429 | |
78f8b424 | 2430 | static int |
b0cf273e | 2431 | is_power_of_two (unsigned int n) |
78f8b424 | 2432 | { |
6dbc9c04 | 2433 | return n && ((n & (n - 1)) == 0); |
78f8b424 JB |
2434 | } |
2435 | ||
80f75320 AA |
2436 | /* For an argument whose type is TYPE and which is not passed like a |
2437 | float, return non-zero if it should be passed like "int" or "long | |
2438 | long". */ | |
4d819d0e | 2439 | |
78f8b424 | 2440 | static int |
b0cf273e | 2441 | s390_function_arg_integer (struct type *type) |
78f8b424 | 2442 | { |
80f75320 AA |
2443 | enum type_code code = TYPE_CODE (type); |
2444 | ||
354ecfd5 | 2445 | if (TYPE_LENGTH (type) > 8) |
b0cf273e | 2446 | return 0; |
78f8b424 | 2447 | |
80f75320 AA |
2448 | if (code == TYPE_CODE_INT |
2449 | || code == TYPE_CODE_ENUM | |
2450 | || code == TYPE_CODE_RANGE | |
2451 | || code == TYPE_CODE_CHAR | |
2452 | || code == TYPE_CODE_BOOL | |
2453 | || code == TYPE_CODE_PTR | |
2454 | || code == TYPE_CODE_REF) | |
2455 | return 1; | |
2456 | ||
2457 | return ((code == TYPE_CODE_UNION || code == TYPE_CODE_STRUCT) | |
2458 | && is_power_of_two (TYPE_LENGTH (type))); | |
78f8b424 JB |
2459 | } |
2460 | ||
80f75320 AA |
2461 | /* Argument passing state: Internal data structure passed to helper |
2462 | routines of s390_push_dummy_call. */ | |
78f8b424 | 2463 | |
80f75320 AA |
2464 | struct s390_arg_state |
2465 | { | |
2466 | /* Register cache, or NULL, if we are in "preparation mode". */ | |
2467 | struct regcache *regcache; | |
2468 | /* Next available general/floating-point register for argument | |
2469 | passing. */ | |
2470 | int gr, fr; | |
2471 | /* Current pointer to copy area (grows downwards). */ | |
2472 | CORE_ADDR copy; | |
2473 | /* Current pointer to parameter area (grows upwards). */ | |
2474 | CORE_ADDR argp; | |
2475 | }; | |
78f8b424 | 2476 | |
80f75320 AA |
2477 | /* Prepare one argument ARG for a dummy call and update the argument |
2478 | passing state AS accordingly. If the regcache field in AS is set, | |
2479 | operate in "write mode" and write ARG into the inferior. Otherwise | |
2480 | run "preparation mode" and skip all updates to the inferior. */ | |
78f8b424 | 2481 | |
80f75320 AA |
2482 | static void |
2483 | s390_handle_arg (struct s390_arg_state *as, struct value *arg, | |
2484 | struct gdbarch_tdep *tdep, int word_size, | |
2485 | enum bfd_endian byte_order) | |
78f8b424 | 2486 | { |
80f75320 AA |
2487 | struct type *type = check_typedef (value_type (arg)); |
2488 | unsigned int length = TYPE_LENGTH (type); | |
2489 | int write_mode = as->regcache != NULL; | |
78f8b424 | 2490 | |
80f75320 AA |
2491 | if (s390_function_arg_float (type)) |
2492 | { | |
2493 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass | |
2494 | arguments. The GNU/Linux for zSeries ABI uses 0, 2, 4, and | |
2495 | 6. */ | |
2496 | if (as->fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) | |
2497 | { | |
2498 | /* When we store a single-precision value in an FP register, | |
2499 | it occupies the leftmost bits. */ | |
2500 | if (write_mode) | |
2501 | regcache_cooked_write_part (as->regcache, | |
2502 | S390_F0_REGNUM + as->fr, | |
2503 | 0, length, | |
2504 | value_contents (arg)); | |
2505 | as->fr += 2; | |
2506 | } | |
2507 | else | |
2508 | { | |
2509 | /* When we store a single-precision value in a stack slot, | |
2510 | it occupies the rightmost bits. */ | |
2511 | as->argp = align_up (as->argp + length, word_size); | |
2512 | if (write_mode) | |
2513 | write_memory (as->argp - length, value_contents (arg), | |
2514 | length); | |
2515 | } | |
2516 | } | |
2517 | else if (s390_function_arg_integer (type) && length <= word_size) | |
78f8b424 | 2518 | { |
80f75320 | 2519 | ULONGEST val; |
78f8b424 | 2520 | |
80f75320 | 2521 | if (write_mode) |
34201ae3 | 2522 | { |
80f75320 AA |
2523 | /* Place value in least significant bits of the register or |
2524 | memory word and sign- or zero-extend to full word size. | |
2525 | This also applies to a struct or union. */ | |
2526 | val = TYPE_UNSIGNED (type) | |
2527 | ? extract_unsigned_integer (value_contents (arg), | |
2528 | length, byte_order) | |
2529 | : extract_signed_integer (value_contents (arg), | |
2530 | length, byte_order); | |
2531 | } | |
78f8b424 | 2532 | |
80f75320 AA |
2533 | if (as->gr <= 6) |
2534 | { | |
2535 | if (write_mode) | |
2536 | regcache_cooked_write_unsigned (as->regcache, | |
2537 | S390_R0_REGNUM + as->gr, | |
2538 | val); | |
2539 | as->gr++; | |
2540 | } | |
2541 | else | |
2542 | { | |
2543 | if (write_mode) | |
2544 | write_memory_unsigned_integer (as->argp, word_size, | |
2545 | byte_order, val); | |
2546 | as->argp += word_size; | |
34201ae3 | 2547 | } |
78f8b424 | 2548 | } |
80f75320 AA |
2549 | else if (s390_function_arg_integer (type) && length == 8) |
2550 | { | |
2551 | if (as->gr <= 5) | |
2552 | { | |
2553 | if (write_mode) | |
2554 | { | |
2555 | regcache_cooked_write (as->regcache, | |
2556 | S390_R0_REGNUM + as->gr, | |
2557 | value_contents (arg)); | |
2558 | regcache_cooked_write (as->regcache, | |
2559 | S390_R0_REGNUM + as->gr + 1, | |
2560 | value_contents (arg) + word_size); | |
2561 | } | |
2562 | as->gr += 2; | |
2563 | } | |
2564 | else | |
2565 | { | |
2566 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG | |
2567 | in it, then don't go back and use it again later. */ | |
2568 | as->gr = 7; | |
78f8b424 | 2569 | |
80f75320 AA |
2570 | if (write_mode) |
2571 | write_memory (as->argp, value_contents (arg), length); | |
2572 | as->argp += length; | |
2573 | } | |
2574 | } | |
2575 | else | |
2576 | { | |
2577 | /* This argument type is never passed in registers. Place the | |
2578 | value in the copy area and pass a pointer to it. Use 8-byte | |
2579 | alignment as a conservative assumption. */ | |
2580 | as->copy = align_down (as->copy - length, 8); | |
2581 | if (write_mode) | |
2582 | write_memory (as->copy, value_contents (arg), length); | |
2583 | ||
2584 | if (as->gr <= 6) | |
2585 | { | |
2586 | if (write_mode) | |
2587 | regcache_cooked_write_unsigned (as->regcache, | |
2588 | S390_R0_REGNUM + as->gr, | |
2589 | as->copy); | |
2590 | as->gr++; | |
2591 | } | |
2592 | else | |
2593 | { | |
2594 | if (write_mode) | |
2595 | write_memory_unsigned_integer (as->argp, word_size, | |
2596 | byte_order, as->copy); | |
2597 | as->argp += word_size; | |
2598 | } | |
2599 | } | |
78f8b424 JB |
2600 | } |
2601 | ||
78f8b424 | 2602 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in |
ca557f44 AC |
2603 | place to be passed to a function, as specified by the "GNU/Linux |
2604 | for S/390 ELF Application Binary Interface Supplement". | |
78f8b424 JB |
2605 | |
2606 | SP is the current stack pointer. We must put arguments, links, | |
2607 | padding, etc. whereever they belong, and return the new stack | |
2608 | pointer value. | |
34201ae3 | 2609 | |
78f8b424 JB |
2610 | If STRUCT_RETURN is non-zero, then the function we're calling is |
2611 | going to return a structure by value; STRUCT_ADDR is the address of | |
2612 | a block we've allocated for it on the stack. | |
2613 | ||
2614 | Our caller has taken care of any type promotions needed to satisfy | |
2615 | prototypes or the old K&R argument-passing rules. */ | |
80f75320 | 2616 | |
a78f21af | 2617 | static CORE_ADDR |
7d9b040b | 2618 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
b0cf273e JB |
2619 | struct regcache *regcache, CORE_ADDR bp_addr, |
2620 | int nargs, struct value **args, CORE_ADDR sp, | |
2621 | int struct_return, CORE_ADDR struct_addr) | |
5769d3cd | 2622 | { |
b0cf273e JB |
2623 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
2624 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
e17a4113 | 2625 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
78f8b424 | 2626 | int i; |
80f75320 AA |
2627 | struct s390_arg_state arg_state, arg_prep; |
2628 | CORE_ADDR param_area_start, new_sp; | |
5769d3cd | 2629 | |
80f75320 AA |
2630 | arg_prep.copy = sp; |
2631 | arg_prep.gr = struct_return ? 3 : 2; | |
2632 | arg_prep.fr = 0; | |
2633 | arg_prep.argp = 0; | |
2634 | arg_prep.regcache = NULL; | |
5769d3cd | 2635 | |
80f75320 AA |
2636 | /* Initialize arg_state for "preparation mode". */ |
2637 | arg_state = arg_prep; | |
5769d3cd | 2638 | |
80f75320 AA |
2639 | /* Update arg_state.copy with the start of the reference-to-copy area |
2640 | and arg_state.argp with the size of the parameter area. */ | |
2641 | for (i = 0; i < nargs; i++) | |
2642 | s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order); | |
78f8b424 | 2643 | |
80f75320 | 2644 | param_area_start = align_down (arg_state.copy - arg_state.argp, 8); |
78f8b424 | 2645 | |
c0cc4c83 | 2646 | /* Allocate the standard frame areas: the register save area, the |
80f75320 AA |
2647 | word reserved for the compiler, and the back chain pointer. */ |
2648 | new_sp = param_area_start - (16 * word_size + 32); | |
2649 | ||
2650 | /* Now we have the final stack pointer. Make sure we didn't | |
2651 | underflow; on 31-bit, this would result in addresses with the | |
2652 | high bit set, which causes confusion elsewhere. Note that if we | |
2653 | error out here, stack and registers remain untouched. */ | |
2654 | if (gdbarch_addr_bits_remove (gdbarch, new_sp) != new_sp) | |
c0cc4c83 UW |
2655 | error (_("Stack overflow")); |
2656 | ||
80f75320 AA |
2657 | /* Pass the structure return address in general register 2. */ |
2658 | if (struct_return) | |
2659 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, struct_addr); | |
c0cc4c83 | 2660 | |
80f75320 AA |
2661 | /* Initialize arg_state for "write mode". */ |
2662 | arg_state = arg_prep; | |
2663 | arg_state.argp = param_area_start; | |
2664 | arg_state.regcache = regcache; | |
78f8b424 | 2665 | |
80f75320 AA |
2666 | /* Write all parameters. */ |
2667 | for (i = 0; i < nargs; i++) | |
2668 | s390_handle_arg (&arg_state, args[i], tdep, word_size, byte_order); | |
78f8b424 | 2669 | |
8de7d199 UW |
2670 | /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */ |
2671 | if (word_size == 4) | |
2672 | { | |
2673 | ULONGEST pswa; | |
2674 | regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa); | |
2675 | bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000); | |
2676 | } | |
b0cf273e | 2677 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); |
8de7d199 | 2678 | |
b0cf273e | 2679 | /* Store updated stack pointer. */ |
80f75320 | 2680 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, new_sp); |
78f8b424 | 2681 | |
a8c99f38 | 2682 | /* We need to return the 'stack part' of the frame ID, |
121d8485 | 2683 | which is actually the top of the register save area. */ |
80f75320 | 2684 | return param_area_start; |
5769d3cd AC |
2685 | } |
2686 | ||
f089c433 | 2687 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
b0cf273e JB |
2688 | dummy frame. The frame ID's base needs to match the TOS value |
2689 | returned by push_dummy_call, and the PC match the dummy frame's | |
2690 | breakpoint. */ | |
2691 | static struct frame_id | |
f089c433 | 2692 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
b0cf273e | 2693 | { |
a8c99f38 | 2694 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
f089c433 UW |
2695 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2696 | sp = gdbarch_addr_bits_remove (gdbarch, sp); | |
a8c99f38 | 2697 | |
121d8485 | 2698 | return frame_id_build (sp + 16*word_size + 32, |
34201ae3 | 2699 | get_frame_pc (this_frame)); |
b0cf273e | 2700 | } |
c8f9d51c | 2701 | |
4074e13c JB |
2702 | static CORE_ADDR |
2703 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
2704 | { | |
2705 | /* Both the 32- and 64-bit ABI's say that the stack pointer should | |
2706 | always be aligned on an eight-byte boundary. */ | |
2707 | return (addr & -8); | |
2708 | } | |
2709 | ||
2710 | ||
4e65a17e AA |
2711 | /* Helper for s390_return_value: Set or retrieve a function return |
2712 | value if it resides in a register. */ | |
b0cf273e | 2713 | |
4e65a17e AA |
2714 | static void |
2715 | s390_register_return_value (struct gdbarch *gdbarch, struct type *type, | |
2716 | struct regcache *regcache, | |
2717 | gdb_byte *out, const gdb_byte *in) | |
c8f9d51c | 2718 | { |
4e65a17e AA |
2719 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
2720 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
2721 | int length = TYPE_LENGTH (type); | |
2722 | int code = TYPE_CODE (type); | |
b0cf273e | 2723 | |
4e65a17e | 2724 | if (code == TYPE_CODE_FLT || code == TYPE_CODE_DECFLOAT) |
b0cf273e | 2725 | { |
4e65a17e AA |
2726 | /* Float-like value: left-aligned in f0. */ |
2727 | if (in != NULL) | |
2728 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, | |
2729 | 0, length, in); | |
2730 | else | |
2731 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, | |
2732 | 0, length, out); | |
2733 | } | |
2734 | else if (length <= word_size) | |
2735 | { | |
2736 | /* Integer: zero- or sign-extended in r2. */ | |
2737 | if (out != NULL) | |
2738 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, | |
2739 | word_size - length, length, out); | |
2740 | else if (TYPE_UNSIGNED (type)) | |
2741 | regcache_cooked_write_unsigned | |
2742 | (regcache, S390_R2_REGNUM, | |
2743 | extract_unsigned_integer (in, length, byte_order)); | |
2744 | else | |
2745 | regcache_cooked_write_signed | |
2746 | (regcache, S390_R2_REGNUM, | |
2747 | extract_signed_integer (in, length, byte_order)); | |
b0cf273e | 2748 | } |
4e65a17e AA |
2749 | else if (length == 2 * word_size) |
2750 | { | |
2751 | /* Double word: in r2 and r3. */ | |
2752 | if (in != NULL) | |
2753 | { | |
2754 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); | |
2755 | regcache_cooked_write (regcache, S390_R3_REGNUM, | |
2756 | in + word_size); | |
2757 | } | |
2758 | else | |
2759 | { | |
2760 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); | |
2761 | regcache_cooked_read (regcache, S390_R3_REGNUM, | |
2762 | out + word_size); | |
2763 | } | |
2764 | } | |
2765 | else | |
2766 | internal_error (__FILE__, __LINE__, _("invalid return type")); | |
c8f9d51c JB |
2767 | } |
2768 | ||
4e65a17e AA |
2769 | |
2770 | /* Implement the 'return_value' gdbarch method. */ | |
2771 | ||
b0cf273e | 2772 | static enum return_value_convention |
6a3a010b | 2773 | s390_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
2774 | struct type *type, struct regcache *regcache, |
2775 | gdb_byte *out, const gdb_byte *in) | |
5769d3cd | 2776 | { |
56b9d9ac | 2777 | enum return_value_convention rvc; |
56b9d9ac UW |
2778 | |
2779 | type = check_typedef (type); | |
56b9d9ac | 2780 | |
4e65a17e | 2781 | switch (TYPE_CODE (type)) |
b0cf273e | 2782 | { |
4e65a17e AA |
2783 | case TYPE_CODE_STRUCT: |
2784 | case TYPE_CODE_UNION: | |
2785 | case TYPE_CODE_ARRAY: | |
2786 | case TYPE_CODE_COMPLEX: | |
2787 | rvc = RETURN_VALUE_STRUCT_CONVENTION; | |
2788 | break; | |
2789 | default: | |
2790 | rvc = TYPE_LENGTH (type) <= 8 | |
2791 | ? RETURN_VALUE_REGISTER_CONVENTION | |
2792 | : RETURN_VALUE_STRUCT_CONVENTION; | |
b0cf273e | 2793 | } |
5769d3cd | 2794 | |
4e65a17e AA |
2795 | if (in != NULL || out != NULL) |
2796 | { | |
2797 | if (rvc == RETURN_VALUE_REGISTER_CONVENTION) | |
2798 | s390_register_return_value (gdbarch, type, regcache, out, in); | |
2799 | else if (in != NULL) | |
2800 | error (_("Cannot set function return value.")); | |
2801 | else | |
2802 | error (_("Function return value unknown.")); | |
b0cf273e JB |
2803 | } |
2804 | ||
2805 | return rvc; | |
2806 | } | |
5769d3cd AC |
2807 | |
2808 | ||
a8c99f38 JB |
2809 | /* Breakpoints. */ |
2810 | ||
43af2100 | 2811 | static const gdb_byte * |
c378eb4e MS |
2812 | s390_breakpoint_from_pc (struct gdbarch *gdbarch, |
2813 | CORE_ADDR *pcptr, int *lenptr) | |
5769d3cd | 2814 | { |
43af2100 | 2815 | static const gdb_byte breakpoint[] = { 0x0, 0x1 }; |
5769d3cd AC |
2816 | |
2817 | *lenptr = sizeof (breakpoint); | |
2818 | return breakpoint; | |
2819 | } | |
2820 | ||
5769d3cd | 2821 | |
a8c99f38 | 2822 | /* Address handling. */ |
5769d3cd AC |
2823 | |
2824 | static CORE_ADDR | |
24568a2c | 2825 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
5769d3cd | 2826 | { |
a8c99f38 | 2827 | return addr & 0x7fffffff; |
5769d3cd AC |
2828 | } |
2829 | ||
ffc65945 KB |
2830 | static int |
2831 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) | |
2832 | { | |
2833 | if (byte_size == 4) | |
119ac181 | 2834 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2835 | else |
2836 | return 0; | |
2837 | } | |
2838 | ||
2839 | static const char * | |
2840 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) | |
2841 | { | |
119ac181 | 2842 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
ffc65945 KB |
2843 | return "mode32"; |
2844 | else | |
2845 | return NULL; | |
2846 | } | |
2847 | ||
a78f21af | 2848 | static int |
c378eb4e MS |
2849 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
2850 | const char *name, | |
ffc65945 KB |
2851 | int *type_flags_ptr) |
2852 | { | |
2853 | if (strcmp (name, "mode32") == 0) | |
2854 | { | |
119ac181 | 2855 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2856 | return 1; |
2857 | } | |
2858 | else | |
2859 | return 0; | |
2860 | } | |
2861 | ||
60abeae4 AA |
2862 | /* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or |
2863 | "-mcmodel=large". */ | |
a2658feb JK |
2864 | |
2865 | static char * | |
2866 | s390_gcc_target_options (struct gdbarch *gdbarch) | |
2867 | { | |
60abeae4 AA |
2868 | return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31"); |
2869 | } | |
2870 | ||
2871 | /* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*" | |
2872 | for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is | |
2873 | always "s390". Note that an s390x compiler supports "-m31" as | |
2874 | well. */ | |
2875 | ||
2876 | static const char * | |
2877 | s390_gnu_triplet_regexp (struct gdbarch *gdbarch) | |
2878 | { | |
2879 | return "s390x?"; | |
a2658feb JK |
2880 | } |
2881 | ||
55aa24fb SDJ |
2882 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
2883 | gdbarch.h. */ | |
2884 | ||
2885 | static int | |
2886 | s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) | |
2887 | { | |
2888 | return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement | |
2889 | or indirection. */ | |
2890 | || *s == '%' /* Register access. */ | |
2891 | || isdigit (*s)); /* Literal number. */ | |
2892 | } | |
2893 | ||
a8c99f38 JB |
2894 | /* Set up gdbarch struct. */ |
2895 | ||
a78f21af | 2896 | static struct gdbarch * |
5769d3cd AC |
2897 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2898 | { | |
7803799a UW |
2899 | const struct target_desc *tdesc = info.target_desc; |
2900 | struct tdesc_arch_data *tdesc_data = NULL; | |
5769d3cd AC |
2901 | struct gdbarch *gdbarch; |
2902 | struct gdbarch_tdep *tdep; | |
7803799a UW |
2903 | int tdep_abi; |
2904 | int have_upper = 0; | |
c642a434 UW |
2905 | int have_linux_v1 = 0; |
2906 | int have_linux_v2 = 0; | |
5aa82d05 | 2907 | int have_tdb = 0; |
550bdf96 | 2908 | int have_vx = 0; |
7803799a | 2909 | int first_pseudo_reg, last_pseudo_reg; |
05c0465e SDJ |
2910 | static const char *const stap_register_prefixes[] = { "%", NULL }; |
2911 | static const char *const stap_register_indirection_prefixes[] = { "(", | |
2912 | NULL }; | |
2913 | static const char *const stap_register_indirection_suffixes[] = { ")", | |
2914 | NULL }; | |
7803799a UW |
2915 | |
2916 | /* Default ABI and register size. */ | |
2917 | switch (info.bfd_arch_info->mach) | |
2918 | { | |
2919 | case bfd_mach_s390_31: | |
2920 | tdep_abi = ABI_LINUX_S390; | |
2921 | break; | |
2922 | ||
2923 | case bfd_mach_s390_64: | |
2924 | tdep_abi = ABI_LINUX_ZSERIES; | |
2925 | break; | |
2926 | ||
2927 | default: | |
2928 | return NULL; | |
2929 | } | |
2930 | ||
2931 | /* Use default target description if none provided by the target. */ | |
2932 | if (!tdesc_has_registers (tdesc)) | |
2933 | { | |
2934 | if (tdep_abi == ABI_LINUX_S390) | |
2935 | tdesc = tdesc_s390_linux32; | |
2936 | else | |
2937 | tdesc = tdesc_s390x_linux64; | |
2938 | } | |
2939 | ||
2940 | /* Check any target description for validity. */ | |
2941 | if (tdesc_has_registers (tdesc)) | |
2942 | { | |
2943 | static const char *const gprs[] = { | |
2944 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
2945 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
2946 | }; | |
2947 | static const char *const fprs[] = { | |
2948 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
2949 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" | |
2950 | }; | |
2951 | static const char *const acrs[] = { | |
2952 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", | |
2953 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" | |
2954 | }; | |
2955 | static const char *const gprs_lower[] = { | |
2956 | "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", | |
2957 | "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" | |
2958 | }; | |
2959 | static const char *const gprs_upper[] = { | |
2960 | "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", | |
2961 | "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" | |
2962 | }; | |
4ac33720 UW |
2963 | static const char *const tdb_regs[] = { |
2964 | "tdb0", "tac", "tct", "atia", | |
2965 | "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7", | |
2966 | "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15" | |
2967 | }; | |
550bdf96 AA |
2968 | static const char *const vxrs_low[] = { |
2969 | "v0l", "v1l", "v2l", "v3l", "v4l", "v5l", "v6l", "v7l", "v8l", | |
2970 | "v9l", "v10l", "v11l", "v12l", "v13l", "v14l", "v15l", | |
2971 | }; | |
2972 | static const char *const vxrs_high[] = { | |
2973 | "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", "v24", | |
2974 | "v25", "v26", "v27", "v28", "v29", "v30", "v31", | |
2975 | }; | |
7803799a UW |
2976 | const struct tdesc_feature *feature; |
2977 | int i, valid_p = 1; | |
2978 | ||
2979 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); | |
2980 | if (feature == NULL) | |
2981 | return NULL; | |
2982 | ||
2983 | tdesc_data = tdesc_data_alloc (); | |
2984 | ||
2985 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2986 | S390_PSWM_REGNUM, "pswm"); | |
2987 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2988 | S390_PSWA_REGNUM, "pswa"); | |
2989 | ||
2990 | if (tdesc_unnumbered_register (feature, "r0")) | |
2991 | { | |
2992 | for (i = 0; i < 16; i++) | |
2993 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2994 | S390_R0_REGNUM + i, gprs[i]); | |
2995 | } | |
2996 | else | |
2997 | { | |
2998 | have_upper = 1; | |
2999 | ||
3000 | for (i = 0; i < 16; i++) | |
3001 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3002 | S390_R0_REGNUM + i, | |
3003 | gprs_lower[i]); | |
3004 | for (i = 0; i < 16; i++) | |
3005 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3006 | S390_R0_UPPER_REGNUM + i, | |
3007 | gprs_upper[i]); | |
3008 | } | |
3009 | ||
3010 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); | |
3011 | if (feature == NULL) | |
3012 | { | |
3013 | tdesc_data_cleanup (tdesc_data); | |
3014 | return NULL; | |
3015 | } | |
3016 | ||
3017 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3018 | S390_FPC_REGNUM, "fpc"); | |
3019 | for (i = 0; i < 16; i++) | |
3020 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3021 | S390_F0_REGNUM + i, fprs[i]); | |
5769d3cd | 3022 | |
7803799a UW |
3023 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); |
3024 | if (feature == NULL) | |
3025 | { | |
3026 | tdesc_data_cleanup (tdesc_data); | |
3027 | return NULL; | |
3028 | } | |
3029 | ||
3030 | for (i = 0; i < 16; i++) | |
3031 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3032 | S390_A0_REGNUM + i, acrs[i]); | |
3033 | ||
94eae614 | 3034 | /* Optional GNU/Linux-specific "registers". */ |
c642a434 UW |
3035 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux"); |
3036 | if (feature) | |
3037 | { | |
3038 | tdesc_numbered_register (feature, tdesc_data, | |
3039 | S390_ORIG_R2_REGNUM, "orig_r2"); | |
3040 | ||
3041 | if (tdesc_numbered_register (feature, tdesc_data, | |
3042 | S390_LAST_BREAK_REGNUM, "last_break")) | |
3043 | have_linux_v1 = 1; | |
3044 | ||
3045 | if (tdesc_numbered_register (feature, tdesc_data, | |
3046 | S390_SYSTEM_CALL_REGNUM, "system_call")) | |
3047 | have_linux_v2 = 1; | |
3048 | ||
3049 | if (have_linux_v2 > have_linux_v1) | |
3050 | valid_p = 0; | |
3051 | } | |
3052 | ||
4ac33720 UW |
3053 | /* Transaction diagnostic block. */ |
3054 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb"); | |
3055 | if (feature) | |
3056 | { | |
3057 | for (i = 0; i < ARRAY_SIZE (tdb_regs); i++) | |
3058 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3059 | S390_TDB_DWORD0_REGNUM + i, | |
3060 | tdb_regs[i]); | |
5aa82d05 | 3061 | have_tdb = 1; |
4ac33720 UW |
3062 | } |
3063 | ||
550bdf96 AA |
3064 | /* Vector registers. */ |
3065 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.vx"); | |
3066 | if (feature) | |
3067 | { | |
3068 | for (i = 0; i < 16; i++) | |
3069 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3070 | S390_V0_LOWER_REGNUM + i, | |
3071 | vxrs_low[i]); | |
3072 | for (i = 0; i < 16; i++) | |
3073 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3074 | S390_V16_REGNUM + i, | |
3075 | vxrs_high[i]); | |
3076 | have_vx = 1; | |
3077 | } | |
3078 | ||
7803799a UW |
3079 | if (!valid_p) |
3080 | { | |
3081 | tdesc_data_cleanup (tdesc_data); | |
3082 | return NULL; | |
3083 | } | |
3084 | } | |
5769d3cd | 3085 | |
7803799a UW |
3086 | /* Find a candidate among extant architectures. */ |
3087 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
3088 | arches != NULL; | |
3089 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
3090 | { | |
3091 | tdep = gdbarch_tdep (arches->gdbarch); | |
3092 | if (!tdep) | |
3093 | continue; | |
3094 | if (tdep->abi != tdep_abi) | |
3095 | continue; | |
3096 | if ((tdep->gpr_full_regnum != -1) != have_upper) | |
3097 | continue; | |
3098 | if (tdesc_data != NULL) | |
3099 | tdesc_data_cleanup (tdesc_data); | |
3100 | return arches->gdbarch; | |
3101 | } | |
5769d3cd | 3102 | |
7803799a | 3103 | /* Otherwise create a new gdbarch for the specified machine type. */ |
fc270c35 | 3104 | tdep = XCNEW (struct gdbarch_tdep); |
7803799a | 3105 | tdep->abi = tdep_abi; |
5aa82d05 AA |
3106 | tdep->have_linux_v1 = have_linux_v1; |
3107 | tdep->have_linux_v2 = have_linux_v2; | |
3108 | tdep->have_tdb = have_tdb; | |
d0f54f9d | 3109 | gdbarch = gdbarch_alloc (&info, tdep); |
5769d3cd AC |
3110 | |
3111 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); | |
4e409299 | 3112 | set_gdbarch_char_signed (gdbarch, 0); |
5769d3cd | 3113 | |
1de90795 UW |
3114 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
3115 | We can safely let them default to 128-bit, since the debug info | |
3116 | will give the size of type actually used in each case. */ | |
3117 | set_gdbarch_long_double_bit (gdbarch, 128); | |
3118 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
3119 | ||
aaab4dba | 3120 | /* Amount PC must be decremented by after a breakpoint. This is |
3b3b875c | 3121 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
aaab4dba | 3122 | always. */ |
5769d3cd | 3123 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
5769d3cd AC |
3124 | /* Stack grows downward. */ |
3125 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
5769d3cd AC |
3126 | set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); |
3127 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); | |
d0f54f9d | 3128 | set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); |
a8c99f38 | 3129 | |
7803799a | 3130 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
5769d3cd | 3131 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); |
d0f54f9d | 3132 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
d0f54f9d | 3133 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
d0f54f9d | 3134 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
9acbedc0 | 3135 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
7803799a | 3136 | set_gdbarch_core_read_description (gdbarch, s390_core_read_description); |
5aa82d05 AA |
3137 | set_gdbarch_iterate_over_regset_sections (gdbarch, |
3138 | s390_iterate_over_regset_sections); | |
c642a434 UW |
3139 | set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register); |
3140 | set_gdbarch_write_pc (gdbarch, s390_write_pc); | |
7803799a UW |
3141 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); |
3142 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); | |
3143 | set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); | |
3144 | set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); | |
3145 | set_tdesc_pseudo_register_reggroup_p (gdbarch, | |
34201ae3 | 3146 | s390_pseudo_register_reggroup_p); |
7803799a | 3147 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); |
550bdf96 | 3148 | set_gdbarch_register_name (gdbarch, s390_register_name); |
7803799a UW |
3149 | |
3150 | /* Assign pseudo register numbers. */ | |
3151 | first_pseudo_reg = gdbarch_num_regs (gdbarch); | |
3152 | last_pseudo_reg = first_pseudo_reg; | |
3153 | tdep->gpr_full_regnum = -1; | |
3154 | if (have_upper) | |
3155 | { | |
3156 | tdep->gpr_full_regnum = last_pseudo_reg; | |
3157 | last_pseudo_reg += 16; | |
3158 | } | |
550bdf96 AA |
3159 | tdep->v0_full_regnum = -1; |
3160 | if (have_vx) | |
3161 | { | |
3162 | tdep->v0_full_regnum = last_pseudo_reg; | |
3163 | last_pseudo_reg += 16; | |
3164 | } | |
7803799a UW |
3165 | tdep->pc_regnum = last_pseudo_reg++; |
3166 | tdep->cc_regnum = last_pseudo_reg++; | |
3167 | set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); | |
3168 | set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); | |
5769d3cd | 3169 | |
b0cf273e JB |
3170 | /* Inferior function calls. */ |
3171 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); | |
f089c433 | 3172 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
4074e13c | 3173 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
b0cf273e | 3174 | set_gdbarch_return_value (gdbarch, s390_return_value); |
5769d3cd | 3175 | |
237b092b AA |
3176 | /* Syscall handling. */ |
3177 | set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number); | |
3178 | ||
a8c99f38 | 3179 | /* Frame handling. */ |
a431654a | 3180 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
7803799a | 3181 | dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); |
f089c433 | 3182 | dwarf2_append_unwinders (gdbarch); |
a431654a | 3183 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
f089c433 UW |
3184 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
3185 | frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); | |
3186 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); | |
a8c99f38 JB |
3187 | frame_base_set_default (gdbarch, &s390_frame_base); |
3188 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); | |
3189 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); | |
3190 | ||
1db4e8a0 UW |
3191 | /* Displaced stepping. */ |
3192 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
34201ae3 | 3193 | simple_displaced_step_copy_insn); |
1db4e8a0 UW |
3194 | set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); |
3195 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
34201ae3 | 3196 | simple_displaced_step_free_closure); |
906d60cf | 3197 | set_gdbarch_displaced_step_location (gdbarch, linux_displaced_step_location); |
1db4e8a0 UW |
3198 | set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); |
3199 | ||
70728992 PA |
3200 | /* Note that GNU/Linux is the only OS supported on this |
3201 | platform. */ | |
3202 | linux_init_abi (info, gdbarch); | |
3203 | ||
7803799a | 3204 | switch (tdep->abi) |
5769d3cd | 3205 | { |
7803799a | 3206 | case ABI_LINUX_S390: |
5769d3cd | 3207 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); |
76a9d10f MK |
3208 | set_solib_svr4_fetch_link_map_offsets |
3209 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); | |
c642a434 | 3210 | |
458c8db8 | 3211 | set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390); |
5769d3cd | 3212 | break; |
b0cf273e | 3213 | |
7803799a | 3214 | case ABI_LINUX_ZSERIES: |
5769d3cd AC |
3215 | set_gdbarch_long_bit (gdbarch, 64); |
3216 | set_gdbarch_long_long_bit (gdbarch, 64); | |
3217 | set_gdbarch_ptr_bit (gdbarch, 64); | |
76a9d10f MK |
3218 | set_solib_svr4_fetch_link_map_offsets |
3219 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
ffc65945 | 3220 | set_gdbarch_address_class_type_flags (gdbarch, |
34201ae3 | 3221 | s390_address_class_type_flags); |
ffc65945 | 3222 | set_gdbarch_address_class_type_flags_to_name (gdbarch, |
34201ae3 | 3223 | s390_address_class_type_flags_to_name); |
ffc65945 | 3224 | set_gdbarch_address_class_name_to_type_flags (gdbarch, |
34201ae3 | 3225 | s390_address_class_name_to_type_flags); |
d851a69a | 3226 | set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390X); |
5769d3cd AC |
3227 | break; |
3228 | } | |
3229 | ||
36482093 AC |
3230 | set_gdbarch_print_insn (gdbarch, print_insn_s390); |
3231 | ||
982e9687 UW |
3232 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
3233 | ||
b2756930 KB |
3234 | /* Enable TLS support. */ |
3235 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
34201ae3 | 3236 | svr4_fetch_objfile_link_map); |
b2756930 | 3237 | |
1dd635ac UW |
3238 | set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type); |
3239 | ||
55aa24fb | 3240 | /* SystemTap functions. */ |
05c0465e SDJ |
3241 | set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes); |
3242 | set_gdbarch_stap_register_indirection_prefixes (gdbarch, | |
3243 | stap_register_indirection_prefixes); | |
3244 | set_gdbarch_stap_register_indirection_suffixes (gdbarch, | |
3245 | stap_register_indirection_suffixes); | |
55aa24fb | 3246 | set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand); |
60abeae4 AA |
3247 | set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options); |
3248 | set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp); | |
55aa24fb | 3249 | |
5769d3cd AC |
3250 | return gdbarch; |
3251 | } | |
3252 | ||
3253 | ||
a78f21af AC |
3254 | extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ |
3255 | ||
5769d3cd | 3256 | void |
5ae5f592 | 3257 | _initialize_s390_tdep (void) |
5769d3cd | 3258 | { |
5769d3cd AC |
3259 | /* Hook us into the gdbarch mechanism. */ |
3260 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); | |
7803799a | 3261 | |
94eae614 | 3262 | /* Initialize the GNU/Linux target descriptions. */ |
7803799a | 3263 | initialize_tdesc_s390_linux32 (); |
c642a434 UW |
3264 | initialize_tdesc_s390_linux32v1 (); |
3265 | initialize_tdesc_s390_linux32v2 (); | |
7803799a | 3266 | initialize_tdesc_s390_linux64 (); |
c642a434 UW |
3267 | initialize_tdesc_s390_linux64v1 (); |
3268 | initialize_tdesc_s390_linux64v2 (); | |
4ac33720 | 3269 | initialize_tdesc_s390_te_linux64 (); |
550bdf96 AA |
3270 | initialize_tdesc_s390_vx_linux64 (); |
3271 | initialize_tdesc_s390_tevx_linux64 (); | |
7803799a | 3272 | initialize_tdesc_s390x_linux64 (); |
c642a434 UW |
3273 | initialize_tdesc_s390x_linux64v1 (); |
3274 | initialize_tdesc_s390x_linux64v2 (); | |
4ac33720 | 3275 | initialize_tdesc_s390x_te_linux64 (); |
550bdf96 AA |
3276 | initialize_tdesc_s390x_vx_linux64 (); |
3277 | initialize_tdesc_s390x_tevx_linux64 (); | |
5769d3cd | 3278 | } |