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5769d3cd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ca557f44 | 2 | |
0b302171 | 3 | Copyright (C) 2001-2012 Free Software Foundation, Inc. |
ca557f44 | 4 | |
5769d3cd AC |
5 | Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) |
6 | for IBM Deutschland Entwicklung GmbH, IBM Corporation. | |
7 | ||
8 | This file is part of GDB. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 12 | the Free Software Foundation; either version 3 of the License, or |
5769d3cd AC |
13 | (at your option) any later version. |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
5769d3cd | 22 | |
d0f54f9d | 23 | #include "defs.h" |
5769d3cd AC |
24 | #include "arch-utils.h" |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
27 | #include "symtab.h" | |
28 | #include "target.h" | |
29 | #include "gdbcore.h" | |
30 | #include "gdbcmd.h" | |
5769d3cd | 31 | #include "objfiles.h" |
5769d3cd AC |
32 | #include "floatformat.h" |
33 | #include "regcache.h" | |
a8c99f38 JB |
34 | #include "trad-frame.h" |
35 | #include "frame-base.h" | |
36 | #include "frame-unwind.h" | |
a431654a | 37 | #include "dwarf2-frame.h" |
d0f54f9d JB |
38 | #include "reggroups.h" |
39 | #include "regset.h" | |
fd0407d6 | 40 | #include "value.h" |
78f8b424 | 41 | #include "gdb_assert.h" |
a89aa300 | 42 | #include "dis-asm.h" |
76a9d10f | 43 | #include "solib-svr4.h" |
3fc46200 | 44 | #include "prologue-value.h" |
70728992 | 45 | #include "linux-tdep.h" |
d0f54f9d | 46 | #include "s390-tdep.h" |
5769d3cd | 47 | |
55aa24fb SDJ |
48 | #include "stap-probe.h" |
49 | #include "ax.h" | |
50 | #include "ax-gdb.h" | |
51 | #include "user-regs.h" | |
52 | #include "cli/cli-utils.h" | |
53 | #include <ctype.h> | |
54 | ||
7803799a | 55 | #include "features/s390-linux32.c" |
c642a434 UW |
56 | #include "features/s390-linux32v1.c" |
57 | #include "features/s390-linux32v2.c" | |
7803799a | 58 | #include "features/s390-linux64.c" |
c642a434 UW |
59 | #include "features/s390-linux64v1.c" |
60 | #include "features/s390-linux64v2.c" | |
7803799a | 61 | #include "features/s390x-linux64.c" |
c642a434 UW |
62 | #include "features/s390x-linux64v1.c" |
63 | #include "features/s390x-linux64v2.c" | |
7803799a | 64 | |
d0f54f9d JB |
65 | /* The tdep structure. */ |
66 | ||
67 | struct gdbarch_tdep | |
5769d3cd | 68 | { |
b0cf273e JB |
69 | /* ABI version. */ |
70 | enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; | |
71 | ||
7803799a UW |
72 | /* Pseudo register numbers. */ |
73 | int gpr_full_regnum; | |
74 | int pc_regnum; | |
75 | int cc_regnum; | |
76 | ||
d0f54f9d JB |
77 | /* Core file register sets. */ |
78 | const struct regset *gregset; | |
79 | int sizeof_gregset; | |
80 | ||
81 | const struct regset *fpregset; | |
82 | int sizeof_fpregset; | |
83 | }; | |
84 | ||
85 | ||
7803799a UW |
86 | /* ABI call-saved register information. */ |
87 | ||
88 | static int | |
89 | s390_register_call_saved (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 90 | { |
7803799a UW |
91 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
92 | ||
93 | switch (tdep->abi) | |
6707b003 | 94 | { |
7803799a UW |
95 | case ABI_LINUX_S390: |
96 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
97 | || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM | |
98 | || regnum == S390_A0_REGNUM) | |
99 | return 1; | |
6707b003 | 100 | |
7803799a UW |
101 | break; |
102 | ||
103 | case ABI_LINUX_ZSERIES: | |
104 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
105 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) | |
106 | || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) | |
107 | return 1; | |
108 | ||
109 | break; | |
110 | } | |
111 | ||
112 | return 0; | |
5769d3cd AC |
113 | } |
114 | ||
c642a434 UW |
115 | static int |
116 | s390_cannot_store_register (struct gdbarch *gdbarch, int regnum) | |
117 | { | |
118 | /* The last-break address is read-only. */ | |
119 | return regnum == S390_LAST_BREAK_REGNUM; | |
120 | } | |
121 | ||
122 | static void | |
123 | s390_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
124 | { | |
125 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
126 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
127 | ||
128 | regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc); | |
129 | ||
130 | /* Set special SYSTEM_CALL register to 0 to prevent the kernel from | |
131 | messing with the PC we just installed, if we happen to be within | |
132 | an interrupted system call that the kernel wants to restart. | |
133 | ||
134 | Note that after we return from the dummy call, the SYSTEM_CALL and | |
135 | ORIG_R2 registers will be automatically restored, and the kernel | |
136 | continues to restart the system call at this point. */ | |
137 | if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0) | |
138 | regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0); | |
139 | } | |
140 | ||
7803799a | 141 | |
d0f54f9d JB |
142 | /* DWARF Register Mapping. */ |
143 | ||
144 | static int s390_dwarf_regmap[] = | |
145 | { | |
146 | /* General Purpose Registers. */ | |
147 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
148 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
149 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
150 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
151 | ||
152 | /* Floating Point Registers. */ | |
153 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, | |
154 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, | |
155 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, | |
156 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, | |
157 | ||
158 | /* Control Registers (not mapped). */ | |
159 | -1, -1, -1, -1, -1, -1, -1, -1, | |
160 | -1, -1, -1, -1, -1, -1, -1, -1, | |
161 | ||
162 | /* Access Registers. */ | |
163 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, | |
164 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, | |
165 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, | |
166 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, | |
167 | ||
168 | /* Program Status Word. */ | |
169 | S390_PSWM_REGNUM, | |
7803799a UW |
170 | S390_PSWA_REGNUM, |
171 | ||
172 | /* GPR Lower Half Access. */ | |
173 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
174 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
175 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
176 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
c642a434 | 177 | |
94eae614 | 178 | /* GNU/Linux-specific registers (not mapped). */ |
c642a434 | 179 | -1, -1, -1, |
d0f54f9d JB |
180 | }; |
181 | ||
182 | /* Convert DWARF register number REG to the appropriate register | |
183 | number used by GDB. */ | |
a78f21af | 184 | static int |
d3f73121 | 185 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
d0f54f9d | 186 | { |
7803799a UW |
187 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
188 | ||
189 | /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit | |
190 | GPRs. Note that call frame information still refers to the 32-bit | |
191 | lower halves, because s390_adjust_frame_regnum uses register numbers | |
192 | 66 .. 81 to access GPRs. */ | |
193 | if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) | |
194 | return tdep->gpr_full_regnum + reg; | |
d0f54f9d | 195 | |
16aff9a6 | 196 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
7803799a | 197 | return s390_dwarf_regmap[reg]; |
d0f54f9d | 198 | |
7803799a UW |
199 | warning (_("Unmapped DWARF Register #%d encountered."), reg); |
200 | return -1; | |
201 | } | |
d0f54f9d | 202 | |
7803799a UW |
203 | /* Translate a .eh_frame register to DWARF register, or adjust a |
204 | .debug_frame register. */ | |
205 | static int | |
206 | s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) | |
207 | { | |
208 | /* See s390_dwarf_reg_to_regnum for comments. */ | |
209 | return (num >= 0 && num < 16)? num + 66 : num; | |
d0f54f9d JB |
210 | } |
211 | ||
d0f54f9d | 212 | |
7803799a UW |
213 | /* Pseudo registers. */ |
214 | ||
215 | static const char * | |
216 | s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 217 | { |
7803799a | 218 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 219 | |
7803799a UW |
220 | if (regnum == tdep->pc_regnum) |
221 | return "pc"; | |
d0f54f9d | 222 | |
7803799a UW |
223 | if (regnum == tdep->cc_regnum) |
224 | return "cc"; | |
d0f54f9d | 225 | |
7803799a UW |
226 | if (tdep->gpr_full_regnum != -1 |
227 | && regnum >= tdep->gpr_full_regnum | |
228 | && regnum < tdep->gpr_full_regnum + 16) | |
229 | { | |
230 | static const char *full_name[] = { | |
231 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
232 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
233 | }; | |
234 | return full_name[regnum - tdep->gpr_full_regnum]; | |
d0f54f9d | 235 | } |
7803799a UW |
236 | |
237 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
238 | } |
239 | ||
7803799a UW |
240 | static struct type * |
241 | s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) | |
5769d3cd | 242 | { |
7803799a | 243 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 244 | |
7803799a UW |
245 | if (regnum == tdep->pc_regnum) |
246 | return builtin_type (gdbarch)->builtin_func_ptr; | |
d0f54f9d | 247 | |
7803799a UW |
248 | if (regnum == tdep->cc_regnum) |
249 | return builtin_type (gdbarch)->builtin_int; | |
d0f54f9d | 250 | |
7803799a UW |
251 | if (tdep->gpr_full_regnum != -1 |
252 | && regnum >= tdep->gpr_full_regnum | |
253 | && regnum < tdep->gpr_full_regnum + 16) | |
254 | return builtin_type (gdbarch)->builtin_uint64; | |
255 | ||
256 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
5769d3cd AC |
257 | } |
258 | ||
05d1431c | 259 | static enum register_status |
7803799a UW |
260 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
261 | int regnum, gdb_byte *buf) | |
d0f54f9d | 262 | { |
7803799a | 263 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 264 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 265 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
266 | ULONGEST val; |
267 | ||
7803799a | 268 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 269 | { |
05d1431c PA |
270 | enum register_status status; |
271 | ||
272 | status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); | |
273 | if (status == REG_VALID) | |
274 | { | |
275 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
276 | val &= 0x7fffffff; | |
277 | store_unsigned_integer (buf, regsize, byte_order, val); | |
278 | } | |
279 | return status; | |
7803799a | 280 | } |
d0f54f9d | 281 | |
7803799a UW |
282 | if (regnum == tdep->cc_regnum) |
283 | { | |
05d1431c PA |
284 | enum register_status status; |
285 | ||
286 | status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); | |
287 | if (status == REG_VALID) | |
288 | { | |
289 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
290 | val = (val >> 12) & 3; | |
291 | else | |
292 | val = (val >> 44) & 3; | |
293 | store_unsigned_integer (buf, regsize, byte_order, val); | |
294 | } | |
295 | return status; | |
7803799a | 296 | } |
d0f54f9d | 297 | |
7803799a UW |
298 | if (tdep->gpr_full_regnum != -1 |
299 | && regnum >= tdep->gpr_full_regnum | |
300 | && regnum < tdep->gpr_full_regnum + 16) | |
301 | { | |
05d1431c | 302 | enum register_status status; |
7803799a | 303 | ULONGEST val_upper; |
05d1431c | 304 | |
7803799a UW |
305 | regnum -= tdep->gpr_full_regnum; |
306 | ||
05d1431c PA |
307 | status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val); |
308 | if (status == REG_VALID) | |
309 | status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
310 | &val_upper); | |
311 | if (status == REG_VALID) | |
312 | { | |
313 | val |= val_upper << 32; | |
314 | store_unsigned_integer (buf, regsize, byte_order, val); | |
315 | } | |
316 | return status; | |
d0f54f9d | 317 | } |
7803799a UW |
318 | |
319 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
320 | } |
321 | ||
322 | static void | |
7803799a UW |
323 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
324 | int regnum, const gdb_byte *buf) | |
d0f54f9d | 325 | { |
7803799a | 326 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 327 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 328 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
329 | ULONGEST val, psw; |
330 | ||
7803799a | 331 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 332 | { |
7803799a UW |
333 | val = extract_unsigned_integer (buf, regsize, byte_order); |
334 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
335 | { | |
336 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); | |
337 | val = (psw & 0x80000000) | (val & 0x7fffffff); | |
338 | } | |
339 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); | |
340 | return; | |
341 | } | |
d0f54f9d | 342 | |
7803799a UW |
343 | if (regnum == tdep->cc_regnum) |
344 | { | |
345 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
d0f54f9d | 346 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
7803799a UW |
347 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
348 | val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); | |
349 | else | |
350 | val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); | |
351 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); | |
352 | return; | |
353 | } | |
d0f54f9d | 354 | |
7803799a UW |
355 | if (tdep->gpr_full_regnum != -1 |
356 | && regnum >= tdep->gpr_full_regnum | |
357 | && regnum < tdep->gpr_full_regnum + 16) | |
358 | { | |
359 | regnum -= tdep->gpr_full_regnum; | |
360 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
361 | regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, | |
362 | val & 0xffffffff); | |
363 | regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
364 | val >> 32); | |
365 | return; | |
d0f54f9d | 366 | } |
7803799a UW |
367 | |
368 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
369 | } |
370 | ||
371 | /* 'float' values are stored in the upper half of floating-point | |
372 | registers, even though we are otherwise a big-endian platform. */ | |
373 | ||
9acbedc0 UW |
374 | static struct value * |
375 | s390_value_from_register (struct type *type, int regnum, | |
376 | struct frame_info *frame) | |
d0f54f9d | 377 | { |
9acbedc0 | 378 | struct value *value = default_value_from_register (type, regnum, frame); |
56b9d9ac | 379 | int len = TYPE_LENGTH (check_typedef (type)); |
d0f54f9d | 380 | |
9acbedc0 UW |
381 | if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8) |
382 | set_value_offset (value, 0); | |
d0f54f9d | 383 | |
9acbedc0 | 384 | return value; |
d0f54f9d JB |
385 | } |
386 | ||
387 | /* Register groups. */ | |
388 | ||
a78f21af | 389 | static int |
7803799a UW |
390 | s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
391 | struct reggroup *group) | |
d0f54f9d JB |
392 | { |
393 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
394 | ||
d6db1fab UW |
395 | /* We usually save/restore the whole PSW, which includes PC and CC. |
396 | However, some older gdbservers may not support saving/restoring | |
397 | the whole PSW yet, and will return an XML register description | |
398 | excluding those from the save/restore register groups. In those | |
399 | cases, we still need to explicitly save/restore PC and CC in order | |
400 | to push or pop frames. Since this doesn't hurt anything if we | |
401 | already save/restore the whole PSW (it's just redundant), we add | |
402 | PC and CC at this point unconditionally. */ | |
d0f54f9d | 403 | if (group == save_reggroup || group == restore_reggroup) |
7803799a | 404 | return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; |
d0f54f9d JB |
405 | |
406 | return default_register_reggroup_p (gdbarch, regnum, group); | |
407 | } | |
408 | ||
409 | ||
410 | /* Core file register sets. */ | |
411 | ||
412 | int s390_regmap_gregset[S390_NUM_REGS] = | |
413 | { | |
414 | /* Program Status Word. */ | |
415 | 0x00, 0x04, | |
416 | /* General Purpose Registers. */ | |
417 | 0x08, 0x0c, 0x10, 0x14, | |
418 | 0x18, 0x1c, 0x20, 0x24, | |
419 | 0x28, 0x2c, 0x30, 0x34, | |
420 | 0x38, 0x3c, 0x40, 0x44, | |
421 | /* Access Registers. */ | |
422 | 0x48, 0x4c, 0x50, 0x54, | |
423 | 0x58, 0x5c, 0x60, 0x64, | |
424 | 0x68, 0x6c, 0x70, 0x74, | |
425 | 0x78, 0x7c, 0x80, 0x84, | |
426 | /* Floating Point Control Word. */ | |
427 | -1, | |
428 | /* Floating Point Registers. */ | |
429 | -1, -1, -1, -1, -1, -1, -1, -1, | |
430 | -1, -1, -1, -1, -1, -1, -1, -1, | |
7803799a UW |
431 | /* GPR Uppper Halves. */ |
432 | -1, -1, -1, -1, -1, -1, -1, -1, | |
433 | -1, -1, -1, -1, -1, -1, -1, -1, | |
94eae614 | 434 | /* GNU/Linux-specific optional "registers". */ |
c642a434 | 435 | 0x88, -1, -1, |
d0f54f9d JB |
436 | }; |
437 | ||
438 | int s390x_regmap_gregset[S390_NUM_REGS] = | |
439 | { | |
7803799a | 440 | /* Program Status Word. */ |
d0f54f9d JB |
441 | 0x00, 0x08, |
442 | /* General Purpose Registers. */ | |
443 | 0x10, 0x18, 0x20, 0x28, | |
444 | 0x30, 0x38, 0x40, 0x48, | |
445 | 0x50, 0x58, 0x60, 0x68, | |
446 | 0x70, 0x78, 0x80, 0x88, | |
447 | /* Access Registers. */ | |
448 | 0x90, 0x94, 0x98, 0x9c, | |
449 | 0xa0, 0xa4, 0xa8, 0xac, | |
450 | 0xb0, 0xb4, 0xb8, 0xbc, | |
451 | 0xc0, 0xc4, 0xc8, 0xcc, | |
452 | /* Floating Point Control Word. */ | |
453 | -1, | |
454 | /* Floating Point Registers. */ | |
455 | -1, -1, -1, -1, -1, -1, -1, -1, | |
456 | -1, -1, -1, -1, -1, -1, -1, -1, | |
7803799a UW |
457 | /* GPR Uppper Halves. */ |
458 | 0x10, 0x18, 0x20, 0x28, | |
459 | 0x30, 0x38, 0x40, 0x48, | |
460 | 0x50, 0x58, 0x60, 0x68, | |
461 | 0x70, 0x78, 0x80, 0x88, | |
94eae614 | 462 | /* GNU/Linux-specific optional "registers". */ |
c642a434 | 463 | 0xd0, -1, -1, |
d0f54f9d JB |
464 | }; |
465 | ||
466 | int s390_regmap_fpregset[S390_NUM_REGS] = | |
467 | { | |
468 | /* Program Status Word. */ | |
469 | -1, -1, | |
470 | /* General Purpose Registers. */ | |
471 | -1, -1, -1, -1, -1, -1, -1, -1, | |
472 | -1, -1, -1, -1, -1, -1, -1, -1, | |
473 | /* Access Registers. */ | |
474 | -1, -1, -1, -1, -1, -1, -1, -1, | |
475 | -1, -1, -1, -1, -1, -1, -1, -1, | |
476 | /* Floating Point Control Word. */ | |
477 | 0x00, | |
478 | /* Floating Point Registers. */ | |
479 | 0x08, 0x10, 0x18, 0x20, | |
480 | 0x28, 0x30, 0x38, 0x40, | |
481 | 0x48, 0x50, 0x58, 0x60, | |
482 | 0x68, 0x70, 0x78, 0x80, | |
7803799a UW |
483 | /* GPR Uppper Halves. */ |
484 | -1, -1, -1, -1, -1, -1, -1, -1, | |
485 | -1, -1, -1, -1, -1, -1, -1, -1, | |
94eae614 | 486 | /* GNU/Linux-specific optional "registers". */ |
c642a434 | 487 | -1, -1, -1, |
7803799a UW |
488 | }; |
489 | ||
490 | int s390_regmap_upper[S390_NUM_REGS] = | |
491 | { | |
492 | /* Program Status Word. */ | |
493 | -1, -1, | |
494 | /* General Purpose Registers. */ | |
495 | -1, -1, -1, -1, -1, -1, -1, -1, | |
496 | -1, -1, -1, -1, -1, -1, -1, -1, | |
497 | /* Access Registers. */ | |
498 | -1, -1, -1, -1, -1, -1, -1, -1, | |
499 | -1, -1, -1, -1, -1, -1, -1, -1, | |
500 | /* Floating Point Control Word. */ | |
501 | -1, | |
502 | /* Floating Point Registers. */ | |
503 | -1, -1, -1, -1, -1, -1, -1, -1, | |
504 | -1, -1, -1, -1, -1, -1, -1, -1, | |
505 | /* GPR Uppper Halves. */ | |
506 | 0x00, 0x04, 0x08, 0x0c, | |
507 | 0x10, 0x14, 0x18, 0x1c, | |
508 | 0x20, 0x24, 0x28, 0x2c, | |
509 | 0x30, 0x34, 0x38, 0x3c, | |
94eae614 | 510 | /* GNU/Linux-specific optional "registers". */ |
c642a434 UW |
511 | -1, -1, -1, |
512 | }; | |
513 | ||
514 | int s390_regmap_last_break[S390_NUM_REGS] = | |
515 | { | |
516 | /* Program Status Word. */ | |
517 | -1, -1, | |
518 | /* General Purpose Registers. */ | |
519 | -1, -1, -1, -1, -1, -1, -1, -1, | |
520 | -1, -1, -1, -1, -1, -1, -1, -1, | |
521 | /* Access Registers. */ | |
522 | -1, -1, -1, -1, -1, -1, -1, -1, | |
523 | -1, -1, -1, -1, -1, -1, -1, -1, | |
524 | /* Floating Point Control Word. */ | |
525 | -1, | |
526 | /* Floating Point Registers. */ | |
527 | -1, -1, -1, -1, -1, -1, -1, -1, | |
528 | -1, -1, -1, -1, -1, -1, -1, -1, | |
529 | /* GPR Uppper Halves. */ | |
530 | -1, -1, -1, -1, -1, -1, -1, -1, | |
531 | -1, -1, -1, -1, -1, -1, -1, -1, | |
94eae614 | 532 | /* GNU/Linux-specific optional "registers". */ |
c642a434 UW |
533 | -1, 4, -1, |
534 | }; | |
535 | ||
536 | int s390x_regmap_last_break[S390_NUM_REGS] = | |
537 | { | |
538 | /* Program Status Word. */ | |
539 | -1, -1, | |
540 | /* General Purpose Registers. */ | |
541 | -1, -1, -1, -1, -1, -1, -1, -1, | |
542 | -1, -1, -1, -1, -1, -1, -1, -1, | |
543 | /* Access Registers. */ | |
544 | -1, -1, -1, -1, -1, -1, -1, -1, | |
545 | -1, -1, -1, -1, -1, -1, -1, -1, | |
546 | /* Floating Point Control Word. */ | |
547 | -1, | |
548 | /* Floating Point Registers. */ | |
549 | -1, -1, -1, -1, -1, -1, -1, -1, | |
550 | -1, -1, -1, -1, -1, -1, -1, -1, | |
551 | /* GPR Uppper Halves. */ | |
552 | -1, -1, -1, -1, -1, -1, -1, -1, | |
553 | -1, -1, -1, -1, -1, -1, -1, -1, | |
94eae614 | 554 | /* GNU/Linux-specific optional "registers". */ |
c642a434 UW |
555 | -1, 0, -1, |
556 | }; | |
557 | ||
558 | int s390_regmap_system_call[S390_NUM_REGS] = | |
559 | { | |
560 | /* Program Status Word. */ | |
561 | -1, -1, | |
562 | /* General Purpose Registers. */ | |
563 | -1, -1, -1, -1, -1, -1, -1, -1, | |
564 | -1, -1, -1, -1, -1, -1, -1, -1, | |
565 | /* Access Registers. */ | |
566 | -1, -1, -1, -1, -1, -1, -1, -1, | |
567 | -1, -1, -1, -1, -1, -1, -1, -1, | |
568 | /* Floating Point Control Word. */ | |
569 | -1, | |
570 | /* Floating Point Registers. */ | |
571 | -1, -1, -1, -1, -1, -1, -1, -1, | |
572 | -1, -1, -1, -1, -1, -1, -1, -1, | |
573 | /* GPR Uppper Halves. */ | |
574 | -1, -1, -1, -1, -1, -1, -1, -1, | |
575 | -1, -1, -1, -1, -1, -1, -1, -1, | |
94eae614 | 576 | /* GNU/Linux-specific optional "registers". */ |
c642a434 | 577 | -1, -1, 0, |
d0f54f9d JB |
578 | }; |
579 | ||
580 | /* Supply register REGNUM from the register set REGSET to register cache | |
581 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
582 | static void | |
583 | s390_supply_regset (const struct regset *regset, struct regcache *regcache, | |
584 | int regnum, const void *regs, size_t len) | |
585 | { | |
586 | const int *offset = regset->descr; | |
587 | int i; | |
588 | ||
589 | for (i = 0; i < S390_NUM_REGS; i++) | |
590 | { | |
591 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
592 | regcache_raw_supply (regcache, i, (const char *)regs + offset[i]); | |
593 | } | |
594 | } | |
595 | ||
92f38ec2 UW |
596 | /* Collect register REGNUM from the register cache REGCACHE and store |
597 | it in the buffer specified by REGS and LEN as described by the | |
598 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
599 | all registers in REGSET. */ | |
600 | static void | |
601 | s390_collect_regset (const struct regset *regset, | |
602 | const struct regcache *regcache, | |
603 | int regnum, void *regs, size_t len) | |
604 | { | |
605 | const int *offset = regset->descr; | |
606 | int i; | |
607 | ||
608 | for (i = 0; i < S390_NUM_REGS; i++) | |
609 | { | |
610 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
611 | regcache_raw_collect (regcache, i, (char *)regs + offset[i]); | |
612 | } | |
613 | } | |
614 | ||
d0f54f9d JB |
615 | static const struct regset s390_gregset = { |
616 | s390_regmap_gregset, | |
92f38ec2 UW |
617 | s390_supply_regset, |
618 | s390_collect_regset | |
d0f54f9d JB |
619 | }; |
620 | ||
621 | static const struct regset s390x_gregset = { | |
622 | s390x_regmap_gregset, | |
92f38ec2 UW |
623 | s390_supply_regset, |
624 | s390_collect_regset | |
d0f54f9d JB |
625 | }; |
626 | ||
627 | static const struct regset s390_fpregset = { | |
628 | s390_regmap_fpregset, | |
92f38ec2 UW |
629 | s390_supply_regset, |
630 | s390_collect_regset | |
d0f54f9d JB |
631 | }; |
632 | ||
7803799a UW |
633 | static const struct regset s390_upper_regset = { |
634 | s390_regmap_upper, | |
635 | s390_supply_regset, | |
636 | s390_collect_regset | |
637 | }; | |
638 | ||
c642a434 UW |
639 | static const struct regset s390_last_break_regset = { |
640 | s390_regmap_last_break, | |
641 | s390_supply_regset, | |
642 | s390_collect_regset | |
643 | }; | |
644 | ||
645 | static const struct regset s390x_last_break_regset = { | |
646 | s390x_regmap_last_break, | |
647 | s390_supply_regset, | |
648 | s390_collect_regset | |
649 | }; | |
650 | ||
651 | static const struct regset s390_system_call_regset = { | |
652 | s390_regmap_system_call, | |
653 | s390_supply_regset, | |
654 | s390_collect_regset | |
655 | }; | |
656 | ||
657 | static struct core_regset_section s390_linux32_regset_sections[] = | |
658 | { | |
659 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
660 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
661 | { NULL, 0} | |
662 | }; | |
663 | ||
664 | static struct core_regset_section s390_linux32v1_regset_sections[] = | |
665 | { | |
666 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
667 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
668 | { ".reg-s390-last-break", 8, "s390 last-break address" }, | |
669 | { NULL, 0} | |
670 | }; | |
671 | ||
672 | static struct core_regset_section s390_linux32v2_regset_sections[] = | |
673 | { | |
674 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
675 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
676 | { ".reg-s390-last-break", 8, "s390 last-break address" }, | |
677 | { ".reg-s390-system-call", 4, "s390 system-call" }, | |
678 | { NULL, 0} | |
679 | }; | |
680 | ||
681 | static struct core_regset_section s390_linux64_regset_sections[] = | |
7803799a UW |
682 | { |
683 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
684 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
685 | { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, | |
686 | { NULL, 0} | |
687 | }; | |
688 | ||
c642a434 UW |
689 | static struct core_regset_section s390_linux64v1_regset_sections[] = |
690 | { | |
691 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
692 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
693 | { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, | |
694 | { ".reg-s390-last-break", 8, "s930 last-break address" }, | |
695 | { NULL, 0} | |
696 | }; | |
697 | ||
698 | static struct core_regset_section s390_linux64v2_regset_sections[] = | |
699 | { | |
700 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
701 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
702 | { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, | |
703 | { ".reg-s390-last-break", 8, "s930 last-break address" }, | |
704 | { ".reg-s390-system-call", 4, "s390 system-call" }, | |
705 | { NULL, 0} | |
706 | }; | |
707 | ||
708 | static struct core_regset_section s390x_linux64_regset_sections[] = | |
709 | { | |
710 | { ".reg", s390x_sizeof_gregset, "general-purpose" }, | |
711 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
712 | { NULL, 0} | |
713 | }; | |
714 | ||
715 | static struct core_regset_section s390x_linux64v1_regset_sections[] = | |
716 | { | |
717 | { ".reg", s390x_sizeof_gregset, "general-purpose" }, | |
718 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
719 | { ".reg-s390-last-break", 8, "s930 last-break address" }, | |
720 | { NULL, 0} | |
721 | }; | |
722 | ||
723 | static struct core_regset_section s390x_linux64v2_regset_sections[] = | |
724 | { | |
725 | { ".reg", s390x_sizeof_gregset, "general-purpose" }, | |
726 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
727 | { ".reg-s390-last-break", 8, "s930 last-break address" }, | |
728 | { ".reg-s390-system-call", 4, "s390 system-call" }, | |
729 | { NULL, 0} | |
730 | }; | |
731 | ||
732 | ||
d0f54f9d JB |
733 | /* Return the appropriate register set for the core section identified |
734 | by SECT_NAME and SECT_SIZE. */ | |
63807e1d | 735 | static const struct regset * |
d0f54f9d JB |
736 | s390_regset_from_core_section (struct gdbarch *gdbarch, |
737 | const char *sect_name, size_t sect_size) | |
738 | { | |
739 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
740 | ||
e31dcd20 | 741 | if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) |
d0f54f9d JB |
742 | return tdep->gregset; |
743 | ||
e31dcd20 | 744 | if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) |
d0f54f9d JB |
745 | return tdep->fpregset; |
746 | ||
7803799a UW |
747 | if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4) |
748 | return &s390_upper_regset; | |
749 | ||
c642a434 UW |
750 | if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8) |
751 | return (gdbarch_ptr_bit (gdbarch) == 32 | |
752 | ? &s390_last_break_regset : &s390x_last_break_regset); | |
753 | ||
754 | if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4) | |
755 | return &s390_system_call_regset; | |
756 | ||
d0f54f9d | 757 | return NULL; |
5769d3cd AC |
758 | } |
759 | ||
7803799a UW |
760 | static const struct target_desc * |
761 | s390_core_read_description (struct gdbarch *gdbarch, | |
762 | struct target_ops *target, bfd *abfd) | |
763 | { | |
764 | asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs"); | |
c642a434 UW |
765 | asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break"); |
766 | asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call"); | |
7803799a UW |
767 | asection *section = bfd_get_section_by_name (abfd, ".reg"); |
768 | if (!section) | |
769 | return NULL; | |
770 | ||
771 | switch (bfd_section_size (abfd, section)) | |
772 | { | |
773 | case s390_sizeof_gregset: | |
c642a434 UW |
774 | if (high_gprs) |
775 | return (v2? tdesc_s390_linux64v2 : | |
776 | v1? tdesc_s390_linux64v1 : tdesc_s390_linux64); | |
777 | else | |
778 | return (v2? tdesc_s390_linux32v2 : | |
779 | v1? tdesc_s390_linux32v1 : tdesc_s390_linux32); | |
7803799a UW |
780 | |
781 | case s390x_sizeof_gregset: | |
c642a434 UW |
782 | return (v2? tdesc_s390x_linux64v2 : |
783 | v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64); | |
7803799a UW |
784 | |
785 | default: | |
786 | return NULL; | |
787 | } | |
788 | } | |
789 | ||
d0f54f9d | 790 | |
4bc8c588 JB |
791 | /* Decoding S/390 instructions. */ |
792 | ||
793 | /* Named opcode values for the S/390 instructions we recognize. Some | |
794 | instructions have their opcode split across two fields; those are the | |
795 | op1_* and op2_* enums. */ | |
796 | enum | |
797 | { | |
a8c99f38 JB |
798 | op1_lhi = 0xa7, op2_lhi = 0x08, |
799 | op1_lghi = 0xa7, op2_lghi = 0x09, | |
00ce08ef | 800 | op1_lgfi = 0xc0, op2_lgfi = 0x01, |
4bc8c588 | 801 | op_lr = 0x18, |
a8c99f38 JB |
802 | op_lgr = 0xb904, |
803 | op_l = 0x58, | |
804 | op1_ly = 0xe3, op2_ly = 0x58, | |
805 | op1_lg = 0xe3, op2_lg = 0x04, | |
806 | op_lm = 0x98, | |
807 | op1_lmy = 0xeb, op2_lmy = 0x98, | |
808 | op1_lmg = 0xeb, op2_lmg = 0x04, | |
4bc8c588 | 809 | op_st = 0x50, |
a8c99f38 | 810 | op1_sty = 0xe3, op2_sty = 0x50, |
4bc8c588 | 811 | op1_stg = 0xe3, op2_stg = 0x24, |
a8c99f38 | 812 | op_std = 0x60, |
4bc8c588 | 813 | op_stm = 0x90, |
a8c99f38 | 814 | op1_stmy = 0xeb, op2_stmy = 0x90, |
4bc8c588 | 815 | op1_stmg = 0xeb, op2_stmg = 0x24, |
a8c99f38 JB |
816 | op1_aghi = 0xa7, op2_aghi = 0x0b, |
817 | op1_ahi = 0xa7, op2_ahi = 0x0a, | |
00ce08ef UW |
818 | op1_agfi = 0xc2, op2_agfi = 0x08, |
819 | op1_afi = 0xc2, op2_afi = 0x09, | |
820 | op1_algfi= 0xc2, op2_algfi= 0x0a, | |
821 | op1_alfi = 0xc2, op2_alfi = 0x0b, | |
a8c99f38 JB |
822 | op_ar = 0x1a, |
823 | op_agr = 0xb908, | |
824 | op_a = 0x5a, | |
825 | op1_ay = 0xe3, op2_ay = 0x5a, | |
826 | op1_ag = 0xe3, op2_ag = 0x08, | |
00ce08ef UW |
827 | op1_slgfi= 0xc2, op2_slgfi= 0x04, |
828 | op1_slfi = 0xc2, op2_slfi = 0x05, | |
a8c99f38 JB |
829 | op_sr = 0x1b, |
830 | op_sgr = 0xb909, | |
831 | op_s = 0x5b, | |
832 | op1_sy = 0xe3, op2_sy = 0x5b, | |
833 | op1_sg = 0xe3, op2_sg = 0x09, | |
834 | op_nr = 0x14, | |
835 | op_ngr = 0xb980, | |
836 | op_la = 0x41, | |
837 | op1_lay = 0xe3, op2_lay = 0x71, | |
838 | op1_larl = 0xc0, op2_larl = 0x00, | |
839 | op_basr = 0x0d, | |
840 | op_bas = 0x4d, | |
841 | op_bcr = 0x07, | |
842 | op_bc = 0x0d, | |
1db4e8a0 UW |
843 | op_bctr = 0x06, |
844 | op_bctgr = 0xb946, | |
845 | op_bct = 0x46, | |
846 | op1_bctg = 0xe3, op2_bctg = 0x46, | |
847 | op_bxh = 0x86, | |
848 | op1_bxhg = 0xeb, op2_bxhg = 0x44, | |
849 | op_bxle = 0x87, | |
850 | op1_bxleg= 0xeb, op2_bxleg= 0x45, | |
a8c99f38 JB |
851 | op1_bras = 0xa7, op2_bras = 0x05, |
852 | op1_brasl= 0xc0, op2_brasl= 0x05, | |
853 | op1_brc = 0xa7, op2_brc = 0x04, | |
854 | op1_brcl = 0xc0, op2_brcl = 0x04, | |
1db4e8a0 UW |
855 | op1_brct = 0xa7, op2_brct = 0x06, |
856 | op1_brctg= 0xa7, op2_brctg= 0x07, | |
857 | op_brxh = 0x84, | |
858 | op1_brxhg= 0xec, op2_brxhg= 0x44, | |
859 | op_brxle = 0x85, | |
860 | op1_brxlg= 0xec, op2_brxlg= 0x45, | |
4bc8c588 JB |
861 | }; |
862 | ||
863 | ||
a8c99f38 JB |
864 | /* Read a single instruction from address AT. */ |
865 | ||
866 | #define S390_MAX_INSTR_SIZE 6 | |
867 | static int | |
868 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) | |
869 | { | |
870 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
871 | int instrlen; | |
872 | ||
8defab1a | 873 | if (target_read_memory (at, &instr[0], 2)) |
a8c99f38 JB |
874 | return -1; |
875 | instrlen = s390_instrlen[instr[0] >> 6]; | |
876 | if (instrlen > 2) | |
877 | { | |
8defab1a | 878 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
a8c99f38 JB |
879 | return -1; |
880 | } | |
881 | return instrlen; | |
882 | } | |
883 | ||
884 | ||
4bc8c588 JB |
885 | /* The functions below are for recognizing and decoding S/390 |
886 | instructions of various formats. Each of them checks whether INSN | |
887 | is an instruction of the given format, with the specified opcodes. | |
888 | If it is, it sets the remaining arguments to the values of the | |
889 | instruction's fields, and returns a non-zero value; otherwise, it | |
890 | returns zero. | |
891 | ||
892 | These functions' arguments appear in the order they appear in the | |
893 | instruction, not in the machine-language form. So, opcodes always | |
894 | come first, even though they're sometimes scattered around the | |
895 | instructions. And displacements appear before base and extension | |
896 | registers, as they do in the assembly syntax, not at the end, as | |
897 | they do in the machine language. */ | |
a78f21af | 898 | static int |
4bc8c588 JB |
899 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
900 | { | |
901 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
902 | { | |
903 | *r1 = (insn[1] >> 4) & 0xf; | |
904 | /* i2 is a 16-bit signed quantity. */ | |
905 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
906 | return 1; | |
907 | } | |
908 | else | |
909 | return 0; | |
910 | } | |
8ac0e65a | 911 | |
5769d3cd | 912 | |
4bc8c588 JB |
913 | static int |
914 | is_ril (bfd_byte *insn, int op1, int op2, | |
915 | unsigned int *r1, int *i2) | |
916 | { | |
917 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
918 | { | |
919 | *r1 = (insn[1] >> 4) & 0xf; | |
920 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, | |
921 | no sign extension is necessary, but we don't want to assume | |
922 | that. */ | |
923 | *i2 = (((insn[2] << 24) | |
924 | | (insn[3] << 16) | |
925 | | (insn[4] << 8) | |
926 | | (insn[5])) ^ 0x80000000) - 0x80000000; | |
927 | return 1; | |
928 | } | |
929 | else | |
930 | return 0; | |
931 | } | |
932 | ||
933 | ||
934 | static int | |
935 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
936 | { | |
937 | if (insn[0] == op) | |
938 | { | |
939 | *r1 = (insn[1] >> 4) & 0xf; | |
940 | *r2 = insn[1] & 0xf; | |
941 | return 1; | |
942 | } | |
943 | else | |
944 | return 0; | |
945 | } | |
946 | ||
947 | ||
948 | static int | |
949 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
950 | { | |
951 | if (((insn[0] << 8) | insn[1]) == op) | |
952 | { | |
953 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ | |
954 | *r1 = (insn[3] >> 4) & 0xf; | |
955 | *r2 = insn[3] & 0xf; | |
956 | return 1; | |
957 | } | |
958 | else | |
959 | return 0; | |
960 | } | |
961 | ||
962 | ||
963 | static int | |
964 | is_rs (bfd_byte *insn, int op, | |
965 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) | |
966 | { | |
967 | if (insn[0] == op) | |
968 | { | |
969 | *r1 = (insn[1] >> 4) & 0xf; | |
970 | *r3 = insn[1] & 0xf; | |
971 | *b2 = (insn[2] >> 4) & 0xf; | |
972 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
973 | return 1; | |
974 | } | |
975 | else | |
976 | return 0; | |
977 | } | |
978 | ||
979 | ||
980 | static int | |
a8c99f38 | 981 | is_rsy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
982 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) |
983 | { | |
984 | if (insn[0] == op1 | |
4bc8c588 JB |
985 | && insn[5] == op2) |
986 | { | |
987 | *r1 = (insn[1] >> 4) & 0xf; | |
988 | *r3 = insn[1] & 0xf; | |
989 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
990 | /* The 'long displacement' is a 20-bit signed integer. */ |
991 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
992 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
993 | return 1; |
994 | } | |
995 | else | |
996 | return 0; | |
997 | } | |
998 | ||
999 | ||
1db4e8a0 UW |
1000 | static int |
1001 | is_rsi (bfd_byte *insn, int op, | |
1002 | unsigned int *r1, unsigned int *r3, int *i2) | |
1003 | { | |
1004 | if (insn[0] == op) | |
1005 | { | |
1006 | *r1 = (insn[1] >> 4) & 0xf; | |
1007 | *r3 = insn[1] & 0xf; | |
1008 | /* i2 is a 16-bit signed quantity. */ | |
1009 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
1010 | return 1; | |
1011 | } | |
1012 | else | |
1013 | return 0; | |
1014 | } | |
1015 | ||
1016 | ||
1017 | static int | |
1018 | is_rie (bfd_byte *insn, int op1, int op2, | |
1019 | unsigned int *r1, unsigned int *r3, int *i2) | |
1020 | { | |
1021 | if (insn[0] == op1 | |
1022 | && insn[5] == op2) | |
1023 | { | |
1024 | *r1 = (insn[1] >> 4) & 0xf; | |
1025 | *r3 = insn[1] & 0xf; | |
1026 | /* i2 is a 16-bit signed quantity. */ | |
1027 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
1028 | return 1; | |
1029 | } | |
1030 | else | |
1031 | return 0; | |
1032 | } | |
1033 | ||
1034 | ||
4bc8c588 JB |
1035 | static int |
1036 | is_rx (bfd_byte *insn, int op, | |
1037 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) | |
1038 | { | |
1039 | if (insn[0] == op) | |
1040 | { | |
1041 | *r1 = (insn[1] >> 4) & 0xf; | |
1042 | *x2 = insn[1] & 0xf; | |
1043 | *b2 = (insn[2] >> 4) & 0xf; | |
1044 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
1045 | return 1; | |
1046 | } | |
1047 | else | |
1048 | return 0; | |
1049 | } | |
1050 | ||
1051 | ||
1052 | static int | |
a8c99f38 | 1053 | is_rxy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
1054 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) |
1055 | { | |
1056 | if (insn[0] == op1 | |
4bc8c588 JB |
1057 | && insn[5] == op2) |
1058 | { | |
1059 | *r1 = (insn[1] >> 4) & 0xf; | |
1060 | *x2 = insn[1] & 0xf; | |
1061 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
1062 | /* The 'long displacement' is a 20-bit signed integer. */ |
1063 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
1064 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
1065 | return 1; |
1066 | } | |
1067 | else | |
1068 | return 0; | |
1069 | } | |
1070 | ||
1071 | ||
3fc46200 | 1072 | /* Prologue analysis. */ |
4bc8c588 | 1073 | |
d0f54f9d JB |
1074 | #define S390_NUM_GPRS 16 |
1075 | #define S390_NUM_FPRS 16 | |
4bc8c588 | 1076 | |
a8c99f38 JB |
1077 | struct s390_prologue_data { |
1078 | ||
ee1b3323 UW |
1079 | /* The stack. */ |
1080 | struct pv_area *stack; | |
1081 | ||
e17a4113 | 1082 | /* The size and byte-order of a GPR or FPR. */ |
a8c99f38 JB |
1083 | int gpr_size; |
1084 | int fpr_size; | |
e17a4113 | 1085 | enum bfd_endian byte_order; |
a8c99f38 JB |
1086 | |
1087 | /* The general-purpose registers. */ | |
3fc46200 | 1088 | pv_t gpr[S390_NUM_GPRS]; |
a8c99f38 JB |
1089 | |
1090 | /* The floating-point registers. */ | |
3fc46200 | 1091 | pv_t fpr[S390_NUM_FPRS]; |
a8c99f38 | 1092 | |
121d8485 UW |
1093 | /* The offset relative to the CFA where the incoming GPR N was saved |
1094 | by the function prologue. 0 if not saved or unknown. */ | |
1095 | int gpr_slot[S390_NUM_GPRS]; | |
4bc8c588 | 1096 | |
121d8485 UW |
1097 | /* Likewise for FPRs. */ |
1098 | int fpr_slot[S390_NUM_FPRS]; | |
4bc8c588 | 1099 | |
121d8485 UW |
1100 | /* Nonzero if the backchain was saved. This is assumed to be the |
1101 | case when the incoming SP is saved at the current SP location. */ | |
1102 | int back_chain_saved_p; | |
1103 | }; | |
4bc8c588 | 1104 | |
3fc46200 UW |
1105 | /* Return the effective address for an X-style instruction, like: |
1106 | ||
1107 | L R1, D2(X2, B2) | |
1108 | ||
1109 | Here, X2 and B2 are registers, and D2 is a signed 20-bit | |
1110 | constant; the effective address is the sum of all three. If either | |
1111 | X2 or B2 are zero, then it doesn't contribute to the sum --- this | |
1112 | means that r0 can't be used as either X2 or B2. */ | |
1113 | static pv_t | |
1114 | s390_addr (struct s390_prologue_data *data, | |
1115 | int d2, unsigned int x2, unsigned int b2) | |
1116 | { | |
1117 | pv_t result; | |
1118 | ||
1119 | result = pv_constant (d2); | |
1120 | if (x2) | |
1121 | result = pv_add (result, data->gpr[x2]); | |
1122 | if (b2) | |
1123 | result = pv_add (result, data->gpr[b2]); | |
1124 | ||
1125 | return result; | |
1126 | } | |
1127 | ||
1128 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ | |
a8c99f38 | 1129 | static void |
3fc46200 UW |
1130 | s390_store (struct s390_prologue_data *data, |
1131 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, | |
1132 | pv_t value) | |
4bc8c588 | 1133 | { |
3fc46200 | 1134 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 1135 | pv_t offset; |
121d8485 UW |
1136 | |
1137 | /* Check whether we are storing the backchain. */ | |
3fc46200 | 1138 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
121d8485 | 1139 | |
3fc46200 | 1140 | if (pv_is_constant (offset) && offset.k == 0) |
121d8485 | 1141 | if (size == data->gpr_size |
3fc46200 | 1142 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
121d8485 UW |
1143 | { |
1144 | data->back_chain_saved_p = 1; | |
1145 | return; | |
1146 | } | |
1147 | ||
1148 | ||
1149 | /* Check whether we are storing a register into the stack. */ | |
ee1b3323 UW |
1150 | if (!pv_area_store_would_trash (data->stack, addr)) |
1151 | pv_area_store (data->stack, addr, size, value); | |
4bc8c588 | 1152 | |
a8c99f38 | 1153 | |
121d8485 UW |
1154 | /* Note: If this is some store we cannot identify, you might think we |
1155 | should forget our cached values, as any of those might have been hit. | |
1156 | ||
1157 | However, we make the assumption that the register save areas are only | |
1158 | ever stored to once in any given function, and we do recognize these | |
1159 | stores. Thus every store we cannot recognize does not hit our data. */ | |
4bc8c588 | 1160 | } |
4bc8c588 | 1161 | |
3fc46200 UW |
1162 | /* Do a SIZE-byte load from D2(X2,B2). */ |
1163 | static pv_t | |
1164 | s390_load (struct s390_prologue_data *data, | |
1165 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) | |
1166 | ||
4bc8c588 | 1167 | { |
3fc46200 | 1168 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 1169 | pv_t offset; |
4bc8c588 | 1170 | |
a8c99f38 JB |
1171 | /* If it's a load from an in-line constant pool, then we can |
1172 | simulate that, under the assumption that the code isn't | |
1173 | going to change between the time the processor actually | |
1174 | executed it creating the current frame, and the time when | |
1175 | we're analyzing the code to unwind past that frame. */ | |
3fc46200 | 1176 | if (pv_is_constant (addr)) |
4bc8c588 | 1177 | { |
0542c86d | 1178 | struct target_section *secp; |
3fc46200 | 1179 | secp = target_section_by_addr (¤t_target, addr.k); |
a8c99f38 JB |
1180 | if (secp != NULL |
1181 | && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section) | |
1182 | & SEC_READONLY)) | |
e17a4113 UW |
1183 | return pv_constant (read_memory_integer (addr.k, size, |
1184 | data->byte_order)); | |
a8c99f38 | 1185 | } |
7666f43c | 1186 | |
121d8485 | 1187 | /* Check whether we are accessing one of our save slots. */ |
ee1b3323 UW |
1188 | return pv_area_fetch (data->stack, addr, size); |
1189 | } | |
121d8485 | 1190 | |
ee1b3323 UW |
1191 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
1192 | this to pv_area_scan. | |
121d8485 | 1193 | |
ee1b3323 UW |
1194 | If VALUE is a saved register, ADDR says it was saved at a constant |
1195 | offset from the frame base, and SIZE indicates that the whole | |
1196 | register was saved, record its offset in the reg_offset table in | |
1197 | PROLOGUE_UNTYPED. */ | |
1198 | static void | |
c378eb4e MS |
1199 | s390_check_for_saved (void *data_untyped, pv_t addr, |
1200 | CORE_ADDR size, pv_t value) | |
ee1b3323 UW |
1201 | { |
1202 | struct s390_prologue_data *data = data_untyped; | |
1203 | int i, offset; | |
1204 | ||
1205 | if (!pv_is_register (addr, S390_SP_REGNUM)) | |
1206 | return; | |
1207 | ||
1208 | offset = 16 * data->gpr_size + 32 - addr.k; | |
4bc8c588 | 1209 | |
ee1b3323 UW |
1210 | /* If we are storing the original value of a register, we want to |
1211 | record the CFA offset. If the same register is stored multiple | |
1212 | times, the stack slot with the highest address counts. */ | |
1213 | ||
1214 | for (i = 0; i < S390_NUM_GPRS; i++) | |
1215 | if (size == data->gpr_size | |
1216 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) | |
1217 | if (data->gpr_slot[i] == 0 | |
1218 | || data->gpr_slot[i] > offset) | |
1219 | { | |
1220 | data->gpr_slot[i] = offset; | |
1221 | return; | |
1222 | } | |
1223 | ||
1224 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1225 | if (size == data->fpr_size | |
1226 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) | |
1227 | if (data->fpr_slot[i] == 0 | |
1228 | || data->fpr_slot[i] > offset) | |
1229 | { | |
1230 | data->fpr_slot[i] = offset; | |
1231 | return; | |
1232 | } | |
a8c99f38 | 1233 | } |
4bc8c588 | 1234 | |
a8c99f38 JB |
1235 | /* Analyze the prologue of the function starting at START_PC, |
1236 | continuing at most until CURRENT_PC. Initialize DATA to | |
1237 | hold all information we find out about the state of the registers | |
1238 | and stack slots. Return the address of the instruction after | |
1239 | the last one that changed the SP, FP, or back chain; or zero | |
1240 | on error. */ | |
1241 | static CORE_ADDR | |
1242 | s390_analyze_prologue (struct gdbarch *gdbarch, | |
1243 | CORE_ADDR start_pc, | |
1244 | CORE_ADDR current_pc, | |
1245 | struct s390_prologue_data *data) | |
4bc8c588 | 1246 | { |
a8c99f38 JB |
1247 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1248 | ||
4bc8c588 | 1249 | /* Our return value: |
a8c99f38 JB |
1250 | The address of the instruction after the last one that changed |
1251 | the SP, FP, or back chain; zero if we got an error trying to | |
1252 | read memory. */ | |
1253 | CORE_ADDR result = start_pc; | |
4bc8c588 | 1254 | |
4bc8c588 JB |
1255 | /* The current PC for our abstract interpretation. */ |
1256 | CORE_ADDR pc; | |
1257 | ||
1258 | /* The address of the next instruction after that. */ | |
1259 | CORE_ADDR next_pc; | |
1260 | ||
4bc8c588 JB |
1261 | /* Set up everything's initial value. */ |
1262 | { | |
1263 | int i; | |
1264 | ||
55f960e1 | 1265 | data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
ee1b3323 | 1266 | |
a8c99f38 JB |
1267 | /* For the purpose of prologue tracking, we consider the GPR size to |
1268 | be equal to the ABI word size, even if it is actually larger | |
1269 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ | |
1270 | data->gpr_size = word_size; | |
1271 | data->fpr_size = 8; | |
e17a4113 | 1272 | data->byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 | 1273 | |
4bc8c588 | 1274 | for (i = 0; i < S390_NUM_GPRS; i++) |
3fc46200 | 1275 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
4bc8c588 JB |
1276 | |
1277 | for (i = 0; i < S390_NUM_FPRS; i++) | |
3fc46200 | 1278 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
4bc8c588 | 1279 | |
121d8485 UW |
1280 | for (i = 0; i < S390_NUM_GPRS; i++) |
1281 | data->gpr_slot[i] = 0; | |
1282 | ||
1283 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1284 | data->fpr_slot[i] = 0; | |
4bc8c588 | 1285 | |
121d8485 | 1286 | data->back_chain_saved_p = 0; |
4bc8c588 JB |
1287 | } |
1288 | ||
a8c99f38 JB |
1289 | /* Start interpreting instructions, until we hit the frame's |
1290 | current PC or the first branch instruction. */ | |
1291 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) | |
5769d3cd | 1292 | { |
4bc8c588 | 1293 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
a788de9b | 1294 | int insn_len = s390_readinstruction (insn, pc); |
4bc8c588 | 1295 | |
3fc46200 UW |
1296 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
1297 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; | |
1298 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; | |
1299 | ||
4bc8c588 | 1300 | /* Fields for various kinds of instructions. */ |
a8c99f38 JB |
1301 | unsigned int b2, r1, r2, x2, r3; |
1302 | int i2, d2; | |
4bc8c588 | 1303 | |
121d8485 | 1304 | /* The values of SP and FP before this instruction, |
4bc8c588 | 1305 | for detecting instructions that change them. */ |
3fc46200 | 1306 | pv_t pre_insn_sp, pre_insn_fp; |
121d8485 UW |
1307 | /* Likewise for the flag whether the back chain was saved. */ |
1308 | int pre_insn_back_chain_saved_p; | |
4bc8c588 JB |
1309 | |
1310 | /* If we got an error trying to read the instruction, report it. */ | |
1311 | if (insn_len < 0) | |
8ac0e65a | 1312 | { |
a8c99f38 | 1313 | result = 0; |
4bc8c588 JB |
1314 | break; |
1315 | } | |
1316 | ||
1317 | next_pc = pc + insn_len; | |
1318 | ||
a8c99f38 JB |
1319 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1320 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
121d8485 | 1321 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
4bc8c588 | 1322 | |
4bc8c588 | 1323 | |
3fc46200 UW |
1324 | /* LHI r1, i2 --- load halfword immediate. */ |
1325 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ | |
1326 | /* LGFI r1, i2 --- load fullword immediate. */ | |
1327 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) | |
1328 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) | |
1329 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) | |
1330 | data->gpr[r1] = pv_constant (i2); | |
1331 | ||
1332 | /* LR r1, r2 --- load from register. */ | |
1333 | /* LGR r1, r2 --- load from register (64-bit version). */ | |
1334 | else if (is_rr (insn32, op_lr, &r1, &r2) | |
1335 | || is_rre (insn64, op_lgr, &r1, &r2)) | |
1336 | data->gpr[r1] = data->gpr[r2]; | |
1337 | ||
1338 | /* L r1, d2(x2, b2) --- load. */ | |
1339 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ | |
1340 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ | |
1341 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) | |
1342 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) | |
1343 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) | |
1344 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); | |
1345 | ||
1346 | /* ST r1, d2(x2, b2) --- store. */ | |
1347 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ | |
1348 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ | |
1349 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) | |
1350 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) | |
1351 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) | |
1352 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); | |
1353 | ||
1354 | /* STD r1, d2(x2,b2) --- store floating-point register. */ | |
4bc8c588 | 1355 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1356 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
1357 | ||
1358 | /* STM r1, r3, d2(b2) --- store multiple. */ | |
c378eb4e MS |
1359 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement |
1360 | version). */ | |
3fc46200 UW |
1361 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ |
1362 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) | |
1363 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) | |
1364 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) | |
4bc8c588 | 1365 | { |
3fc46200 UW |
1366 | for (; r1 <= r3; r1++, d2 += data->gpr_size) |
1367 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); | |
4bc8c588 JB |
1368 | } |
1369 | ||
3fc46200 UW |
1370 | /* AHI r1, i2 --- add halfword immediate. */ |
1371 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ | |
1372 | /* AFI r1, i2 --- add fullword immediate. */ | |
1373 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ | |
1374 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) | |
1375 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) | |
1376 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) | |
1377 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) | |
1378 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); | |
1379 | ||
1380 | /* ALFI r1, i2 --- add logical immediate. */ | |
1381 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ | |
1382 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) | |
1383 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) | |
1384 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1385 | (CORE_ADDR)i2 & 0xffffffff); | |
1386 | ||
1387 | /* AR r1, r2 -- add register. */ | |
1388 | /* AGR r1, r2 -- add register (64-bit version). */ | |
1389 | else if (is_rr (insn32, op_ar, &r1, &r2) | |
1390 | || is_rre (insn64, op_agr, &r1, &r2)) | |
1391 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); | |
1392 | ||
1393 | /* A r1, d2(x2, b2) -- add. */ | |
1394 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ | |
1395 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ | |
1396 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) | |
1397 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) | |
1398 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) | |
1399 | data->gpr[r1] = pv_add (data->gpr[r1], | |
1400 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1401 | ||
1402 | /* SLFI r1, i2 --- subtract logical immediate. */ | |
1403 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ | |
1404 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) | |
1405 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) | |
1406 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1407 | -((CORE_ADDR)i2 & 0xffffffff)); | |
1408 | ||
1409 | /* SR r1, r2 -- subtract register. */ | |
1410 | /* SGR r1, r2 -- subtract register (64-bit version). */ | |
1411 | else if (is_rr (insn32, op_sr, &r1, &r2) | |
1412 | || is_rre (insn64, op_sgr, &r1, &r2)) | |
1413 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); | |
1414 | ||
1415 | /* S r1, d2(x2, b2) -- subtract. */ | |
1416 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ | |
1417 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ | |
1418 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) | |
1419 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) | |
1420 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) | |
1421 | data->gpr[r1] = pv_subtract (data->gpr[r1], | |
1422 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1423 | ||
1424 | /* LA r1, d2(x2, b2) --- load address. */ | |
1425 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ | |
1426 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) | |
1427 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) | |
1428 | data->gpr[r1] = s390_addr (data, d2, x2, b2); | |
1429 | ||
1430 | /* LARL r1, i2 --- load address relative long. */ | |
a8c99f38 | 1431 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
3fc46200 | 1432 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
a8c99f38 | 1433 | |
3fc46200 | 1434 | /* BASR r1, 0 --- branch and save. |
a8c99f38 JB |
1435 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
1436 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1437 | && r2 == 0) | |
3fc46200 | 1438 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1439 | |
3fc46200 | 1440 | /* BRAS r1, i2 --- branch relative and save. */ |
a8c99f38 JB |
1441 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
1442 | { | |
3fc46200 | 1443 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1444 | next_pc = pc + i2 * 2; |
4bc8c588 | 1445 | |
a8c99f38 JB |
1446 | /* We'd better not interpret any backward branches. We'll |
1447 | never terminate. */ | |
1448 | if (next_pc <= pc) | |
4bc8c588 JB |
1449 | break; |
1450 | } | |
1451 | ||
a8c99f38 JB |
1452 | /* Terminate search when hitting any other branch instruction. */ |
1453 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1454 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) | |
1455 | || is_rr (insn, op_bcr, &r1, &r2) | |
1456 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1457 | || is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1458 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1459 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) | |
1460 | break; | |
1461 | ||
4bc8c588 JB |
1462 | else |
1463 | /* An instruction we don't know how to simulate. The only | |
1464 | safe thing to do would be to set every value we're tracking | |
a8c99f38 JB |
1465 | to 'unknown'. Instead, we'll be optimistic: we assume that |
1466 | we *can* interpret every instruction that the compiler uses | |
1467 | to manipulate any of the data we're interested in here -- | |
1468 | then we can just ignore anything else. */ | |
1469 | ; | |
4bc8c588 JB |
1470 | |
1471 | /* Record the address after the last instruction that changed | |
1472 | the FP, SP, or backlink. Ignore instructions that changed | |
1473 | them back to their original values --- those are probably | |
1474 | restore instructions. (The back chain is never restored, | |
1475 | just popped.) */ | |
1476 | { | |
3fc46200 UW |
1477 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1478 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
4bc8c588 | 1479 | |
3fc46200 UW |
1480 | if ((! pv_is_identical (pre_insn_sp, sp) |
1481 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) | |
1482 | && sp.kind != pvk_unknown) | |
1483 | || (! pv_is_identical (pre_insn_fp, fp) | |
1484 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) | |
1485 | && fp.kind != pvk_unknown) | |
121d8485 | 1486 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
a8c99f38 | 1487 | result = next_pc; |
4bc8c588 | 1488 | } |
5769d3cd | 1489 | } |
4bc8c588 | 1490 | |
ee1b3323 UW |
1491 | /* Record where all the registers were saved. */ |
1492 | pv_area_scan (data->stack, s390_check_for_saved, data); | |
1493 | ||
1494 | free_pv_area (data->stack); | |
1495 | data->stack = NULL; | |
1496 | ||
4bc8c588 | 1497 | return result; |
5769d3cd AC |
1498 | } |
1499 | ||
a8c99f38 JB |
1500 | /* Advance PC across any function entry prologue instructions to reach |
1501 | some "real" code. */ | |
1502 | static CORE_ADDR | |
6093d2eb | 1503 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
a8c99f38 JB |
1504 | { |
1505 | struct s390_prologue_data data; | |
1506 | CORE_ADDR skip_pc; | |
6093d2eb | 1507 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
a8c99f38 JB |
1508 | return skip_pc ? skip_pc : pc; |
1509 | } | |
1510 | ||
d0f54f9d JB |
1511 | /* Return true if we are in the functin's epilogue, i.e. after the |
1512 | instruction that destroyed the function's stack frame. */ | |
1513 | static int | |
1514 | s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1515 | { | |
1516 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
1517 | ||
1518 | /* In frameless functions, there's not frame to destroy and thus | |
1519 | we don't care about the epilogue. | |
1520 | ||
1521 | In functions with frame, the epilogue sequence is a pair of | |
1522 | a LM-type instruction that restores (amongst others) the | |
1523 | return register %r14 and the stack pointer %r15, followed | |
1524 | by a branch 'br %r14' --or equivalent-- that effects the | |
1525 | actual return. | |
1526 | ||
1527 | In that situation, this function needs to return 'true' in | |
1528 | exactly one case: when pc points to that branch instruction. | |
1529 | ||
1530 | Thus we try to disassemble the one instructions immediately | |
177b42fe | 1531 | preceding pc and check whether it is an LM-type instruction |
d0f54f9d JB |
1532 | modifying the stack pointer. |
1533 | ||
1534 | Note that disassembling backwards is not reliable, so there | |
1535 | is a slight chance of false positives here ... */ | |
1536 | ||
1537 | bfd_byte insn[6]; | |
1538 | unsigned int r1, r3, b2; | |
1539 | int d2; | |
1540 | ||
1541 | if (word_size == 4 | |
8defab1a | 1542 | && !target_read_memory (pc - 4, insn, 4) |
d0f54f9d JB |
1543 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
1544 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1545 | return 1; | |
1546 | ||
a8c99f38 | 1547 | if (word_size == 4 |
8defab1a | 1548 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 JB |
1549 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
1550 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1551 | return 1; | |
1552 | ||
d0f54f9d | 1553 | if (word_size == 8 |
8defab1a | 1554 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 | 1555 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
d0f54f9d JB |
1556 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
1557 | return 1; | |
1558 | ||
1559 | return 0; | |
1560 | } | |
5769d3cd | 1561 | |
1db4e8a0 UW |
1562 | /* Displaced stepping. */ |
1563 | ||
1564 | /* Fix up the state of registers and memory after having single-stepped | |
1565 | a displaced instruction. */ | |
1566 | static void | |
1567 | s390_displaced_step_fixup (struct gdbarch *gdbarch, | |
1568 | struct displaced_step_closure *closure, | |
1569 | CORE_ADDR from, CORE_ADDR to, | |
1570 | struct regcache *regs) | |
1571 | { | |
1572 | /* Since we use simple_displaced_step_copy_insn, our closure is a | |
1573 | copy of the instruction. */ | |
1574 | gdb_byte *insn = (gdb_byte *) closure; | |
1575 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
1576 | int insnlen = s390_instrlen[insn[0] >> 6]; | |
1577 | ||
1578 | /* Fields for various kinds of instructions. */ | |
1579 | unsigned int b2, r1, r2, x2, r3; | |
1580 | int i2, d2; | |
1581 | ||
1582 | /* Get current PC and addressing mode bit. */ | |
1583 | CORE_ADDR pc = regcache_read_pc (regs); | |
beaabab2 | 1584 | ULONGEST amode = 0; |
1db4e8a0 UW |
1585 | |
1586 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
1587 | { | |
1588 | regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); | |
1589 | amode &= 0x80000000; | |
1590 | } | |
1591 | ||
1592 | if (debug_displaced) | |
1593 | fprintf_unfiltered (gdb_stdlog, | |
0161e4b9 | 1594 | "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n", |
1db4e8a0 | 1595 | paddress (gdbarch, from), paddress (gdbarch, to), |
0161e4b9 | 1596 | paddress (gdbarch, pc), insnlen, (int) amode); |
1db4e8a0 UW |
1597 | |
1598 | /* Handle absolute branch and save instructions. */ | |
1599 | if (is_rr (insn, op_basr, &r1, &r2) | |
1600 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) | |
1601 | { | |
1602 | /* Recompute saved return address in R1. */ | |
1603 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1604 | amode | (from + insnlen)); | |
1605 | } | |
1606 | ||
1607 | /* Handle absolute branch instructions. */ | |
1608 | else if (is_rr (insn, op_bcr, &r1, &r2) | |
1609 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1610 | || is_rr (insn, op_bctr, &r1, &r2) | |
1611 | || is_rre (insn, op_bctgr, &r1, &r2) | |
1612 | || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) | |
1613 | || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) | |
1614 | || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) | |
1615 | || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) | |
1616 | || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) | |
1617 | || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) | |
1618 | { | |
1619 | /* Update PC iff branch was *not* taken. */ | |
1620 | if (pc == to + insnlen) | |
1621 | regcache_write_pc (regs, from + insnlen); | |
1622 | } | |
1623 | ||
1624 | /* Handle PC-relative branch and save instructions. */ | |
1625 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) | |
1626 | || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) | |
1627 | { | |
1628 | /* Update PC. */ | |
1629 | regcache_write_pc (regs, pc - to + from); | |
1630 | /* Recompute saved return address in R1. */ | |
1631 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1632 | amode | (from + insnlen)); | |
1633 | } | |
1634 | ||
1635 | /* Handle PC-relative branch instructions. */ | |
1636 | else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1637 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1638 | || is_ri (insn, op1_brct, op2_brct, &r1, &i2) | |
1639 | || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2) | |
1640 | || is_rsi (insn, op_brxh, &r1, &r3, &i2) | |
1641 | || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2) | |
1642 | || is_rsi (insn, op_brxle, &r1, &r3, &i2) | |
1643 | || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2)) | |
1644 | { | |
1645 | /* Update PC. */ | |
1646 | regcache_write_pc (regs, pc - to + from); | |
1647 | } | |
1648 | ||
1649 | /* Handle LOAD ADDRESS RELATIVE LONG. */ | |
1650 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) | |
1651 | { | |
0161e4b9 UW |
1652 | /* Update PC. */ |
1653 | regcache_write_pc (regs, from + insnlen); | |
1db4e8a0 UW |
1654 | /* Recompute output address in R1. */ |
1655 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
0161e4b9 | 1656 | amode | (from + i2 * 2)); |
1db4e8a0 UW |
1657 | } |
1658 | ||
1659 | /* If we executed a breakpoint instruction, point PC right back at it. */ | |
1660 | else if (insn[0] == 0x0 && insn[1] == 0x1) | |
1661 | regcache_write_pc (regs, from); | |
1662 | ||
1663 | /* For any other insn, PC points right after the original instruction. */ | |
1664 | else | |
1665 | regcache_write_pc (regs, from + insnlen); | |
0161e4b9 UW |
1666 | |
1667 | if (debug_displaced) | |
1668 | fprintf_unfiltered (gdb_stdlog, | |
1669 | "displaced: (s390) pc is now %s\n", | |
1670 | paddress (gdbarch, regcache_read_pc (regs))); | |
1db4e8a0 | 1671 | } |
a8c99f38 | 1672 | |
d6db1fab UW |
1673 | |
1674 | /* Helper routine to unwind pseudo registers. */ | |
1675 | ||
1676 | static struct value * | |
1677 | s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum) | |
1678 | { | |
1679 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
1680 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1681 | struct type *type = register_type (gdbarch, regnum); | |
1682 | ||
1683 | /* Unwind PC via PSW address. */ | |
1684 | if (regnum == tdep->pc_regnum) | |
1685 | { | |
1686 | struct value *val; | |
1687 | ||
1688 | val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM); | |
1689 | if (!value_optimized_out (val)) | |
1690 | { | |
1691 | LONGEST pswa = value_as_long (val); | |
1692 | ||
1693 | if (TYPE_LENGTH (type) == 4) | |
1694 | return value_from_pointer (type, pswa & 0x7fffffff); | |
1695 | else | |
1696 | return value_from_pointer (type, pswa); | |
1697 | } | |
1698 | } | |
1699 | ||
1700 | /* Unwind CC via PSW mask. */ | |
1701 | if (regnum == tdep->cc_regnum) | |
1702 | { | |
1703 | struct value *val; | |
1704 | ||
1705 | val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM); | |
1706 | if (!value_optimized_out (val)) | |
1707 | { | |
1708 | LONGEST pswm = value_as_long (val); | |
1709 | ||
1710 | if (TYPE_LENGTH (type) == 4) | |
1711 | return value_from_longest (type, (pswm >> 12) & 3); | |
1712 | else | |
1713 | return value_from_longest (type, (pswm >> 44) & 3); | |
1714 | } | |
1715 | } | |
1716 | ||
1717 | /* Unwind full GPRs to show at least the lower halves (as the | |
1718 | upper halves are undefined). */ | |
1719 | if (tdep->gpr_full_regnum != -1 | |
1720 | && regnum >= tdep->gpr_full_regnum | |
1721 | && regnum < tdep->gpr_full_regnum + 16) | |
1722 | { | |
1723 | int reg = regnum - tdep->gpr_full_regnum; | |
1724 | struct value *val; | |
1725 | ||
1726 | val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); | |
1727 | if (!value_optimized_out (val)) | |
1728 | return value_cast (type, val); | |
1729 | } | |
1730 | ||
1731 | return allocate_optimized_out_value (type); | |
1732 | } | |
1733 | ||
1734 | static struct value * | |
1735 | s390_trad_frame_prev_register (struct frame_info *this_frame, | |
1736 | struct trad_frame_saved_reg saved_regs[], | |
1737 | int regnum) | |
1738 | { | |
1739 | if (regnum < S390_NUM_REGS) | |
1740 | return trad_frame_get_prev_register (this_frame, saved_regs, regnum); | |
1741 | else | |
1742 | return s390_unwind_pseudo_register (this_frame, regnum); | |
1743 | } | |
1744 | ||
1745 | ||
a8c99f38 JB |
1746 | /* Normal stack frames. */ |
1747 | ||
1748 | struct s390_unwind_cache { | |
1749 | ||
1750 | CORE_ADDR func; | |
1751 | CORE_ADDR frame_base; | |
1752 | CORE_ADDR local_base; | |
1753 | ||
1754 | struct trad_frame_saved_reg *saved_regs; | |
1755 | }; | |
1756 | ||
a78f21af | 1757 | static int |
f089c433 | 1758 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1759 | struct s390_unwind_cache *info) |
5769d3cd | 1760 | { |
f089c433 | 1761 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 JB |
1762 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1763 | struct s390_prologue_data data; | |
3fc46200 UW |
1764 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
1765 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; | |
121d8485 UW |
1766 | int i; |
1767 | CORE_ADDR cfa; | |
a8c99f38 JB |
1768 | CORE_ADDR func; |
1769 | CORE_ADDR result; | |
1770 | ULONGEST reg; | |
1771 | CORE_ADDR prev_sp; | |
1772 | int frame_pointer; | |
1773 | int size; | |
edb3359d | 1774 | struct frame_info *next_frame; |
a8c99f38 JB |
1775 | |
1776 | /* Try to find the function start address. If we can't find it, we don't | |
1777 | bother searching for it -- with modern compilers this would be mostly | |
1778 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data | |
1779 | or else a valid backchain ... */ | |
f089c433 | 1780 | func = get_frame_func (this_frame); |
a8c99f38 JB |
1781 | if (!func) |
1782 | return 0; | |
5769d3cd | 1783 | |
a8c99f38 JB |
1784 | /* Try to analyze the prologue. */ |
1785 | result = s390_analyze_prologue (gdbarch, func, | |
f089c433 | 1786 | get_frame_pc (this_frame), &data); |
a8c99f38 | 1787 | if (!result) |
5769d3cd | 1788 | return 0; |
5769d3cd | 1789 | |
a8c99f38 JB |
1790 | /* If this was successful, we should have found the instruction that |
1791 | sets the stack pointer register to the previous value of the stack | |
1792 | pointer minus the frame size. */ | |
3fc46200 | 1793 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
5769d3cd | 1794 | return 0; |
a8c99f38 JB |
1795 | |
1796 | /* A frame size of zero at this point can mean either a real | |
1797 | frameless function, or else a failure to find the prologue. | |
1798 | Perform some sanity checks to verify we really have a | |
1799 | frameless function. */ | |
1800 | if (sp->k == 0) | |
5769d3cd | 1801 | { |
a8c99f38 JB |
1802 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
1803 | size zero. This is only possible if the next frame is a sentinel | |
1804 | frame, a dummy frame, or a signal trampoline frame. */ | |
0e100dab AC |
1805 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
1806 | needed, instead the code should simpliy rely on its | |
1807 | analysis. */ | |
edb3359d DJ |
1808 | next_frame = get_next_frame (this_frame); |
1809 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1810 | next_frame = get_next_frame (next_frame); | |
1811 | if (next_frame | |
f089c433 | 1812 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
5769d3cd | 1813 | return 0; |
5769d3cd | 1814 | |
a8c99f38 JB |
1815 | /* If we really have a frameless function, %r14 must be valid |
1816 | -- in particular, it must point to a different function. */ | |
f089c433 | 1817 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
a8c99f38 JB |
1818 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
1819 | if (get_pc_function_start (reg) == func) | |
5769d3cd | 1820 | { |
a8c99f38 JB |
1821 | /* However, there is one case where it *is* valid for %r14 |
1822 | to point to the same function -- if this is a recursive | |
1823 | call, and we have stopped in the prologue *before* the | |
1824 | stack frame was allocated. | |
1825 | ||
1826 | Recognize this case by looking ahead a bit ... */ | |
5769d3cd | 1827 | |
a8c99f38 | 1828 | struct s390_prologue_data data2; |
3fc46200 | 1829 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
a8c99f38 JB |
1830 | |
1831 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) | |
3fc46200 | 1832 | && pv_is_register (*sp, S390_SP_REGNUM) |
a8c99f38 JB |
1833 | && sp->k != 0)) |
1834 | return 0; | |
5769d3cd | 1835 | } |
5769d3cd | 1836 | } |
5769d3cd AC |
1837 | |
1838 | ||
a8c99f38 JB |
1839 | /* OK, we've found valid prologue data. */ |
1840 | size = -sp->k; | |
5769d3cd | 1841 | |
a8c99f38 JB |
1842 | /* If the frame pointer originally also holds the same value |
1843 | as the stack pointer, we're probably using it. If it holds | |
1844 | some other value -- even a constant offset -- it is most | |
1845 | likely used as temp register. */ | |
3fc46200 | 1846 | if (pv_is_identical (*sp, *fp)) |
a8c99f38 JB |
1847 | frame_pointer = S390_FRAME_REGNUM; |
1848 | else | |
1849 | frame_pointer = S390_SP_REGNUM; | |
1850 | ||
1851 | /* If we've detected a function with stack frame, we'll still have to | |
1852 | treat it as frameless if we're currently within the function epilog | |
c378eb4e | 1853 | code at a point where the frame pointer has already been restored. |
a8c99f38 | 1854 | This can only happen in an innermost frame. */ |
0e100dab AC |
1855 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
1856 | instead the code should simpliy rely on its analysis. */ | |
edb3359d DJ |
1857 | next_frame = get_next_frame (this_frame); |
1858 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1859 | next_frame = get_next_frame (next_frame); | |
f089c433 | 1860 | if (size > 0 |
edb3359d | 1861 | && (next_frame == NULL |
f089c433 | 1862 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
5769d3cd | 1863 | { |
a8c99f38 JB |
1864 | /* See the comment in s390_in_function_epilogue_p on why this is |
1865 | not completely reliable ... */ | |
f089c433 | 1866 | if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) |
5769d3cd | 1867 | { |
a8c99f38 JB |
1868 | memset (&data, 0, sizeof (data)); |
1869 | size = 0; | |
1870 | frame_pointer = S390_SP_REGNUM; | |
5769d3cd | 1871 | } |
5769d3cd | 1872 | } |
5769d3cd | 1873 | |
a8c99f38 JB |
1874 | /* Once we know the frame register and the frame size, we can unwind |
1875 | the current value of the frame register from the next frame, and | |
1876 | add back the frame size to arrive that the previous frame's | |
1877 | stack pointer value. */ | |
f089c433 | 1878 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
121d8485 | 1879 | cfa = prev_sp + 16*word_size + 32; |
5769d3cd | 1880 | |
7803799a UW |
1881 | /* Set up ABI call-saved/call-clobbered registers. */ |
1882 | for (i = 0; i < S390_NUM_REGS; i++) | |
1883 | if (!s390_register_call_saved (gdbarch, i)) | |
1884 | trad_frame_set_unknown (info->saved_regs, i); | |
1885 | ||
1886 | /* CC is always call-clobbered. */ | |
d6db1fab | 1887 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
7803799a | 1888 | |
121d8485 UW |
1889 | /* Record the addresses of all register spill slots the prologue parser |
1890 | has recognized. Consider only registers defined as call-saved by the | |
1891 | ABI; for call-clobbered registers the parser may have recognized | |
1892 | spurious stores. */ | |
5769d3cd | 1893 | |
7803799a UW |
1894 | for (i = 0; i < 16; i++) |
1895 | if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) | |
1896 | && data.gpr_slot[i] != 0) | |
121d8485 | 1897 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; |
a8c99f38 | 1898 | |
7803799a UW |
1899 | for (i = 0; i < 16; i++) |
1900 | if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) | |
1901 | && data.fpr_slot[i] != 0) | |
1902 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; | |
a8c99f38 JB |
1903 | |
1904 | /* Function return will set PC to %r14. */ | |
d6db1fab | 1905 | info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1906 | |
1907 | /* In frameless functions, we unwind simply by moving the return | |
1908 | address to the PC. However, if we actually stored to the | |
1909 | save area, use that -- we might only think the function frameless | |
1910 | because we're in the middle of the prologue ... */ | |
1911 | if (size == 0 | |
d6db1fab | 1912 | && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
a8c99f38 | 1913 | { |
d6db1fab | 1914 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
5769d3cd | 1915 | } |
a8c99f38 JB |
1916 | |
1917 | /* Another sanity check: unless this is a frameless function, | |
1918 | we should have found spill slots for SP and PC. | |
1919 | If not, we cannot unwind further -- this happens e.g. in | |
1920 | libc's thread_start routine. */ | |
1921 | if (size > 0) | |
5769d3cd | 1922 | { |
a8c99f38 | 1923 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
d6db1fab | 1924 | || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
a8c99f38 | 1925 | prev_sp = -1; |
5769d3cd | 1926 | } |
a8c99f38 JB |
1927 | |
1928 | /* We use the current value of the frame register as local_base, | |
1929 | and the top of the register save area as frame_base. */ | |
1930 | if (prev_sp != -1) | |
1931 | { | |
1932 | info->frame_base = prev_sp + 16*word_size + 32; | |
1933 | info->local_base = prev_sp - size; | |
1934 | } | |
1935 | ||
1936 | info->func = func; | |
1937 | return 1; | |
5769d3cd AC |
1938 | } |
1939 | ||
a78f21af | 1940 | static void |
f089c433 | 1941 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1942 | struct s390_unwind_cache *info) |
5769d3cd | 1943 | { |
f089c433 | 1944 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1945 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1946 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1947 | CORE_ADDR backchain; |
1948 | ULONGEST reg; | |
1949 | LONGEST sp; | |
7803799a UW |
1950 | int i; |
1951 | ||
1952 | /* Set up ABI call-saved/call-clobbered registers. */ | |
1953 | for (i = 0; i < S390_NUM_REGS; i++) | |
1954 | if (!s390_register_call_saved (gdbarch, i)) | |
1955 | trad_frame_set_unknown (info->saved_regs, i); | |
1956 | ||
1957 | /* CC is always call-clobbered. */ | |
d6db1fab | 1958 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
a8c99f38 JB |
1959 | |
1960 | /* Get the backchain. */ | |
f089c433 | 1961 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
e17a4113 | 1962 | backchain = read_memory_unsigned_integer (reg, word_size, byte_order); |
a8c99f38 JB |
1963 | |
1964 | /* A zero backchain terminates the frame chain. As additional | |
1965 | sanity check, let's verify that the spill slot for SP in the | |
1966 | save area pointed to by the backchain in fact links back to | |
1967 | the save area. */ | |
1968 | if (backchain != 0 | |
e17a4113 UW |
1969 | && safe_read_memory_integer (backchain + 15*word_size, |
1970 | word_size, byte_order, &sp) | |
a8c99f38 JB |
1971 | && (CORE_ADDR)sp == backchain) |
1972 | { | |
1973 | /* We don't know which registers were saved, but it will have | |
1974 | to be at least %r14 and %r15. This will allow us to continue | |
1975 | unwinding, but other prev-frame registers may be incorrect ... */ | |
1976 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; | |
1977 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; | |
1978 | ||
1979 | /* Function return will set PC to %r14. */ | |
d6db1fab | 1980 | info->saved_regs[S390_PSWA_REGNUM] |
7803799a | 1981 | = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1982 | |
1983 | /* We use the current value of the frame register as local_base, | |
1984 | and the top of the register save area as frame_base. */ | |
1985 | info->frame_base = backchain + 16*word_size + 32; | |
1986 | info->local_base = reg; | |
1987 | } | |
1988 | ||
f089c433 | 1989 | info->func = get_frame_pc (this_frame); |
5769d3cd AC |
1990 | } |
1991 | ||
a8c99f38 | 1992 | static struct s390_unwind_cache * |
f089c433 | 1993 | s390_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 JB |
1994 | void **this_prologue_cache) |
1995 | { | |
1996 | struct s390_unwind_cache *info; | |
1997 | if (*this_prologue_cache) | |
1998 | return *this_prologue_cache; | |
1999 | ||
2000 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); | |
2001 | *this_prologue_cache = info; | |
f089c433 | 2002 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
2003 | info->func = -1; |
2004 | info->frame_base = -1; | |
2005 | info->local_base = -1; | |
2006 | ||
2007 | /* Try to use prologue analysis to fill the unwind cache. | |
2008 | If this fails, fall back to reading the stack backchain. */ | |
f089c433 UW |
2009 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) |
2010 | s390_backchain_frame_unwind_cache (this_frame, info); | |
a8c99f38 JB |
2011 | |
2012 | return info; | |
2013 | } | |
5769d3cd | 2014 | |
a78f21af | 2015 | static void |
f089c433 | 2016 | s390_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
2017 | void **this_prologue_cache, |
2018 | struct frame_id *this_id) | |
5769d3cd | 2019 | { |
a8c99f38 | 2020 | struct s390_unwind_cache *info |
f089c433 | 2021 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
5769d3cd | 2022 | |
a8c99f38 JB |
2023 | if (info->frame_base == -1) |
2024 | return; | |
5769d3cd | 2025 | |
a8c99f38 | 2026 | *this_id = frame_id_build (info->frame_base, info->func); |
5769d3cd AC |
2027 | } |
2028 | ||
f089c433 UW |
2029 | static struct value * |
2030 | s390_frame_prev_register (struct frame_info *this_frame, | |
2031 | void **this_prologue_cache, int regnum) | |
a8c99f38 | 2032 | { |
7803799a | 2033 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 2034 | struct s390_unwind_cache *info |
f089c433 | 2035 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
7803799a | 2036 | |
d6db1fab | 2037 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2038 | } |
2039 | ||
2040 | static const struct frame_unwind s390_frame_unwind = { | |
2041 | NORMAL_FRAME, | |
8fbca658 | 2042 | default_frame_unwind_stop_reason, |
a8c99f38 | 2043 | s390_frame_this_id, |
f089c433 UW |
2044 | s390_frame_prev_register, |
2045 | NULL, | |
2046 | default_frame_sniffer | |
a8c99f38 JB |
2047 | }; |
2048 | ||
5769d3cd | 2049 | |
8e645ae7 AC |
2050 | /* Code stubs and their stack frames. For things like PLTs and NULL |
2051 | function calls (where there is no true frame and the return address | |
2052 | is in the RETADDR register). */ | |
a8c99f38 | 2053 | |
8e645ae7 AC |
2054 | struct s390_stub_unwind_cache |
2055 | { | |
a8c99f38 JB |
2056 | CORE_ADDR frame_base; |
2057 | struct trad_frame_saved_reg *saved_regs; | |
2058 | }; | |
2059 | ||
8e645ae7 | 2060 | static struct s390_stub_unwind_cache * |
f089c433 | 2061 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
8e645ae7 | 2062 | void **this_prologue_cache) |
5769d3cd | 2063 | { |
f089c433 | 2064 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 2065 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
8e645ae7 | 2066 | struct s390_stub_unwind_cache *info; |
a8c99f38 | 2067 | ULONGEST reg; |
5c3cf190 | 2068 | |
a8c99f38 JB |
2069 | if (*this_prologue_cache) |
2070 | return *this_prologue_cache; | |
5c3cf190 | 2071 | |
8e645ae7 | 2072 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
a8c99f38 | 2073 | *this_prologue_cache = info; |
f089c433 | 2074 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
2075 | |
2076 | /* The return address is in register %r14. */ | |
d6db1fab | 2077 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
a8c99f38 JB |
2078 | |
2079 | /* Retrieve stack pointer and determine our frame base. */ | |
f089c433 | 2080 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
a8c99f38 JB |
2081 | info->frame_base = reg + 16*word_size + 32; |
2082 | ||
2083 | return info; | |
5769d3cd AC |
2084 | } |
2085 | ||
a8c99f38 | 2086 | static void |
f089c433 | 2087 | s390_stub_frame_this_id (struct frame_info *this_frame, |
8e645ae7 AC |
2088 | void **this_prologue_cache, |
2089 | struct frame_id *this_id) | |
5769d3cd | 2090 | { |
8e645ae7 | 2091 | struct s390_stub_unwind_cache *info |
f089c433 UW |
2092 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
2093 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
a8c99f38 | 2094 | } |
5769d3cd | 2095 | |
f089c433 UW |
2096 | static struct value * |
2097 | s390_stub_frame_prev_register (struct frame_info *this_frame, | |
2098 | void **this_prologue_cache, int regnum) | |
8e645ae7 AC |
2099 | { |
2100 | struct s390_stub_unwind_cache *info | |
f089c433 | 2101 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
d6db1fab | 2102 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2103 | } |
2104 | ||
f089c433 UW |
2105 | static int |
2106 | s390_stub_frame_sniffer (const struct frame_unwind *self, | |
2107 | struct frame_info *this_frame, | |
2108 | void **this_prologue_cache) | |
a8c99f38 | 2109 | { |
93d42b30 | 2110 | CORE_ADDR addr_in_block; |
8e645ae7 AC |
2111 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
2112 | ||
2113 | /* If the current PC points to non-readable memory, we assume we | |
2114 | have trapped due to an invalid function pointer call. We handle | |
2115 | the non-existing current function like a PLT stub. */ | |
f089c433 | 2116 | addr_in_block = get_frame_address_in_block (this_frame); |
93d42b30 | 2117 | if (in_plt_section (addr_in_block, NULL) |
f089c433 UW |
2118 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
2119 | return 1; | |
2120 | return 0; | |
a8c99f38 | 2121 | } |
5769d3cd | 2122 | |
f089c433 UW |
2123 | static const struct frame_unwind s390_stub_frame_unwind = { |
2124 | NORMAL_FRAME, | |
8fbca658 | 2125 | default_frame_unwind_stop_reason, |
f089c433 UW |
2126 | s390_stub_frame_this_id, |
2127 | s390_stub_frame_prev_register, | |
2128 | NULL, | |
2129 | s390_stub_frame_sniffer | |
2130 | }; | |
2131 | ||
5769d3cd | 2132 | |
a8c99f38 | 2133 | /* Signal trampoline stack frames. */ |
5769d3cd | 2134 | |
a8c99f38 JB |
2135 | struct s390_sigtramp_unwind_cache { |
2136 | CORE_ADDR frame_base; | |
2137 | struct trad_frame_saved_reg *saved_regs; | |
2138 | }; | |
5769d3cd | 2139 | |
a8c99f38 | 2140 | static struct s390_sigtramp_unwind_cache * |
f089c433 | 2141 | s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 2142 | void **this_prologue_cache) |
5769d3cd | 2143 | { |
f089c433 | 2144 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 2145 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2146 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 2147 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
2148 | struct s390_sigtramp_unwind_cache *info; |
2149 | ULONGEST this_sp, prev_sp; | |
7803799a | 2150 | CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off; |
a8c99f38 JB |
2151 | int i; |
2152 | ||
2153 | if (*this_prologue_cache) | |
2154 | return *this_prologue_cache; | |
5769d3cd | 2155 | |
a8c99f38 JB |
2156 | info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); |
2157 | *this_prologue_cache = info; | |
f089c433 | 2158 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 | 2159 | |
f089c433 UW |
2160 | this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2161 | next_ra = get_frame_pc (this_frame); | |
a8c99f38 JB |
2162 | next_cfa = this_sp + 16*word_size + 32; |
2163 | ||
2164 | /* New-style RT frame: | |
2165 | retcode + alignment (8 bytes) | |
2166 | siginfo (128 bytes) | |
c378eb4e | 2167 | ucontext (contains sigregs at offset 5 words). */ |
a8c99f38 JB |
2168 | if (next_ra == next_cfa) |
2169 | { | |
f0f63663 | 2170 | sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); |
7803799a UW |
2171 | /* sigregs are followed by uc_sigmask (8 bytes), then by the |
2172 | upper GPR halves if present. */ | |
2173 | sigreg_high_off = 8; | |
a8c99f38 JB |
2174 | } |
2175 | ||
2176 | /* Old-style RT frame and all non-RT frames: | |
2177 | old signal mask (8 bytes) | |
c378eb4e | 2178 | pointer to sigregs. */ |
5769d3cd AC |
2179 | else |
2180 | { | |
e17a4113 UW |
2181 | sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, |
2182 | word_size, byte_order); | |
7803799a UW |
2183 | /* sigregs are followed by signo (4 bytes), then by the |
2184 | upper GPR halves if present. */ | |
2185 | sigreg_high_off = 4; | |
a8c99f38 | 2186 | } |
5769d3cd | 2187 | |
a8c99f38 JB |
2188 | /* The sigregs structure looks like this: |
2189 | long psw_mask; | |
2190 | long psw_addr; | |
2191 | long gprs[16]; | |
2192 | int acrs[16]; | |
2193 | int fpc; | |
2194 | int __pad; | |
2195 | double fprs[16]; */ | |
5769d3cd | 2196 | |
7803799a UW |
2197 | /* PSW mask and address. */ |
2198 | info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr; | |
a8c99f38 | 2199 | sigreg_ptr += word_size; |
7803799a | 2200 | info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr; |
a8c99f38 JB |
2201 | sigreg_ptr += word_size; |
2202 | ||
2203 | /* Then the GPRs. */ | |
2204 | for (i = 0; i < 16; i++) | |
2205 | { | |
2206 | info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; | |
2207 | sigreg_ptr += word_size; | |
2208 | } | |
2209 | ||
2210 | /* Then the ACRs. */ | |
2211 | for (i = 0; i < 16; i++) | |
2212 | { | |
2213 | info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; | |
2214 | sigreg_ptr += 4; | |
5769d3cd | 2215 | } |
5769d3cd | 2216 | |
a8c99f38 JB |
2217 | /* The floating-point control word. */ |
2218 | info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; | |
2219 | sigreg_ptr += 8; | |
5769d3cd | 2220 | |
a8c99f38 JB |
2221 | /* And finally the FPRs. */ |
2222 | for (i = 0; i < 16; i++) | |
2223 | { | |
2224 | info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; | |
2225 | sigreg_ptr += 8; | |
2226 | } | |
2227 | ||
7803799a UW |
2228 | /* If we have them, the GPR upper halves are appended at the end. */ |
2229 | sigreg_ptr += sigreg_high_off; | |
2230 | if (tdep->gpr_full_regnum != -1) | |
2231 | for (i = 0; i < 16; i++) | |
2232 | { | |
2233 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr; | |
2234 | sigreg_ptr += 4; | |
2235 | } | |
2236 | ||
a8c99f38 JB |
2237 | /* Restore the previous frame's SP. */ |
2238 | prev_sp = read_memory_unsigned_integer ( | |
2239 | info->saved_regs[S390_SP_REGNUM].addr, | |
e17a4113 | 2240 | word_size, byte_order); |
5769d3cd | 2241 | |
a8c99f38 JB |
2242 | /* Determine our frame base. */ |
2243 | info->frame_base = prev_sp + 16*word_size + 32; | |
5769d3cd | 2244 | |
a8c99f38 | 2245 | return info; |
5769d3cd AC |
2246 | } |
2247 | ||
a8c99f38 | 2248 | static void |
f089c433 | 2249 | s390_sigtramp_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
2250 | void **this_prologue_cache, |
2251 | struct frame_id *this_id) | |
5769d3cd | 2252 | { |
a8c99f38 | 2253 | struct s390_sigtramp_unwind_cache *info |
f089c433 UW |
2254 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
2255 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
5769d3cd AC |
2256 | } |
2257 | ||
f089c433 UW |
2258 | static struct value * |
2259 | s390_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
2260 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
2261 | { |
2262 | struct s390_sigtramp_unwind_cache *info | |
f089c433 | 2263 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
d6db1fab | 2264 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2265 | } |
2266 | ||
f089c433 UW |
2267 | static int |
2268 | s390_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
2269 | struct frame_info *this_frame, | |
2270 | void **this_prologue_cache) | |
5769d3cd | 2271 | { |
f089c433 | 2272 | CORE_ADDR pc = get_frame_pc (this_frame); |
a8c99f38 | 2273 | bfd_byte sigreturn[2]; |
4c8287ac | 2274 | |
8defab1a | 2275 | if (target_read_memory (pc, sigreturn, 2)) |
f089c433 | 2276 | return 0; |
4c8287ac | 2277 | |
a8c99f38 | 2278 | if (sigreturn[0] != 0x0a /* svc */) |
f089c433 | 2279 | return 0; |
5769d3cd | 2280 | |
a8c99f38 JB |
2281 | if (sigreturn[1] != 119 /* sigreturn */ |
2282 | && sigreturn[1] != 173 /* rt_sigreturn */) | |
f089c433 | 2283 | return 0; |
a8c99f38 | 2284 | |
f089c433 | 2285 | return 1; |
5769d3cd AC |
2286 | } |
2287 | ||
f089c433 UW |
2288 | static const struct frame_unwind s390_sigtramp_frame_unwind = { |
2289 | SIGTRAMP_FRAME, | |
8fbca658 | 2290 | default_frame_unwind_stop_reason, |
f089c433 UW |
2291 | s390_sigtramp_frame_this_id, |
2292 | s390_sigtramp_frame_prev_register, | |
2293 | NULL, | |
2294 | s390_sigtramp_frame_sniffer | |
2295 | }; | |
2296 | ||
4c8287ac | 2297 | |
a8c99f38 JB |
2298 | /* Frame base handling. */ |
2299 | ||
2300 | static CORE_ADDR | |
f089c433 | 2301 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
4c8287ac | 2302 | { |
a8c99f38 | 2303 | struct s390_unwind_cache *info |
f089c433 | 2304 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2305 | return info->frame_base; |
2306 | } | |
2307 | ||
2308 | static CORE_ADDR | |
f089c433 | 2309 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
a8c99f38 JB |
2310 | { |
2311 | struct s390_unwind_cache *info | |
f089c433 | 2312 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2313 | return info->local_base; |
2314 | } | |
2315 | ||
2316 | static const struct frame_base s390_frame_base = { | |
2317 | &s390_frame_unwind, | |
2318 | s390_frame_base_address, | |
2319 | s390_local_base_address, | |
2320 | s390_local_base_address | |
2321 | }; | |
2322 | ||
2323 | static CORE_ADDR | |
2324 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2325 | { | |
7803799a | 2326 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2327 | ULONGEST pc; |
7803799a | 2328 | pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); |
a8c99f38 JB |
2329 | return gdbarch_addr_bits_remove (gdbarch, pc); |
2330 | } | |
2331 | ||
2332 | static CORE_ADDR | |
2333 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2334 | { | |
2335 | ULONGEST sp; | |
2336 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); | |
2337 | return gdbarch_addr_bits_remove (gdbarch, sp); | |
4c8287ac JB |
2338 | } |
2339 | ||
2340 | ||
a431654a AC |
2341 | /* DWARF-2 frame support. */ |
2342 | ||
7803799a UW |
2343 | static struct value * |
2344 | s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, | |
2345 | int regnum) | |
2346 | { | |
d6db1fab | 2347 | return s390_unwind_pseudo_register (this_frame, regnum); |
7803799a UW |
2348 | } |
2349 | ||
a431654a AC |
2350 | static void |
2351 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
aff37fc1 | 2352 | struct dwarf2_frame_state_reg *reg, |
4a4e5149 | 2353 | struct frame_info *this_frame) |
a431654a AC |
2354 | { |
2355 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2356 | ||
d6db1fab UW |
2357 | /* The condition code (and thus PSW mask) is call-clobbered. */ |
2358 | if (regnum == S390_PSWM_REGNUM) | |
2359 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
2360 | ||
2361 | /* The PSW address unwinds to the return address. */ | |
2362 | else if (regnum == S390_PSWA_REGNUM) | |
2363 | reg->how = DWARF2_FRAME_REG_RA; | |
2364 | ||
7803799a UW |
2365 | /* Fixed registers are call-saved or call-clobbered |
2366 | depending on the ABI in use. */ | |
d6db1fab | 2367 | else if (regnum < S390_NUM_REGS) |
a431654a | 2368 | { |
7803799a | 2369 | if (s390_register_call_saved (gdbarch, regnum)) |
a431654a | 2370 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; |
7803799a | 2371 | else |
a431654a | 2372 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
7803799a | 2373 | } |
a431654a | 2374 | |
d6db1fab UW |
2375 | /* We install a special function to unwind pseudos. */ |
2376 | else | |
7803799a UW |
2377 | { |
2378 | reg->how = DWARF2_FRAME_REG_FN; | |
2379 | reg->loc.fn = s390_dwarf2_prev_register; | |
a431654a AC |
2380 | } |
2381 | } | |
2382 | ||
2383 | ||
b0cf273e JB |
2384 | /* Dummy function calls. */ |
2385 | ||
78f8b424 JB |
2386 | /* Return non-zero if TYPE is an integer-like type, zero otherwise. |
2387 | "Integer-like" types are those that should be passed the way | |
2388 | integers are: integers, enums, ranges, characters, and booleans. */ | |
2389 | static int | |
2390 | is_integer_like (struct type *type) | |
2391 | { | |
2392 | enum type_code code = TYPE_CODE (type); | |
2393 | ||
2394 | return (code == TYPE_CODE_INT | |
2395 | || code == TYPE_CODE_ENUM | |
2396 | || code == TYPE_CODE_RANGE | |
2397 | || code == TYPE_CODE_CHAR | |
2398 | || code == TYPE_CODE_BOOL); | |
2399 | } | |
2400 | ||
78f8b424 JB |
2401 | /* Return non-zero if TYPE is a pointer-like type, zero otherwise. |
2402 | "Pointer-like" types are those that should be passed the way | |
2403 | pointers are: pointers and references. */ | |
2404 | static int | |
2405 | is_pointer_like (struct type *type) | |
2406 | { | |
2407 | enum type_code code = TYPE_CODE (type); | |
2408 | ||
2409 | return (code == TYPE_CODE_PTR | |
2410 | || code == TYPE_CODE_REF); | |
2411 | } | |
2412 | ||
2413 | ||
20a940cc JB |
2414 | /* Return non-zero if TYPE is a `float singleton' or `double |
2415 | singleton', zero otherwise. | |
2416 | ||
2417 | A `T singleton' is a struct type with one member, whose type is | |
2418 | either T or a `T singleton'. So, the following are all float | |
2419 | singletons: | |
2420 | ||
2421 | struct { float x }; | |
2422 | struct { struct { float x; } x; }; | |
2423 | struct { struct { struct { float x; } x; } x; }; | |
2424 | ||
2425 | ... and so on. | |
2426 | ||
b0cf273e JB |
2427 | All such structures are passed as if they were floats or doubles, |
2428 | as the (revised) ABI says. */ | |
20a940cc JB |
2429 | static int |
2430 | is_float_singleton (struct type *type) | |
2431 | { | |
b0cf273e JB |
2432 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) |
2433 | { | |
2434 | struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); | |
2435 | CHECK_TYPEDEF (singleton_type); | |
2436 | ||
2437 | return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT | |
a16b8bcd | 2438 | || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT |
b0cf273e JB |
2439 | || is_float_singleton (singleton_type)); |
2440 | } | |
2441 | ||
2442 | return 0; | |
20a940cc JB |
2443 | } |
2444 | ||
2445 | ||
2446 | /* Return non-zero if TYPE is a struct-like type, zero otherwise. | |
2447 | "Struct-like" types are those that should be passed as structs are: | |
2448 | structs and unions. | |
2449 | ||
2450 | As an odd quirk, not mentioned in the ABI, GCC passes float and | |
2451 | double singletons as if they were a plain float, double, etc. (The | |
2452 | corresponding union types are handled normally.) So we exclude | |
2453 | those types here. *shrug* */ | |
2454 | static int | |
2455 | is_struct_like (struct type *type) | |
2456 | { | |
2457 | enum type_code code = TYPE_CODE (type); | |
2458 | ||
2459 | return (code == TYPE_CODE_UNION | |
2460 | || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); | |
2461 | } | |
2462 | ||
2463 | ||
2464 | /* Return non-zero if TYPE is a float-like type, zero otherwise. | |
2465 | "Float-like" types are those that should be passed as | |
2466 | floating-point values are. | |
2467 | ||
2468 | You'd think this would just be floats, doubles, long doubles, etc. | |
2469 | But as an odd quirk, not mentioned in the ABI, GCC passes float and | |
2470 | double singletons as if they were a plain float, double, etc. (The | |
4d819d0e | 2471 | corresponding union types are handled normally.) So we include |
20a940cc JB |
2472 | those types here. *shrug* */ |
2473 | static int | |
2474 | is_float_like (struct type *type) | |
2475 | { | |
2476 | return (TYPE_CODE (type) == TYPE_CODE_FLT | |
a16b8bcd | 2477 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
20a940cc JB |
2478 | || is_float_singleton (type)); |
2479 | } | |
2480 | ||
2481 | ||
78f8b424 | 2482 | static int |
b0cf273e | 2483 | is_power_of_two (unsigned int n) |
78f8b424 | 2484 | { |
b0cf273e | 2485 | return ((n & (n - 1)) == 0); |
78f8b424 JB |
2486 | } |
2487 | ||
b0cf273e JB |
2488 | /* Return non-zero if TYPE should be passed as a pointer to a copy, |
2489 | zero otherwise. */ | |
4d819d0e | 2490 | static int |
b0cf273e | 2491 | s390_function_arg_pass_by_reference (struct type *type) |
4d819d0e JB |
2492 | { |
2493 | unsigned length = TYPE_LENGTH (type); | |
b0cf273e JB |
2494 | if (length > 8) |
2495 | return 1; | |
4d819d0e | 2496 | |
56b9d9ac UW |
2497 | return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type))) |
2498 | || TYPE_CODE (type) == TYPE_CODE_COMPLEX | |
2499 | || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)); | |
4d819d0e JB |
2500 | } |
2501 | ||
b0cf273e JB |
2502 | /* Return non-zero if TYPE should be passed in a float register |
2503 | if possible. */ | |
78f8b424 | 2504 | static int |
b0cf273e | 2505 | s390_function_arg_float (struct type *type) |
78f8b424 | 2506 | { |
78f8b424 | 2507 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
2508 | if (length > 8) |
2509 | return 0; | |
78f8b424 | 2510 | |
b0cf273e | 2511 | return is_float_like (type); |
4d819d0e JB |
2512 | } |
2513 | ||
b0cf273e JB |
2514 | /* Return non-zero if TYPE should be passed in an integer register |
2515 | (or a pair of integer registers) if possible. */ | |
78f8b424 | 2516 | static int |
b0cf273e | 2517 | s390_function_arg_integer (struct type *type) |
78f8b424 | 2518 | { |
78f8b424 | 2519 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
2520 | if (length > 8) |
2521 | return 0; | |
78f8b424 | 2522 | |
b0cf273e JB |
2523 | return is_integer_like (type) |
2524 | || is_pointer_like (type) | |
2525 | || (is_struct_like (type) && is_power_of_two (length)); | |
78f8b424 JB |
2526 | } |
2527 | ||
78f8b424 JB |
2528 | /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full |
2529 | word as required for the ABI. */ | |
2530 | static LONGEST | |
e17a4113 | 2531 | extend_simple_arg (struct gdbarch *gdbarch, struct value *arg) |
78f8b424 | 2532 | { |
e17a4113 | 2533 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
56b9d9ac | 2534 | struct type *type = check_typedef (value_type (arg)); |
78f8b424 JB |
2535 | |
2536 | /* Even structs get passed in the least significant bits of the | |
2537 | register / memory word. It's not really right to extract them as | |
2538 | an integer, but it does take care of the extension. */ | |
2539 | if (TYPE_UNSIGNED (type)) | |
0fd88904 | 2540 | return extract_unsigned_integer (value_contents (arg), |
e17a4113 | 2541 | TYPE_LENGTH (type), byte_order); |
78f8b424 | 2542 | else |
0fd88904 | 2543 | return extract_signed_integer (value_contents (arg), |
e17a4113 | 2544 | TYPE_LENGTH (type), byte_order); |
78f8b424 JB |
2545 | } |
2546 | ||
2547 | ||
78f8b424 JB |
2548 | /* Return the alignment required by TYPE. */ |
2549 | static int | |
2550 | alignment_of (struct type *type) | |
2551 | { | |
2552 | int alignment; | |
2553 | ||
2554 | if (is_integer_like (type) | |
2555 | || is_pointer_like (type) | |
a16b8bcd UW |
2556 | || TYPE_CODE (type) == TYPE_CODE_FLT |
2557 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
78f8b424 JB |
2558 | alignment = TYPE_LENGTH (type); |
2559 | else if (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
2560 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
2561 | { | |
2562 | int i; | |
2563 | ||
2564 | alignment = 1; | |
2565 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
2566 | { | |
56b9d9ac UW |
2567 | int field_alignment |
2568 | = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i))); | |
78f8b424 JB |
2569 | |
2570 | if (field_alignment > alignment) | |
2571 | alignment = field_alignment; | |
2572 | } | |
2573 | } | |
2574 | else | |
2575 | alignment = 1; | |
2576 | ||
2577 | /* Check that everything we ever return is a power of two. Lots of | |
2578 | code doesn't want to deal with aligning things to arbitrary | |
2579 | boundaries. */ | |
2580 | gdb_assert ((alignment & (alignment - 1)) == 0); | |
2581 | ||
2582 | return alignment; | |
2583 | } | |
2584 | ||
2585 | ||
2586 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in | |
ca557f44 AC |
2587 | place to be passed to a function, as specified by the "GNU/Linux |
2588 | for S/390 ELF Application Binary Interface Supplement". | |
78f8b424 JB |
2589 | |
2590 | SP is the current stack pointer. We must put arguments, links, | |
2591 | padding, etc. whereever they belong, and return the new stack | |
2592 | pointer value. | |
2593 | ||
2594 | If STRUCT_RETURN is non-zero, then the function we're calling is | |
2595 | going to return a structure by value; STRUCT_ADDR is the address of | |
2596 | a block we've allocated for it on the stack. | |
2597 | ||
2598 | Our caller has taken care of any type promotions needed to satisfy | |
2599 | prototypes or the old K&R argument-passing rules. */ | |
a78f21af | 2600 | static CORE_ADDR |
7d9b040b | 2601 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
b0cf273e JB |
2602 | struct regcache *regcache, CORE_ADDR bp_addr, |
2603 | int nargs, struct value **args, CORE_ADDR sp, | |
2604 | int struct_return, CORE_ADDR struct_addr) | |
5769d3cd | 2605 | { |
b0cf273e JB |
2606 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
2607 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
e17a4113 | 2608 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
78f8b424 | 2609 | int i; |
5769d3cd | 2610 | |
78f8b424 JB |
2611 | /* If the i'th argument is passed as a reference to a copy, then |
2612 | copy_addr[i] is the address of the copy we made. */ | |
2613 | CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); | |
5769d3cd | 2614 | |
c0cc4c83 | 2615 | /* Reserve space for the reference-to-copy area. */ |
78f8b424 JB |
2616 | for (i = 0; i < nargs; i++) |
2617 | { | |
2618 | struct value *arg = args[i]; | |
56b9d9ac | 2619 | struct type *type = check_typedef (value_type (arg)); |
78f8b424 | 2620 | unsigned length = TYPE_LENGTH (type); |
5769d3cd | 2621 | |
b0cf273e | 2622 | if (s390_function_arg_pass_by_reference (type)) |
01c464e9 | 2623 | { |
78f8b424 | 2624 | sp -= length; |
5b03f266 | 2625 | sp = align_down (sp, alignment_of (type)); |
78f8b424 | 2626 | copy_addr[i] = sp; |
01c464e9 | 2627 | } |
5769d3cd | 2628 | } |
5769d3cd | 2629 | |
78f8b424 JB |
2630 | /* Reserve space for the parameter area. As a conservative |
2631 | simplification, we assume that everything will be passed on the | |
b0cf273e JB |
2632 | stack. Since every argument larger than 8 bytes will be |
2633 | passed by reference, we use this simple upper bound. */ | |
2634 | sp -= nargs * 8; | |
78f8b424 | 2635 | |
78f8b424 JB |
2636 | /* After all that, make sure it's still aligned on an eight-byte |
2637 | boundary. */ | |
5b03f266 | 2638 | sp = align_down (sp, 8); |
78f8b424 | 2639 | |
c0cc4c83 UW |
2640 | /* Allocate the standard frame areas: the register save area, the |
2641 | word reserved for the compiler (which seems kind of meaningless), | |
2642 | and the back chain pointer. */ | |
2643 | sp -= 16*word_size + 32; | |
2644 | ||
2645 | /* Now we have the final SP value. Make sure we didn't underflow; | |
2646 | on 31-bit, this would result in addresses with the high bit set, | |
2647 | which causes confusion elsewhere. Note that if we error out | |
2648 | here, stack and registers remain untouched. */ | |
2649 | if (gdbarch_addr_bits_remove (gdbarch, sp) != sp) | |
2650 | error (_("Stack overflow")); | |
2651 | ||
2652 | ||
78f8b424 JB |
2653 | /* Finally, place the actual parameters, working from SP towards |
2654 | higher addresses. The code above is supposed to reserve enough | |
2655 | space for this. */ | |
2656 | { | |
2657 | int fr = 0; | |
2658 | int gr = 2; | |
c0cc4c83 | 2659 | CORE_ADDR starg = sp + 16*word_size + 32; |
78f8b424 | 2660 | |
b0cf273e | 2661 | /* A struct is returned using general register 2. */ |
4d819d0e | 2662 | if (struct_return) |
b0cf273e JB |
2663 | { |
2664 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2665 | struct_addr); | |
2666 | gr++; | |
2667 | } | |
4d819d0e | 2668 | |
78f8b424 JB |
2669 | for (i = 0; i < nargs; i++) |
2670 | { | |
2671 | struct value *arg = args[i]; | |
56b9d9ac | 2672 | struct type *type = check_typedef (value_type (arg)); |
b0cf273e JB |
2673 | unsigned length = TYPE_LENGTH (type); |
2674 | ||
2675 | if (s390_function_arg_pass_by_reference (type)) | |
2676 | { | |
c0cc4c83 UW |
2677 | /* Actually copy the argument contents to the stack slot |
2678 | that was reserved above. */ | |
2679 | write_memory (copy_addr[i], value_contents (arg), length); | |
2680 | ||
b0cf273e JB |
2681 | if (gr <= 6) |
2682 | { | |
2683 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2684 | copy_addr[i]); | |
2685 | gr++; | |
2686 | } | |
2687 | else | |
2688 | { | |
e17a4113 UW |
2689 | write_memory_unsigned_integer (starg, word_size, byte_order, |
2690 | copy_addr[i]); | |
b0cf273e JB |
2691 | starg += word_size; |
2692 | } | |
2693 | } | |
2694 | else if (s390_function_arg_float (type)) | |
2695 | { | |
2696 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, | |
2697 | the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ | |
2698 | if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) | |
2699 | { | |
2700 | /* When we store a single-precision value in an FP register, | |
2701 | it occupies the leftmost bits. */ | |
2702 | regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, | |
0fd88904 | 2703 | 0, length, value_contents (arg)); |
b0cf273e JB |
2704 | fr += 2; |
2705 | } | |
2706 | else | |
2707 | { | |
2708 | /* When we store a single-precision value in a stack slot, | |
2709 | it occupies the rightmost bits. */ | |
2710 | starg = align_up (starg + length, word_size); | |
0fd88904 | 2711 | write_memory (starg - length, value_contents (arg), length); |
b0cf273e JB |
2712 | } |
2713 | } | |
2714 | else if (s390_function_arg_integer (type) && length <= word_size) | |
2715 | { | |
2716 | if (gr <= 6) | |
2717 | { | |
2718 | /* Integer arguments are always extended to word size. */ | |
2719 | regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, | |
c378eb4e MS |
2720 | extend_simple_arg (gdbarch, |
2721 | arg)); | |
b0cf273e JB |
2722 | gr++; |
2723 | } | |
2724 | else | |
2725 | { | |
2726 | /* Integer arguments are always extended to word size. */ | |
e17a4113 UW |
2727 | write_memory_signed_integer (starg, word_size, byte_order, |
2728 | extend_simple_arg (gdbarch, arg)); | |
b0cf273e JB |
2729 | starg += word_size; |
2730 | } | |
2731 | } | |
2732 | else if (s390_function_arg_integer (type) && length == 2*word_size) | |
2733 | { | |
2734 | if (gr <= 5) | |
2735 | { | |
2736 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr, | |
0fd88904 | 2737 | value_contents (arg)); |
b0cf273e | 2738 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, |
0fd88904 | 2739 | value_contents (arg) + word_size); |
b0cf273e JB |
2740 | gr += 2; |
2741 | } | |
2742 | else | |
2743 | { | |
2744 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG | |
2745 | in it, then don't go back and use it again later. */ | |
2746 | gr = 7; | |
2747 | ||
0fd88904 | 2748 | write_memory (starg, value_contents (arg), length); |
b0cf273e JB |
2749 | starg += length; |
2750 | } | |
2751 | } | |
2752 | else | |
e2e0b3e5 | 2753 | internal_error (__FILE__, __LINE__, _("unknown argument type")); |
78f8b424 JB |
2754 | } |
2755 | } | |
2756 | ||
8de7d199 UW |
2757 | /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */ |
2758 | if (word_size == 4) | |
2759 | { | |
2760 | ULONGEST pswa; | |
2761 | regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa); | |
2762 | bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000); | |
2763 | } | |
b0cf273e | 2764 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); |
8de7d199 | 2765 | |
b0cf273e JB |
2766 | /* Store updated stack pointer. */ |
2767 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); | |
78f8b424 | 2768 | |
a8c99f38 | 2769 | /* We need to return the 'stack part' of the frame ID, |
121d8485 UW |
2770 | which is actually the top of the register save area. */ |
2771 | return sp + 16*word_size + 32; | |
5769d3cd AC |
2772 | } |
2773 | ||
f089c433 | 2774 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
b0cf273e JB |
2775 | dummy frame. The frame ID's base needs to match the TOS value |
2776 | returned by push_dummy_call, and the PC match the dummy frame's | |
2777 | breakpoint. */ | |
2778 | static struct frame_id | |
f089c433 | 2779 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
b0cf273e | 2780 | { |
a8c99f38 | 2781 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
f089c433 UW |
2782 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2783 | sp = gdbarch_addr_bits_remove (gdbarch, sp); | |
a8c99f38 | 2784 | |
121d8485 | 2785 | return frame_id_build (sp + 16*word_size + 32, |
f089c433 | 2786 | get_frame_pc (this_frame)); |
b0cf273e | 2787 | } |
c8f9d51c | 2788 | |
4074e13c JB |
2789 | static CORE_ADDR |
2790 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
2791 | { | |
2792 | /* Both the 32- and 64-bit ABI's say that the stack pointer should | |
2793 | always be aligned on an eight-byte boundary. */ | |
2794 | return (addr & -8); | |
2795 | } | |
2796 | ||
2797 | ||
b0cf273e JB |
2798 | /* Function return value access. */ |
2799 | ||
2800 | static enum return_value_convention | |
2801 | s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) | |
c8f9d51c | 2802 | { |
b0cf273e JB |
2803 | int length = TYPE_LENGTH (type); |
2804 | if (length > 8) | |
2805 | return RETURN_VALUE_STRUCT_CONVENTION; | |
2806 | ||
2807 | switch (TYPE_CODE (type)) | |
2808 | { | |
2809 | case TYPE_CODE_STRUCT: | |
2810 | case TYPE_CODE_UNION: | |
2811 | case TYPE_CODE_ARRAY: | |
56b9d9ac | 2812 | case TYPE_CODE_COMPLEX: |
b0cf273e | 2813 | return RETURN_VALUE_STRUCT_CONVENTION; |
c8f9d51c | 2814 | |
b0cf273e JB |
2815 | default: |
2816 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2817 | } | |
c8f9d51c JB |
2818 | } |
2819 | ||
b0cf273e | 2820 | static enum return_value_convention |
c055b101 CV |
2821 | s390_return_value (struct gdbarch *gdbarch, struct type *func_type, |
2822 | struct type *type, struct regcache *regcache, | |
2823 | gdb_byte *out, const gdb_byte *in) | |
5769d3cd | 2824 | { |
e17a4113 | 2825 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
b0cf273e | 2826 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
56b9d9ac UW |
2827 | enum return_value_convention rvc; |
2828 | int length; | |
2829 | ||
2830 | type = check_typedef (type); | |
2831 | rvc = s390_return_value_convention (gdbarch, type); | |
2832 | length = TYPE_LENGTH (type); | |
2833 | ||
b0cf273e JB |
2834 | if (in) |
2835 | { | |
2836 | switch (rvc) | |
2837 | { | |
2838 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2839 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2840 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2841 | { |
2842 | /* When we store a single-precision value in an FP register, | |
2843 | it occupies the leftmost bits. */ | |
2844 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, | |
2845 | 0, length, in); | |
2846 | } | |
2847 | else if (length <= word_size) | |
2848 | { | |
2849 | /* Integer arguments are always extended to word size. */ | |
2850 | if (TYPE_UNSIGNED (type)) | |
2851 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, | |
e17a4113 | 2852 | extract_unsigned_integer (in, length, byte_order)); |
b0cf273e JB |
2853 | else |
2854 | regcache_cooked_write_signed (regcache, S390_R2_REGNUM, | |
e17a4113 | 2855 | extract_signed_integer (in, length, byte_order)); |
b0cf273e JB |
2856 | } |
2857 | else if (length == 2*word_size) | |
2858 | { | |
2859 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); | |
43af2100 | 2860 | regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size); |
b0cf273e JB |
2861 | } |
2862 | else | |
e2e0b3e5 | 2863 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e JB |
2864 | break; |
2865 | ||
2866 | case RETURN_VALUE_STRUCT_CONVENTION: | |
8a3fe4f8 | 2867 | error (_("Cannot set function return value.")); |
b0cf273e JB |
2868 | break; |
2869 | } | |
2870 | } | |
2871 | else if (out) | |
2872 | { | |
2873 | switch (rvc) | |
2874 | { | |
2875 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2876 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2877 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2878 | { |
2879 | /* When we store a single-precision value in an FP register, | |
2880 | it occupies the leftmost bits. */ | |
2881 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, | |
2882 | 0, length, out); | |
2883 | } | |
2884 | else if (length <= word_size) | |
2885 | { | |
2886 | /* Integer arguments occupy the rightmost bits. */ | |
2887 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, | |
2888 | word_size - length, length, out); | |
2889 | } | |
2890 | else if (length == 2*word_size) | |
2891 | { | |
2892 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); | |
43af2100 | 2893 | regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size); |
b0cf273e JB |
2894 | } |
2895 | else | |
e2e0b3e5 | 2896 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e | 2897 | break; |
5769d3cd | 2898 | |
b0cf273e | 2899 | case RETURN_VALUE_STRUCT_CONVENTION: |
8a3fe4f8 | 2900 | error (_("Function return value unknown.")); |
b0cf273e JB |
2901 | break; |
2902 | } | |
2903 | } | |
2904 | ||
2905 | return rvc; | |
2906 | } | |
5769d3cd AC |
2907 | |
2908 | ||
a8c99f38 JB |
2909 | /* Breakpoints. */ |
2910 | ||
43af2100 | 2911 | static const gdb_byte * |
c378eb4e MS |
2912 | s390_breakpoint_from_pc (struct gdbarch *gdbarch, |
2913 | CORE_ADDR *pcptr, int *lenptr) | |
5769d3cd | 2914 | { |
43af2100 | 2915 | static const gdb_byte breakpoint[] = { 0x0, 0x1 }; |
5769d3cd AC |
2916 | |
2917 | *lenptr = sizeof (breakpoint); | |
2918 | return breakpoint; | |
2919 | } | |
2920 | ||
5769d3cd | 2921 | |
a8c99f38 | 2922 | /* Address handling. */ |
5769d3cd AC |
2923 | |
2924 | static CORE_ADDR | |
24568a2c | 2925 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
5769d3cd | 2926 | { |
a8c99f38 | 2927 | return addr & 0x7fffffff; |
5769d3cd AC |
2928 | } |
2929 | ||
ffc65945 KB |
2930 | static int |
2931 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) | |
2932 | { | |
2933 | if (byte_size == 4) | |
119ac181 | 2934 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2935 | else |
2936 | return 0; | |
2937 | } | |
2938 | ||
2939 | static const char * | |
2940 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) | |
2941 | { | |
119ac181 | 2942 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
ffc65945 KB |
2943 | return "mode32"; |
2944 | else | |
2945 | return NULL; | |
2946 | } | |
2947 | ||
a78f21af | 2948 | static int |
c378eb4e MS |
2949 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
2950 | const char *name, | |
ffc65945 KB |
2951 | int *type_flags_ptr) |
2952 | { | |
2953 | if (strcmp (name, "mode32") == 0) | |
2954 | { | |
119ac181 | 2955 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2956 | return 1; |
2957 | } | |
2958 | else | |
2959 | return 0; | |
2960 | } | |
2961 | ||
55aa24fb SDJ |
2962 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
2963 | gdbarch.h. */ | |
2964 | ||
2965 | static int | |
2966 | s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) | |
2967 | { | |
2968 | return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement | |
2969 | or indirection. */ | |
2970 | || *s == '%' /* Register access. */ | |
2971 | || isdigit (*s)); /* Literal number. */ | |
2972 | } | |
2973 | ||
a8c99f38 JB |
2974 | /* Set up gdbarch struct. */ |
2975 | ||
a78f21af | 2976 | static struct gdbarch * |
5769d3cd AC |
2977 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2978 | { | |
7803799a UW |
2979 | const struct target_desc *tdesc = info.target_desc; |
2980 | struct tdesc_arch_data *tdesc_data = NULL; | |
5769d3cd AC |
2981 | struct gdbarch *gdbarch; |
2982 | struct gdbarch_tdep *tdep; | |
7803799a UW |
2983 | int tdep_abi; |
2984 | int have_upper = 0; | |
c642a434 UW |
2985 | int have_linux_v1 = 0; |
2986 | int have_linux_v2 = 0; | |
7803799a UW |
2987 | int first_pseudo_reg, last_pseudo_reg; |
2988 | ||
2989 | /* Default ABI and register size. */ | |
2990 | switch (info.bfd_arch_info->mach) | |
2991 | { | |
2992 | case bfd_mach_s390_31: | |
2993 | tdep_abi = ABI_LINUX_S390; | |
2994 | break; | |
2995 | ||
2996 | case bfd_mach_s390_64: | |
2997 | tdep_abi = ABI_LINUX_ZSERIES; | |
2998 | break; | |
2999 | ||
3000 | default: | |
3001 | return NULL; | |
3002 | } | |
3003 | ||
3004 | /* Use default target description if none provided by the target. */ | |
3005 | if (!tdesc_has_registers (tdesc)) | |
3006 | { | |
3007 | if (tdep_abi == ABI_LINUX_S390) | |
3008 | tdesc = tdesc_s390_linux32; | |
3009 | else | |
3010 | tdesc = tdesc_s390x_linux64; | |
3011 | } | |
3012 | ||
3013 | /* Check any target description for validity. */ | |
3014 | if (tdesc_has_registers (tdesc)) | |
3015 | { | |
3016 | static const char *const gprs[] = { | |
3017 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
3018 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
3019 | }; | |
3020 | static const char *const fprs[] = { | |
3021 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
3022 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" | |
3023 | }; | |
3024 | static const char *const acrs[] = { | |
3025 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", | |
3026 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" | |
3027 | }; | |
3028 | static const char *const gprs_lower[] = { | |
3029 | "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", | |
3030 | "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" | |
3031 | }; | |
3032 | static const char *const gprs_upper[] = { | |
3033 | "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", | |
3034 | "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" | |
3035 | }; | |
3036 | const struct tdesc_feature *feature; | |
3037 | int i, valid_p = 1; | |
3038 | ||
3039 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); | |
3040 | if (feature == NULL) | |
3041 | return NULL; | |
3042 | ||
3043 | tdesc_data = tdesc_data_alloc (); | |
3044 | ||
3045 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3046 | S390_PSWM_REGNUM, "pswm"); | |
3047 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3048 | S390_PSWA_REGNUM, "pswa"); | |
3049 | ||
3050 | if (tdesc_unnumbered_register (feature, "r0")) | |
3051 | { | |
3052 | for (i = 0; i < 16; i++) | |
3053 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3054 | S390_R0_REGNUM + i, gprs[i]); | |
3055 | } | |
3056 | else | |
3057 | { | |
3058 | have_upper = 1; | |
3059 | ||
3060 | for (i = 0; i < 16; i++) | |
3061 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3062 | S390_R0_REGNUM + i, | |
3063 | gprs_lower[i]); | |
3064 | for (i = 0; i < 16; i++) | |
3065 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3066 | S390_R0_UPPER_REGNUM + i, | |
3067 | gprs_upper[i]); | |
3068 | } | |
3069 | ||
3070 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); | |
3071 | if (feature == NULL) | |
3072 | { | |
3073 | tdesc_data_cleanup (tdesc_data); | |
3074 | return NULL; | |
3075 | } | |
3076 | ||
3077 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3078 | S390_FPC_REGNUM, "fpc"); | |
3079 | for (i = 0; i < 16; i++) | |
3080 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3081 | S390_F0_REGNUM + i, fprs[i]); | |
5769d3cd | 3082 | |
7803799a UW |
3083 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); |
3084 | if (feature == NULL) | |
3085 | { | |
3086 | tdesc_data_cleanup (tdesc_data); | |
3087 | return NULL; | |
3088 | } | |
3089 | ||
3090 | for (i = 0; i < 16; i++) | |
3091 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
3092 | S390_A0_REGNUM + i, acrs[i]); | |
3093 | ||
94eae614 | 3094 | /* Optional GNU/Linux-specific "registers". */ |
c642a434 UW |
3095 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux"); |
3096 | if (feature) | |
3097 | { | |
3098 | tdesc_numbered_register (feature, tdesc_data, | |
3099 | S390_ORIG_R2_REGNUM, "orig_r2"); | |
3100 | ||
3101 | if (tdesc_numbered_register (feature, tdesc_data, | |
3102 | S390_LAST_BREAK_REGNUM, "last_break")) | |
3103 | have_linux_v1 = 1; | |
3104 | ||
3105 | if (tdesc_numbered_register (feature, tdesc_data, | |
3106 | S390_SYSTEM_CALL_REGNUM, "system_call")) | |
3107 | have_linux_v2 = 1; | |
3108 | ||
3109 | if (have_linux_v2 > have_linux_v1) | |
3110 | valid_p = 0; | |
3111 | } | |
3112 | ||
7803799a UW |
3113 | if (!valid_p) |
3114 | { | |
3115 | tdesc_data_cleanup (tdesc_data); | |
3116 | return NULL; | |
3117 | } | |
3118 | } | |
5769d3cd | 3119 | |
7803799a UW |
3120 | /* Find a candidate among extant architectures. */ |
3121 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
3122 | arches != NULL; | |
3123 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
3124 | { | |
3125 | tdep = gdbarch_tdep (arches->gdbarch); | |
3126 | if (!tdep) | |
3127 | continue; | |
3128 | if (tdep->abi != tdep_abi) | |
3129 | continue; | |
3130 | if ((tdep->gpr_full_regnum != -1) != have_upper) | |
3131 | continue; | |
3132 | if (tdesc_data != NULL) | |
3133 | tdesc_data_cleanup (tdesc_data); | |
3134 | return arches->gdbarch; | |
3135 | } | |
5769d3cd | 3136 | |
7803799a | 3137 | /* Otherwise create a new gdbarch for the specified machine type. */ |
d0f54f9d | 3138 | tdep = XCALLOC (1, struct gdbarch_tdep); |
7803799a | 3139 | tdep->abi = tdep_abi; |
d0f54f9d | 3140 | gdbarch = gdbarch_alloc (&info, tdep); |
5769d3cd AC |
3141 | |
3142 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); | |
4e409299 | 3143 | set_gdbarch_char_signed (gdbarch, 0); |
5769d3cd | 3144 | |
1de90795 UW |
3145 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
3146 | We can safely let them default to 128-bit, since the debug info | |
3147 | will give the size of type actually used in each case. */ | |
3148 | set_gdbarch_long_double_bit (gdbarch, 128); | |
3149 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
3150 | ||
aaab4dba | 3151 | /* Amount PC must be decremented by after a breakpoint. This is |
3b3b875c | 3152 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
aaab4dba | 3153 | always. */ |
5769d3cd | 3154 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
5769d3cd AC |
3155 | /* Stack grows downward. */ |
3156 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
5769d3cd AC |
3157 | set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); |
3158 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); | |
d0f54f9d | 3159 | set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); |
a8c99f38 | 3160 | |
7803799a | 3161 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
5769d3cd | 3162 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); |
d0f54f9d | 3163 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
d0f54f9d | 3164 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
d0f54f9d | 3165 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
9acbedc0 | 3166 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
d0f54f9d JB |
3167 | set_gdbarch_regset_from_core_section (gdbarch, |
3168 | s390_regset_from_core_section); | |
7803799a | 3169 | set_gdbarch_core_read_description (gdbarch, s390_core_read_description); |
c642a434 UW |
3170 | set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register); |
3171 | set_gdbarch_write_pc (gdbarch, s390_write_pc); | |
7803799a UW |
3172 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); |
3173 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); | |
3174 | set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); | |
3175 | set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); | |
3176 | set_tdesc_pseudo_register_reggroup_p (gdbarch, | |
3177 | s390_pseudo_register_reggroup_p); | |
3178 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | |
3179 | ||
3180 | /* Assign pseudo register numbers. */ | |
3181 | first_pseudo_reg = gdbarch_num_regs (gdbarch); | |
3182 | last_pseudo_reg = first_pseudo_reg; | |
3183 | tdep->gpr_full_regnum = -1; | |
3184 | if (have_upper) | |
3185 | { | |
3186 | tdep->gpr_full_regnum = last_pseudo_reg; | |
3187 | last_pseudo_reg += 16; | |
3188 | } | |
3189 | tdep->pc_regnum = last_pseudo_reg++; | |
3190 | tdep->cc_regnum = last_pseudo_reg++; | |
3191 | set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); | |
3192 | set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); | |
5769d3cd | 3193 | |
b0cf273e JB |
3194 | /* Inferior function calls. */ |
3195 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); | |
f089c433 | 3196 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
4074e13c | 3197 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
b0cf273e | 3198 | set_gdbarch_return_value (gdbarch, s390_return_value); |
5769d3cd | 3199 | |
a8c99f38 | 3200 | /* Frame handling. */ |
a431654a | 3201 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
7803799a | 3202 | dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); |
f089c433 | 3203 | dwarf2_append_unwinders (gdbarch); |
a431654a | 3204 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
f089c433 UW |
3205 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
3206 | frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); | |
3207 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); | |
a8c99f38 JB |
3208 | frame_base_set_default (gdbarch, &s390_frame_base); |
3209 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); | |
3210 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); | |
3211 | ||
1db4e8a0 UW |
3212 | /* Displaced stepping. */ |
3213 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
3214 | simple_displaced_step_copy_insn); | |
3215 | set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); | |
3216 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
3217 | simple_displaced_step_free_closure); | |
3218 | set_gdbarch_displaced_step_location (gdbarch, | |
3219 | displaced_step_at_entry_point); | |
3220 | set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); | |
3221 | ||
70728992 PA |
3222 | /* Note that GNU/Linux is the only OS supported on this |
3223 | platform. */ | |
3224 | linux_init_abi (info, gdbarch); | |
3225 | ||
7803799a | 3226 | switch (tdep->abi) |
5769d3cd | 3227 | { |
7803799a | 3228 | case ABI_LINUX_S390: |
d0f54f9d JB |
3229 | tdep->gregset = &s390_gregset; |
3230 | tdep->sizeof_gregset = s390_sizeof_gregset; | |
3231 | tdep->fpregset = &s390_fpregset; | |
3232 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
3233 | |
3234 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); | |
76a9d10f MK |
3235 | set_solib_svr4_fetch_link_map_offsets |
3236 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); | |
c642a434 UW |
3237 | |
3238 | if (have_upper) | |
3239 | { | |
3240 | if (have_linux_v2) | |
3241 | set_gdbarch_core_regset_sections (gdbarch, | |
3242 | s390_linux64v2_regset_sections); | |
3243 | else if (have_linux_v1) | |
3244 | set_gdbarch_core_regset_sections (gdbarch, | |
3245 | s390_linux64v1_regset_sections); | |
3246 | else | |
3247 | set_gdbarch_core_regset_sections (gdbarch, | |
3248 | s390_linux64_regset_sections); | |
3249 | } | |
3250 | else | |
3251 | { | |
3252 | if (have_linux_v2) | |
3253 | set_gdbarch_core_regset_sections (gdbarch, | |
3254 | s390_linux32v2_regset_sections); | |
3255 | else if (have_linux_v1) | |
3256 | set_gdbarch_core_regset_sections (gdbarch, | |
3257 | s390_linux32v1_regset_sections); | |
3258 | else | |
3259 | set_gdbarch_core_regset_sections (gdbarch, | |
3260 | s390_linux32_regset_sections); | |
3261 | } | |
5769d3cd | 3262 | break; |
b0cf273e | 3263 | |
7803799a | 3264 | case ABI_LINUX_ZSERIES: |
d0f54f9d JB |
3265 | tdep->gregset = &s390x_gregset; |
3266 | tdep->sizeof_gregset = s390x_sizeof_gregset; | |
3267 | tdep->fpregset = &s390_fpregset; | |
3268 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
3269 | |
3270 | set_gdbarch_long_bit (gdbarch, 64); | |
3271 | set_gdbarch_long_long_bit (gdbarch, 64); | |
3272 | set_gdbarch_ptr_bit (gdbarch, 64); | |
76a9d10f MK |
3273 | set_solib_svr4_fetch_link_map_offsets |
3274 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
ffc65945 KB |
3275 | set_gdbarch_address_class_type_flags (gdbarch, |
3276 | s390_address_class_type_flags); | |
3277 | set_gdbarch_address_class_type_flags_to_name (gdbarch, | |
3278 | s390_address_class_type_flags_to_name); | |
3279 | set_gdbarch_address_class_name_to_type_flags (gdbarch, | |
3280 | s390_address_class_name_to_type_flags); | |
c642a434 UW |
3281 | |
3282 | if (have_linux_v2) | |
3283 | set_gdbarch_core_regset_sections (gdbarch, | |
3284 | s390x_linux64v2_regset_sections); | |
3285 | else if (have_linux_v1) | |
3286 | set_gdbarch_core_regset_sections (gdbarch, | |
3287 | s390x_linux64v1_regset_sections); | |
3288 | else | |
3289 | set_gdbarch_core_regset_sections (gdbarch, | |
3290 | s390x_linux64_regset_sections); | |
5769d3cd AC |
3291 | break; |
3292 | } | |
3293 | ||
36482093 AC |
3294 | set_gdbarch_print_insn (gdbarch, print_insn_s390); |
3295 | ||
982e9687 UW |
3296 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
3297 | ||
b2756930 KB |
3298 | /* Enable TLS support. */ |
3299 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
3300 | svr4_fetch_objfile_link_map); | |
3301 | ||
1dd635ac UW |
3302 | set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type); |
3303 | ||
55aa24fb SDJ |
3304 | /* SystemTap functions. */ |
3305 | set_gdbarch_stap_register_prefix (gdbarch, "%"); | |
3306 | set_gdbarch_stap_register_indirection_prefix (gdbarch, "("); | |
3307 | set_gdbarch_stap_register_indirection_suffix (gdbarch, ")"); | |
3308 | set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand); | |
3309 | ||
5769d3cd AC |
3310 | return gdbarch; |
3311 | } | |
3312 | ||
3313 | ||
a78f21af AC |
3314 | extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ |
3315 | ||
5769d3cd | 3316 | void |
5ae5f592 | 3317 | _initialize_s390_tdep (void) |
5769d3cd | 3318 | { |
5769d3cd AC |
3319 | /* Hook us into the gdbarch mechanism. */ |
3320 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); | |
7803799a | 3321 | |
94eae614 | 3322 | /* Initialize the GNU/Linux target descriptions. */ |
7803799a | 3323 | initialize_tdesc_s390_linux32 (); |
c642a434 UW |
3324 | initialize_tdesc_s390_linux32v1 (); |
3325 | initialize_tdesc_s390_linux32v2 (); | |
7803799a | 3326 | initialize_tdesc_s390_linux64 (); |
c642a434 UW |
3327 | initialize_tdesc_s390_linux64v1 (); |
3328 | initialize_tdesc_s390_linux64v2 (); | |
7803799a | 3329 | initialize_tdesc_s390x_linux64 (); |
c642a434 UW |
3330 | initialize_tdesc_s390x_linux64v1 (); |
3331 | initialize_tdesc_s390x_linux64v2 (); | |
5769d3cd | 3332 | } |