* configure.host: Add i[34567]86-*-openbsd[0-2].* and
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
9ab9195f 3 Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
23 02111-1307, USA. */
24
d0f54f9d 25#include "defs.h"
5769d3cd
AC
26#include "arch-utils.h"
27#include "frame.h"
28#include "inferior.h"
29#include "symtab.h"
30#include "target.h"
31#include "gdbcore.h"
32#include "gdbcmd.h"
5769d3cd
AC
33#include "objfiles.h"
34#include "tm.h"
35#include "../bfd/bfd.h"
36#include "floatformat.h"
37#include "regcache.h"
a8c99f38
JB
38#include "trad-frame.h"
39#include "frame-base.h"
40#include "frame-unwind.h"
d0f54f9d
JB
41#include "reggroups.h"
42#include "regset.h"
fd0407d6 43#include "value.h"
78f8b424 44#include "gdb_assert.h"
a89aa300 45#include "dis-asm.h"
9cbd5950 46#include "solib-svr4.h" /* For struct link_map_offsets. */
5769d3cd 47
d0f54f9d 48#include "s390-tdep.h"
5769d3cd 49
60e6cc42 50
d0f54f9d
JB
51/* The tdep structure. */
52
53struct gdbarch_tdep
5769d3cd 54{
b0cf273e
JB
55 /* ABI version. */
56 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
57
d0f54f9d
JB
58 /* Core file register sets. */
59 const struct regset *gregset;
60 int sizeof_gregset;
61
62 const struct regset *fpregset;
63 int sizeof_fpregset;
64};
65
66
67/* Register information. */
68
69struct s390_register_info
70{
71 char *name;
72 struct type **type;
73};
74
75static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
76{
77 /* Program Status Word. */
78 { "pswm", &builtin_type_long },
79 { "pswa", &builtin_type_long },
80
81 /* General Purpose Registers. */
82 { "r0", &builtin_type_long },
83 { "r1", &builtin_type_long },
84 { "r2", &builtin_type_long },
85 { "r3", &builtin_type_long },
86 { "r4", &builtin_type_long },
87 { "r5", &builtin_type_long },
88 { "r6", &builtin_type_long },
89 { "r7", &builtin_type_long },
90 { "r8", &builtin_type_long },
91 { "r9", &builtin_type_long },
92 { "r10", &builtin_type_long },
93 { "r11", &builtin_type_long },
94 { "r12", &builtin_type_long },
95 { "r13", &builtin_type_long },
96 { "r14", &builtin_type_long },
97 { "r15", &builtin_type_long },
98
99 /* Access Registers. */
100 { "acr0", &builtin_type_int },
101 { "acr1", &builtin_type_int },
102 { "acr2", &builtin_type_int },
103 { "acr3", &builtin_type_int },
104 { "acr4", &builtin_type_int },
105 { "acr5", &builtin_type_int },
106 { "acr6", &builtin_type_int },
107 { "acr7", &builtin_type_int },
108 { "acr8", &builtin_type_int },
109 { "acr9", &builtin_type_int },
110 { "acr10", &builtin_type_int },
111 { "acr11", &builtin_type_int },
112 { "acr12", &builtin_type_int },
113 { "acr13", &builtin_type_int },
114 { "acr14", &builtin_type_int },
115 { "acr15", &builtin_type_int },
116
117 /* Floating Point Control Word. */
118 { "fpc", &builtin_type_int },
119
120 /* Floating Point Registers. */
121 { "f0", &builtin_type_double },
122 { "f1", &builtin_type_double },
123 { "f2", &builtin_type_double },
124 { "f3", &builtin_type_double },
125 { "f4", &builtin_type_double },
126 { "f5", &builtin_type_double },
127 { "f6", &builtin_type_double },
128 { "f7", &builtin_type_double },
129 { "f8", &builtin_type_double },
130 { "f9", &builtin_type_double },
131 { "f10", &builtin_type_double },
132 { "f11", &builtin_type_double },
133 { "f12", &builtin_type_double },
134 { "f13", &builtin_type_double },
135 { "f14", &builtin_type_double },
136 { "f15", &builtin_type_double },
137
138 /* Pseudo registers. */
139 { "pc", &builtin_type_void_func_ptr },
140 { "cc", &builtin_type_int },
141};
142
143/* Return the name of register REGNUM. */
144static const char *
145s390_register_name (int regnum)
146{
147 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
148 return s390_register_info[regnum].name;
149}
150
151/* Return the GDB type object for the "standard" data type of data in
152 register REGNUM. */
153static struct type *
154s390_register_type (struct gdbarch *gdbarch, int regnum)
155{
156 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
157 return *s390_register_info[regnum].type;
5769d3cd
AC
158}
159
d0f54f9d
JB
160/* DWARF Register Mapping. */
161
162static int s390_dwarf_regmap[] =
163{
164 /* General Purpose Registers. */
165 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
166 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
167 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
168 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
169
170 /* Floating Point Registers. */
171 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
172 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
173 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
174 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
175
176 /* Control Registers (not mapped). */
177 -1, -1, -1, -1, -1, -1, -1, -1,
178 -1, -1, -1, -1, -1, -1, -1, -1,
179
180 /* Access Registers. */
181 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
182 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
183 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
184 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
185
186 /* Program Status Word. */
187 S390_PSWM_REGNUM,
188 S390_PSWA_REGNUM
189};
190
191/* Convert DWARF register number REG to the appropriate register
192 number used by GDB. */
a78f21af 193static int
d0f54f9d
JB
194s390_dwarf_reg_to_regnum (int reg)
195{
196 int regnum = -1;
197
198 if (reg >= 0 || reg < ARRAY_SIZE (s390_dwarf_regmap))
199 regnum = s390_dwarf_regmap[reg];
200
201 if (regnum == -1)
202 warning ("Unmapped DWARF Register #%d encountered\n", reg);
203
204 return regnum;
205}
206
207/* Pseudo registers - PC and condition code. */
208
209static void
210s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
211 int regnum, void *buf)
212{
213 ULONGEST val;
214
215 switch (regnum)
216 {
217 case S390_PC_REGNUM:
218 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
219 store_unsigned_integer (buf, 4, val & 0x7fffffff);
220 break;
221
222 case S390_CC_REGNUM:
223 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
224 store_unsigned_integer (buf, 4, (val >> 12) & 3);
225 break;
226
227 default:
228 internal_error (__FILE__, __LINE__, "invalid regnum");
229 }
230}
231
232static void
233s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
234 int regnum, const void *buf)
5769d3cd 235{
d0f54f9d
JB
236 ULONGEST val, psw;
237
238 switch (regnum)
239 {
240 case S390_PC_REGNUM:
241 val = extract_unsigned_integer (buf, 4);
242 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
243 psw = (psw & 0x80000000) | (val & 0x7fffffff);
244 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
245 break;
246
247 case S390_CC_REGNUM:
248 val = extract_unsigned_integer (buf, 4);
249 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
250 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
251 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
252 break;
253
254 default:
255 internal_error (__FILE__, __LINE__, "invalid regnum");
256 }
5769d3cd
AC
257}
258
d0f54f9d
JB
259static void
260s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
261 int regnum, void *buf)
262{
263 ULONGEST val;
264
265 switch (regnum)
266 {
267 case S390_PC_REGNUM:
268 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
269 break;
270
271 case S390_CC_REGNUM:
272 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
273 store_unsigned_integer (buf, 4, (val >> 44) & 3);
274 break;
275
276 default:
277 internal_error (__FILE__, __LINE__, "invalid regnum");
278 }
279}
280
281static void
282s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
283 int regnum, const void *buf)
284{
285 ULONGEST val, psw;
286
287 switch (regnum)
288 {
289 case S390_PC_REGNUM:
290 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
291 break;
292
293 case S390_CC_REGNUM:
294 val = extract_unsigned_integer (buf, 4);
295 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
296 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
297 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
298 break;
299
300 default:
301 internal_error (__FILE__, __LINE__, "invalid regnum");
302 }
303}
304
305/* 'float' values are stored in the upper half of floating-point
306 registers, even though we are otherwise a big-endian platform. */
307
a78f21af 308static int
d0f54f9d 309s390_convert_register_p (int regno, struct type *type)
5769d3cd 310{
d0f54f9d
JB
311 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM)
312 && TYPE_LENGTH (type) < 8;
5769d3cd
AC
313}
314
d0f54f9d
JB
315static void
316s390_register_to_value (struct frame_info *frame, int regnum,
317 struct type *valtype, void *out)
318{
319 char in[8];
320 int len = TYPE_LENGTH (valtype);
321 gdb_assert (len < 8);
322
323 get_frame_register (frame, regnum, in);
324 memcpy (out, in, len);
325}
326
327static void
328s390_value_to_register (struct frame_info *frame, int regnum,
329 struct type *valtype, const void *in)
330{
331 char out[8];
332 int len = TYPE_LENGTH (valtype);
333 gdb_assert (len < 8);
334
335 memset (out, 0, 8);
336 memcpy (out, in, len);
337 put_frame_register (frame, regnum, out);
338}
339
340/* Register groups. */
341
a78f21af 342static int
d0f54f9d
JB
343s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
344 struct reggroup *group)
345{
346 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
347
348 /* Registers displayed via 'info regs'. */
349 if (group == general_reggroup)
350 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
351 || regnum == S390_PC_REGNUM
352 || regnum == S390_CC_REGNUM;
353
354 /* Registers displayed via 'info float'. */
355 if (group == float_reggroup)
356 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
357 || regnum == S390_FPC_REGNUM;
358
359 /* Registers that need to be saved/restored in order to
360 push or pop frames. */
361 if (group == save_reggroup || group == restore_reggroup)
362 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
363
364 return default_register_reggroup_p (gdbarch, regnum, group);
365}
366
367
368/* Core file register sets. */
369
370int s390_regmap_gregset[S390_NUM_REGS] =
371{
372 /* Program Status Word. */
373 0x00, 0x04,
374 /* General Purpose Registers. */
375 0x08, 0x0c, 0x10, 0x14,
376 0x18, 0x1c, 0x20, 0x24,
377 0x28, 0x2c, 0x30, 0x34,
378 0x38, 0x3c, 0x40, 0x44,
379 /* Access Registers. */
380 0x48, 0x4c, 0x50, 0x54,
381 0x58, 0x5c, 0x60, 0x64,
382 0x68, 0x6c, 0x70, 0x74,
383 0x78, 0x7c, 0x80, 0x84,
384 /* Floating Point Control Word. */
385 -1,
386 /* Floating Point Registers. */
387 -1, -1, -1, -1, -1, -1, -1, -1,
388 -1, -1, -1, -1, -1, -1, -1, -1,
389};
390
391int s390x_regmap_gregset[S390_NUM_REGS] =
392{
393 0x00, 0x08,
394 /* General Purpose Registers. */
395 0x10, 0x18, 0x20, 0x28,
396 0x30, 0x38, 0x40, 0x48,
397 0x50, 0x58, 0x60, 0x68,
398 0x70, 0x78, 0x80, 0x88,
399 /* Access Registers. */
400 0x90, 0x94, 0x98, 0x9c,
401 0xa0, 0xa4, 0xa8, 0xac,
402 0xb0, 0xb4, 0xb8, 0xbc,
403 0xc0, 0xc4, 0xc8, 0xcc,
404 /* Floating Point Control Word. */
405 -1,
406 /* Floating Point Registers. */
407 -1, -1, -1, -1, -1, -1, -1, -1,
408 -1, -1, -1, -1, -1, -1, -1, -1,
409};
410
411int s390_regmap_fpregset[S390_NUM_REGS] =
412{
413 /* Program Status Word. */
414 -1, -1,
415 /* General Purpose Registers. */
416 -1, -1, -1, -1, -1, -1, -1, -1,
417 -1, -1, -1, -1, -1, -1, -1, -1,
418 /* Access Registers. */
419 -1, -1, -1, -1, -1, -1, -1, -1,
420 -1, -1, -1, -1, -1, -1, -1, -1,
421 /* Floating Point Control Word. */
422 0x00,
423 /* Floating Point Registers. */
424 0x08, 0x10, 0x18, 0x20,
425 0x28, 0x30, 0x38, 0x40,
426 0x48, 0x50, 0x58, 0x60,
427 0x68, 0x70, 0x78, 0x80,
428};
429
430/* Supply register REGNUM from the register set REGSET to register cache
431 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
432static void
433s390_supply_regset (const struct regset *regset, struct regcache *regcache,
434 int regnum, const void *regs, size_t len)
435{
436 const int *offset = regset->descr;
437 int i;
438
439 for (i = 0; i < S390_NUM_REGS; i++)
440 {
441 if ((regnum == i || regnum == -1) && offset[i] != -1)
442 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
443 }
444}
445
446static const struct regset s390_gregset = {
447 s390_regmap_gregset,
448 s390_supply_regset
449};
450
451static const struct regset s390x_gregset = {
452 s390x_regmap_gregset,
453 s390_supply_regset
454};
455
456static const struct regset s390_fpregset = {
457 s390_regmap_fpregset,
458 s390_supply_regset
459};
460
461/* Return the appropriate register set for the core section identified
462 by SECT_NAME and SECT_SIZE. */
463const struct regset *
464s390_regset_from_core_section (struct gdbarch *gdbarch,
465 const char *sect_name, size_t sect_size)
466{
467 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
468
469 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
470 return tdep->gregset;
471
472 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
473 return tdep->fpregset;
474
475 return NULL;
5769d3cd
AC
476}
477
d0f54f9d 478
4bc8c588
JB
479/* Prologue analysis. */
480
481/* When we analyze a prologue, we're really doing 'abstract
482 interpretation' or 'pseudo-evaluation': running the function's code
483 in simulation, but using conservative approximations of the values
484 it would have when it actually runs. For example, if our function
485 starts with the instruction:
486
487 ahi r1, 42 # add halfword immediate 42 to r1
488
489 we don't know exactly what value will be in r1 after executing this
490 instruction, but we do know it'll be 42 greater than its original
491 value.
492
493 If we then see an instruction like:
494
495 ahi r1, 22 # add halfword immediate 22 to r1
496
497 we still don't know what r1's value is, but again, we can say it is
498 now 64 greater than its original value.
499
500 If the next instruction were:
501
502 lr r2, r1 # set r2 to r1's value
503
504 then we can say that r2's value is now the original value of r1
505 plus 64. And so on.
506
507 Of course, this can only go so far before it gets unreasonable. If
508 we wanted to be able to say anything about the value of r1 after
509 the instruction:
510
511 xr r1, r3 # exclusive-or r1 and r3, place result in r1
512
513 then things would get pretty complex. But remember, we're just
514 doing a conservative approximation; if exclusive-or instructions
515 aren't relevant to prologues, we can just say r1's value is now
516 'unknown'. We can ignore things that are too complex, if that loss
517 of information is acceptable for our application.
518
519 Once you've reached an instruction that you don't know how to
520 simulate, you stop. Now you examine the state of the registers and
521 stack slots you've kept track of. For example:
522
523 - To see how large your stack frame is, just check the value of sp;
524 if it's the original value of sp minus a constant, then that
525 constant is the stack frame's size. If the sp's value has been
526 marked as 'unknown', then that means the prologue has done
527 something too complex for us to track, and we don't know the
528 frame size.
529
530 - To see whether we've saved the SP in the current frame's back
531 chain slot, we just check whether the current value of the back
532 chain stack slot is the original value of the sp.
533
534 Sure, this takes some work. But prologue analyzers aren't
535 quick-and-simple pattern patching to recognize a few fixed prologue
536 forms any more; they're big, hairy functions. Along with inferior
537 function calls, prologue analysis accounts for a substantial
538 portion of the time needed to stabilize a GDB port. So I think
539 it's worthwhile to look for an approach that will be easier to
540 understand and maintain. In the approach used here:
541
542 - It's easier to see that the analyzer is correct: you just see
543 whether the analyzer properly (albiet conservatively) simulates
544 the effect of each instruction.
545
546 - It's easier to extend the analyzer: you can add support for new
547 instructions, and know that you haven't broken anything that
548 wasn't already broken before.
549
550 - It's orthogonal: to gather new information, you don't need to
551 complicate the code for each instruction. As long as your domain
552 of conservative values is already detailed enough to tell you
553 what you need, then all the existing instruction simulations are
554 already gathering the right data for you.
555
556 A 'struct prologue_value' is a conservative approximation of the
557 real value the register or stack slot will have. */
558
559struct prologue_value {
560
561 /* What sort of value is this? This determines the interpretation
562 of subsequent fields. */
563 enum {
564
565 /* We don't know anything about the value. This is also used for
566 values we could have kept track of, when doing so would have
567 been too complex and we don't want to bother. The bottom of
568 our lattice. */
569 pv_unknown,
570
571 /* A known constant. K is its value. */
572 pv_constant,
573
574 /* The value that register REG originally had *UPON ENTRY TO THE
575 FUNCTION*, plus K. If K is zero, this means, obviously, just
576 the value REG had upon entry to the function. REG is a GDB
577 register number. Before we start interpreting, we initialize
578 every register R to { pv_register, R, 0 }. */
579 pv_register,
580
581 } kind;
582
583 /* The meanings of the following fields depend on 'kind'; see the
584 comments for the specific 'kind' values. */
585 int reg;
586 CORE_ADDR k;
587};
588
589
590/* Set V to be unknown. */
591static void
592pv_set_to_unknown (struct prologue_value *v)
593{
594 v->kind = pv_unknown;
595}
596
597
598/* Set V to the constant K. */
599static void
600pv_set_to_constant (struct prologue_value *v, CORE_ADDR k)
601{
602 v->kind = pv_constant;
603 v->k = k;
604}
605
606
607/* Set V to the original value of register REG, plus K. */
608static void
609pv_set_to_register (struct prologue_value *v, int reg, CORE_ADDR k)
610{
611 v->kind = pv_register;
612 v->reg = reg;
613 v->k = k;
614}
615
616
617/* If one of *A and *B is a constant, and the other isn't, swap the
618 pointers as necessary to ensure that *B points to the constant.
619 This can reduce the number of cases we need to analyze in the
620 functions below. */
621static void
622pv_constant_last (struct prologue_value **a,
623 struct prologue_value **b)
624{
625 if ((*a)->kind == pv_constant
626 && (*b)->kind != pv_constant)
627 {
628 struct prologue_value *temp = *a;
629 *a = *b;
630 *b = temp;
631 }
632}
633
634
635/* Set SUM to the sum of A and B. SUM, A, and B may point to the same
636 'struct prologue_value' object. */
637static void
638pv_add (struct prologue_value *sum,
639 struct prologue_value *a,
640 struct prologue_value *b)
641{
642 pv_constant_last (&a, &b);
643
644 /* We can handle adding constants to registers, and other constants. */
645 if (b->kind == pv_constant
646 && (a->kind == pv_register
647 || a->kind == pv_constant))
648 {
649 sum->kind = a->kind;
650 sum->reg = a->reg; /* not meaningful if a is pv_constant, but
651 harmless */
652 sum->k = a->k + b->k;
653 }
654
655 /* Anything else we don't know how to add. We don't have a
656 representation for, say, the sum of two registers, or a multiple
657 of a register's value (adding a register to itself). */
658 else
659 sum->kind = pv_unknown;
660}
661
662
663/* Add the constant K to V. */
664static void
665pv_add_constant (struct prologue_value *v, CORE_ADDR k)
666{
667 struct prologue_value pv_k;
668
669 /* Rather than thinking of all the cases we can and can't handle,
670 we'll just let pv_add take care of that for us. */
671 pv_set_to_constant (&pv_k, k);
672 pv_add (v, v, &pv_k);
673}
674
675
676/* Subtract B from A, and put the result in DIFF.
677
678 This isn't quite the same as negating B and adding it to A, since
679 we don't have a representation for the negation of anything but a
680 constant. For example, we can't negate { pv_register, R1, 10 },
681 but we do know that { pv_register, R1, 10 } minus { pv_register,
682 R1, 5 } is { pv_constant, <ignored>, 5 }.
683
684 This means, for example, that we can subtract two stack addresses;
685 they're both relative to the original SP. Since the frame pointer
686 is set based on the SP, its value will be the original SP plus some
687 constant (probably zero), so we can use its value just fine. */
688static void
689pv_subtract (struct prologue_value *diff,
690 struct prologue_value *a,
691 struct prologue_value *b)
692{
693 pv_constant_last (&a, &b);
694
695 /* We can subtract a constant from another constant, or from a
696 register. */
697 if (b->kind == pv_constant
698 && (a->kind == pv_register
699 || a->kind == pv_constant))
700 {
701 diff->kind = a->kind;
702 diff->reg = a->reg; /* not always meaningful, but harmless */
703 diff->k = a->k - b->k;
704 }
705
706 /* We can subtract a register from itself, yielding a constant. */
707 else if (a->kind == pv_register
708 && b->kind == pv_register
709 && a->reg == b->reg)
710 {
711 diff->kind = pv_constant;
712 diff->k = a->k - b->k;
713 }
714
715 /* We don't know how to subtract anything else. */
716 else
717 diff->kind = pv_unknown;
718}
719
720
721/* Set AND to the logical and of A and B. */
722static void
723pv_logical_and (struct prologue_value *and,
724 struct prologue_value *a,
725 struct prologue_value *b)
726{
727 pv_constant_last (&a, &b);
728
729 /* We can 'and' two constants. */
730 if (a->kind == pv_constant
731 && b->kind == pv_constant)
732 {
733 and->kind = pv_constant;
734 and->k = a->k & b->k;
735 }
736
737 /* We can 'and' anything with the constant zero. */
738 else if (b->kind == pv_constant
739 && b->k == 0)
740 {
741 and->kind = pv_constant;
742 and->k = 0;
743 }
744
745 /* We can 'and' anything with ~0. */
746 else if (b->kind == pv_constant
747 && b->k == ~ (CORE_ADDR) 0)
748 *and = *a;
749
750 /* We can 'and' a register with itself. */
751 else if (a->kind == pv_register
752 && b->kind == pv_register
753 && a->reg == b->reg
754 && a->k == b->k)
755 *and = *a;
756
757 /* Otherwise, we don't know. */
758 else
759 pv_set_to_unknown (and);
760}
761
762
763/* Return non-zero iff A and B are identical expressions.
764
765 This is not the same as asking if the two values are equal; the
766 result of such a comparison would have to be a pv_boolean, and
767 asking whether two 'unknown' values were equal would give you
768 pv_maybe. Same for comparing, say, { pv_register, R1, 0 } and {
769 pv_register, R2, 0}. Instead, this is asking whether the two
770 representations are the same. */
12bffad7 771static int
4bc8c588
JB
772pv_is_identical (struct prologue_value *a,
773 struct prologue_value *b)
12bffad7 774{
4bc8c588
JB
775 if (a->kind != b->kind)
776 return 0;
777
778 switch (a->kind)
779 {
780 case pv_unknown:
781 return 1;
782 case pv_constant:
783 return (a->k == b->k);
784 case pv_register:
785 return (a->reg == b->reg && a->k == b->k);
786 default:
787 gdb_assert (0);
788 }
12bffad7
JB
789}
790
5769d3cd 791
4bc8c588
JB
792/* Return non-zero if A is the original value of register number R
793 plus K, zero otherwise. */
794static int
795pv_is_register (struct prologue_value *a, int r, CORE_ADDR k)
796{
797 return (a->kind == pv_register
798 && a->reg == r
799 && a->k == k);
800}
5769d3cd 801
5769d3cd 802
4bc8c588
JB
803/* A prologue-value-esque boolean type, including "maybe", when we
804 can't figure out whether something is true or not. */
805enum pv_boolean {
806 pv_maybe,
807 pv_definite_yes,
808 pv_definite_no,
809};
810
811
812/* Decide whether a reference to SIZE bytes at ADDR refers exactly to
813 an element of an array. The array starts at ARRAY_ADDR, and has
814 ARRAY_LEN values of ELT_SIZE bytes each. If ADDR definitely does
815 refer to an array element, set *I to the index of the referenced
816 element in the array, and return pv_definite_yes. If it definitely
817 doesn't, return pv_definite_no. If we can't tell, return pv_maybe.
818
819 If the reference does touch the array, but doesn't fall exactly on
820 an element boundary, or doesn't refer to the whole element, return
821 pv_maybe. */
822static enum pv_boolean
823pv_is_array_ref (struct prologue_value *addr,
824 CORE_ADDR size,
825 struct prologue_value *array_addr,
826 CORE_ADDR array_len,
827 CORE_ADDR elt_size,
828 int *i)
829{
830 struct prologue_value offset;
5769d3cd 831
4bc8c588
JB
832 /* Note that, since ->k is a CORE_ADDR, and CORE_ADDR is unsigned,
833 if addr is *before* the start of the array, then this isn't going
834 to be negative... */
835 pv_subtract (&offset, addr, array_addr);
836
837 if (offset.kind == pv_constant)
838 {
839 /* This is a rather odd test. We want to know if the SIZE bytes
840 at ADDR don't overlap the array at all, so you'd expect it to
841 be an || expression: "if we're completely before || we're
842 completely after". But with unsigned arithmetic, things are
843 different: since it's a number circle, not a number line, the
844 right values for offset.k are actually one contiguous range. */
845 if (offset.k <= -size
846 && offset.k >= array_len * elt_size)
847 return pv_definite_no;
848 else if (offset.k % elt_size != 0
849 || size != elt_size)
850 return pv_maybe;
851 else
852 {
853 *i = offset.k / elt_size;
854 return pv_definite_yes;
855 }
856 }
857 else
858 return pv_maybe;
859}
860
861
862
863/* Decoding S/390 instructions. */
864
865/* Named opcode values for the S/390 instructions we recognize. Some
866 instructions have their opcode split across two fields; those are the
867 op1_* and op2_* enums. */
868enum
869 {
a8c99f38
JB
870 op1_lhi = 0xa7, op2_lhi = 0x08,
871 op1_lghi = 0xa7, op2_lghi = 0x09,
4bc8c588 872 op_lr = 0x18,
a8c99f38
JB
873 op_lgr = 0xb904,
874 op_l = 0x58,
875 op1_ly = 0xe3, op2_ly = 0x58,
876 op1_lg = 0xe3, op2_lg = 0x04,
877 op_lm = 0x98,
878 op1_lmy = 0xeb, op2_lmy = 0x98,
879 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 880 op_st = 0x50,
a8c99f38 881 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 882 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 883 op_std = 0x60,
4bc8c588 884 op_stm = 0x90,
a8c99f38 885 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 886 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
887 op1_aghi = 0xa7, op2_aghi = 0x0b,
888 op1_ahi = 0xa7, op2_ahi = 0x0a,
889 op_ar = 0x1a,
890 op_agr = 0xb908,
891 op_a = 0x5a,
892 op1_ay = 0xe3, op2_ay = 0x5a,
893 op1_ag = 0xe3, op2_ag = 0x08,
894 op_sr = 0x1b,
895 op_sgr = 0xb909,
896 op_s = 0x5b,
897 op1_sy = 0xe3, op2_sy = 0x5b,
898 op1_sg = 0xe3, op2_sg = 0x09,
899 op_nr = 0x14,
900 op_ngr = 0xb980,
901 op_la = 0x41,
902 op1_lay = 0xe3, op2_lay = 0x71,
903 op1_larl = 0xc0, op2_larl = 0x00,
904 op_basr = 0x0d,
905 op_bas = 0x4d,
906 op_bcr = 0x07,
907 op_bc = 0x0d,
908 op1_bras = 0xa7, op2_bras = 0x05,
909 op1_brasl= 0xc0, op2_brasl= 0x05,
910 op1_brc = 0xa7, op2_brc = 0x04,
911 op1_brcl = 0xc0, op2_brcl = 0x04,
4bc8c588
JB
912 };
913
914
a8c99f38
JB
915/* Read a single instruction from address AT. */
916
917#define S390_MAX_INSTR_SIZE 6
918static int
919s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
920{
921 static int s390_instrlen[] = { 2, 4, 4, 6 };
922 int instrlen;
923
924 if (read_memory_nobpt (at, &instr[0], 2))
925 return -1;
926 instrlen = s390_instrlen[instr[0] >> 6];
927 if (instrlen > 2)
928 {
929 if (read_memory_nobpt (at + 2, &instr[2], instrlen - 2))
930 return -1;
931 }
932 return instrlen;
933}
934
935
4bc8c588
JB
936/* The functions below are for recognizing and decoding S/390
937 instructions of various formats. Each of them checks whether INSN
938 is an instruction of the given format, with the specified opcodes.
939 If it is, it sets the remaining arguments to the values of the
940 instruction's fields, and returns a non-zero value; otherwise, it
941 returns zero.
942
943 These functions' arguments appear in the order they appear in the
944 instruction, not in the machine-language form. So, opcodes always
945 come first, even though they're sometimes scattered around the
946 instructions. And displacements appear before base and extension
947 registers, as they do in the assembly syntax, not at the end, as
948 they do in the machine language. */
a78f21af 949static int
4bc8c588
JB
950is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
951{
952 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
953 {
954 *r1 = (insn[1] >> 4) & 0xf;
955 /* i2 is a 16-bit signed quantity. */
956 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
957 return 1;
958 }
959 else
960 return 0;
961}
8ac0e65a 962
5769d3cd 963
4bc8c588
JB
964static int
965is_ril (bfd_byte *insn, int op1, int op2,
966 unsigned int *r1, int *i2)
967{
968 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
969 {
970 *r1 = (insn[1] >> 4) & 0xf;
971 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
972 no sign extension is necessary, but we don't want to assume
973 that. */
974 *i2 = (((insn[2] << 24)
975 | (insn[3] << 16)
976 | (insn[4] << 8)
977 | (insn[5])) ^ 0x80000000) - 0x80000000;
978 return 1;
979 }
980 else
981 return 0;
982}
983
984
985static int
986is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
987{
988 if (insn[0] == op)
989 {
990 *r1 = (insn[1] >> 4) & 0xf;
991 *r2 = insn[1] & 0xf;
992 return 1;
993 }
994 else
995 return 0;
996}
997
998
999static int
1000is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1001{
1002 if (((insn[0] << 8) | insn[1]) == op)
1003 {
1004 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1005 *r1 = (insn[3] >> 4) & 0xf;
1006 *r2 = insn[3] & 0xf;
1007 return 1;
1008 }
1009 else
1010 return 0;
1011}
1012
1013
1014static int
1015is_rs (bfd_byte *insn, int op,
1016 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
1017{
1018 if (insn[0] == op)
1019 {
1020 *r1 = (insn[1] >> 4) & 0xf;
1021 *r3 = insn[1] & 0xf;
1022 *b2 = (insn[2] >> 4) & 0xf;
1023 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1024 return 1;
1025 }
1026 else
1027 return 0;
1028}
1029
1030
1031static int
a8c99f38 1032is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1033 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
1034{
1035 if (insn[0] == op1
4bc8c588
JB
1036 && insn[5] == op2)
1037 {
1038 *r1 = (insn[1] >> 4) & 0xf;
1039 *r3 = insn[1] & 0xf;
1040 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1041 /* The 'long displacement' is a 20-bit signed integer. */
1042 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1043 ^ 0x80000) - 0x80000;
4bc8c588
JB
1044 return 1;
1045 }
1046 else
1047 return 0;
1048}
1049
1050
1051static int
1052is_rx (bfd_byte *insn, int op,
1053 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1054{
1055 if (insn[0] == op)
1056 {
1057 *r1 = (insn[1] >> 4) & 0xf;
1058 *x2 = insn[1] & 0xf;
1059 *b2 = (insn[2] >> 4) & 0xf;
1060 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1061 return 1;
1062 }
1063 else
1064 return 0;
1065}
1066
1067
1068static int
a8c99f38 1069is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1070 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1071{
1072 if (insn[0] == op1
4bc8c588
JB
1073 && insn[5] == op2)
1074 {
1075 *r1 = (insn[1] >> 4) & 0xf;
1076 *x2 = insn[1] & 0xf;
1077 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1078 /* The 'long displacement' is a 20-bit signed integer. */
1079 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1080 ^ 0x80000) - 0x80000;
4bc8c588
JB
1081 return 1;
1082 }
1083 else
1084 return 0;
1085}
1086
1087
1088/* Set ADDR to the effective address for an X-style instruction, like:
1089
1090 L R1, D2(X2, B2)
1091
a8c99f38 1092 Here, X2 and B2 are registers, and D2 is a signed 20-bit
4bc8c588
JB
1093 constant; the effective address is the sum of all three. If either
1094 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1095 means that r0 can't be used as either X2 or B2.
1096
1097 GPR is an array of general register values, indexed by GPR number,
1098 not GDB register number. */
1099static void
1100compute_x_addr (struct prologue_value *addr,
1101 struct prologue_value *gpr,
a8c99f38 1102 int d2, unsigned int x2, unsigned int b2)
4bc8c588
JB
1103{
1104 /* We can't just add stuff directly in addr; it might alias some of
1105 the registers we need to read. */
1106 struct prologue_value result;
1107
1108 pv_set_to_constant (&result, d2);
1109 if (x2)
1110 pv_add (&result, &result, &gpr[x2]);
1111 if (b2)
1112 pv_add (&result, &result, &gpr[b2]);
1113
1114 *addr = result;
1115}
1116
1117
1118/* The number of GPR and FPR spill slots in an S/390 stack frame. We
1119 track general-purpose registers r2 -- r15, and floating-point
1120 registers f0, f2, f4, and f6. */
1121#define S390_NUM_SPILL_SLOTS (14 + 4)
d0f54f9d
JB
1122#define S390_NUM_GPRS 16
1123#define S390_NUM_FPRS 16
4bc8c588 1124
a8c99f38
JB
1125struct s390_prologue_data {
1126
1127 /* The size of a GPR or FPR. */
1128 int gpr_size;
1129 int fpr_size;
1130
1131 /* The general-purpose registers. */
1132 struct prologue_value gpr[S390_NUM_GPRS];
1133
1134 /* The floating-point registers. */
1135 struct prologue_value fpr[S390_NUM_FPRS];
1136
1137 /* The register spill stack slots in the caller's frame ---
1138 general-purpose registers r2 through r15, and floating-point
1139 registers. spill[i] is where gpr i+2 gets spilled;
1140 spill[(14, 15, 16, 17)] is where (f0, f2, f4, f6) get spilled. */
1141 struct prologue_value spill[S390_NUM_SPILL_SLOTS];
1142
1143 /* The value of the back chain slot. This is only valid if the stack
1144 pointer is known to be less than its original value --- that is,
1145 if we have indeed allocated space on the stack. */
1146 struct prologue_value back_chain;
1147};
1148
4bc8c588
JB
1149
1150/* If the SIZE bytes at ADDR are a stack slot we're actually tracking,
1151 return pv_definite_yes and set *STACK to point to the slot. If
1152 we're sure that they are not any of our stack slots, then return
1153 pv_definite_no. Otherwise, return pv_maybe.
a8c99f38
JB
1154
1155 DATA describes our current state (registers and stack slots). */
4bc8c588
JB
1156static enum pv_boolean
1157s390_on_stack (struct prologue_value *addr,
1158 CORE_ADDR size,
a8c99f38 1159 struct s390_prologue_data *data,
4bc8c588
JB
1160 struct prologue_value **stack)
1161{
1162 struct prologue_value gpr_spill_addr;
1163 struct prologue_value fpr_spill_addr;
1164 struct prologue_value back_chain_addr;
1165 int i;
1166 enum pv_boolean b;
1167
1168 /* Construct the addresses of the spill arrays and the back chain. */
a8c99f38
JB
1169 pv_set_to_register (&gpr_spill_addr, S390_SP_REGNUM, 2 * data->gpr_size);
1170 pv_set_to_register (&fpr_spill_addr, S390_SP_REGNUM, 16 * data->gpr_size);
1171 back_chain_addr = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1172
1173 /* We have to check for GPR and FPR references using two separate
1174 calls to pv_is_array_ref, since the GPR and FPR spill slots are
1175 different sizes. (SPILL is an array, but the thing it tracks
1176 isn't really an array.) */
1177
1178 /* Was it a reference to the GPR spill array? */
a8c99f38 1179 b = pv_is_array_ref (addr, size, &gpr_spill_addr, 14, data->gpr_size, &i);
4bc8c588
JB
1180 if (b == pv_definite_yes)
1181 {
a8c99f38 1182 *stack = &data->spill[i];
4bc8c588
JB
1183 return pv_definite_yes;
1184 }
1185 if (b == pv_maybe)
1186 return pv_maybe;
1187
1188 /* Was it a reference to the FPR spill array? */
a8c99f38 1189 b = pv_is_array_ref (addr, size, &fpr_spill_addr, 4, data->fpr_size, &i);
4bc8c588 1190 if (b == pv_definite_yes)
5769d3cd 1191 {
a8c99f38 1192 *stack = &data->spill[14 + i];
4bc8c588 1193 return pv_definite_yes;
5769d3cd 1194 }
4bc8c588
JB
1195 if (b == pv_maybe)
1196 return pv_maybe;
1197
1198 /* Was it a reference to the back chain?
1199 This isn't quite right. We ought to check whether we have
1200 actually allocated any new frame at all. */
a8c99f38 1201 b = pv_is_array_ref (addr, size, &back_chain_addr, 1, data->gpr_size, &i);
4bc8c588 1202 if (b == pv_definite_yes)
5769d3cd 1203 {
a8c99f38 1204 *stack = &data->back_chain;
4bc8c588
JB
1205 return pv_definite_yes;
1206 }
1207 if (b == pv_maybe)
1208 return pv_maybe;
1209
1210 /* All the above queries returned definite 'no's. */
1211 return pv_definite_no;
1212}
1213
1214
a8c99f38
JB
1215/* Do a SIZE-byte store of VALUE to ADDR. */
1216static void
4bc8c588
JB
1217s390_store (struct prologue_value *addr,
1218 CORE_ADDR size,
1219 struct prologue_value *value,
a8c99f38 1220 struct s390_prologue_data *data)
4bc8c588
JB
1221{
1222 struct prologue_value *stack;
4bc8c588 1223
a8c99f38
JB
1224 /* We can do it if it's definitely a reference to something on the stack. */
1225 if (s390_on_stack (addr, size, data, &stack) == pv_definite_yes)
1226 {
1227 *stack = *value;
1228 return;
1229 }
4bc8c588 1230
a8c99f38
JB
1231 /* Note: If s390_on_stack returns pv_maybe, you might think we should
1232 forget our cached values, as any of those might have been hit.
1233
1234 However, we make the assumption that --since the fields we track
1235 are save areas private to compiler, and never directly exposed to
1236 the user-- every access to our data is explicit. Hence, every
1237 memory access we cannot follow can't hit our data. */
4bc8c588 1238}
4bc8c588 1239
a8c99f38 1240/* Do a SIZE-byte load from ADDR into VALUE. */
4bc8c588 1241static void
a8c99f38
JB
1242s390_load (struct prologue_value *addr,
1243 CORE_ADDR size,
1244 struct prologue_value *value,
1245 struct s390_prologue_data *data)
4bc8c588 1246{
a8c99f38 1247 struct prologue_value *stack;
4bc8c588 1248
a8c99f38
JB
1249 /* If it's a load from an in-line constant pool, then we can
1250 simulate that, under the assumption that the code isn't
1251 going to change between the time the processor actually
1252 executed it creating the current frame, and the time when
1253 we're analyzing the code to unwind past that frame. */
1254 if (addr->kind == pv_constant)
4bc8c588 1255 {
a8c99f38
JB
1256 struct section_table *secp;
1257 secp = target_section_by_addr (&current_target, addr->k);
1258 if (secp != NULL
1259 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1260 & SEC_READONLY))
1261 {
1262 pv_set_to_constant (value, read_memory_integer (addr->k, size));
1263 return;
1264 }
1265 }
7666f43c 1266
a8c99f38
JB
1267 /* If it's definitely a reference to something on the stack,
1268 we can do that. */
1269 if (s390_on_stack (addr, size, data, &stack) == pv_definite_yes)
1270 {
1271 *value = *stack;
1272 return;
5769d3cd 1273 }
4bc8c588 1274
a8c99f38
JB
1275 /* Otherwise, we don't know the value. */
1276 pv_set_to_unknown (value);
1277}
1278
4bc8c588 1279
a8c99f38
JB
1280/* Analyze the prologue of the function starting at START_PC,
1281 continuing at most until CURRENT_PC. Initialize DATA to
1282 hold all information we find out about the state of the registers
1283 and stack slots. Return the address of the instruction after
1284 the last one that changed the SP, FP, or back chain; or zero
1285 on error. */
1286static CORE_ADDR
1287s390_analyze_prologue (struct gdbarch *gdbarch,
1288 CORE_ADDR start_pc,
1289 CORE_ADDR current_pc,
1290 struct s390_prologue_data *data)
4bc8c588 1291{
a8c99f38
JB
1292 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1293
4bc8c588 1294 /* Our return value:
a8c99f38
JB
1295 The address of the instruction after the last one that changed
1296 the SP, FP, or back chain; zero if we got an error trying to
1297 read memory. */
1298 CORE_ADDR result = start_pc;
4bc8c588 1299
4bc8c588
JB
1300 /* The current PC for our abstract interpretation. */
1301 CORE_ADDR pc;
1302
1303 /* The address of the next instruction after that. */
1304 CORE_ADDR next_pc;
1305
4bc8c588
JB
1306 /* Set up everything's initial value. */
1307 {
1308 int i;
1309
a8c99f38
JB
1310 /* For the purpose of prologue tracking, we consider the GPR size to
1311 be equal to the ABI word size, even if it is actually larger
1312 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1313 data->gpr_size = word_size;
1314 data->fpr_size = 8;
1315
4bc8c588 1316 for (i = 0; i < S390_NUM_GPRS; i++)
a8c99f38 1317 pv_set_to_register (&data->gpr[i], S390_R0_REGNUM + i, 0);
4bc8c588
JB
1318
1319 for (i = 0; i < S390_NUM_FPRS; i++)
a8c99f38 1320 pv_set_to_register (&data->fpr[i], S390_F0_REGNUM + i, 0);
4bc8c588
JB
1321
1322 for (i = 0; i < S390_NUM_SPILL_SLOTS; i++)
a8c99f38 1323 pv_set_to_unknown (&data->spill[i]);
4bc8c588 1324
a8c99f38 1325 pv_set_to_unknown (&data->back_chain);
4bc8c588
JB
1326 }
1327
a8c99f38
JB
1328 /* Start interpreting instructions, until we hit the frame's
1329 current PC or the first branch instruction. */
1330 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1331 {
4bc8c588 1332 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1333 int insn_len = s390_readinstruction (insn, pc);
4bc8c588
JB
1334
1335 /* Fields for various kinds of instructions. */
a8c99f38
JB
1336 unsigned int b2, r1, r2, x2, r3;
1337 int i2, d2;
4bc8c588
JB
1338
1339 /* The values of SP, FP, and back chain before this instruction,
1340 for detecting instructions that change them. */
1341 struct prologue_value pre_insn_sp, pre_insn_fp, pre_insn_back_chain;
1342
1343 /* If we got an error trying to read the instruction, report it. */
1344 if (insn_len < 0)
8ac0e65a 1345 {
a8c99f38 1346 result = 0;
4bc8c588
JB
1347 break;
1348 }
1349
1350 next_pc = pc + insn_len;
1351
a8c99f38
JB
1352 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1353 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1354 pre_insn_back_chain = data->back_chain;
4bc8c588 1355
a8c99f38
JB
1356 /* LHI r1, i2 --- load halfword immediate */
1357 if (word_size == 4
1358 && is_ri (insn, op1_lhi, op2_lhi, &r1, &i2))
1359 pv_set_to_constant (&data->gpr[r1], i2);
4bc8c588 1360
a8c99f38
JB
1361 /* LGHI r1, i2 --- load halfword immediate (64-bit version) */
1362 else if (word_size == 8
1363 && is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
1364 pv_set_to_constant (&data->gpr[r1], i2);
4bc8c588 1365
a8c99f38
JB
1366 /* LR r1, r2 --- load from register */
1367 else if (word_size == 4
1368 && is_rr (insn, op_lr, &r1, &r2))
1369 data->gpr[r1] = data->gpr[r2];
4bc8c588 1370
a8c99f38
JB
1371 /* LGR r1, r2 --- load from register (64-bit version) */
1372 else if (word_size == 8
1373 && is_rre (insn, op_lgr, &r1, &r2))
1374 data->gpr[r1] = data->gpr[r2];
4bc8c588 1375
a8c99f38
JB
1376 /* L r1, d2(x2, b2) --- load */
1377 else if (word_size == 4
1378 && is_rx (insn, op_l, &r1, &d2, &x2, &b2))
4bc8c588 1379 {
a8c99f38 1380 struct prologue_value addr;
4bc8c588 1381
a8c99f38
JB
1382 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1383 s390_load (&addr, 4, &data->gpr[r1], data);
4bc8c588
JB
1384 }
1385
a8c99f38
JB
1386 /* LY r1, d2(x2, b2) --- load (long-displacement version) */
1387 else if (word_size == 4
1388 && is_rxy (insn, op1_ly, op2_ly, &r1, &d2, &x2, &b2))
4bc8c588
JB
1389 {
1390 struct prologue_value addr;
4bc8c588 1391
a8c99f38
JB
1392 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1393 s390_load (&addr, 4, &data->gpr[r1], data);
1394 }
4bc8c588 1395
a8c99f38
JB
1396 /* LG r1, d2(x2, b2) --- load (64-bit version) */
1397 else if (word_size == 8
1398 && is_rxy (insn, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1399 {
1400 struct prologue_value addr;
4bc8c588 1401
a8c99f38
JB
1402 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1403 s390_load (&addr, 8, &data->gpr[r1], data);
1404 }
4bc8c588 1405
a8c99f38
JB
1406 /* ST r1, d2(x2, b2) --- store */
1407 else if (word_size == 4
1408 && is_rx (insn, op_st, &r1, &d2, &x2, &b2))
1409 {
1410 struct prologue_value addr;
4bc8c588 1411
a8c99f38
JB
1412 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1413 s390_store (&addr, 4, &data->gpr[r1], data);
1414 }
4bc8c588 1415
a8c99f38
JB
1416 /* STY r1, d2(x2, b2) --- store (long-displacement version) */
1417 else if (word_size == 4
1418 && is_rxy (insn, op1_sty, op2_sty, &r1, &d2, &x2, &b2))
4bc8c588
JB
1419 {
1420 struct prologue_value addr;
a8c99f38
JB
1421
1422 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1423 s390_store (&addr, 4, &data->gpr[r1], data);
4bc8c588
JB
1424 }
1425
a8c99f38
JB
1426 /* STG r1, d2(x2, b2) --- store (64-bit version) */
1427 else if (word_size == 8
1428 && is_rxy (insn, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
4bc8c588
JB
1429 {
1430 struct prologue_value addr;
1431
a8c99f38
JB
1432 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1433 s390_store (&addr, 8, &data->gpr[r1], data);
4bc8c588
JB
1434 }
1435
1436 /* STD r1, d2(x2,b2) --- store floating-point register */
1437 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1438 {
1439 struct prologue_value addr;
1440
a8c99f38
JB
1441 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1442 s390_store (&addr, 8, &data->fpr[r1], data);
4bc8c588
JB
1443 }
1444
a8c99f38
JB
1445 /* STM r1, r3, d2(b2) --- store multiple */
1446 else if (word_size == 4
1447 && is_rs (insn, op_stm, &r1, &r3, &d2, &b2))
4bc8c588 1448 {
a8c99f38
JB
1449 int regnum;
1450 int offset;
4bc8c588
JB
1451 struct prologue_value addr;
1452
a8c99f38
JB
1453 for (regnum = r1, offset = 0;
1454 regnum <= r3;
1455 regnum++, offset += 4)
1456 {
1457 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1458 s390_store (&addr, 4, &data->gpr[regnum], data);
1459 }
4bc8c588
JB
1460 }
1461
a8c99f38
JB
1462 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement version) */
1463 else if (word_size == 4
1464 && is_rsy (insn, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2))
4bc8c588
JB
1465 {
1466 int regnum;
1467 int offset;
1468 struct prologue_value addr;
1469
1470 for (regnum = r1, offset = 0;
1471 regnum <= r3;
1472 regnum++, offset += 4)
1473 {
a8c99f38
JB
1474 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1475 s390_store (&addr, 4, &data->gpr[regnum], data);
4bc8c588 1476 }
4bc8c588
JB
1477 }
1478
a8c99f38
JB
1479 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version) */
1480 else if (word_size == 8
1481 && is_rsy (insn, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588
JB
1482 {
1483 int regnum;
1484 int offset;
1485 struct prologue_value addr;
1486
1487 for (regnum = r1, offset = 0;
1488 regnum <= r3;
1489 regnum++, offset += 8)
1490 {
a8c99f38
JB
1491 compute_x_addr (&addr, data->gpr, d2 + offset, 0, b2);
1492 s390_store (&addr, 8, &data->gpr[regnum], data);
4bc8c588 1493 }
a8c99f38
JB
1494 }
1495
1496 /* AHI r1, i2 --- add halfword immediate */
1497 else if (word_size == 4
1498 && is_ri (insn, op1_ahi, op2_ahi, &r1, &i2))
1499 pv_add_constant (&data->gpr[r1], i2);
1500
1501 /* AGHI r1, i2 --- add halfword immediate (64-bit version) */
1502 else if (word_size == 8
1503 && is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
1504 pv_add_constant (&data->gpr[r1], i2);
1505
1506 /* AR r1, r2 -- add register */
1507 else if (word_size == 4
1508 && is_rr (insn, op_ar, &r1, &r2))
1509 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1510
1511 /* AGR r1, r2 -- add register (64-bit version) */
1512 else if (word_size == 8
1513 && is_rre (insn, op_agr, &r1, &r2))
1514 pv_add (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1515
1516 /* A r1, d2(x2, b2) -- add */
1517 else if (word_size == 4
1518 && is_rx (insn, op_a, &r1, &d2, &x2, &b2))
1519 {
1520 struct prologue_value addr;
1521 struct prologue_value value;
1522
1523 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1524 s390_load (&addr, 4, &value, data);
1525
1526 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1527 }
1528
1529 /* AY r1, d2(x2, b2) -- add (long-displacement version) */
1530 else if (word_size == 4
1531 && is_rxy (insn, op1_ay, op2_ay, &r1, &d2, &x2, &b2))
1532 {
1533 struct prologue_value addr;
1534 struct prologue_value value;
1535
1536 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1537 s390_load (&addr, 4, &value, data);
1538
1539 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1540 }
1541
1542 /* AG r1, d2(x2, b2) -- add (64-bit version) */
1543 else if (word_size == 8
1544 && is_rxy (insn, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1545 {
1546 struct prologue_value addr;
1547 struct prologue_value value;
1548
1549 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1550 s390_load (&addr, 8, &value, data);
1551
1552 pv_add (&data->gpr[r1], &data->gpr[r1], &value);
1553 }
1554
1555 /* SR r1, r2 -- subtract register */
1556 else if (word_size == 4
1557 && is_rr (insn, op_sr, &r1, &r2))
1558 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1559
1560 /* SGR r1, r2 -- subtract register (64-bit version) */
1561 else if (word_size == 8
1562 && is_rre (insn, op_sgr, &r1, &r2))
1563 pv_subtract (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1564
1565 /* S r1, d2(x2, b2) -- subtract */
1566 else if (word_size == 4
1567 && is_rx (insn, op_s, &r1, &d2, &x2, &b2))
1568 {
1569 struct prologue_value addr;
1570 struct prologue_value value;
1571
1572 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1573 s390_load (&addr, 4, &value, data);
1574
1575 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1576 }
1577
1578 /* SY r1, d2(x2, b2) -- subtract (long-displacement version) */
1579 else if (word_size == 4
1580 && is_rxy (insn, op1_sy, op2_sy, &r1, &d2, &x2, &b2))
1581 {
1582 struct prologue_value addr;
1583 struct prologue_value value;
1584
1585 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1586 s390_load (&addr, 4, &value, data);
1587
1588 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1589 }
1590
1591 /* SG r1, d2(x2, b2) -- subtract (64-bit version) */
1592 else if (word_size == 8
1593 && is_rxy (insn, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1594 {
1595 struct prologue_value addr;
1596 struct prologue_value value;
1597
1598 compute_x_addr (&addr, data->gpr, d2, x2, b2);
1599 s390_load (&addr, 8, &value, data);
1600
1601 pv_subtract (&data->gpr[r1], &data->gpr[r1], &value);
1602 }
1603
1604 /* NR r1, r2 --- logical and */
1605 else if (word_size == 4
1606 && is_rr (insn, op_nr, &r1, &r2))
1607 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1608
1609 /* NGR r1, r2 >--- logical and (64-bit version) */
1610 else if (word_size == 8
1611 && is_rre (insn, op_ngr, &r1, &r2))
1612 pv_logical_and (&data->gpr[r1], &data->gpr[r1], &data->gpr[r2]);
1613
1614 /* LA r1, d2(x2, b2) --- load address */
1615 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2))
1616 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1617
1618 /* LAY r1, d2(x2, b2) --- load address (long-displacement version) */
1619 else if (is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1620 compute_x_addr (&data->gpr[r1], data->gpr, d2, x2, b2);
1621
1622 /* LARL r1, i2 --- load address relative long */
1623 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1624 pv_set_to_constant (&data->gpr[r1], pc + i2 * 2);
1625
1626 /* BASR r1, 0 --- branch and save
1627 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1628 else if (is_rr (insn, op_basr, &r1, &r2)
1629 && r2 == 0)
1630 pv_set_to_constant (&data->gpr[r1], next_pc);
1631
1632 /* BRAS r1, i2 --- branch relative and save */
1633 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1634 {
1635 pv_set_to_constant (&data->gpr[r1], next_pc);
1636 next_pc = pc + i2 * 2;
4bc8c588 1637
a8c99f38
JB
1638 /* We'd better not interpret any backward branches. We'll
1639 never terminate. */
1640 if (next_pc <= pc)
4bc8c588
JB
1641 break;
1642 }
1643
a8c99f38
JB
1644 /* Terminate search when hitting any other branch instruction. */
1645 else if (is_rr (insn, op_basr, &r1, &r2)
1646 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1647 || is_rr (insn, op_bcr, &r1, &r2)
1648 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1649 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1650 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1651 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1652 break;
1653
4bc8c588
JB
1654 else
1655 /* An instruction we don't know how to simulate. The only
1656 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1657 to 'unknown'. Instead, we'll be optimistic: we assume that
1658 we *can* interpret every instruction that the compiler uses
1659 to manipulate any of the data we're interested in here --
1660 then we can just ignore anything else. */
1661 ;
4bc8c588
JB
1662
1663 /* Record the address after the last instruction that changed
1664 the FP, SP, or backlink. Ignore instructions that changed
1665 them back to their original values --- those are probably
1666 restore instructions. (The back chain is never restored,
1667 just popped.) */
1668 {
a8c99f38
JB
1669 struct prologue_value *sp = &data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1670 struct prologue_value *fp = &data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1671
1672 if ((! pv_is_identical (&pre_insn_sp, sp)
1673 && ! pv_is_register (sp, S390_SP_REGNUM, 0))
1674 || (! pv_is_identical (&pre_insn_fp, fp)
1675 && ! pv_is_register (fp, S390_FRAME_REGNUM, 0))
a8c99f38
JB
1676 || ! pv_is_identical (&pre_insn_back_chain, &data->back_chain))
1677 result = next_pc;
4bc8c588 1678 }
5769d3cd 1679 }
4bc8c588 1680
4bc8c588 1681 return result;
5769d3cd
AC
1682}
1683
a8c99f38
JB
1684/* Advance PC across any function entry prologue instructions to reach
1685 some "real" code. */
1686static CORE_ADDR
1687s390_skip_prologue (CORE_ADDR pc)
1688{
1689 struct s390_prologue_data data;
1690 CORE_ADDR skip_pc;
1691 skip_pc = s390_analyze_prologue (current_gdbarch, pc, (CORE_ADDR)-1, &data);
1692 return skip_pc ? skip_pc : pc;
1693}
1694
d0f54f9d
JB
1695/* Return true if we are in the functin's epilogue, i.e. after the
1696 instruction that destroyed the function's stack frame. */
1697static int
1698s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1699{
1700 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1701
1702 /* In frameless functions, there's not frame to destroy and thus
1703 we don't care about the epilogue.
1704
1705 In functions with frame, the epilogue sequence is a pair of
1706 a LM-type instruction that restores (amongst others) the
1707 return register %r14 and the stack pointer %r15, followed
1708 by a branch 'br %r14' --or equivalent-- that effects the
1709 actual return.
1710
1711 In that situation, this function needs to return 'true' in
1712 exactly one case: when pc points to that branch instruction.
1713
1714 Thus we try to disassemble the one instructions immediately
1715 preceeding pc and check whether it is an LM-type instruction
1716 modifying the stack pointer.
1717
1718 Note that disassembling backwards is not reliable, so there
1719 is a slight chance of false positives here ... */
1720
1721 bfd_byte insn[6];
1722 unsigned int r1, r3, b2;
1723 int d2;
1724
1725 if (word_size == 4
1726 && !read_memory_nobpt (pc - 4, insn, 4)
1727 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1728 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1729 return 1;
1730
a8c99f38
JB
1731 if (word_size == 4
1732 && !read_memory_nobpt (pc - 6, insn, 6)
1733 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1734 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1735 return 1;
1736
d0f54f9d
JB
1737 if (word_size == 8
1738 && !read_memory_nobpt (pc - 6, insn, 6)
a8c99f38 1739 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1740 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1741 return 1;
1742
1743 return 0;
1744}
5769d3cd 1745
a8c99f38
JB
1746
1747/* Normal stack frames. */
1748
1749struct s390_unwind_cache {
1750
1751 CORE_ADDR func;
1752 CORE_ADDR frame_base;
1753 CORE_ADDR local_base;
1754
1755 struct trad_frame_saved_reg *saved_regs;
1756};
1757
a78f21af 1758static int
a8c99f38
JB
1759s390_prologue_frame_unwind_cache (struct frame_info *next_frame,
1760 struct s390_unwind_cache *info)
5769d3cd 1761{
a8c99f38
JB
1762 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1763 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1764 struct s390_prologue_data data;
1765 struct prologue_value *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1766 struct prologue_value *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1767 int slot_num;
1768 CORE_ADDR slot_addr;
1769 CORE_ADDR func;
1770 CORE_ADDR result;
1771 ULONGEST reg;
1772 CORE_ADDR prev_sp;
1773 int frame_pointer;
1774 int size;
1775
1776 /* Try to find the function start address. If we can't find it, we don't
1777 bother searching for it -- with modern compilers this would be mostly
1778 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1779 or else a valid backchain ... */
1780 func = frame_func_unwind (next_frame);
1781 if (!func)
1782 return 0;
5769d3cd 1783
a8c99f38
JB
1784 /* Try to analyze the prologue. */
1785 result = s390_analyze_prologue (gdbarch, func,
1786 frame_pc_unwind (next_frame), &data);
1787 if (!result)
5769d3cd 1788 return 0;
5769d3cd 1789
a8c99f38
JB
1790 /* If this was successful, we should have found the instruction that
1791 sets the stack pointer register to the previous value of the stack
1792 pointer minus the frame size. */
1793 if (sp->kind != pv_register || sp->reg != S390_SP_REGNUM)
5769d3cd 1794 return 0;
a8c99f38
JB
1795
1796 /* A frame size of zero at this point can mean either a real
1797 frameless function, or else a failure to find the prologue.
1798 Perform some sanity checks to verify we really have a
1799 frameless function. */
1800 if (sp->k == 0)
5769d3cd 1801 {
a8c99f38
JB
1802 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1803 size zero. This is only possible if the next frame is a sentinel
1804 frame, a dummy frame, or a signal trampoline frame. */
1805 if (get_frame_type (next_frame) == NORMAL_FRAME
1806 /* For some reason, sentinel frames are NORMAL_FRAMEs
1807 -- but they have negative frame level. */
1808 && frame_relative_level (next_frame) >= 0)
5769d3cd 1809 return 0;
5769d3cd 1810
a8c99f38
JB
1811 /* If we really have a frameless function, %r14 must be valid
1812 -- in particular, it must point to a different function. */
1813 reg = frame_unwind_register_unsigned (next_frame, S390_RETADDR_REGNUM);
1814 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1815 if (get_pc_function_start (reg) == func)
5769d3cd 1816 {
a8c99f38
JB
1817 /* However, there is one case where it *is* valid for %r14
1818 to point to the same function -- if this is a recursive
1819 call, and we have stopped in the prologue *before* the
1820 stack frame was allocated.
1821
1822 Recognize this case by looking ahead a bit ... */
5769d3cd 1823
a8c99f38
JB
1824 struct s390_prologue_data data2;
1825 struct prologue_value *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1826
1827 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
1828 && sp->kind == pv_register
1829 && sp->reg == S390_SP_REGNUM
1830 && sp->k != 0))
1831 return 0;
5769d3cd 1832 }
5769d3cd 1833 }
5769d3cd
AC
1834
1835
a8c99f38
JB
1836 /* OK, we've found valid prologue data. */
1837 size = -sp->k;
5769d3cd 1838
a8c99f38
JB
1839 /* If the frame pointer originally also holds the same value
1840 as the stack pointer, we're probably using it. If it holds
1841 some other value -- even a constant offset -- it is most
1842 likely used as temp register. */
1843 if (pv_is_identical (sp, fp))
1844 frame_pointer = S390_FRAME_REGNUM;
1845 else
1846 frame_pointer = S390_SP_REGNUM;
1847
1848 /* If we've detected a function with stack frame, we'll still have to
1849 treat it as frameless if we're currently within the function epilog
1850 code at a point where the frame pointer has already been restored.
1851 This can only happen in an innermost frame. */
1852 if (size > 0
1853 && (get_frame_type (next_frame) != NORMAL_FRAME
1854 || frame_relative_level (next_frame) < 0))
5769d3cd 1855 {
a8c99f38
JB
1856 /* See the comment in s390_in_function_epilogue_p on why this is
1857 not completely reliable ... */
1858 if (s390_in_function_epilogue_p (gdbarch, frame_pc_unwind (next_frame)))
5769d3cd 1859 {
a8c99f38
JB
1860 memset (&data, 0, sizeof (data));
1861 size = 0;
1862 frame_pointer = S390_SP_REGNUM;
5769d3cd 1863 }
5769d3cd 1864 }
5769d3cd 1865
a8c99f38
JB
1866 /* Once we know the frame register and the frame size, we can unwind
1867 the current value of the frame register from the next frame, and
1868 add back the frame size to arrive that the previous frame's
1869 stack pointer value. */
1870 prev_sp = frame_unwind_register_unsigned (next_frame, frame_pointer) + size;
5769d3cd 1871
a8c99f38
JB
1872 /* Scan the spill array; if a spill slot says it holds the
1873 original value of some register, then record that slot's
1874 address as the place that register was saved. */
5769d3cd 1875
a8c99f38
JB
1876 /* Slots for %r2 .. %r15. */
1877 for (slot_num = 0, slot_addr = prev_sp + 2 * data.gpr_size;
1878 slot_num < 14;
1879 slot_num++, slot_addr += data.gpr_size)
5769d3cd 1880 {
a8c99f38
JB
1881 struct prologue_value *slot = &data.spill[slot_num];
1882
1883 if (slot->kind == pv_register
1884 && slot->k == 0)
1885 info->saved_regs[slot->reg].addr = slot_addr;
5769d3cd 1886 }
5769d3cd 1887
a8c99f38
JB
1888 /* Slots for %f0 .. %f6. */
1889 for (slot_num = 14, slot_addr = prev_sp + 16 * data.gpr_size;
1890 slot_num < S390_NUM_SPILL_SLOTS;
1891 slot_num++, slot_addr += data.fpr_size)
5769d3cd 1892 {
a8c99f38
JB
1893 struct prologue_value *slot = &data.spill[slot_num];
1894
1895 if (slot->kind == pv_register
1896 && slot->k == 0)
1897 info->saved_regs[slot->reg].addr = slot_addr;
1898 }
1899
1900 /* Function return will set PC to %r14. */
1901 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1902
1903 /* In frameless functions, we unwind simply by moving the return
1904 address to the PC. However, if we actually stored to the
1905 save area, use that -- we might only think the function frameless
1906 because we're in the middle of the prologue ... */
1907 if (size == 0
1908 && !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1909 {
1910 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1911 }
a8c99f38
JB
1912
1913 /* Another sanity check: unless this is a frameless function,
1914 we should have found spill slots for SP and PC.
1915 If not, we cannot unwind further -- this happens e.g. in
1916 libc's thread_start routine. */
1917 if (size > 0)
5769d3cd 1918 {
a8c99f38
JB
1919 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
1920 || !trad_frame_addr_p (info->saved_regs, S390_PC_REGNUM))
1921 prev_sp = -1;
5769d3cd 1922 }
a8c99f38
JB
1923
1924 /* We use the current value of the frame register as local_base,
1925 and the top of the register save area as frame_base. */
1926 if (prev_sp != -1)
1927 {
1928 info->frame_base = prev_sp + 16*word_size + 32;
1929 info->local_base = prev_sp - size;
1930 }
1931
1932 info->func = func;
1933 return 1;
5769d3cd
AC
1934}
1935
a78f21af 1936static void
a8c99f38
JB
1937s390_backchain_frame_unwind_cache (struct frame_info *next_frame,
1938 struct s390_unwind_cache *info)
5769d3cd 1939{
a8c99f38
JB
1940 struct gdbarch *gdbarch = get_frame_arch (next_frame);
1941 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1942 CORE_ADDR backchain;
1943 ULONGEST reg;
1944 LONGEST sp;
1945
1946 /* Get the backchain. */
1947 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
1948 backchain = read_memory_unsigned_integer (reg, word_size);
1949
1950 /* A zero backchain terminates the frame chain. As additional
1951 sanity check, let's verify that the spill slot for SP in the
1952 save area pointed to by the backchain in fact links back to
1953 the save area. */
1954 if (backchain != 0
1955 && safe_read_memory_integer (backchain + 15*word_size, word_size, &sp)
1956 && (CORE_ADDR)sp == backchain)
1957 {
1958 /* We don't know which registers were saved, but it will have
1959 to be at least %r14 and %r15. This will allow us to continue
1960 unwinding, but other prev-frame registers may be incorrect ... */
1961 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1962 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1963
1964 /* Function return will set PC to %r14. */
1965 info->saved_regs[S390_PC_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
1966
1967 /* We use the current value of the frame register as local_base,
1968 and the top of the register save area as frame_base. */
1969 info->frame_base = backchain + 16*word_size + 32;
1970 info->local_base = reg;
1971 }
1972
1973 info->func = frame_pc_unwind (next_frame);
5769d3cd
AC
1974}
1975
a8c99f38
JB
1976static struct s390_unwind_cache *
1977s390_frame_unwind_cache (struct frame_info *next_frame,
1978 void **this_prologue_cache)
1979{
1980 struct s390_unwind_cache *info;
1981 if (*this_prologue_cache)
1982 return *this_prologue_cache;
1983
1984 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1985 *this_prologue_cache = info;
1986 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
1987 info->func = -1;
1988 info->frame_base = -1;
1989 info->local_base = -1;
1990
1991 /* Try to use prologue analysis to fill the unwind cache.
1992 If this fails, fall back to reading the stack backchain. */
1993 if (!s390_prologue_frame_unwind_cache (next_frame, info))
1994 s390_backchain_frame_unwind_cache (next_frame, info);
1995
1996 return info;
1997}
5769d3cd 1998
a78f21af 1999static void
a8c99f38
JB
2000s390_frame_this_id (struct frame_info *next_frame,
2001 void **this_prologue_cache,
2002 struct frame_id *this_id)
5769d3cd 2003{
a8c99f38
JB
2004 struct s390_unwind_cache *info
2005 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
5769d3cd 2006
a8c99f38
JB
2007 if (info->frame_base == -1)
2008 return;
5769d3cd 2009
a8c99f38 2010 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2011}
2012
a8c99f38
JB
2013static void
2014s390_frame_prev_register (struct frame_info *next_frame,
2015 void **this_prologue_cache,
2016 int regnum, int *optimizedp,
2017 enum lval_type *lvalp, CORE_ADDR *addrp,
2018 int *realnump, void *bufferp)
2019{
2020 struct s390_unwind_cache *info
2021 = s390_frame_unwind_cache (next_frame, this_prologue_cache);
2022 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2023 optimizedp, lvalp, addrp, realnump, bufferp);
2024}
2025
2026static const struct frame_unwind s390_frame_unwind = {
2027 NORMAL_FRAME,
2028 s390_frame_this_id,
2029 s390_frame_prev_register
2030};
2031
2032static const struct frame_unwind *
2033s390_frame_sniffer (struct frame_info *next_frame)
2034{
2035 return &s390_frame_unwind;
2036}
5769d3cd
AC
2037
2038
a8c99f38
JB
2039/* PLT stub stack frames. */
2040
2041struct s390_pltstub_unwind_cache {
2042
2043 CORE_ADDR frame_base;
2044 struct trad_frame_saved_reg *saved_regs;
2045};
2046
2047static struct s390_pltstub_unwind_cache *
2048s390_pltstub_frame_unwind_cache (struct frame_info *next_frame,
2049 void **this_prologue_cache)
5769d3cd 2050{
a8c99f38
JB
2051 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2052 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2053 struct s390_pltstub_unwind_cache *info;
2054 ULONGEST reg;
5c3cf190 2055
a8c99f38
JB
2056 if (*this_prologue_cache)
2057 return *this_prologue_cache;
5c3cf190 2058
a8c99f38
JB
2059 info = FRAME_OBSTACK_ZALLOC (struct s390_pltstub_unwind_cache);
2060 *this_prologue_cache = info;
2061 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2062
2063 /* The return address is in register %r14. */
2064 info->saved_regs[S390_PC_REGNUM].realreg = S390_RETADDR_REGNUM;
2065
2066 /* Retrieve stack pointer and determine our frame base. */
2067 reg = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2068 info->frame_base = reg + 16*word_size + 32;
2069
2070 return info;
5769d3cd
AC
2071}
2072
a8c99f38
JB
2073static void
2074s390_pltstub_frame_this_id (struct frame_info *next_frame,
2075 void **this_prologue_cache,
2076 struct frame_id *this_id)
5769d3cd 2077{
a8c99f38
JB
2078 struct s390_pltstub_unwind_cache *info
2079 = s390_pltstub_frame_unwind_cache (next_frame, this_prologue_cache);
2080 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
2081}
5769d3cd 2082
a8c99f38
JB
2083static void
2084s390_pltstub_frame_prev_register (struct frame_info *next_frame,
2085 void **this_prologue_cache,
2086 int regnum, int *optimizedp,
2087 enum lval_type *lvalp, CORE_ADDR *addrp,
2088 int *realnump, void *bufferp)
2089{
2090 struct s390_pltstub_unwind_cache *info
2091 = s390_pltstub_frame_unwind_cache (next_frame, this_prologue_cache);
2092 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2093 optimizedp, lvalp, addrp, realnump, bufferp);
2094}
2095
2096static const struct frame_unwind s390_pltstub_frame_unwind = {
2097 NORMAL_FRAME,
2098 s390_pltstub_frame_this_id,
2099 s390_pltstub_frame_prev_register
2100};
5769d3cd 2101
a8c99f38
JB
2102static const struct frame_unwind *
2103s390_pltstub_frame_sniffer (struct frame_info *next_frame)
2104{
2105 if (!in_plt_section (frame_pc_unwind (next_frame), NULL))
2106 return NULL;
5769d3cd 2107
a8c99f38
JB
2108 return &s390_pltstub_frame_unwind;
2109}
5769d3cd
AC
2110
2111
a8c99f38 2112/* Signal trampoline stack frames. */
5769d3cd 2113
a8c99f38
JB
2114struct s390_sigtramp_unwind_cache {
2115 CORE_ADDR frame_base;
2116 struct trad_frame_saved_reg *saved_regs;
2117};
5769d3cd 2118
a8c99f38
JB
2119static struct s390_sigtramp_unwind_cache *
2120s390_sigtramp_frame_unwind_cache (struct frame_info *next_frame,
2121 void **this_prologue_cache)
5769d3cd 2122{
a8c99f38
JB
2123 struct gdbarch *gdbarch = get_frame_arch (next_frame);
2124 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2125 struct s390_sigtramp_unwind_cache *info;
2126 ULONGEST this_sp, prev_sp;
2127 CORE_ADDR next_ra, next_cfa, sigreg_ptr;
2128 int i;
2129
2130 if (*this_prologue_cache)
2131 return *this_prologue_cache;
5769d3cd 2132
a8c99f38
JB
2133 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2134 *this_prologue_cache = info;
2135 info->saved_regs = trad_frame_alloc_saved_regs (next_frame);
2136
2137 this_sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2138 next_ra = frame_pc_unwind (next_frame);
2139 next_cfa = this_sp + 16*word_size + 32;
2140
2141 /* New-style RT frame:
2142 retcode + alignment (8 bytes)
2143 siginfo (128 bytes)
2144 ucontext (contains sigregs at offset 5 words) */
2145 if (next_ra == next_cfa)
2146 {
2147 sigreg_ptr = next_cfa + 8 + 128 + 5*word_size;
2148 }
2149
2150 /* Old-style RT frame and all non-RT frames:
2151 old signal mask (8 bytes)
2152 pointer to sigregs */
5769d3cd
AC
2153 else
2154 {
a8c99f38
JB
2155 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, word_size);
2156 }
5769d3cd 2157
a8c99f38
JB
2158 /* The sigregs structure looks like this:
2159 long psw_mask;
2160 long psw_addr;
2161 long gprs[16];
2162 int acrs[16];
2163 int fpc;
2164 int __pad;
2165 double fprs[16]; */
5769d3cd 2166
a8c99f38
JB
2167 /* Let's ignore the PSW mask, it will not be restored anyway. */
2168 sigreg_ptr += word_size;
2169
2170 /* Next comes the PSW address. */
2171 info->saved_regs[S390_PC_REGNUM].addr = sigreg_ptr;
2172 sigreg_ptr += word_size;
2173
2174 /* Then the GPRs. */
2175 for (i = 0; i < 16; i++)
2176 {
2177 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2178 sigreg_ptr += word_size;
2179 }
2180
2181 /* Then the ACRs. */
2182 for (i = 0; i < 16; i++)
2183 {
2184 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2185 sigreg_ptr += 4;
5769d3cd 2186 }
5769d3cd 2187
a8c99f38
JB
2188 /* The floating-point control word. */
2189 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2190 sigreg_ptr += 8;
5769d3cd 2191
a8c99f38
JB
2192 /* And finally the FPRs. */
2193 for (i = 0; i < 16; i++)
2194 {
2195 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2196 sigreg_ptr += 8;
2197 }
2198
2199 /* Restore the previous frame's SP. */
2200 prev_sp = read_memory_unsigned_integer (
2201 info->saved_regs[S390_SP_REGNUM].addr,
2202 word_size);
5769d3cd 2203
a8c99f38
JB
2204 /* Determine our frame base. */
2205 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2206
a8c99f38 2207 return info;
5769d3cd
AC
2208}
2209
a8c99f38
JB
2210static void
2211s390_sigtramp_frame_this_id (struct frame_info *next_frame,
2212 void **this_prologue_cache,
2213 struct frame_id *this_id)
5769d3cd 2214{
a8c99f38
JB
2215 struct s390_sigtramp_unwind_cache *info
2216 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2217 *this_id = frame_id_build (info->frame_base, frame_pc_unwind (next_frame));
5769d3cd
AC
2218}
2219
4c8287ac 2220static void
a8c99f38
JB
2221s390_sigtramp_frame_prev_register (struct frame_info *next_frame,
2222 void **this_prologue_cache,
2223 int regnum, int *optimizedp,
2224 enum lval_type *lvalp, CORE_ADDR *addrp,
2225 int *realnump, void *bufferp)
2226{
2227 struct s390_sigtramp_unwind_cache *info
2228 = s390_sigtramp_frame_unwind_cache (next_frame, this_prologue_cache);
2229 trad_frame_prev_register (next_frame, info->saved_regs, regnum,
2230 optimizedp, lvalp, addrp, realnump, bufferp);
2231}
2232
2233static const struct frame_unwind s390_sigtramp_frame_unwind = {
2234 SIGTRAMP_FRAME,
2235 s390_sigtramp_frame_this_id,
2236 s390_sigtramp_frame_prev_register
2237};
2238
2239static const struct frame_unwind *
2240s390_sigtramp_frame_sniffer (struct frame_info *next_frame)
5769d3cd 2241{
a8c99f38
JB
2242 CORE_ADDR pc = frame_pc_unwind (next_frame);
2243 bfd_byte sigreturn[2];
4c8287ac 2244
a8c99f38
JB
2245 if (read_memory_nobpt (pc, sigreturn, 2))
2246 return NULL;
4c8287ac 2247
a8c99f38
JB
2248 if (sigreturn[0] != 0x0a /* svc */)
2249 return NULL;
5769d3cd 2250
a8c99f38
JB
2251 if (sigreturn[1] != 119 /* sigreturn */
2252 && sigreturn[1] != 173 /* rt_sigreturn */)
2253 return NULL;
2254
2255 return &s390_sigtramp_frame_unwind;
5769d3cd
AC
2256}
2257
4c8287ac 2258
a8c99f38
JB
2259/* Frame base handling. */
2260
2261static CORE_ADDR
2262s390_frame_base_address (struct frame_info *next_frame, void **this_cache)
4c8287ac 2263{
a8c99f38
JB
2264 struct s390_unwind_cache *info
2265 = s390_frame_unwind_cache (next_frame, this_cache);
2266 return info->frame_base;
2267}
2268
2269static CORE_ADDR
2270s390_local_base_address (struct frame_info *next_frame, void **this_cache)
2271{
2272 struct s390_unwind_cache *info
2273 = s390_frame_unwind_cache (next_frame, this_cache);
2274 return info->local_base;
2275}
2276
2277static const struct frame_base s390_frame_base = {
2278 &s390_frame_unwind,
2279 s390_frame_base_address,
2280 s390_local_base_address,
2281 s390_local_base_address
2282};
2283
2284static CORE_ADDR
2285s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2286{
2287 ULONGEST pc;
2288 pc = frame_unwind_register_unsigned (next_frame, S390_PC_REGNUM);
2289 return gdbarch_addr_bits_remove (gdbarch, pc);
2290}
2291
2292static CORE_ADDR
2293s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2294{
2295 ULONGEST sp;
2296 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2297 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2298}
2299
2300
b0cf273e
JB
2301/* Dummy function calls. */
2302
78f8b424
JB
2303/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2304 "Integer-like" types are those that should be passed the way
2305 integers are: integers, enums, ranges, characters, and booleans. */
2306static int
2307is_integer_like (struct type *type)
2308{
2309 enum type_code code = TYPE_CODE (type);
2310
2311 return (code == TYPE_CODE_INT
2312 || code == TYPE_CODE_ENUM
2313 || code == TYPE_CODE_RANGE
2314 || code == TYPE_CODE_CHAR
2315 || code == TYPE_CODE_BOOL);
2316}
2317
78f8b424
JB
2318/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2319 "Pointer-like" types are those that should be passed the way
2320 pointers are: pointers and references. */
2321static int
2322is_pointer_like (struct type *type)
2323{
2324 enum type_code code = TYPE_CODE (type);
2325
2326 return (code == TYPE_CODE_PTR
2327 || code == TYPE_CODE_REF);
2328}
2329
2330
20a940cc
JB
2331/* Return non-zero if TYPE is a `float singleton' or `double
2332 singleton', zero otherwise.
2333
2334 A `T singleton' is a struct type with one member, whose type is
2335 either T or a `T singleton'. So, the following are all float
2336 singletons:
2337
2338 struct { float x };
2339 struct { struct { float x; } x; };
2340 struct { struct { struct { float x; } x; } x; };
2341
2342 ... and so on.
2343
b0cf273e
JB
2344 All such structures are passed as if they were floats or doubles,
2345 as the (revised) ABI says. */
20a940cc
JB
2346static int
2347is_float_singleton (struct type *type)
2348{
b0cf273e
JB
2349 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2350 {
2351 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2352 CHECK_TYPEDEF (singleton_type);
2353
2354 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
2355 || is_float_singleton (singleton_type));
2356 }
2357
2358 return 0;
20a940cc
JB
2359}
2360
2361
2362/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2363 "Struct-like" types are those that should be passed as structs are:
2364 structs and unions.
2365
2366 As an odd quirk, not mentioned in the ABI, GCC passes float and
2367 double singletons as if they were a plain float, double, etc. (The
2368 corresponding union types are handled normally.) So we exclude
2369 those types here. *shrug* */
2370static int
2371is_struct_like (struct type *type)
2372{
2373 enum type_code code = TYPE_CODE (type);
2374
2375 return (code == TYPE_CODE_UNION
2376 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2377}
2378
2379
2380/* Return non-zero if TYPE is a float-like type, zero otherwise.
2381 "Float-like" types are those that should be passed as
2382 floating-point values are.
2383
2384 You'd think this would just be floats, doubles, long doubles, etc.
2385 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2386 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2387 corresponding union types are handled normally.) So we include
20a940cc
JB
2388 those types here. *shrug* */
2389static int
2390is_float_like (struct type *type)
2391{
2392 return (TYPE_CODE (type) == TYPE_CODE_FLT
2393 || is_float_singleton (type));
2394}
2395
2396
78f8b424 2397static int
b0cf273e 2398is_power_of_two (unsigned int n)
78f8b424 2399{
b0cf273e 2400 return ((n & (n - 1)) == 0);
78f8b424
JB
2401}
2402
b0cf273e
JB
2403/* Return non-zero if TYPE should be passed as a pointer to a copy,
2404 zero otherwise. */
4d819d0e 2405static int
b0cf273e 2406s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
2407{
2408 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2409 if (length > 8)
2410 return 1;
4d819d0e 2411
b0cf273e
JB
2412 /* FIXME: All complex and vector types are also returned by reference. */
2413 return is_struct_like (type) && !is_power_of_two (length);
4d819d0e
JB
2414}
2415
b0cf273e
JB
2416/* Return non-zero if TYPE should be passed in a float register
2417 if possible. */
78f8b424 2418static int
b0cf273e 2419s390_function_arg_float (struct type *type)
78f8b424 2420{
78f8b424 2421 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2422 if (length > 8)
2423 return 0;
78f8b424 2424
b0cf273e 2425 return is_float_like (type);
4d819d0e
JB
2426}
2427
b0cf273e
JB
2428/* Return non-zero if TYPE should be passed in an integer register
2429 (or a pair of integer registers) if possible. */
78f8b424 2430static int
b0cf273e 2431s390_function_arg_integer (struct type *type)
78f8b424 2432{
78f8b424 2433 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2434 if (length > 8)
2435 return 0;
78f8b424 2436
b0cf273e
JB
2437 return is_integer_like (type)
2438 || is_pointer_like (type)
2439 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
2440}
2441
78f8b424
JB
2442/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2443 word as required for the ABI. */
2444static LONGEST
2445extend_simple_arg (struct value *arg)
2446{
2447 struct type *type = VALUE_TYPE (arg);
2448
2449 /* Even structs get passed in the least significant bits of the
2450 register / memory word. It's not really right to extract them as
2451 an integer, but it does take care of the extension. */
2452 if (TYPE_UNSIGNED (type))
2453 return extract_unsigned_integer (VALUE_CONTENTS (arg),
2454 TYPE_LENGTH (type));
2455 else
2456 return extract_signed_integer (VALUE_CONTENTS (arg),
2457 TYPE_LENGTH (type));
2458}
2459
2460
78f8b424
JB
2461/* Return the alignment required by TYPE. */
2462static int
2463alignment_of (struct type *type)
2464{
2465 int alignment;
2466
2467 if (is_integer_like (type)
2468 || is_pointer_like (type)
2469 || TYPE_CODE (type) == TYPE_CODE_FLT)
2470 alignment = TYPE_LENGTH (type);
2471 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2472 || TYPE_CODE (type) == TYPE_CODE_UNION)
2473 {
2474 int i;
2475
2476 alignment = 1;
2477 for (i = 0; i < TYPE_NFIELDS (type); i++)
2478 {
2479 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2480
2481 if (field_alignment > alignment)
2482 alignment = field_alignment;
2483 }
2484 }
2485 else
2486 alignment = 1;
2487
2488 /* Check that everything we ever return is a power of two. Lots of
2489 code doesn't want to deal with aligning things to arbitrary
2490 boundaries. */
2491 gdb_assert ((alignment & (alignment - 1)) == 0);
2492
2493 return alignment;
2494}
2495
2496
2497/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2498 place to be passed to a function, as specified by the "GNU/Linux
2499 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2500
2501 SP is the current stack pointer. We must put arguments, links,
2502 padding, etc. whereever they belong, and return the new stack
2503 pointer value.
2504
2505 If STRUCT_RETURN is non-zero, then the function we're calling is
2506 going to return a structure by value; STRUCT_ADDR is the address of
2507 a block we've allocated for it on the stack.
2508
2509 Our caller has taken care of any type promotions needed to satisfy
2510 prototypes or the old K&R argument-passing rules. */
a78f21af 2511static CORE_ADDR
b0cf273e
JB
2512s390_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
2513 struct regcache *regcache, CORE_ADDR bp_addr,
2514 int nargs, struct value **args, CORE_ADDR sp,
2515 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2516{
b0cf273e
JB
2517 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2518 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2519 ULONGEST orig_sp;
78f8b424 2520 int i;
5769d3cd 2521
78f8b424
JB
2522 /* If the i'th argument is passed as a reference to a copy, then
2523 copy_addr[i] is the address of the copy we made. */
2524 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2525
78f8b424 2526 /* Build the reference-to-copy area. */
78f8b424
JB
2527 for (i = 0; i < nargs; i++)
2528 {
2529 struct value *arg = args[i];
2530 struct type *type = VALUE_TYPE (arg);
2531 unsigned length = TYPE_LENGTH (type);
5769d3cd 2532
b0cf273e 2533 if (s390_function_arg_pass_by_reference (type))
01c464e9 2534 {
78f8b424 2535 sp -= length;
5b03f266 2536 sp = align_down (sp, alignment_of (type));
78f8b424
JB
2537 write_memory (sp, VALUE_CONTENTS (arg), length);
2538 copy_addr[i] = sp;
01c464e9 2539 }
5769d3cd 2540 }
5769d3cd 2541
78f8b424
JB
2542 /* Reserve space for the parameter area. As a conservative
2543 simplification, we assume that everything will be passed on the
b0cf273e
JB
2544 stack. Since every argument larger than 8 bytes will be
2545 passed by reference, we use this simple upper bound. */
2546 sp -= nargs * 8;
78f8b424 2547
78f8b424
JB
2548 /* After all that, make sure it's still aligned on an eight-byte
2549 boundary. */
5b03f266 2550 sp = align_down (sp, 8);
78f8b424
JB
2551
2552 /* Finally, place the actual parameters, working from SP towards
2553 higher addresses. The code above is supposed to reserve enough
2554 space for this. */
2555 {
2556 int fr = 0;
2557 int gr = 2;
2558 CORE_ADDR starg = sp;
2559
b0cf273e 2560 /* A struct is returned using general register 2. */
4d819d0e 2561 if (struct_return)
b0cf273e
JB
2562 {
2563 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2564 struct_addr);
2565 gr++;
2566 }
4d819d0e 2567
78f8b424
JB
2568 for (i = 0; i < nargs; i++)
2569 {
2570 struct value *arg = args[i];
2571 struct type *type = VALUE_TYPE (arg);
b0cf273e
JB
2572 unsigned length = TYPE_LENGTH (type);
2573
2574 if (s390_function_arg_pass_by_reference (type))
2575 {
2576 if (gr <= 6)
2577 {
2578 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2579 copy_addr[i]);
2580 gr++;
2581 }
2582 else
2583 {
2584 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2585 starg += word_size;
2586 }
2587 }
2588 else if (s390_function_arg_float (type))
2589 {
2590 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2591 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2592 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2593 {
2594 /* When we store a single-precision value in an FP register,
2595 it occupies the leftmost bits. */
2596 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2597 0, length, VALUE_CONTENTS (arg));
2598 fr += 2;
2599 }
2600 else
2601 {
2602 /* When we store a single-precision value in a stack slot,
2603 it occupies the rightmost bits. */
2604 starg = align_up (starg + length, word_size);
2605 write_memory (starg - length, VALUE_CONTENTS (arg), length);
2606 }
2607 }
2608 else if (s390_function_arg_integer (type) && length <= word_size)
2609 {
2610 if (gr <= 6)
2611 {
2612 /* Integer arguments are always extended to word size. */
2613 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2614 extend_simple_arg (arg));
2615 gr++;
2616 }
2617 else
2618 {
2619 /* Integer arguments are always extended to word size. */
2620 write_memory_signed_integer (starg, word_size,
2621 extend_simple_arg (arg));
2622 starg += word_size;
2623 }
2624 }
2625 else if (s390_function_arg_integer (type) && length == 2*word_size)
2626 {
2627 if (gr <= 5)
2628 {
2629 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2630 VALUE_CONTENTS (arg));
2631 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2632 VALUE_CONTENTS (arg) + word_size);
2633 gr += 2;
2634 }
2635 else
2636 {
2637 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2638 in it, then don't go back and use it again later. */
2639 gr = 7;
2640
2641 write_memory (starg, VALUE_CONTENTS (arg), length);
2642 starg += length;
2643 }
2644 }
2645 else
2646 internal_error (__FILE__, __LINE__, "unknown argument type");
78f8b424
JB
2647 }
2648 }
2649
2650 /* Allocate the standard frame areas: the register save area, the
2651 word reserved for the compiler (which seems kind of meaningless),
2652 and the back chain pointer. */
b0cf273e 2653 sp -= 16*word_size + 32;
78f8b424
JB
2654
2655 /* Write the back chain pointer into the first word of the stack
b0cf273e
JB
2656 frame. This is needed to unwind across a dummy frame. */
2657 regcache_cooked_read_unsigned (regcache, S390_SP_REGNUM, &orig_sp);
2658 write_memory_unsigned_integer (sp, word_size, orig_sp);
2659
2660 /* Store return address. */
2661 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2662
2663 /* Store updated stack pointer. */
2664 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2665
a8c99f38
JB
2666 /* We need to return the 'stack part' of the frame ID,
2667 which is actually the top of the register save area
2668 allocated on the original stack. */
2669 return orig_sp + 16*word_size + 32;
5769d3cd
AC
2670}
2671
b0cf273e
JB
2672/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
2673 dummy frame. The frame ID's base needs to match the TOS value
2674 returned by push_dummy_call, and the PC match the dummy frame's
2675 breakpoint. */
2676static struct frame_id
2677s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2678{
a8c99f38
JB
2679 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2680 CORE_ADDR this_sp = s390_unwind_sp (gdbarch, next_frame);
2681 CORE_ADDR prev_sp = read_memory_unsigned_integer (this_sp, word_size);
2682
2683 return frame_id_build (prev_sp + 16*word_size + 32,
2684 frame_pc_unwind (next_frame));
b0cf273e 2685}
c8f9d51c 2686
4074e13c
JB
2687static CORE_ADDR
2688s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2689{
2690 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2691 always be aligned on an eight-byte boundary. */
2692 return (addr & -8);
2693}
2694
2695
b0cf273e
JB
2696/* Function return value access. */
2697
2698static enum return_value_convention
2699s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2700{
b0cf273e
JB
2701 int length = TYPE_LENGTH (type);
2702 if (length > 8)
2703 return RETURN_VALUE_STRUCT_CONVENTION;
2704
2705 switch (TYPE_CODE (type))
2706 {
2707 case TYPE_CODE_STRUCT:
2708 case TYPE_CODE_UNION:
2709 case TYPE_CODE_ARRAY:
2710 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2711
b0cf273e
JB
2712 default:
2713 return RETURN_VALUE_REGISTER_CONVENTION;
2714 }
c8f9d51c
JB
2715}
2716
b0cf273e
JB
2717static enum return_value_convention
2718s390_return_value (struct gdbarch *gdbarch, struct type *type,
2719 struct regcache *regcache, void *out, const void *in)
5769d3cd 2720{
b0cf273e
JB
2721 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2722 int length = TYPE_LENGTH (type);
2723 enum return_value_convention rvc =
2724 s390_return_value_convention (gdbarch, type);
2725 if (in)
2726 {
2727 switch (rvc)
2728 {
2729 case RETURN_VALUE_REGISTER_CONVENTION:
2730 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2731 {
2732 /* When we store a single-precision value in an FP register,
2733 it occupies the leftmost bits. */
2734 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2735 0, length, in);
2736 }
2737 else if (length <= word_size)
2738 {
2739 /* Integer arguments are always extended to word size. */
2740 if (TYPE_UNSIGNED (type))
2741 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2742 extract_unsigned_integer (in, length));
2743 else
2744 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2745 extract_signed_integer (in, length));
2746 }
2747 else if (length == 2*word_size)
2748 {
2749 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2750 regcache_cooked_write (regcache, S390_R3_REGNUM,
2751 (const char *)in + word_size);
2752 }
2753 else
2754 internal_error (__FILE__, __LINE__, "invalid return type");
2755 break;
2756
2757 case RETURN_VALUE_STRUCT_CONVENTION:
2758 error ("Cannot set function return value.");
2759 break;
2760 }
2761 }
2762 else if (out)
2763 {
2764 switch (rvc)
2765 {
2766 case RETURN_VALUE_REGISTER_CONVENTION:
2767 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2768 {
2769 /* When we store a single-precision value in an FP register,
2770 it occupies the leftmost bits. */
2771 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2772 0, length, out);
2773 }
2774 else if (length <= word_size)
2775 {
2776 /* Integer arguments occupy the rightmost bits. */
2777 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2778 word_size - length, length, out);
2779 }
2780 else if (length == 2*word_size)
2781 {
2782 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2783 regcache_cooked_read (regcache, S390_R3_REGNUM,
2784 (char *)out + word_size);
2785 }
2786 else
2787 internal_error (__FILE__, __LINE__, "invalid return type");
2788 break;
5769d3cd 2789
b0cf273e
JB
2790 case RETURN_VALUE_STRUCT_CONVENTION:
2791 error ("Function return value unknown.");
2792 break;
2793 }
2794 }
2795
2796 return rvc;
2797}
5769d3cd
AC
2798
2799
a8c99f38
JB
2800/* Breakpoints. */
2801
a78f21af 2802static const unsigned char *
5769d3cd
AC
2803s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
2804{
2805 static unsigned char breakpoint[] = { 0x0, 0x1 };
2806
2807 *lenptr = sizeof (breakpoint);
2808 return breakpoint;
2809}
2810
5769d3cd 2811
a8c99f38 2812/* Address handling. */
5769d3cd
AC
2813
2814static CORE_ADDR
2815s390_addr_bits_remove (CORE_ADDR addr)
2816{
a8c99f38 2817 return addr & 0x7fffffff;
5769d3cd
AC
2818}
2819
ffc65945
KB
2820static int
2821s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2822{
2823 if (byte_size == 4)
2824 return TYPE_FLAG_ADDRESS_CLASS_1;
2825 else
2826 return 0;
2827}
2828
2829static const char *
2830s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2831{
2832 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1)
2833 return "mode32";
2834 else
2835 return NULL;
2836}
2837
a78f21af 2838static int
ffc65945
KB
2839s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2840 int *type_flags_ptr)
2841{
2842 if (strcmp (name, "mode32") == 0)
2843 {
2844 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1;
2845 return 1;
2846 }
2847 else
2848 return 0;
2849}
2850
a8c99f38 2851
9cbd5950
JB
2852/* Link map offsets. */
2853
2854static struct link_map_offsets *
2855s390_svr4_fetch_link_map_offsets (void)
2856{
2857 static struct link_map_offsets lmo;
2858 static struct link_map_offsets *lmp = NULL;
2859
2860 if (lmp == NULL)
2861 {
2862 lmp = &lmo;
2863
2864 lmo.r_debug_size = 8;
2865
2866 lmo.r_map_offset = 4;
2867 lmo.r_map_size = 4;
2868
2869 lmo.link_map_size = 20;
2870
2871 lmo.l_addr_offset = 0;
2872 lmo.l_addr_size = 4;
2873
2874 lmo.l_name_offset = 4;
2875 lmo.l_name_size = 4;
2876
2877 lmo.l_next_offset = 12;
2878 lmo.l_next_size = 4;
2879
2880 lmo.l_prev_offset = 16;
2881 lmo.l_prev_size = 4;
2882 }
2883
2884 return lmp;
2885}
2886
2887static struct link_map_offsets *
2888s390x_svr4_fetch_link_map_offsets (void)
2889{
2890 static struct link_map_offsets lmo;
2891 static struct link_map_offsets *lmp = NULL;
2892
2893 if (lmp == NULL)
2894 {
2895 lmp = &lmo;
2896
2897 lmo.r_debug_size = 16; /* All we need. */
2898
2899 lmo.r_map_offset = 8;
2900 lmo.r_map_size = 8;
2901
2902 lmo.link_map_size = 40; /* All we need. */
2903
2904 lmo.l_addr_offset = 0;
2905 lmo.l_addr_size = 8;
2906
2907 lmo.l_name_offset = 8;
2908 lmo.l_name_size = 8;
2909
2910 lmo.l_next_offset = 24;
2911 lmo.l_next_size = 8;
2912
2913 lmo.l_prev_offset = 32;
2914 lmo.l_prev_size = 8;
2915 }
2916
2917 return lmp;
2918}
2919
2920
a8c99f38
JB
2921/* Set up gdbarch struct. */
2922
a78f21af 2923static struct gdbarch *
5769d3cd
AC
2924s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2925{
5769d3cd
AC
2926 struct gdbarch *gdbarch;
2927 struct gdbarch_tdep *tdep;
5769d3cd
AC
2928
2929 /* First see if there is already a gdbarch that can satisfy the request. */
2930 arches = gdbarch_list_lookup_by_info (arches, &info);
2931 if (arches != NULL)
2932 return arches->gdbarch;
2933
2934 /* None found: is the request for a s390 architecture? */
2935 if (info.bfd_arch_info->arch != bfd_arch_s390)
2936 return NULL; /* No; then it's not for us. */
2937
2938 /* Yes: create a new gdbarch for the specified machine type. */
d0f54f9d
JB
2939 tdep = XCALLOC (1, struct gdbarch_tdep);
2940 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
2941
2942 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 2943 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 2944
aaab4dba
AC
2945 /* Amount PC must be decremented by after a breakpoint. This is
2946 often the number of bytes returned by BREAKPOINT_FROM_PC but not
2947 always. */
5769d3cd 2948 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
2949 /* Stack grows downward. */
2950 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
2951 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2952 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 2953 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 2954
5769d3cd
AC
2955 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
2956 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 2957 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
5769d3cd 2958 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
d0f54f9d 2959 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
5769d3cd 2960 set_gdbarch_register_name (gdbarch, s390_register_name);
d0f54f9d
JB
2961 set_gdbarch_register_type (gdbarch, s390_register_type);
2962 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2963 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2964 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2965 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p);
2966 set_gdbarch_register_to_value (gdbarch, s390_register_to_value);
2967 set_gdbarch_value_to_register (gdbarch, s390_value_to_register);
2968 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
2969 set_gdbarch_regset_from_core_section (gdbarch,
2970 s390_regset_from_core_section);
5769d3cd 2971
b0cf273e
JB
2972 /* Inferior function calls. */
2973 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
2974 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id);
4074e13c 2975 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 2976 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 2977
a8c99f38
JB
2978 /* Frame handling. */
2979 set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
2980 frame_unwind_append_sniffer (gdbarch, s390_pltstub_frame_sniffer);
2981 frame_unwind_append_sniffer (gdbarch, s390_sigtramp_frame_sniffer);
2982 frame_unwind_append_sniffer (gdbarch, s390_frame_sniffer);
2983 frame_base_set_default (gdbarch, &s390_frame_base);
2984 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
2985 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
2986
5769d3cd
AC
2987 switch (info.bfd_arch_info->mach)
2988 {
b8b8b047 2989 case bfd_mach_s390_31:
b0cf273e
JB
2990 tdep->abi = ABI_LINUX_S390;
2991
d0f54f9d
JB
2992 tdep->gregset = &s390_gregset;
2993 tdep->sizeof_gregset = s390_sizeof_gregset;
2994 tdep->fpregset = &s390_fpregset;
2995 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2996
2997 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
d0f54f9d
JB
2998 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2999 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
9cbd5950
JB
3000 set_solib_svr4_fetch_link_map_offsets (gdbarch,
3001 s390_svr4_fetch_link_map_offsets);
3002
5769d3cd 3003 break;
b8b8b047 3004 case bfd_mach_s390_64:
b0cf273e
JB
3005 tdep->abi = ABI_LINUX_ZSERIES;
3006
d0f54f9d
JB
3007 tdep->gregset = &s390x_gregset;
3008 tdep->sizeof_gregset = s390x_sizeof_gregset;
3009 tdep->fpregset = &s390_fpregset;
3010 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3011
3012 set_gdbarch_long_bit (gdbarch, 64);
3013 set_gdbarch_long_long_bit (gdbarch, 64);
3014 set_gdbarch_ptr_bit (gdbarch, 64);
d0f54f9d
JB
3015 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
3016 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
9cbd5950
JB
3017 set_solib_svr4_fetch_link_map_offsets (gdbarch,
3018 s390x_svr4_fetch_link_map_offsets);
ffc65945
KB
3019 set_gdbarch_address_class_type_flags (gdbarch,
3020 s390_address_class_type_flags);
3021 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3022 s390_address_class_type_flags_to_name);
3023 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3024 s390_address_class_name_to_type_flags);
5769d3cd
AC
3025 break;
3026 }
3027
36482093
AC
3028 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3029
5769d3cd
AC
3030 return gdbarch;
3031}
3032
3033
3034
a78f21af
AC
3035extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3036
5769d3cd 3037void
5ae5f592 3038_initialize_s390_tdep (void)
5769d3cd
AC
3039{
3040
3041 /* Hook us into the gdbarch mechanism. */
3042 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
5769d3cd 3043}
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