Commit | Line | Data |
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5769d3cd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ca557f44 | 2 | |
7b6bb8da JB |
3 | Copyright (C) 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, |
4 | 2011 Free Software Foundation, Inc. | |
ca557f44 | 5 | |
5769d3cd AC |
6 | Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) |
7 | for IBM Deutschland Entwicklung GmbH, IBM Corporation. | |
8 | ||
9 | This file is part of GDB. | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 13 | the Free Software Foundation; either version 3 of the License, or |
5769d3cd AC |
14 | (at your option) any later version. |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 22 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
5769d3cd | 23 | |
d0f54f9d | 24 | #include "defs.h" |
5769d3cd AC |
25 | #include "arch-utils.h" |
26 | #include "frame.h" | |
27 | #include "inferior.h" | |
28 | #include "symtab.h" | |
29 | #include "target.h" | |
30 | #include "gdbcore.h" | |
31 | #include "gdbcmd.h" | |
5769d3cd | 32 | #include "objfiles.h" |
5769d3cd AC |
33 | #include "floatformat.h" |
34 | #include "regcache.h" | |
a8c99f38 JB |
35 | #include "trad-frame.h" |
36 | #include "frame-base.h" | |
37 | #include "frame-unwind.h" | |
a431654a | 38 | #include "dwarf2-frame.h" |
d0f54f9d JB |
39 | #include "reggroups.h" |
40 | #include "regset.h" | |
fd0407d6 | 41 | #include "value.h" |
78f8b424 | 42 | #include "gdb_assert.h" |
a89aa300 | 43 | #include "dis-asm.h" |
76a9d10f | 44 | #include "solib-svr4.h" |
3fc46200 | 45 | #include "prologue-value.h" |
70728992 | 46 | #include "linux-tdep.h" |
d0f54f9d | 47 | #include "s390-tdep.h" |
5769d3cd | 48 | |
7803799a UW |
49 | #include "features/s390-linux32.c" |
50 | #include "features/s390-linux64.c" | |
51 | #include "features/s390x-linux64.c" | |
52 | ||
60e6cc42 | 53 | |
d0f54f9d JB |
54 | /* The tdep structure. */ |
55 | ||
56 | struct gdbarch_tdep | |
5769d3cd | 57 | { |
b0cf273e JB |
58 | /* ABI version. */ |
59 | enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; | |
60 | ||
7803799a UW |
61 | /* Pseudo register numbers. */ |
62 | int gpr_full_regnum; | |
63 | int pc_regnum; | |
64 | int cc_regnum; | |
65 | ||
d0f54f9d JB |
66 | /* Core file register sets. */ |
67 | const struct regset *gregset; | |
68 | int sizeof_gregset; | |
69 | ||
70 | const struct regset *fpregset; | |
71 | int sizeof_fpregset; | |
72 | }; | |
73 | ||
74 | ||
7803799a UW |
75 | /* ABI call-saved register information. */ |
76 | ||
77 | static int | |
78 | s390_register_call_saved (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 79 | { |
7803799a UW |
80 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
81 | ||
82 | switch (tdep->abi) | |
6707b003 | 83 | { |
7803799a UW |
84 | case ABI_LINUX_S390: |
85 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
86 | || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM | |
87 | || regnum == S390_A0_REGNUM) | |
88 | return 1; | |
6707b003 | 89 | |
7803799a UW |
90 | break; |
91 | ||
92 | case ABI_LINUX_ZSERIES: | |
93 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
94 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) | |
95 | || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) | |
96 | return 1; | |
97 | ||
98 | break; | |
99 | } | |
100 | ||
101 | return 0; | |
5769d3cd AC |
102 | } |
103 | ||
7803799a | 104 | |
d0f54f9d JB |
105 | /* DWARF Register Mapping. */ |
106 | ||
107 | static int s390_dwarf_regmap[] = | |
108 | { | |
109 | /* General Purpose Registers. */ | |
110 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
111 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
112 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
113 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
114 | ||
115 | /* Floating Point Registers. */ | |
116 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, | |
117 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, | |
118 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, | |
119 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, | |
120 | ||
121 | /* Control Registers (not mapped). */ | |
122 | -1, -1, -1, -1, -1, -1, -1, -1, | |
123 | -1, -1, -1, -1, -1, -1, -1, -1, | |
124 | ||
125 | /* Access Registers. */ | |
126 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, | |
127 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, | |
128 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, | |
129 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, | |
130 | ||
131 | /* Program Status Word. */ | |
132 | S390_PSWM_REGNUM, | |
7803799a UW |
133 | S390_PSWA_REGNUM, |
134 | ||
135 | /* GPR Lower Half Access. */ | |
136 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
137 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
138 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
139 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
d0f54f9d JB |
140 | }; |
141 | ||
142 | /* Convert DWARF register number REG to the appropriate register | |
143 | number used by GDB. */ | |
a78f21af | 144 | static int |
d3f73121 | 145 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
d0f54f9d | 146 | { |
7803799a UW |
147 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
148 | ||
149 | /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit | |
150 | GPRs. Note that call frame information still refers to the 32-bit | |
151 | lower halves, because s390_adjust_frame_regnum uses register numbers | |
152 | 66 .. 81 to access GPRs. */ | |
153 | if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) | |
154 | return tdep->gpr_full_regnum + reg; | |
d0f54f9d | 155 | |
16aff9a6 | 156 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
7803799a | 157 | return s390_dwarf_regmap[reg]; |
d0f54f9d | 158 | |
7803799a UW |
159 | warning (_("Unmapped DWARF Register #%d encountered."), reg); |
160 | return -1; | |
161 | } | |
d0f54f9d | 162 | |
7803799a UW |
163 | /* Translate a .eh_frame register to DWARF register, or adjust a |
164 | .debug_frame register. */ | |
165 | static int | |
166 | s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) | |
167 | { | |
168 | /* See s390_dwarf_reg_to_regnum for comments. */ | |
169 | return (num >= 0 && num < 16)? num + 66 : num; | |
d0f54f9d JB |
170 | } |
171 | ||
d0f54f9d | 172 | |
7803799a UW |
173 | /* Pseudo registers. */ |
174 | ||
175 | static const char * | |
176 | s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 177 | { |
7803799a | 178 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 179 | |
7803799a UW |
180 | if (regnum == tdep->pc_regnum) |
181 | return "pc"; | |
d0f54f9d | 182 | |
7803799a UW |
183 | if (regnum == tdep->cc_regnum) |
184 | return "cc"; | |
d0f54f9d | 185 | |
7803799a UW |
186 | if (tdep->gpr_full_regnum != -1 |
187 | && regnum >= tdep->gpr_full_regnum | |
188 | && regnum < tdep->gpr_full_regnum + 16) | |
189 | { | |
190 | static const char *full_name[] = { | |
191 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
192 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
193 | }; | |
194 | return full_name[regnum - tdep->gpr_full_regnum]; | |
d0f54f9d | 195 | } |
7803799a UW |
196 | |
197 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
198 | } |
199 | ||
7803799a UW |
200 | static struct type * |
201 | s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) | |
5769d3cd | 202 | { |
7803799a | 203 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 204 | |
7803799a UW |
205 | if (regnum == tdep->pc_regnum) |
206 | return builtin_type (gdbarch)->builtin_func_ptr; | |
d0f54f9d | 207 | |
7803799a UW |
208 | if (regnum == tdep->cc_regnum) |
209 | return builtin_type (gdbarch)->builtin_int; | |
d0f54f9d | 210 | |
7803799a UW |
211 | if (tdep->gpr_full_regnum != -1 |
212 | && regnum >= tdep->gpr_full_regnum | |
213 | && regnum < tdep->gpr_full_regnum + 16) | |
214 | return builtin_type (gdbarch)->builtin_uint64; | |
215 | ||
216 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
5769d3cd AC |
217 | } |
218 | ||
05d1431c | 219 | static enum register_status |
7803799a UW |
220 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
221 | int regnum, gdb_byte *buf) | |
d0f54f9d | 222 | { |
7803799a | 223 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 224 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 225 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
226 | ULONGEST val; |
227 | ||
7803799a | 228 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 229 | { |
05d1431c PA |
230 | enum register_status status; |
231 | ||
232 | status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); | |
233 | if (status == REG_VALID) | |
234 | { | |
235 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
236 | val &= 0x7fffffff; | |
237 | store_unsigned_integer (buf, regsize, byte_order, val); | |
238 | } | |
239 | return status; | |
7803799a | 240 | } |
d0f54f9d | 241 | |
7803799a UW |
242 | if (regnum == tdep->cc_regnum) |
243 | { | |
05d1431c PA |
244 | enum register_status status; |
245 | ||
246 | status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); | |
247 | if (status == REG_VALID) | |
248 | { | |
249 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
250 | val = (val >> 12) & 3; | |
251 | else | |
252 | val = (val >> 44) & 3; | |
253 | store_unsigned_integer (buf, regsize, byte_order, val); | |
254 | } | |
255 | return status; | |
7803799a | 256 | } |
d0f54f9d | 257 | |
7803799a UW |
258 | if (tdep->gpr_full_regnum != -1 |
259 | && regnum >= tdep->gpr_full_regnum | |
260 | && regnum < tdep->gpr_full_regnum + 16) | |
261 | { | |
05d1431c | 262 | enum register_status status; |
7803799a | 263 | ULONGEST val_upper; |
05d1431c | 264 | |
7803799a UW |
265 | regnum -= tdep->gpr_full_regnum; |
266 | ||
05d1431c PA |
267 | status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val); |
268 | if (status == REG_VALID) | |
269 | status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
270 | &val_upper); | |
271 | if (status == REG_VALID) | |
272 | { | |
273 | val |= val_upper << 32; | |
274 | store_unsigned_integer (buf, regsize, byte_order, val); | |
275 | } | |
276 | return status; | |
d0f54f9d | 277 | } |
7803799a UW |
278 | |
279 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
280 | } |
281 | ||
282 | static void | |
7803799a UW |
283 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
284 | int regnum, const gdb_byte *buf) | |
d0f54f9d | 285 | { |
7803799a | 286 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 287 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 288 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
289 | ULONGEST val, psw; |
290 | ||
7803799a | 291 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 292 | { |
7803799a UW |
293 | val = extract_unsigned_integer (buf, regsize, byte_order); |
294 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
295 | { | |
296 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); | |
297 | val = (psw & 0x80000000) | (val & 0x7fffffff); | |
298 | } | |
299 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); | |
300 | return; | |
301 | } | |
d0f54f9d | 302 | |
7803799a UW |
303 | if (regnum == tdep->cc_regnum) |
304 | { | |
305 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
d0f54f9d | 306 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
7803799a UW |
307 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
308 | val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); | |
309 | else | |
310 | val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); | |
311 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); | |
312 | return; | |
313 | } | |
d0f54f9d | 314 | |
7803799a UW |
315 | if (tdep->gpr_full_regnum != -1 |
316 | && regnum >= tdep->gpr_full_regnum | |
317 | && regnum < tdep->gpr_full_regnum + 16) | |
318 | { | |
319 | regnum -= tdep->gpr_full_regnum; | |
320 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
321 | regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, | |
322 | val & 0xffffffff); | |
323 | regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
324 | val >> 32); | |
325 | return; | |
d0f54f9d | 326 | } |
7803799a UW |
327 | |
328 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
329 | } |
330 | ||
331 | /* 'float' values are stored in the upper half of floating-point | |
332 | registers, even though we are otherwise a big-endian platform. */ | |
333 | ||
9acbedc0 UW |
334 | static struct value * |
335 | s390_value_from_register (struct type *type, int regnum, | |
336 | struct frame_info *frame) | |
d0f54f9d | 337 | { |
9acbedc0 | 338 | struct value *value = default_value_from_register (type, regnum, frame); |
56b9d9ac | 339 | int len = TYPE_LENGTH (check_typedef (type)); |
d0f54f9d | 340 | |
9acbedc0 UW |
341 | if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8) |
342 | set_value_offset (value, 0); | |
d0f54f9d | 343 | |
9acbedc0 | 344 | return value; |
d0f54f9d JB |
345 | } |
346 | ||
347 | /* Register groups. */ | |
348 | ||
a78f21af | 349 | static int |
7803799a UW |
350 | s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
351 | struct reggroup *group) | |
d0f54f9d JB |
352 | { |
353 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
354 | ||
7803799a | 355 | /* PC and CC pseudo registers need to be saved/restored in order to |
d0f54f9d JB |
356 | push or pop frames. */ |
357 | if (group == save_reggroup || group == restore_reggroup) | |
7803799a | 358 | return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; |
d0f54f9d JB |
359 | |
360 | return default_register_reggroup_p (gdbarch, regnum, group); | |
361 | } | |
362 | ||
363 | ||
364 | /* Core file register sets. */ | |
365 | ||
366 | int s390_regmap_gregset[S390_NUM_REGS] = | |
367 | { | |
368 | /* Program Status Word. */ | |
369 | 0x00, 0x04, | |
370 | /* General Purpose Registers. */ | |
371 | 0x08, 0x0c, 0x10, 0x14, | |
372 | 0x18, 0x1c, 0x20, 0x24, | |
373 | 0x28, 0x2c, 0x30, 0x34, | |
374 | 0x38, 0x3c, 0x40, 0x44, | |
375 | /* Access Registers. */ | |
376 | 0x48, 0x4c, 0x50, 0x54, | |
377 | 0x58, 0x5c, 0x60, 0x64, | |
378 | 0x68, 0x6c, 0x70, 0x74, | |
379 | 0x78, 0x7c, 0x80, 0x84, | |
380 | /* Floating Point Control Word. */ | |
381 | -1, | |
382 | /* Floating Point Registers. */ | |
383 | -1, -1, -1, -1, -1, -1, -1, -1, | |
384 | -1, -1, -1, -1, -1, -1, -1, -1, | |
7803799a UW |
385 | /* GPR Uppper Halves. */ |
386 | -1, -1, -1, -1, -1, -1, -1, -1, | |
387 | -1, -1, -1, -1, -1, -1, -1, -1, | |
d0f54f9d JB |
388 | }; |
389 | ||
390 | int s390x_regmap_gregset[S390_NUM_REGS] = | |
391 | { | |
7803799a | 392 | /* Program Status Word. */ |
d0f54f9d JB |
393 | 0x00, 0x08, |
394 | /* General Purpose Registers. */ | |
395 | 0x10, 0x18, 0x20, 0x28, | |
396 | 0x30, 0x38, 0x40, 0x48, | |
397 | 0x50, 0x58, 0x60, 0x68, | |
398 | 0x70, 0x78, 0x80, 0x88, | |
399 | /* Access Registers. */ | |
400 | 0x90, 0x94, 0x98, 0x9c, | |
401 | 0xa0, 0xa4, 0xa8, 0xac, | |
402 | 0xb0, 0xb4, 0xb8, 0xbc, | |
403 | 0xc0, 0xc4, 0xc8, 0xcc, | |
404 | /* Floating Point Control Word. */ | |
405 | -1, | |
406 | /* Floating Point Registers. */ | |
407 | -1, -1, -1, -1, -1, -1, -1, -1, | |
408 | -1, -1, -1, -1, -1, -1, -1, -1, | |
7803799a UW |
409 | /* GPR Uppper Halves. */ |
410 | 0x10, 0x18, 0x20, 0x28, | |
411 | 0x30, 0x38, 0x40, 0x48, | |
412 | 0x50, 0x58, 0x60, 0x68, | |
413 | 0x70, 0x78, 0x80, 0x88, | |
d0f54f9d JB |
414 | }; |
415 | ||
416 | int s390_regmap_fpregset[S390_NUM_REGS] = | |
417 | { | |
418 | /* Program Status Word. */ | |
419 | -1, -1, | |
420 | /* General Purpose Registers. */ | |
421 | -1, -1, -1, -1, -1, -1, -1, -1, | |
422 | -1, -1, -1, -1, -1, -1, -1, -1, | |
423 | /* Access Registers. */ | |
424 | -1, -1, -1, -1, -1, -1, -1, -1, | |
425 | -1, -1, -1, -1, -1, -1, -1, -1, | |
426 | /* Floating Point Control Word. */ | |
427 | 0x00, | |
428 | /* Floating Point Registers. */ | |
429 | 0x08, 0x10, 0x18, 0x20, | |
430 | 0x28, 0x30, 0x38, 0x40, | |
431 | 0x48, 0x50, 0x58, 0x60, | |
432 | 0x68, 0x70, 0x78, 0x80, | |
7803799a UW |
433 | /* GPR Uppper Halves. */ |
434 | -1, -1, -1, -1, -1, -1, -1, -1, | |
435 | -1, -1, -1, -1, -1, -1, -1, -1, | |
436 | }; | |
437 | ||
438 | int s390_regmap_upper[S390_NUM_REGS] = | |
439 | { | |
440 | /* Program Status Word. */ | |
441 | -1, -1, | |
442 | /* General Purpose Registers. */ | |
443 | -1, -1, -1, -1, -1, -1, -1, -1, | |
444 | -1, -1, -1, -1, -1, -1, -1, -1, | |
445 | /* Access Registers. */ | |
446 | -1, -1, -1, -1, -1, -1, -1, -1, | |
447 | -1, -1, -1, -1, -1, -1, -1, -1, | |
448 | /* Floating Point Control Word. */ | |
449 | -1, | |
450 | /* Floating Point Registers. */ | |
451 | -1, -1, -1, -1, -1, -1, -1, -1, | |
452 | -1, -1, -1, -1, -1, -1, -1, -1, | |
453 | /* GPR Uppper Halves. */ | |
454 | 0x00, 0x04, 0x08, 0x0c, | |
455 | 0x10, 0x14, 0x18, 0x1c, | |
456 | 0x20, 0x24, 0x28, 0x2c, | |
457 | 0x30, 0x34, 0x38, 0x3c, | |
d0f54f9d JB |
458 | }; |
459 | ||
460 | /* Supply register REGNUM from the register set REGSET to register cache | |
461 | REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */ | |
462 | static void | |
463 | s390_supply_regset (const struct regset *regset, struct regcache *regcache, | |
464 | int regnum, const void *regs, size_t len) | |
465 | { | |
466 | const int *offset = regset->descr; | |
467 | int i; | |
468 | ||
469 | for (i = 0; i < S390_NUM_REGS; i++) | |
470 | { | |
471 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
472 | regcache_raw_supply (regcache, i, (const char *)regs + offset[i]); | |
473 | } | |
474 | } | |
475 | ||
92f38ec2 UW |
476 | /* Collect register REGNUM from the register cache REGCACHE and store |
477 | it in the buffer specified by REGS and LEN as described by the | |
478 | general-purpose register set REGSET. If REGNUM is -1, do this for | |
479 | all registers in REGSET. */ | |
480 | static void | |
481 | s390_collect_regset (const struct regset *regset, | |
482 | const struct regcache *regcache, | |
483 | int regnum, void *regs, size_t len) | |
484 | { | |
485 | const int *offset = regset->descr; | |
486 | int i; | |
487 | ||
488 | for (i = 0; i < S390_NUM_REGS; i++) | |
489 | { | |
490 | if ((regnum == i || regnum == -1) && offset[i] != -1) | |
491 | regcache_raw_collect (regcache, i, (char *)regs + offset[i]); | |
492 | } | |
493 | } | |
494 | ||
d0f54f9d JB |
495 | static const struct regset s390_gregset = { |
496 | s390_regmap_gregset, | |
92f38ec2 UW |
497 | s390_supply_regset, |
498 | s390_collect_regset | |
d0f54f9d JB |
499 | }; |
500 | ||
501 | static const struct regset s390x_gregset = { | |
502 | s390x_regmap_gregset, | |
92f38ec2 UW |
503 | s390_supply_regset, |
504 | s390_collect_regset | |
d0f54f9d JB |
505 | }; |
506 | ||
507 | static const struct regset s390_fpregset = { | |
508 | s390_regmap_fpregset, | |
92f38ec2 UW |
509 | s390_supply_regset, |
510 | s390_collect_regset | |
d0f54f9d JB |
511 | }; |
512 | ||
7803799a UW |
513 | static const struct regset s390_upper_regset = { |
514 | s390_regmap_upper, | |
515 | s390_supply_regset, | |
516 | s390_collect_regset | |
517 | }; | |
518 | ||
519 | static struct core_regset_section s390_upper_regset_sections[] = | |
520 | { | |
521 | { ".reg", s390_sizeof_gregset, "general-purpose" }, | |
522 | { ".reg2", s390_sizeof_fpregset, "floating-point" }, | |
523 | { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" }, | |
524 | { NULL, 0} | |
525 | }; | |
526 | ||
d0f54f9d JB |
527 | /* Return the appropriate register set for the core section identified |
528 | by SECT_NAME and SECT_SIZE. */ | |
63807e1d | 529 | static const struct regset * |
d0f54f9d JB |
530 | s390_regset_from_core_section (struct gdbarch *gdbarch, |
531 | const char *sect_name, size_t sect_size) | |
532 | { | |
533 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
534 | ||
e31dcd20 | 535 | if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset) |
d0f54f9d JB |
536 | return tdep->gregset; |
537 | ||
e31dcd20 | 538 | if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset) |
d0f54f9d JB |
539 | return tdep->fpregset; |
540 | ||
7803799a UW |
541 | if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4) |
542 | return &s390_upper_regset; | |
543 | ||
d0f54f9d | 544 | return NULL; |
5769d3cd AC |
545 | } |
546 | ||
7803799a UW |
547 | static const struct target_desc * |
548 | s390_core_read_description (struct gdbarch *gdbarch, | |
549 | struct target_ops *target, bfd *abfd) | |
550 | { | |
551 | asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs"); | |
552 | asection *section = bfd_get_section_by_name (abfd, ".reg"); | |
553 | if (!section) | |
554 | return NULL; | |
555 | ||
556 | switch (bfd_section_size (abfd, section)) | |
557 | { | |
558 | case s390_sizeof_gregset: | |
559 | return high_gprs? tdesc_s390_linux64 : tdesc_s390_linux32; | |
560 | ||
561 | case s390x_sizeof_gregset: | |
562 | return tdesc_s390x_linux64; | |
563 | ||
564 | default: | |
565 | return NULL; | |
566 | } | |
567 | } | |
568 | ||
d0f54f9d | 569 | |
4bc8c588 JB |
570 | /* Decoding S/390 instructions. */ |
571 | ||
572 | /* Named opcode values for the S/390 instructions we recognize. Some | |
573 | instructions have their opcode split across two fields; those are the | |
574 | op1_* and op2_* enums. */ | |
575 | enum | |
576 | { | |
a8c99f38 JB |
577 | op1_lhi = 0xa7, op2_lhi = 0x08, |
578 | op1_lghi = 0xa7, op2_lghi = 0x09, | |
00ce08ef | 579 | op1_lgfi = 0xc0, op2_lgfi = 0x01, |
4bc8c588 | 580 | op_lr = 0x18, |
a8c99f38 JB |
581 | op_lgr = 0xb904, |
582 | op_l = 0x58, | |
583 | op1_ly = 0xe3, op2_ly = 0x58, | |
584 | op1_lg = 0xe3, op2_lg = 0x04, | |
585 | op_lm = 0x98, | |
586 | op1_lmy = 0xeb, op2_lmy = 0x98, | |
587 | op1_lmg = 0xeb, op2_lmg = 0x04, | |
4bc8c588 | 588 | op_st = 0x50, |
a8c99f38 | 589 | op1_sty = 0xe3, op2_sty = 0x50, |
4bc8c588 | 590 | op1_stg = 0xe3, op2_stg = 0x24, |
a8c99f38 | 591 | op_std = 0x60, |
4bc8c588 | 592 | op_stm = 0x90, |
a8c99f38 | 593 | op1_stmy = 0xeb, op2_stmy = 0x90, |
4bc8c588 | 594 | op1_stmg = 0xeb, op2_stmg = 0x24, |
a8c99f38 JB |
595 | op1_aghi = 0xa7, op2_aghi = 0x0b, |
596 | op1_ahi = 0xa7, op2_ahi = 0x0a, | |
00ce08ef UW |
597 | op1_agfi = 0xc2, op2_agfi = 0x08, |
598 | op1_afi = 0xc2, op2_afi = 0x09, | |
599 | op1_algfi= 0xc2, op2_algfi= 0x0a, | |
600 | op1_alfi = 0xc2, op2_alfi = 0x0b, | |
a8c99f38 JB |
601 | op_ar = 0x1a, |
602 | op_agr = 0xb908, | |
603 | op_a = 0x5a, | |
604 | op1_ay = 0xe3, op2_ay = 0x5a, | |
605 | op1_ag = 0xe3, op2_ag = 0x08, | |
00ce08ef UW |
606 | op1_slgfi= 0xc2, op2_slgfi= 0x04, |
607 | op1_slfi = 0xc2, op2_slfi = 0x05, | |
a8c99f38 JB |
608 | op_sr = 0x1b, |
609 | op_sgr = 0xb909, | |
610 | op_s = 0x5b, | |
611 | op1_sy = 0xe3, op2_sy = 0x5b, | |
612 | op1_sg = 0xe3, op2_sg = 0x09, | |
613 | op_nr = 0x14, | |
614 | op_ngr = 0xb980, | |
615 | op_la = 0x41, | |
616 | op1_lay = 0xe3, op2_lay = 0x71, | |
617 | op1_larl = 0xc0, op2_larl = 0x00, | |
618 | op_basr = 0x0d, | |
619 | op_bas = 0x4d, | |
620 | op_bcr = 0x07, | |
621 | op_bc = 0x0d, | |
1db4e8a0 UW |
622 | op_bctr = 0x06, |
623 | op_bctgr = 0xb946, | |
624 | op_bct = 0x46, | |
625 | op1_bctg = 0xe3, op2_bctg = 0x46, | |
626 | op_bxh = 0x86, | |
627 | op1_bxhg = 0xeb, op2_bxhg = 0x44, | |
628 | op_bxle = 0x87, | |
629 | op1_bxleg= 0xeb, op2_bxleg= 0x45, | |
a8c99f38 JB |
630 | op1_bras = 0xa7, op2_bras = 0x05, |
631 | op1_brasl= 0xc0, op2_brasl= 0x05, | |
632 | op1_brc = 0xa7, op2_brc = 0x04, | |
633 | op1_brcl = 0xc0, op2_brcl = 0x04, | |
1db4e8a0 UW |
634 | op1_brct = 0xa7, op2_brct = 0x06, |
635 | op1_brctg= 0xa7, op2_brctg= 0x07, | |
636 | op_brxh = 0x84, | |
637 | op1_brxhg= 0xec, op2_brxhg= 0x44, | |
638 | op_brxle = 0x85, | |
639 | op1_brxlg= 0xec, op2_brxlg= 0x45, | |
4bc8c588 JB |
640 | }; |
641 | ||
642 | ||
a8c99f38 JB |
643 | /* Read a single instruction from address AT. */ |
644 | ||
645 | #define S390_MAX_INSTR_SIZE 6 | |
646 | static int | |
647 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) | |
648 | { | |
649 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
650 | int instrlen; | |
651 | ||
8defab1a | 652 | if (target_read_memory (at, &instr[0], 2)) |
a8c99f38 JB |
653 | return -1; |
654 | instrlen = s390_instrlen[instr[0] >> 6]; | |
655 | if (instrlen > 2) | |
656 | { | |
8defab1a | 657 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
a8c99f38 JB |
658 | return -1; |
659 | } | |
660 | return instrlen; | |
661 | } | |
662 | ||
663 | ||
4bc8c588 JB |
664 | /* The functions below are for recognizing and decoding S/390 |
665 | instructions of various formats. Each of them checks whether INSN | |
666 | is an instruction of the given format, with the specified opcodes. | |
667 | If it is, it sets the remaining arguments to the values of the | |
668 | instruction's fields, and returns a non-zero value; otherwise, it | |
669 | returns zero. | |
670 | ||
671 | These functions' arguments appear in the order they appear in the | |
672 | instruction, not in the machine-language form. So, opcodes always | |
673 | come first, even though they're sometimes scattered around the | |
674 | instructions. And displacements appear before base and extension | |
675 | registers, as they do in the assembly syntax, not at the end, as | |
676 | they do in the machine language. */ | |
a78f21af | 677 | static int |
4bc8c588 JB |
678 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
679 | { | |
680 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
681 | { | |
682 | *r1 = (insn[1] >> 4) & 0xf; | |
683 | /* i2 is a 16-bit signed quantity. */ | |
684 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
685 | return 1; | |
686 | } | |
687 | else | |
688 | return 0; | |
689 | } | |
8ac0e65a | 690 | |
5769d3cd | 691 | |
4bc8c588 JB |
692 | static int |
693 | is_ril (bfd_byte *insn, int op1, int op2, | |
694 | unsigned int *r1, int *i2) | |
695 | { | |
696 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
697 | { | |
698 | *r1 = (insn[1] >> 4) & 0xf; | |
699 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, | |
700 | no sign extension is necessary, but we don't want to assume | |
701 | that. */ | |
702 | *i2 = (((insn[2] << 24) | |
703 | | (insn[3] << 16) | |
704 | | (insn[4] << 8) | |
705 | | (insn[5])) ^ 0x80000000) - 0x80000000; | |
706 | return 1; | |
707 | } | |
708 | else | |
709 | return 0; | |
710 | } | |
711 | ||
712 | ||
713 | static int | |
714 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
715 | { | |
716 | if (insn[0] == op) | |
717 | { | |
718 | *r1 = (insn[1] >> 4) & 0xf; | |
719 | *r2 = insn[1] & 0xf; | |
720 | return 1; | |
721 | } | |
722 | else | |
723 | return 0; | |
724 | } | |
725 | ||
726 | ||
727 | static int | |
728 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
729 | { | |
730 | if (((insn[0] << 8) | insn[1]) == op) | |
731 | { | |
732 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ | |
733 | *r1 = (insn[3] >> 4) & 0xf; | |
734 | *r2 = insn[3] & 0xf; | |
735 | return 1; | |
736 | } | |
737 | else | |
738 | return 0; | |
739 | } | |
740 | ||
741 | ||
742 | static int | |
743 | is_rs (bfd_byte *insn, int op, | |
744 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) | |
745 | { | |
746 | if (insn[0] == op) | |
747 | { | |
748 | *r1 = (insn[1] >> 4) & 0xf; | |
749 | *r3 = insn[1] & 0xf; | |
750 | *b2 = (insn[2] >> 4) & 0xf; | |
751 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
752 | return 1; | |
753 | } | |
754 | else | |
755 | return 0; | |
756 | } | |
757 | ||
758 | ||
759 | static int | |
a8c99f38 | 760 | is_rsy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
761 | unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2) |
762 | { | |
763 | if (insn[0] == op1 | |
4bc8c588 JB |
764 | && insn[5] == op2) |
765 | { | |
766 | *r1 = (insn[1] >> 4) & 0xf; | |
767 | *r3 = insn[1] & 0xf; | |
768 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
769 | /* The 'long displacement' is a 20-bit signed integer. */ |
770 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
771 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
772 | return 1; |
773 | } | |
774 | else | |
775 | return 0; | |
776 | } | |
777 | ||
778 | ||
1db4e8a0 UW |
779 | static int |
780 | is_rsi (bfd_byte *insn, int op, | |
781 | unsigned int *r1, unsigned int *r3, int *i2) | |
782 | { | |
783 | if (insn[0] == op) | |
784 | { | |
785 | *r1 = (insn[1] >> 4) & 0xf; | |
786 | *r3 = insn[1] & 0xf; | |
787 | /* i2 is a 16-bit signed quantity. */ | |
788 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
789 | return 1; | |
790 | } | |
791 | else | |
792 | return 0; | |
793 | } | |
794 | ||
795 | ||
796 | static int | |
797 | is_rie (bfd_byte *insn, int op1, int op2, | |
798 | unsigned int *r1, unsigned int *r3, int *i2) | |
799 | { | |
800 | if (insn[0] == op1 | |
801 | && insn[5] == op2) | |
802 | { | |
803 | *r1 = (insn[1] >> 4) & 0xf; | |
804 | *r3 = insn[1] & 0xf; | |
805 | /* i2 is a 16-bit signed quantity. */ | |
806 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
807 | return 1; | |
808 | } | |
809 | else | |
810 | return 0; | |
811 | } | |
812 | ||
813 | ||
4bc8c588 JB |
814 | static int |
815 | is_rx (bfd_byte *insn, int op, | |
816 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) | |
817 | { | |
818 | if (insn[0] == op) | |
819 | { | |
820 | *r1 = (insn[1] >> 4) & 0xf; | |
821 | *x2 = insn[1] & 0xf; | |
822 | *b2 = (insn[2] >> 4) & 0xf; | |
823 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
824 | return 1; | |
825 | } | |
826 | else | |
827 | return 0; | |
828 | } | |
829 | ||
830 | ||
831 | static int | |
a8c99f38 | 832 | is_rxy (bfd_byte *insn, int op1, int op2, |
4bc8c588 JB |
833 | unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2) |
834 | { | |
835 | if (insn[0] == op1 | |
4bc8c588 JB |
836 | && insn[5] == op2) |
837 | { | |
838 | *r1 = (insn[1] >> 4) & 0xf; | |
839 | *x2 = insn[1] & 0xf; | |
840 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 JB |
841 | /* The 'long displacement' is a 20-bit signed integer. */ |
842 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) | |
843 | ^ 0x80000) - 0x80000; | |
4bc8c588 JB |
844 | return 1; |
845 | } | |
846 | else | |
847 | return 0; | |
848 | } | |
849 | ||
850 | ||
3fc46200 | 851 | /* Prologue analysis. */ |
4bc8c588 | 852 | |
d0f54f9d JB |
853 | #define S390_NUM_GPRS 16 |
854 | #define S390_NUM_FPRS 16 | |
4bc8c588 | 855 | |
a8c99f38 JB |
856 | struct s390_prologue_data { |
857 | ||
ee1b3323 UW |
858 | /* The stack. */ |
859 | struct pv_area *stack; | |
860 | ||
e17a4113 | 861 | /* The size and byte-order of a GPR or FPR. */ |
a8c99f38 JB |
862 | int gpr_size; |
863 | int fpr_size; | |
e17a4113 | 864 | enum bfd_endian byte_order; |
a8c99f38 JB |
865 | |
866 | /* The general-purpose registers. */ | |
3fc46200 | 867 | pv_t gpr[S390_NUM_GPRS]; |
a8c99f38 JB |
868 | |
869 | /* The floating-point registers. */ | |
3fc46200 | 870 | pv_t fpr[S390_NUM_FPRS]; |
a8c99f38 | 871 | |
121d8485 UW |
872 | /* The offset relative to the CFA where the incoming GPR N was saved |
873 | by the function prologue. 0 if not saved or unknown. */ | |
874 | int gpr_slot[S390_NUM_GPRS]; | |
4bc8c588 | 875 | |
121d8485 UW |
876 | /* Likewise for FPRs. */ |
877 | int fpr_slot[S390_NUM_FPRS]; | |
4bc8c588 | 878 | |
121d8485 UW |
879 | /* Nonzero if the backchain was saved. This is assumed to be the |
880 | case when the incoming SP is saved at the current SP location. */ | |
881 | int back_chain_saved_p; | |
882 | }; | |
4bc8c588 | 883 | |
3fc46200 UW |
884 | /* Return the effective address for an X-style instruction, like: |
885 | ||
886 | L R1, D2(X2, B2) | |
887 | ||
888 | Here, X2 and B2 are registers, and D2 is a signed 20-bit | |
889 | constant; the effective address is the sum of all three. If either | |
890 | X2 or B2 are zero, then it doesn't contribute to the sum --- this | |
891 | means that r0 can't be used as either X2 or B2. */ | |
892 | static pv_t | |
893 | s390_addr (struct s390_prologue_data *data, | |
894 | int d2, unsigned int x2, unsigned int b2) | |
895 | { | |
896 | pv_t result; | |
897 | ||
898 | result = pv_constant (d2); | |
899 | if (x2) | |
900 | result = pv_add (result, data->gpr[x2]); | |
901 | if (b2) | |
902 | result = pv_add (result, data->gpr[b2]); | |
903 | ||
904 | return result; | |
905 | } | |
906 | ||
907 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ | |
a8c99f38 | 908 | static void |
3fc46200 UW |
909 | s390_store (struct s390_prologue_data *data, |
910 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, | |
911 | pv_t value) | |
4bc8c588 | 912 | { |
3fc46200 | 913 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 914 | pv_t offset; |
121d8485 UW |
915 | |
916 | /* Check whether we are storing the backchain. */ | |
3fc46200 | 917 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
121d8485 | 918 | |
3fc46200 | 919 | if (pv_is_constant (offset) && offset.k == 0) |
121d8485 | 920 | if (size == data->gpr_size |
3fc46200 | 921 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
121d8485 UW |
922 | { |
923 | data->back_chain_saved_p = 1; | |
924 | return; | |
925 | } | |
926 | ||
927 | ||
928 | /* Check whether we are storing a register into the stack. */ | |
ee1b3323 UW |
929 | if (!pv_area_store_would_trash (data->stack, addr)) |
930 | pv_area_store (data->stack, addr, size, value); | |
4bc8c588 | 931 | |
a8c99f38 | 932 | |
121d8485 UW |
933 | /* Note: If this is some store we cannot identify, you might think we |
934 | should forget our cached values, as any of those might have been hit. | |
935 | ||
936 | However, we make the assumption that the register save areas are only | |
937 | ever stored to once in any given function, and we do recognize these | |
938 | stores. Thus every store we cannot recognize does not hit our data. */ | |
4bc8c588 | 939 | } |
4bc8c588 | 940 | |
3fc46200 UW |
941 | /* Do a SIZE-byte load from D2(X2,B2). */ |
942 | static pv_t | |
943 | s390_load (struct s390_prologue_data *data, | |
944 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) | |
945 | ||
4bc8c588 | 946 | { |
3fc46200 | 947 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 948 | pv_t offset; |
4bc8c588 | 949 | |
a8c99f38 JB |
950 | /* If it's a load from an in-line constant pool, then we can |
951 | simulate that, under the assumption that the code isn't | |
952 | going to change between the time the processor actually | |
953 | executed it creating the current frame, and the time when | |
954 | we're analyzing the code to unwind past that frame. */ | |
3fc46200 | 955 | if (pv_is_constant (addr)) |
4bc8c588 | 956 | { |
0542c86d | 957 | struct target_section *secp; |
3fc46200 | 958 | secp = target_section_by_addr (¤t_target, addr.k); |
a8c99f38 JB |
959 | if (secp != NULL |
960 | && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section) | |
961 | & SEC_READONLY)) | |
e17a4113 UW |
962 | return pv_constant (read_memory_integer (addr.k, size, |
963 | data->byte_order)); | |
a8c99f38 | 964 | } |
7666f43c | 965 | |
121d8485 | 966 | /* Check whether we are accessing one of our save slots. */ |
ee1b3323 UW |
967 | return pv_area_fetch (data->stack, addr, size); |
968 | } | |
121d8485 | 969 | |
ee1b3323 UW |
970 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
971 | this to pv_area_scan. | |
121d8485 | 972 | |
ee1b3323 UW |
973 | If VALUE is a saved register, ADDR says it was saved at a constant |
974 | offset from the frame base, and SIZE indicates that the whole | |
975 | register was saved, record its offset in the reg_offset table in | |
976 | PROLOGUE_UNTYPED. */ | |
977 | static void | |
c378eb4e MS |
978 | s390_check_for_saved (void *data_untyped, pv_t addr, |
979 | CORE_ADDR size, pv_t value) | |
ee1b3323 UW |
980 | { |
981 | struct s390_prologue_data *data = data_untyped; | |
982 | int i, offset; | |
983 | ||
984 | if (!pv_is_register (addr, S390_SP_REGNUM)) | |
985 | return; | |
986 | ||
987 | offset = 16 * data->gpr_size + 32 - addr.k; | |
4bc8c588 | 988 | |
ee1b3323 UW |
989 | /* If we are storing the original value of a register, we want to |
990 | record the CFA offset. If the same register is stored multiple | |
991 | times, the stack slot with the highest address counts. */ | |
992 | ||
993 | for (i = 0; i < S390_NUM_GPRS; i++) | |
994 | if (size == data->gpr_size | |
995 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) | |
996 | if (data->gpr_slot[i] == 0 | |
997 | || data->gpr_slot[i] > offset) | |
998 | { | |
999 | data->gpr_slot[i] = offset; | |
1000 | return; | |
1001 | } | |
1002 | ||
1003 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1004 | if (size == data->fpr_size | |
1005 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) | |
1006 | if (data->fpr_slot[i] == 0 | |
1007 | || data->fpr_slot[i] > offset) | |
1008 | { | |
1009 | data->fpr_slot[i] = offset; | |
1010 | return; | |
1011 | } | |
a8c99f38 | 1012 | } |
4bc8c588 | 1013 | |
a8c99f38 JB |
1014 | /* Analyze the prologue of the function starting at START_PC, |
1015 | continuing at most until CURRENT_PC. Initialize DATA to | |
1016 | hold all information we find out about the state of the registers | |
1017 | and stack slots. Return the address of the instruction after | |
1018 | the last one that changed the SP, FP, or back chain; or zero | |
1019 | on error. */ | |
1020 | static CORE_ADDR | |
1021 | s390_analyze_prologue (struct gdbarch *gdbarch, | |
1022 | CORE_ADDR start_pc, | |
1023 | CORE_ADDR current_pc, | |
1024 | struct s390_prologue_data *data) | |
4bc8c588 | 1025 | { |
a8c99f38 JB |
1026 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1027 | ||
4bc8c588 | 1028 | /* Our return value: |
a8c99f38 JB |
1029 | The address of the instruction after the last one that changed |
1030 | the SP, FP, or back chain; zero if we got an error trying to | |
1031 | read memory. */ | |
1032 | CORE_ADDR result = start_pc; | |
4bc8c588 | 1033 | |
4bc8c588 JB |
1034 | /* The current PC for our abstract interpretation. */ |
1035 | CORE_ADDR pc; | |
1036 | ||
1037 | /* The address of the next instruction after that. */ | |
1038 | CORE_ADDR next_pc; | |
1039 | ||
4bc8c588 JB |
1040 | /* Set up everything's initial value. */ |
1041 | { | |
1042 | int i; | |
1043 | ||
55f960e1 | 1044 | data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
ee1b3323 | 1045 | |
a8c99f38 JB |
1046 | /* For the purpose of prologue tracking, we consider the GPR size to |
1047 | be equal to the ABI word size, even if it is actually larger | |
1048 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ | |
1049 | data->gpr_size = word_size; | |
1050 | data->fpr_size = 8; | |
e17a4113 | 1051 | data->byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 | 1052 | |
4bc8c588 | 1053 | for (i = 0; i < S390_NUM_GPRS; i++) |
3fc46200 | 1054 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
4bc8c588 JB |
1055 | |
1056 | for (i = 0; i < S390_NUM_FPRS; i++) | |
3fc46200 | 1057 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
4bc8c588 | 1058 | |
121d8485 UW |
1059 | for (i = 0; i < S390_NUM_GPRS; i++) |
1060 | data->gpr_slot[i] = 0; | |
1061 | ||
1062 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1063 | data->fpr_slot[i] = 0; | |
4bc8c588 | 1064 | |
121d8485 | 1065 | data->back_chain_saved_p = 0; |
4bc8c588 JB |
1066 | } |
1067 | ||
a8c99f38 JB |
1068 | /* Start interpreting instructions, until we hit the frame's |
1069 | current PC or the first branch instruction. */ | |
1070 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) | |
5769d3cd | 1071 | { |
4bc8c588 | 1072 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
a788de9b | 1073 | int insn_len = s390_readinstruction (insn, pc); |
4bc8c588 | 1074 | |
3fc46200 UW |
1075 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
1076 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; | |
1077 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; | |
1078 | ||
4bc8c588 | 1079 | /* Fields for various kinds of instructions. */ |
a8c99f38 JB |
1080 | unsigned int b2, r1, r2, x2, r3; |
1081 | int i2, d2; | |
4bc8c588 | 1082 | |
121d8485 | 1083 | /* The values of SP and FP before this instruction, |
4bc8c588 | 1084 | for detecting instructions that change them. */ |
3fc46200 | 1085 | pv_t pre_insn_sp, pre_insn_fp; |
121d8485 UW |
1086 | /* Likewise for the flag whether the back chain was saved. */ |
1087 | int pre_insn_back_chain_saved_p; | |
4bc8c588 JB |
1088 | |
1089 | /* If we got an error trying to read the instruction, report it. */ | |
1090 | if (insn_len < 0) | |
8ac0e65a | 1091 | { |
a8c99f38 | 1092 | result = 0; |
4bc8c588 JB |
1093 | break; |
1094 | } | |
1095 | ||
1096 | next_pc = pc + insn_len; | |
1097 | ||
a8c99f38 JB |
1098 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1099 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
121d8485 | 1100 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
4bc8c588 | 1101 | |
4bc8c588 | 1102 | |
3fc46200 UW |
1103 | /* LHI r1, i2 --- load halfword immediate. */ |
1104 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ | |
1105 | /* LGFI r1, i2 --- load fullword immediate. */ | |
1106 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) | |
1107 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) | |
1108 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) | |
1109 | data->gpr[r1] = pv_constant (i2); | |
1110 | ||
1111 | /* LR r1, r2 --- load from register. */ | |
1112 | /* LGR r1, r2 --- load from register (64-bit version). */ | |
1113 | else if (is_rr (insn32, op_lr, &r1, &r2) | |
1114 | || is_rre (insn64, op_lgr, &r1, &r2)) | |
1115 | data->gpr[r1] = data->gpr[r2]; | |
1116 | ||
1117 | /* L r1, d2(x2, b2) --- load. */ | |
1118 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ | |
1119 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ | |
1120 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) | |
1121 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) | |
1122 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) | |
1123 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); | |
1124 | ||
1125 | /* ST r1, d2(x2, b2) --- store. */ | |
1126 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ | |
1127 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ | |
1128 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) | |
1129 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) | |
1130 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) | |
1131 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); | |
1132 | ||
1133 | /* STD r1, d2(x2,b2) --- store floating-point register. */ | |
4bc8c588 | 1134 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1135 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
1136 | ||
1137 | /* STM r1, r3, d2(b2) --- store multiple. */ | |
c378eb4e MS |
1138 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement |
1139 | version). */ | |
3fc46200 UW |
1140 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ |
1141 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) | |
1142 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) | |
1143 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) | |
4bc8c588 | 1144 | { |
3fc46200 UW |
1145 | for (; r1 <= r3; r1++, d2 += data->gpr_size) |
1146 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); | |
4bc8c588 JB |
1147 | } |
1148 | ||
3fc46200 UW |
1149 | /* AHI r1, i2 --- add halfword immediate. */ |
1150 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ | |
1151 | /* AFI r1, i2 --- add fullword immediate. */ | |
1152 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ | |
1153 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) | |
1154 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) | |
1155 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) | |
1156 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) | |
1157 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); | |
1158 | ||
1159 | /* ALFI r1, i2 --- add logical immediate. */ | |
1160 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ | |
1161 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) | |
1162 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) | |
1163 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1164 | (CORE_ADDR)i2 & 0xffffffff); | |
1165 | ||
1166 | /* AR r1, r2 -- add register. */ | |
1167 | /* AGR r1, r2 -- add register (64-bit version). */ | |
1168 | else if (is_rr (insn32, op_ar, &r1, &r2) | |
1169 | || is_rre (insn64, op_agr, &r1, &r2)) | |
1170 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); | |
1171 | ||
1172 | /* A r1, d2(x2, b2) -- add. */ | |
1173 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ | |
1174 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ | |
1175 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) | |
1176 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) | |
1177 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) | |
1178 | data->gpr[r1] = pv_add (data->gpr[r1], | |
1179 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1180 | ||
1181 | /* SLFI r1, i2 --- subtract logical immediate. */ | |
1182 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ | |
1183 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) | |
1184 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) | |
1185 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1186 | -((CORE_ADDR)i2 & 0xffffffff)); | |
1187 | ||
1188 | /* SR r1, r2 -- subtract register. */ | |
1189 | /* SGR r1, r2 -- subtract register (64-bit version). */ | |
1190 | else if (is_rr (insn32, op_sr, &r1, &r2) | |
1191 | || is_rre (insn64, op_sgr, &r1, &r2)) | |
1192 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); | |
1193 | ||
1194 | /* S r1, d2(x2, b2) -- subtract. */ | |
1195 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ | |
1196 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ | |
1197 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) | |
1198 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) | |
1199 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) | |
1200 | data->gpr[r1] = pv_subtract (data->gpr[r1], | |
1201 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1202 | ||
1203 | /* LA r1, d2(x2, b2) --- load address. */ | |
1204 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ | |
1205 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) | |
1206 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) | |
1207 | data->gpr[r1] = s390_addr (data, d2, x2, b2); | |
1208 | ||
1209 | /* LARL r1, i2 --- load address relative long. */ | |
a8c99f38 | 1210 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
3fc46200 | 1211 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
a8c99f38 | 1212 | |
3fc46200 | 1213 | /* BASR r1, 0 --- branch and save. |
a8c99f38 JB |
1214 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
1215 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1216 | && r2 == 0) | |
3fc46200 | 1217 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1218 | |
3fc46200 | 1219 | /* BRAS r1, i2 --- branch relative and save. */ |
a8c99f38 JB |
1220 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
1221 | { | |
3fc46200 | 1222 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1223 | next_pc = pc + i2 * 2; |
4bc8c588 | 1224 | |
a8c99f38 JB |
1225 | /* We'd better not interpret any backward branches. We'll |
1226 | never terminate. */ | |
1227 | if (next_pc <= pc) | |
4bc8c588 JB |
1228 | break; |
1229 | } | |
1230 | ||
a8c99f38 JB |
1231 | /* Terminate search when hitting any other branch instruction. */ |
1232 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1233 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) | |
1234 | || is_rr (insn, op_bcr, &r1, &r2) | |
1235 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1236 | || is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1237 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1238 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) | |
1239 | break; | |
1240 | ||
4bc8c588 JB |
1241 | else |
1242 | /* An instruction we don't know how to simulate. The only | |
1243 | safe thing to do would be to set every value we're tracking | |
a8c99f38 JB |
1244 | to 'unknown'. Instead, we'll be optimistic: we assume that |
1245 | we *can* interpret every instruction that the compiler uses | |
1246 | to manipulate any of the data we're interested in here -- | |
1247 | then we can just ignore anything else. */ | |
1248 | ; | |
4bc8c588 JB |
1249 | |
1250 | /* Record the address after the last instruction that changed | |
1251 | the FP, SP, or backlink. Ignore instructions that changed | |
1252 | them back to their original values --- those are probably | |
1253 | restore instructions. (The back chain is never restored, | |
1254 | just popped.) */ | |
1255 | { | |
3fc46200 UW |
1256 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1257 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
4bc8c588 | 1258 | |
3fc46200 UW |
1259 | if ((! pv_is_identical (pre_insn_sp, sp) |
1260 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) | |
1261 | && sp.kind != pvk_unknown) | |
1262 | || (! pv_is_identical (pre_insn_fp, fp) | |
1263 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) | |
1264 | && fp.kind != pvk_unknown) | |
121d8485 | 1265 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
a8c99f38 | 1266 | result = next_pc; |
4bc8c588 | 1267 | } |
5769d3cd | 1268 | } |
4bc8c588 | 1269 | |
ee1b3323 UW |
1270 | /* Record where all the registers were saved. */ |
1271 | pv_area_scan (data->stack, s390_check_for_saved, data); | |
1272 | ||
1273 | free_pv_area (data->stack); | |
1274 | data->stack = NULL; | |
1275 | ||
4bc8c588 | 1276 | return result; |
5769d3cd AC |
1277 | } |
1278 | ||
a8c99f38 JB |
1279 | /* Advance PC across any function entry prologue instructions to reach |
1280 | some "real" code. */ | |
1281 | static CORE_ADDR | |
6093d2eb | 1282 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
a8c99f38 JB |
1283 | { |
1284 | struct s390_prologue_data data; | |
1285 | CORE_ADDR skip_pc; | |
6093d2eb | 1286 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
a8c99f38 JB |
1287 | return skip_pc ? skip_pc : pc; |
1288 | } | |
1289 | ||
d0f54f9d JB |
1290 | /* Return true if we are in the functin's epilogue, i.e. after the |
1291 | instruction that destroyed the function's stack frame. */ | |
1292 | static int | |
1293 | s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1294 | { | |
1295 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
1296 | ||
1297 | /* In frameless functions, there's not frame to destroy and thus | |
1298 | we don't care about the epilogue. | |
1299 | ||
1300 | In functions with frame, the epilogue sequence is a pair of | |
1301 | a LM-type instruction that restores (amongst others) the | |
1302 | return register %r14 and the stack pointer %r15, followed | |
1303 | by a branch 'br %r14' --or equivalent-- that effects the | |
1304 | actual return. | |
1305 | ||
1306 | In that situation, this function needs to return 'true' in | |
1307 | exactly one case: when pc points to that branch instruction. | |
1308 | ||
1309 | Thus we try to disassemble the one instructions immediately | |
177b42fe | 1310 | preceding pc and check whether it is an LM-type instruction |
d0f54f9d JB |
1311 | modifying the stack pointer. |
1312 | ||
1313 | Note that disassembling backwards is not reliable, so there | |
1314 | is a slight chance of false positives here ... */ | |
1315 | ||
1316 | bfd_byte insn[6]; | |
1317 | unsigned int r1, r3, b2; | |
1318 | int d2; | |
1319 | ||
1320 | if (word_size == 4 | |
8defab1a | 1321 | && !target_read_memory (pc - 4, insn, 4) |
d0f54f9d JB |
1322 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
1323 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1324 | return 1; | |
1325 | ||
a8c99f38 | 1326 | if (word_size == 4 |
8defab1a | 1327 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 JB |
1328 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
1329 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1330 | return 1; | |
1331 | ||
d0f54f9d | 1332 | if (word_size == 8 |
8defab1a | 1333 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 | 1334 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
d0f54f9d JB |
1335 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
1336 | return 1; | |
1337 | ||
1338 | return 0; | |
1339 | } | |
5769d3cd | 1340 | |
1db4e8a0 UW |
1341 | /* Displaced stepping. */ |
1342 | ||
1343 | /* Fix up the state of registers and memory after having single-stepped | |
1344 | a displaced instruction. */ | |
1345 | static void | |
1346 | s390_displaced_step_fixup (struct gdbarch *gdbarch, | |
1347 | struct displaced_step_closure *closure, | |
1348 | CORE_ADDR from, CORE_ADDR to, | |
1349 | struct regcache *regs) | |
1350 | { | |
1351 | /* Since we use simple_displaced_step_copy_insn, our closure is a | |
1352 | copy of the instruction. */ | |
1353 | gdb_byte *insn = (gdb_byte *) closure; | |
1354 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
1355 | int insnlen = s390_instrlen[insn[0] >> 6]; | |
1356 | ||
1357 | /* Fields for various kinds of instructions. */ | |
1358 | unsigned int b2, r1, r2, x2, r3; | |
1359 | int i2, d2; | |
1360 | ||
1361 | /* Get current PC and addressing mode bit. */ | |
1362 | CORE_ADDR pc = regcache_read_pc (regs); | |
beaabab2 | 1363 | ULONGEST amode = 0; |
1db4e8a0 UW |
1364 | |
1365 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
1366 | { | |
1367 | regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); | |
1368 | amode &= 0x80000000; | |
1369 | } | |
1370 | ||
1371 | if (debug_displaced) | |
1372 | fprintf_unfiltered (gdb_stdlog, | |
1373 | "displaced: (s390) fixup (%s, %s) pc %s amode 0x%x\n", | |
1374 | paddress (gdbarch, from), paddress (gdbarch, to), | |
1375 | paddress (gdbarch, pc), (int) amode); | |
1376 | ||
1377 | /* Handle absolute branch and save instructions. */ | |
1378 | if (is_rr (insn, op_basr, &r1, &r2) | |
1379 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) | |
1380 | { | |
1381 | /* Recompute saved return address in R1. */ | |
1382 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1383 | amode | (from + insnlen)); | |
1384 | } | |
1385 | ||
1386 | /* Handle absolute branch instructions. */ | |
1387 | else if (is_rr (insn, op_bcr, &r1, &r2) | |
1388 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1389 | || is_rr (insn, op_bctr, &r1, &r2) | |
1390 | || is_rre (insn, op_bctgr, &r1, &r2) | |
1391 | || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) | |
1392 | || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) | |
1393 | || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) | |
1394 | || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) | |
1395 | || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) | |
1396 | || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) | |
1397 | { | |
1398 | /* Update PC iff branch was *not* taken. */ | |
1399 | if (pc == to + insnlen) | |
1400 | regcache_write_pc (regs, from + insnlen); | |
1401 | } | |
1402 | ||
1403 | /* Handle PC-relative branch and save instructions. */ | |
1404 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) | |
1405 | || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) | |
1406 | { | |
1407 | /* Update PC. */ | |
1408 | regcache_write_pc (regs, pc - to + from); | |
1409 | /* Recompute saved return address in R1. */ | |
1410 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1411 | amode | (from + insnlen)); | |
1412 | } | |
1413 | ||
1414 | /* Handle PC-relative branch instructions. */ | |
1415 | else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1416 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1417 | || is_ri (insn, op1_brct, op2_brct, &r1, &i2) | |
1418 | || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2) | |
1419 | || is_rsi (insn, op_brxh, &r1, &r3, &i2) | |
1420 | || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2) | |
1421 | || is_rsi (insn, op_brxle, &r1, &r3, &i2) | |
1422 | || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2)) | |
1423 | { | |
1424 | /* Update PC. */ | |
1425 | regcache_write_pc (regs, pc - to + from); | |
1426 | } | |
1427 | ||
1428 | /* Handle LOAD ADDRESS RELATIVE LONG. */ | |
1429 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) | |
1430 | { | |
1431 | /* Recompute output address in R1. */ | |
1432 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1433 | amode | (from + insnlen + i2*2)); | |
1434 | } | |
1435 | ||
1436 | /* If we executed a breakpoint instruction, point PC right back at it. */ | |
1437 | else if (insn[0] == 0x0 && insn[1] == 0x1) | |
1438 | regcache_write_pc (regs, from); | |
1439 | ||
1440 | /* For any other insn, PC points right after the original instruction. */ | |
1441 | else | |
1442 | regcache_write_pc (regs, from + insnlen); | |
1443 | } | |
a8c99f38 JB |
1444 | |
1445 | /* Normal stack frames. */ | |
1446 | ||
1447 | struct s390_unwind_cache { | |
1448 | ||
1449 | CORE_ADDR func; | |
1450 | CORE_ADDR frame_base; | |
1451 | CORE_ADDR local_base; | |
1452 | ||
1453 | struct trad_frame_saved_reg *saved_regs; | |
1454 | }; | |
1455 | ||
a78f21af | 1456 | static int |
f089c433 | 1457 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1458 | struct s390_unwind_cache *info) |
5769d3cd | 1459 | { |
f089c433 | 1460 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
121d8485 | 1461 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 JB |
1462 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1463 | struct s390_prologue_data data; | |
3fc46200 UW |
1464 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
1465 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; | |
121d8485 UW |
1466 | int i; |
1467 | CORE_ADDR cfa; | |
a8c99f38 JB |
1468 | CORE_ADDR func; |
1469 | CORE_ADDR result; | |
1470 | ULONGEST reg; | |
1471 | CORE_ADDR prev_sp; | |
1472 | int frame_pointer; | |
1473 | int size; | |
edb3359d | 1474 | struct frame_info *next_frame; |
a8c99f38 JB |
1475 | |
1476 | /* Try to find the function start address. If we can't find it, we don't | |
1477 | bother searching for it -- with modern compilers this would be mostly | |
1478 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data | |
1479 | or else a valid backchain ... */ | |
f089c433 | 1480 | func = get_frame_func (this_frame); |
a8c99f38 JB |
1481 | if (!func) |
1482 | return 0; | |
5769d3cd | 1483 | |
a8c99f38 JB |
1484 | /* Try to analyze the prologue. */ |
1485 | result = s390_analyze_prologue (gdbarch, func, | |
f089c433 | 1486 | get_frame_pc (this_frame), &data); |
a8c99f38 | 1487 | if (!result) |
5769d3cd | 1488 | return 0; |
5769d3cd | 1489 | |
a8c99f38 JB |
1490 | /* If this was successful, we should have found the instruction that |
1491 | sets the stack pointer register to the previous value of the stack | |
1492 | pointer minus the frame size. */ | |
3fc46200 | 1493 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
5769d3cd | 1494 | return 0; |
a8c99f38 JB |
1495 | |
1496 | /* A frame size of zero at this point can mean either a real | |
1497 | frameless function, or else a failure to find the prologue. | |
1498 | Perform some sanity checks to verify we really have a | |
1499 | frameless function. */ | |
1500 | if (sp->k == 0) | |
5769d3cd | 1501 | { |
a8c99f38 JB |
1502 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
1503 | size zero. This is only possible if the next frame is a sentinel | |
1504 | frame, a dummy frame, or a signal trampoline frame. */ | |
0e100dab AC |
1505 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
1506 | needed, instead the code should simpliy rely on its | |
1507 | analysis. */ | |
edb3359d DJ |
1508 | next_frame = get_next_frame (this_frame); |
1509 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1510 | next_frame = get_next_frame (next_frame); | |
1511 | if (next_frame | |
f089c433 | 1512 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
5769d3cd | 1513 | return 0; |
5769d3cd | 1514 | |
a8c99f38 JB |
1515 | /* If we really have a frameless function, %r14 must be valid |
1516 | -- in particular, it must point to a different function. */ | |
f089c433 | 1517 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
a8c99f38 JB |
1518 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
1519 | if (get_pc_function_start (reg) == func) | |
5769d3cd | 1520 | { |
a8c99f38 JB |
1521 | /* However, there is one case where it *is* valid for %r14 |
1522 | to point to the same function -- if this is a recursive | |
1523 | call, and we have stopped in the prologue *before* the | |
1524 | stack frame was allocated. | |
1525 | ||
1526 | Recognize this case by looking ahead a bit ... */ | |
5769d3cd | 1527 | |
a8c99f38 | 1528 | struct s390_prologue_data data2; |
3fc46200 | 1529 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
a8c99f38 JB |
1530 | |
1531 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) | |
3fc46200 | 1532 | && pv_is_register (*sp, S390_SP_REGNUM) |
a8c99f38 JB |
1533 | && sp->k != 0)) |
1534 | return 0; | |
5769d3cd | 1535 | } |
5769d3cd | 1536 | } |
5769d3cd AC |
1537 | |
1538 | ||
a8c99f38 JB |
1539 | /* OK, we've found valid prologue data. */ |
1540 | size = -sp->k; | |
5769d3cd | 1541 | |
a8c99f38 JB |
1542 | /* If the frame pointer originally also holds the same value |
1543 | as the stack pointer, we're probably using it. If it holds | |
1544 | some other value -- even a constant offset -- it is most | |
1545 | likely used as temp register. */ | |
3fc46200 | 1546 | if (pv_is_identical (*sp, *fp)) |
a8c99f38 JB |
1547 | frame_pointer = S390_FRAME_REGNUM; |
1548 | else | |
1549 | frame_pointer = S390_SP_REGNUM; | |
1550 | ||
1551 | /* If we've detected a function with stack frame, we'll still have to | |
1552 | treat it as frameless if we're currently within the function epilog | |
c378eb4e | 1553 | code at a point where the frame pointer has already been restored. |
a8c99f38 | 1554 | This can only happen in an innermost frame. */ |
0e100dab AC |
1555 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
1556 | instead the code should simpliy rely on its analysis. */ | |
edb3359d DJ |
1557 | next_frame = get_next_frame (this_frame); |
1558 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1559 | next_frame = get_next_frame (next_frame); | |
f089c433 | 1560 | if (size > 0 |
edb3359d | 1561 | && (next_frame == NULL |
f089c433 | 1562 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
5769d3cd | 1563 | { |
a8c99f38 JB |
1564 | /* See the comment in s390_in_function_epilogue_p on why this is |
1565 | not completely reliable ... */ | |
f089c433 | 1566 | if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) |
5769d3cd | 1567 | { |
a8c99f38 JB |
1568 | memset (&data, 0, sizeof (data)); |
1569 | size = 0; | |
1570 | frame_pointer = S390_SP_REGNUM; | |
5769d3cd | 1571 | } |
5769d3cd | 1572 | } |
5769d3cd | 1573 | |
a8c99f38 JB |
1574 | /* Once we know the frame register and the frame size, we can unwind |
1575 | the current value of the frame register from the next frame, and | |
1576 | add back the frame size to arrive that the previous frame's | |
1577 | stack pointer value. */ | |
f089c433 | 1578 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
121d8485 | 1579 | cfa = prev_sp + 16*word_size + 32; |
5769d3cd | 1580 | |
7803799a UW |
1581 | /* Set up ABI call-saved/call-clobbered registers. */ |
1582 | for (i = 0; i < S390_NUM_REGS; i++) | |
1583 | if (!s390_register_call_saved (gdbarch, i)) | |
1584 | trad_frame_set_unknown (info->saved_regs, i); | |
1585 | ||
1586 | /* CC is always call-clobbered. */ | |
1587 | trad_frame_set_unknown (info->saved_regs, tdep->cc_regnum); | |
1588 | ||
121d8485 UW |
1589 | /* Record the addresses of all register spill slots the prologue parser |
1590 | has recognized. Consider only registers defined as call-saved by the | |
1591 | ABI; for call-clobbered registers the parser may have recognized | |
1592 | spurious stores. */ | |
5769d3cd | 1593 | |
7803799a UW |
1594 | for (i = 0; i < 16; i++) |
1595 | if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) | |
1596 | && data.gpr_slot[i] != 0) | |
121d8485 | 1597 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; |
a8c99f38 | 1598 | |
7803799a UW |
1599 | for (i = 0; i < 16; i++) |
1600 | if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) | |
1601 | && data.fpr_slot[i] != 0) | |
1602 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; | |
a8c99f38 JB |
1603 | |
1604 | /* Function return will set PC to %r14. */ | |
7803799a | 1605 | info->saved_regs[tdep->pc_regnum] = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1606 | |
1607 | /* In frameless functions, we unwind simply by moving the return | |
1608 | address to the PC. However, if we actually stored to the | |
1609 | save area, use that -- we might only think the function frameless | |
1610 | because we're in the middle of the prologue ... */ | |
1611 | if (size == 0 | |
7803799a | 1612 | && !trad_frame_addr_p (info->saved_regs, tdep->pc_regnum)) |
a8c99f38 | 1613 | { |
7803799a | 1614 | info->saved_regs[tdep->pc_regnum].realreg = S390_RETADDR_REGNUM; |
5769d3cd | 1615 | } |
a8c99f38 JB |
1616 | |
1617 | /* Another sanity check: unless this is a frameless function, | |
1618 | we should have found spill slots for SP and PC. | |
1619 | If not, we cannot unwind further -- this happens e.g. in | |
1620 | libc's thread_start routine. */ | |
1621 | if (size > 0) | |
5769d3cd | 1622 | { |
a8c99f38 | 1623 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
7803799a | 1624 | || !trad_frame_addr_p (info->saved_regs, tdep->pc_regnum)) |
a8c99f38 | 1625 | prev_sp = -1; |
5769d3cd | 1626 | } |
a8c99f38 JB |
1627 | |
1628 | /* We use the current value of the frame register as local_base, | |
1629 | and the top of the register save area as frame_base. */ | |
1630 | if (prev_sp != -1) | |
1631 | { | |
1632 | info->frame_base = prev_sp + 16*word_size + 32; | |
1633 | info->local_base = prev_sp - size; | |
1634 | } | |
1635 | ||
1636 | info->func = func; | |
1637 | return 1; | |
5769d3cd AC |
1638 | } |
1639 | ||
a78f21af | 1640 | static void |
f089c433 | 1641 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1642 | struct s390_unwind_cache *info) |
5769d3cd | 1643 | { |
f089c433 | 1644 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1645 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1646 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1647 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1648 | CORE_ADDR backchain; |
1649 | ULONGEST reg; | |
1650 | LONGEST sp; | |
7803799a UW |
1651 | int i; |
1652 | ||
1653 | /* Set up ABI call-saved/call-clobbered registers. */ | |
1654 | for (i = 0; i < S390_NUM_REGS; i++) | |
1655 | if (!s390_register_call_saved (gdbarch, i)) | |
1656 | trad_frame_set_unknown (info->saved_regs, i); | |
1657 | ||
1658 | /* CC is always call-clobbered. */ | |
1659 | trad_frame_set_unknown (info->saved_regs, tdep->cc_regnum); | |
a8c99f38 JB |
1660 | |
1661 | /* Get the backchain. */ | |
f089c433 | 1662 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
e17a4113 | 1663 | backchain = read_memory_unsigned_integer (reg, word_size, byte_order); |
a8c99f38 JB |
1664 | |
1665 | /* A zero backchain terminates the frame chain. As additional | |
1666 | sanity check, let's verify that the spill slot for SP in the | |
1667 | save area pointed to by the backchain in fact links back to | |
1668 | the save area. */ | |
1669 | if (backchain != 0 | |
e17a4113 UW |
1670 | && safe_read_memory_integer (backchain + 15*word_size, |
1671 | word_size, byte_order, &sp) | |
a8c99f38 JB |
1672 | && (CORE_ADDR)sp == backchain) |
1673 | { | |
1674 | /* We don't know which registers were saved, but it will have | |
1675 | to be at least %r14 and %r15. This will allow us to continue | |
1676 | unwinding, but other prev-frame registers may be incorrect ... */ | |
1677 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; | |
1678 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; | |
1679 | ||
1680 | /* Function return will set PC to %r14. */ | |
7803799a UW |
1681 | info->saved_regs[tdep->pc_regnum] |
1682 | = info->saved_regs[S390_RETADDR_REGNUM]; | |
a8c99f38 JB |
1683 | |
1684 | /* We use the current value of the frame register as local_base, | |
1685 | and the top of the register save area as frame_base. */ | |
1686 | info->frame_base = backchain + 16*word_size + 32; | |
1687 | info->local_base = reg; | |
1688 | } | |
1689 | ||
f089c433 | 1690 | info->func = get_frame_pc (this_frame); |
5769d3cd AC |
1691 | } |
1692 | ||
a8c99f38 | 1693 | static struct s390_unwind_cache * |
f089c433 | 1694 | s390_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 JB |
1695 | void **this_prologue_cache) |
1696 | { | |
1697 | struct s390_unwind_cache *info; | |
1698 | if (*this_prologue_cache) | |
1699 | return *this_prologue_cache; | |
1700 | ||
1701 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); | |
1702 | *this_prologue_cache = info; | |
f089c433 | 1703 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1704 | info->func = -1; |
1705 | info->frame_base = -1; | |
1706 | info->local_base = -1; | |
1707 | ||
1708 | /* Try to use prologue analysis to fill the unwind cache. | |
1709 | If this fails, fall back to reading the stack backchain. */ | |
f089c433 UW |
1710 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) |
1711 | s390_backchain_frame_unwind_cache (this_frame, info); | |
a8c99f38 JB |
1712 | |
1713 | return info; | |
1714 | } | |
5769d3cd | 1715 | |
a78f21af | 1716 | static void |
f089c433 | 1717 | s390_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1718 | void **this_prologue_cache, |
1719 | struct frame_id *this_id) | |
5769d3cd | 1720 | { |
a8c99f38 | 1721 | struct s390_unwind_cache *info |
f089c433 | 1722 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
5769d3cd | 1723 | |
a8c99f38 JB |
1724 | if (info->frame_base == -1) |
1725 | return; | |
5769d3cd | 1726 | |
a8c99f38 | 1727 | *this_id = frame_id_build (info->frame_base, info->func); |
5769d3cd AC |
1728 | } |
1729 | ||
f089c433 UW |
1730 | static struct value * |
1731 | s390_frame_prev_register (struct frame_info *this_frame, | |
1732 | void **this_prologue_cache, int regnum) | |
a8c99f38 | 1733 | { |
7803799a UW |
1734 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
1735 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
a8c99f38 | 1736 | struct s390_unwind_cache *info |
f089c433 | 1737 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
7803799a UW |
1738 | |
1739 | /* Unwind full GPRs to show at least the lower halves (as the | |
1740 | upper halves are undefined). */ | |
1741 | if (tdep->gpr_full_regnum != -1 | |
1742 | && regnum >= tdep->gpr_full_regnum | |
1743 | && regnum < tdep->gpr_full_regnum + 16) | |
1744 | { | |
1745 | int reg = regnum - tdep->gpr_full_regnum + S390_R0_REGNUM; | |
1746 | struct value *val, *newval; | |
1747 | ||
1748 | val = trad_frame_get_prev_register (this_frame, info->saved_regs, reg); | |
1749 | newval = value_cast (register_type (gdbarch, regnum), val); | |
1750 | if (value_optimized_out (val)) | |
1751 | set_value_optimized_out (newval, 1); | |
1752 | ||
1753 | return newval; | |
1754 | } | |
1755 | ||
f089c433 | 1756 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
1757 | } |
1758 | ||
1759 | static const struct frame_unwind s390_frame_unwind = { | |
1760 | NORMAL_FRAME, | |
8fbca658 | 1761 | default_frame_unwind_stop_reason, |
a8c99f38 | 1762 | s390_frame_this_id, |
f089c433 UW |
1763 | s390_frame_prev_register, |
1764 | NULL, | |
1765 | default_frame_sniffer | |
a8c99f38 JB |
1766 | }; |
1767 | ||
5769d3cd | 1768 | |
8e645ae7 AC |
1769 | /* Code stubs and their stack frames. For things like PLTs and NULL |
1770 | function calls (where there is no true frame and the return address | |
1771 | is in the RETADDR register). */ | |
a8c99f38 | 1772 | |
8e645ae7 AC |
1773 | struct s390_stub_unwind_cache |
1774 | { | |
a8c99f38 JB |
1775 | CORE_ADDR frame_base; |
1776 | struct trad_frame_saved_reg *saved_regs; | |
1777 | }; | |
1778 | ||
8e645ae7 | 1779 | static struct s390_stub_unwind_cache * |
f089c433 | 1780 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
8e645ae7 | 1781 | void **this_prologue_cache) |
5769d3cd | 1782 | { |
f089c433 | 1783 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1784 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1785 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
8e645ae7 | 1786 | struct s390_stub_unwind_cache *info; |
a8c99f38 | 1787 | ULONGEST reg; |
5c3cf190 | 1788 | |
a8c99f38 JB |
1789 | if (*this_prologue_cache) |
1790 | return *this_prologue_cache; | |
5c3cf190 | 1791 | |
8e645ae7 | 1792 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
a8c99f38 | 1793 | *this_prologue_cache = info; |
f089c433 | 1794 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1795 | |
1796 | /* The return address is in register %r14. */ | |
7803799a | 1797 | info->saved_regs[tdep->pc_regnum].realreg = S390_RETADDR_REGNUM; |
a8c99f38 JB |
1798 | |
1799 | /* Retrieve stack pointer and determine our frame base. */ | |
f089c433 | 1800 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
a8c99f38 JB |
1801 | info->frame_base = reg + 16*word_size + 32; |
1802 | ||
1803 | return info; | |
5769d3cd AC |
1804 | } |
1805 | ||
a8c99f38 | 1806 | static void |
f089c433 | 1807 | s390_stub_frame_this_id (struct frame_info *this_frame, |
8e645ae7 AC |
1808 | void **this_prologue_cache, |
1809 | struct frame_id *this_id) | |
5769d3cd | 1810 | { |
8e645ae7 | 1811 | struct s390_stub_unwind_cache *info |
f089c433 UW |
1812 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1813 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
a8c99f38 | 1814 | } |
5769d3cd | 1815 | |
f089c433 UW |
1816 | static struct value * |
1817 | s390_stub_frame_prev_register (struct frame_info *this_frame, | |
1818 | void **this_prologue_cache, int regnum) | |
8e645ae7 AC |
1819 | { |
1820 | struct s390_stub_unwind_cache *info | |
f089c433 UW |
1821 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1822 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
1823 | } |
1824 | ||
f089c433 UW |
1825 | static int |
1826 | s390_stub_frame_sniffer (const struct frame_unwind *self, | |
1827 | struct frame_info *this_frame, | |
1828 | void **this_prologue_cache) | |
a8c99f38 | 1829 | { |
93d42b30 | 1830 | CORE_ADDR addr_in_block; |
8e645ae7 AC |
1831 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
1832 | ||
1833 | /* If the current PC points to non-readable memory, we assume we | |
1834 | have trapped due to an invalid function pointer call. We handle | |
1835 | the non-existing current function like a PLT stub. */ | |
f089c433 | 1836 | addr_in_block = get_frame_address_in_block (this_frame); |
93d42b30 | 1837 | if (in_plt_section (addr_in_block, NULL) |
f089c433 UW |
1838 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
1839 | return 1; | |
1840 | return 0; | |
a8c99f38 | 1841 | } |
5769d3cd | 1842 | |
f089c433 UW |
1843 | static const struct frame_unwind s390_stub_frame_unwind = { |
1844 | NORMAL_FRAME, | |
8fbca658 | 1845 | default_frame_unwind_stop_reason, |
f089c433 UW |
1846 | s390_stub_frame_this_id, |
1847 | s390_stub_frame_prev_register, | |
1848 | NULL, | |
1849 | s390_stub_frame_sniffer | |
1850 | }; | |
1851 | ||
5769d3cd | 1852 | |
a8c99f38 | 1853 | /* Signal trampoline stack frames. */ |
5769d3cd | 1854 | |
a8c99f38 JB |
1855 | struct s390_sigtramp_unwind_cache { |
1856 | CORE_ADDR frame_base; | |
1857 | struct trad_frame_saved_reg *saved_regs; | |
1858 | }; | |
5769d3cd | 1859 | |
a8c99f38 | 1860 | static struct s390_sigtramp_unwind_cache * |
f089c433 | 1861 | s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1862 | void **this_prologue_cache) |
5769d3cd | 1863 | { |
f089c433 | 1864 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1865 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1866 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1867 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1868 | struct s390_sigtramp_unwind_cache *info; |
1869 | ULONGEST this_sp, prev_sp; | |
7803799a UW |
1870 | CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off; |
1871 | ULONGEST pswm; | |
a8c99f38 JB |
1872 | int i; |
1873 | ||
1874 | if (*this_prologue_cache) | |
1875 | return *this_prologue_cache; | |
5769d3cd | 1876 | |
a8c99f38 JB |
1877 | info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); |
1878 | *this_prologue_cache = info; | |
f089c433 | 1879 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 | 1880 | |
f089c433 UW |
1881 | this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
1882 | next_ra = get_frame_pc (this_frame); | |
a8c99f38 JB |
1883 | next_cfa = this_sp + 16*word_size + 32; |
1884 | ||
1885 | /* New-style RT frame: | |
1886 | retcode + alignment (8 bytes) | |
1887 | siginfo (128 bytes) | |
c378eb4e | 1888 | ucontext (contains sigregs at offset 5 words). */ |
a8c99f38 JB |
1889 | if (next_ra == next_cfa) |
1890 | { | |
f0f63663 | 1891 | sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); |
7803799a UW |
1892 | /* sigregs are followed by uc_sigmask (8 bytes), then by the |
1893 | upper GPR halves if present. */ | |
1894 | sigreg_high_off = 8; | |
a8c99f38 JB |
1895 | } |
1896 | ||
1897 | /* Old-style RT frame and all non-RT frames: | |
1898 | old signal mask (8 bytes) | |
c378eb4e | 1899 | pointer to sigregs. */ |
5769d3cd AC |
1900 | else |
1901 | { | |
e17a4113 UW |
1902 | sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, |
1903 | word_size, byte_order); | |
7803799a UW |
1904 | /* sigregs are followed by signo (4 bytes), then by the |
1905 | upper GPR halves if present. */ | |
1906 | sigreg_high_off = 4; | |
a8c99f38 | 1907 | } |
5769d3cd | 1908 | |
a8c99f38 JB |
1909 | /* The sigregs structure looks like this: |
1910 | long psw_mask; | |
1911 | long psw_addr; | |
1912 | long gprs[16]; | |
1913 | int acrs[16]; | |
1914 | int fpc; | |
1915 | int __pad; | |
1916 | double fprs[16]; */ | |
5769d3cd | 1917 | |
7803799a UW |
1918 | /* PSW mask and address. */ |
1919 | info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr; | |
a8c99f38 | 1920 | sigreg_ptr += word_size; |
7803799a | 1921 | info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr; |
a8c99f38 JB |
1922 | sigreg_ptr += word_size; |
1923 | ||
7803799a UW |
1924 | /* Point PC to PSWA as well. */ |
1925 | info->saved_regs[tdep->pc_regnum] = info->saved_regs[S390_PSWA_REGNUM]; | |
1926 | ||
1927 | /* Extract CC from PSWM. */ | |
1928 | pswm = read_memory_unsigned_integer ( | |
1929 | info->saved_regs[S390_PSWM_REGNUM].addr, | |
1930 | word_size, byte_order); | |
1931 | trad_frame_set_value (info->saved_regs, tdep->cc_regnum, | |
1932 | (pswm >> (8 * word_size - 20)) & 3); | |
1933 | ||
a8c99f38 JB |
1934 | /* Then the GPRs. */ |
1935 | for (i = 0; i < 16; i++) | |
1936 | { | |
1937 | info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; | |
1938 | sigreg_ptr += word_size; | |
1939 | } | |
1940 | ||
1941 | /* Then the ACRs. */ | |
1942 | for (i = 0; i < 16; i++) | |
1943 | { | |
1944 | info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; | |
1945 | sigreg_ptr += 4; | |
5769d3cd | 1946 | } |
5769d3cd | 1947 | |
a8c99f38 JB |
1948 | /* The floating-point control word. */ |
1949 | info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; | |
1950 | sigreg_ptr += 8; | |
5769d3cd | 1951 | |
a8c99f38 JB |
1952 | /* And finally the FPRs. */ |
1953 | for (i = 0; i < 16; i++) | |
1954 | { | |
1955 | info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; | |
1956 | sigreg_ptr += 8; | |
1957 | } | |
1958 | ||
7803799a UW |
1959 | /* If we have them, the GPR upper halves are appended at the end. */ |
1960 | sigreg_ptr += sigreg_high_off; | |
1961 | if (tdep->gpr_full_regnum != -1) | |
1962 | for (i = 0; i < 16; i++) | |
1963 | { | |
1964 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr; | |
1965 | sigreg_ptr += 4; | |
1966 | } | |
1967 | ||
1968 | /* Provide read-only copies of the full registers. */ | |
1969 | if (tdep->gpr_full_regnum != -1) | |
1970 | for (i = 0; i < 16; i++) | |
1971 | { | |
1972 | ULONGEST low, high; | |
1973 | low = read_memory_unsigned_integer ( | |
1974 | info->saved_regs[S390_R0_REGNUM + i].addr, | |
1975 | 4, byte_order); | |
1976 | high = read_memory_unsigned_integer ( | |
1977 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr, | |
1978 | 4, byte_order); | |
1979 | ||
1980 | trad_frame_set_value (info->saved_regs, tdep->gpr_full_regnum + i, | |
1981 | (high << 32) | low); | |
1982 | } | |
1983 | ||
a8c99f38 JB |
1984 | /* Restore the previous frame's SP. */ |
1985 | prev_sp = read_memory_unsigned_integer ( | |
1986 | info->saved_regs[S390_SP_REGNUM].addr, | |
e17a4113 | 1987 | word_size, byte_order); |
5769d3cd | 1988 | |
a8c99f38 JB |
1989 | /* Determine our frame base. */ |
1990 | info->frame_base = prev_sp + 16*word_size + 32; | |
5769d3cd | 1991 | |
a8c99f38 | 1992 | return info; |
5769d3cd AC |
1993 | } |
1994 | ||
a8c99f38 | 1995 | static void |
f089c433 | 1996 | s390_sigtramp_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1997 | void **this_prologue_cache, |
1998 | struct frame_id *this_id) | |
5769d3cd | 1999 | { |
a8c99f38 | 2000 | struct s390_sigtramp_unwind_cache *info |
f089c433 UW |
2001 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
2002 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
5769d3cd AC |
2003 | } |
2004 | ||
f089c433 UW |
2005 | static struct value * |
2006 | s390_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
2007 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
2008 | { |
2009 | struct s390_sigtramp_unwind_cache *info | |
f089c433 UW |
2010 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
2011 | return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum); | |
a8c99f38 JB |
2012 | } |
2013 | ||
f089c433 UW |
2014 | static int |
2015 | s390_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
2016 | struct frame_info *this_frame, | |
2017 | void **this_prologue_cache) | |
5769d3cd | 2018 | { |
f089c433 | 2019 | CORE_ADDR pc = get_frame_pc (this_frame); |
a8c99f38 | 2020 | bfd_byte sigreturn[2]; |
4c8287ac | 2021 | |
8defab1a | 2022 | if (target_read_memory (pc, sigreturn, 2)) |
f089c433 | 2023 | return 0; |
4c8287ac | 2024 | |
a8c99f38 | 2025 | if (sigreturn[0] != 0x0a /* svc */) |
f089c433 | 2026 | return 0; |
5769d3cd | 2027 | |
a8c99f38 JB |
2028 | if (sigreturn[1] != 119 /* sigreturn */ |
2029 | && sigreturn[1] != 173 /* rt_sigreturn */) | |
f089c433 | 2030 | return 0; |
a8c99f38 | 2031 | |
f089c433 | 2032 | return 1; |
5769d3cd AC |
2033 | } |
2034 | ||
f089c433 UW |
2035 | static const struct frame_unwind s390_sigtramp_frame_unwind = { |
2036 | SIGTRAMP_FRAME, | |
8fbca658 | 2037 | default_frame_unwind_stop_reason, |
f089c433 UW |
2038 | s390_sigtramp_frame_this_id, |
2039 | s390_sigtramp_frame_prev_register, | |
2040 | NULL, | |
2041 | s390_sigtramp_frame_sniffer | |
2042 | }; | |
2043 | ||
4c8287ac | 2044 | |
a8c99f38 JB |
2045 | /* Frame base handling. */ |
2046 | ||
2047 | static CORE_ADDR | |
f089c433 | 2048 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
4c8287ac | 2049 | { |
a8c99f38 | 2050 | struct s390_unwind_cache *info |
f089c433 | 2051 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2052 | return info->frame_base; |
2053 | } | |
2054 | ||
2055 | static CORE_ADDR | |
f089c433 | 2056 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
a8c99f38 JB |
2057 | { |
2058 | struct s390_unwind_cache *info | |
f089c433 | 2059 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2060 | return info->local_base; |
2061 | } | |
2062 | ||
2063 | static const struct frame_base s390_frame_base = { | |
2064 | &s390_frame_unwind, | |
2065 | s390_frame_base_address, | |
2066 | s390_local_base_address, | |
2067 | s390_local_base_address | |
2068 | }; | |
2069 | ||
2070 | static CORE_ADDR | |
2071 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2072 | { | |
7803799a | 2073 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2074 | ULONGEST pc; |
7803799a | 2075 | pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); |
a8c99f38 JB |
2076 | return gdbarch_addr_bits_remove (gdbarch, pc); |
2077 | } | |
2078 | ||
2079 | static CORE_ADDR | |
2080 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2081 | { | |
2082 | ULONGEST sp; | |
2083 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); | |
2084 | return gdbarch_addr_bits_remove (gdbarch, sp); | |
4c8287ac JB |
2085 | } |
2086 | ||
2087 | ||
a431654a AC |
2088 | /* DWARF-2 frame support. */ |
2089 | ||
7803799a UW |
2090 | static struct value * |
2091 | s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, | |
2092 | int regnum) | |
2093 | { | |
2094 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
2095 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2096 | int reg = regnum - tdep->gpr_full_regnum; | |
2097 | struct value *val, *newval; | |
2098 | ||
2099 | val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); | |
2100 | newval = value_cast (register_type (gdbarch, regnum), val); | |
2101 | if (value_optimized_out (val)) | |
2102 | set_value_optimized_out (newval, 1); | |
2103 | ||
2104 | return newval; | |
2105 | } | |
2106 | ||
a431654a AC |
2107 | static void |
2108 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
aff37fc1 | 2109 | struct dwarf2_frame_state_reg *reg, |
4a4e5149 | 2110 | struct frame_info *this_frame) |
a431654a AC |
2111 | { |
2112 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2113 | ||
7803799a UW |
2114 | /* Fixed registers are call-saved or call-clobbered |
2115 | depending on the ABI in use. */ | |
2116 | if (regnum >= 0 && regnum < S390_NUM_REGS) | |
a431654a | 2117 | { |
7803799a | 2118 | if (s390_register_call_saved (gdbarch, regnum)) |
a431654a | 2119 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; |
7803799a | 2120 | else |
a431654a | 2121 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
7803799a | 2122 | } |
a431654a | 2123 | |
7803799a UW |
2124 | /* The CC pseudo register is call-clobbered. */ |
2125 | else if (regnum == tdep->cc_regnum) | |
2126 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
a431654a | 2127 | |
7803799a UW |
2128 | /* The PC register unwinds to the return address. */ |
2129 | else if (regnum == tdep->pc_regnum) | |
2130 | reg->how = DWARF2_FRAME_REG_RA; | |
a431654a | 2131 | |
7803799a UW |
2132 | /* We install a special function to unwind full GPRs to show at |
2133 | least the lower halves (as the upper halves are undefined). */ | |
2134 | else if (tdep->gpr_full_regnum != -1 | |
2135 | && regnum >= tdep->gpr_full_regnum | |
2136 | && regnum < tdep->gpr_full_regnum + 16) | |
2137 | { | |
2138 | reg->how = DWARF2_FRAME_REG_FN; | |
2139 | reg->loc.fn = s390_dwarf2_prev_register; | |
a431654a AC |
2140 | } |
2141 | } | |
2142 | ||
2143 | ||
b0cf273e JB |
2144 | /* Dummy function calls. */ |
2145 | ||
78f8b424 JB |
2146 | /* Return non-zero if TYPE is an integer-like type, zero otherwise. |
2147 | "Integer-like" types are those that should be passed the way | |
2148 | integers are: integers, enums, ranges, characters, and booleans. */ | |
2149 | static int | |
2150 | is_integer_like (struct type *type) | |
2151 | { | |
2152 | enum type_code code = TYPE_CODE (type); | |
2153 | ||
2154 | return (code == TYPE_CODE_INT | |
2155 | || code == TYPE_CODE_ENUM | |
2156 | || code == TYPE_CODE_RANGE | |
2157 | || code == TYPE_CODE_CHAR | |
2158 | || code == TYPE_CODE_BOOL); | |
2159 | } | |
2160 | ||
78f8b424 JB |
2161 | /* Return non-zero if TYPE is a pointer-like type, zero otherwise. |
2162 | "Pointer-like" types are those that should be passed the way | |
2163 | pointers are: pointers and references. */ | |
2164 | static int | |
2165 | is_pointer_like (struct type *type) | |
2166 | { | |
2167 | enum type_code code = TYPE_CODE (type); | |
2168 | ||
2169 | return (code == TYPE_CODE_PTR | |
2170 | || code == TYPE_CODE_REF); | |
2171 | } | |
2172 | ||
2173 | ||
20a940cc JB |
2174 | /* Return non-zero if TYPE is a `float singleton' or `double |
2175 | singleton', zero otherwise. | |
2176 | ||
2177 | A `T singleton' is a struct type with one member, whose type is | |
2178 | either T or a `T singleton'. So, the following are all float | |
2179 | singletons: | |
2180 | ||
2181 | struct { float x }; | |
2182 | struct { struct { float x; } x; }; | |
2183 | struct { struct { struct { float x; } x; } x; }; | |
2184 | ||
2185 | ... and so on. | |
2186 | ||
b0cf273e JB |
2187 | All such structures are passed as if they were floats or doubles, |
2188 | as the (revised) ABI says. */ | |
20a940cc JB |
2189 | static int |
2190 | is_float_singleton (struct type *type) | |
2191 | { | |
b0cf273e JB |
2192 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) |
2193 | { | |
2194 | struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); | |
2195 | CHECK_TYPEDEF (singleton_type); | |
2196 | ||
2197 | return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT | |
a16b8bcd | 2198 | || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT |
b0cf273e JB |
2199 | || is_float_singleton (singleton_type)); |
2200 | } | |
2201 | ||
2202 | return 0; | |
20a940cc JB |
2203 | } |
2204 | ||
2205 | ||
2206 | /* Return non-zero if TYPE is a struct-like type, zero otherwise. | |
2207 | "Struct-like" types are those that should be passed as structs are: | |
2208 | structs and unions. | |
2209 | ||
2210 | As an odd quirk, not mentioned in the ABI, GCC passes float and | |
2211 | double singletons as if they were a plain float, double, etc. (The | |
2212 | corresponding union types are handled normally.) So we exclude | |
2213 | those types here. *shrug* */ | |
2214 | static int | |
2215 | is_struct_like (struct type *type) | |
2216 | { | |
2217 | enum type_code code = TYPE_CODE (type); | |
2218 | ||
2219 | return (code == TYPE_CODE_UNION | |
2220 | || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); | |
2221 | } | |
2222 | ||
2223 | ||
2224 | /* Return non-zero if TYPE is a float-like type, zero otherwise. | |
2225 | "Float-like" types are those that should be passed as | |
2226 | floating-point values are. | |
2227 | ||
2228 | You'd think this would just be floats, doubles, long doubles, etc. | |
2229 | But as an odd quirk, not mentioned in the ABI, GCC passes float and | |
2230 | double singletons as if they were a plain float, double, etc. (The | |
4d819d0e | 2231 | corresponding union types are handled normally.) So we include |
20a940cc JB |
2232 | those types here. *shrug* */ |
2233 | static int | |
2234 | is_float_like (struct type *type) | |
2235 | { | |
2236 | return (TYPE_CODE (type) == TYPE_CODE_FLT | |
a16b8bcd | 2237 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
20a940cc JB |
2238 | || is_float_singleton (type)); |
2239 | } | |
2240 | ||
2241 | ||
78f8b424 | 2242 | static int |
b0cf273e | 2243 | is_power_of_two (unsigned int n) |
78f8b424 | 2244 | { |
b0cf273e | 2245 | return ((n & (n - 1)) == 0); |
78f8b424 JB |
2246 | } |
2247 | ||
b0cf273e JB |
2248 | /* Return non-zero if TYPE should be passed as a pointer to a copy, |
2249 | zero otherwise. */ | |
4d819d0e | 2250 | static int |
b0cf273e | 2251 | s390_function_arg_pass_by_reference (struct type *type) |
4d819d0e JB |
2252 | { |
2253 | unsigned length = TYPE_LENGTH (type); | |
b0cf273e JB |
2254 | if (length > 8) |
2255 | return 1; | |
4d819d0e | 2256 | |
56b9d9ac UW |
2257 | return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type))) |
2258 | || TYPE_CODE (type) == TYPE_CODE_COMPLEX | |
2259 | || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)); | |
4d819d0e JB |
2260 | } |
2261 | ||
b0cf273e JB |
2262 | /* Return non-zero if TYPE should be passed in a float register |
2263 | if possible. */ | |
78f8b424 | 2264 | static int |
b0cf273e | 2265 | s390_function_arg_float (struct type *type) |
78f8b424 | 2266 | { |
78f8b424 | 2267 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
2268 | if (length > 8) |
2269 | return 0; | |
78f8b424 | 2270 | |
b0cf273e | 2271 | return is_float_like (type); |
4d819d0e JB |
2272 | } |
2273 | ||
b0cf273e JB |
2274 | /* Return non-zero if TYPE should be passed in an integer register |
2275 | (or a pair of integer registers) if possible. */ | |
78f8b424 | 2276 | static int |
b0cf273e | 2277 | s390_function_arg_integer (struct type *type) |
78f8b424 | 2278 | { |
78f8b424 | 2279 | unsigned length = TYPE_LENGTH (type); |
b0cf273e JB |
2280 | if (length > 8) |
2281 | return 0; | |
78f8b424 | 2282 | |
b0cf273e JB |
2283 | return is_integer_like (type) |
2284 | || is_pointer_like (type) | |
2285 | || (is_struct_like (type) && is_power_of_two (length)); | |
78f8b424 JB |
2286 | } |
2287 | ||
78f8b424 JB |
2288 | /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full |
2289 | word as required for the ABI. */ | |
2290 | static LONGEST | |
e17a4113 | 2291 | extend_simple_arg (struct gdbarch *gdbarch, struct value *arg) |
78f8b424 | 2292 | { |
e17a4113 | 2293 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
56b9d9ac | 2294 | struct type *type = check_typedef (value_type (arg)); |
78f8b424 JB |
2295 | |
2296 | /* Even structs get passed in the least significant bits of the | |
2297 | register / memory word. It's not really right to extract them as | |
2298 | an integer, but it does take care of the extension. */ | |
2299 | if (TYPE_UNSIGNED (type)) | |
0fd88904 | 2300 | return extract_unsigned_integer (value_contents (arg), |
e17a4113 | 2301 | TYPE_LENGTH (type), byte_order); |
78f8b424 | 2302 | else |
0fd88904 | 2303 | return extract_signed_integer (value_contents (arg), |
e17a4113 | 2304 | TYPE_LENGTH (type), byte_order); |
78f8b424 JB |
2305 | } |
2306 | ||
2307 | ||
78f8b424 JB |
2308 | /* Return the alignment required by TYPE. */ |
2309 | static int | |
2310 | alignment_of (struct type *type) | |
2311 | { | |
2312 | int alignment; | |
2313 | ||
2314 | if (is_integer_like (type) | |
2315 | || is_pointer_like (type) | |
a16b8bcd UW |
2316 | || TYPE_CODE (type) == TYPE_CODE_FLT |
2317 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
78f8b424 JB |
2318 | alignment = TYPE_LENGTH (type); |
2319 | else if (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
2320 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
2321 | { | |
2322 | int i; | |
2323 | ||
2324 | alignment = 1; | |
2325 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
2326 | { | |
56b9d9ac UW |
2327 | int field_alignment |
2328 | = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i))); | |
78f8b424 JB |
2329 | |
2330 | if (field_alignment > alignment) | |
2331 | alignment = field_alignment; | |
2332 | } | |
2333 | } | |
2334 | else | |
2335 | alignment = 1; | |
2336 | ||
2337 | /* Check that everything we ever return is a power of two. Lots of | |
2338 | code doesn't want to deal with aligning things to arbitrary | |
2339 | boundaries. */ | |
2340 | gdb_assert ((alignment & (alignment - 1)) == 0); | |
2341 | ||
2342 | return alignment; | |
2343 | } | |
2344 | ||
2345 | ||
2346 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in | |
ca557f44 AC |
2347 | place to be passed to a function, as specified by the "GNU/Linux |
2348 | for S/390 ELF Application Binary Interface Supplement". | |
78f8b424 JB |
2349 | |
2350 | SP is the current stack pointer. We must put arguments, links, | |
2351 | padding, etc. whereever they belong, and return the new stack | |
2352 | pointer value. | |
2353 | ||
2354 | If STRUCT_RETURN is non-zero, then the function we're calling is | |
2355 | going to return a structure by value; STRUCT_ADDR is the address of | |
2356 | a block we've allocated for it on the stack. | |
2357 | ||
2358 | Our caller has taken care of any type promotions needed to satisfy | |
2359 | prototypes or the old K&R argument-passing rules. */ | |
a78f21af | 2360 | static CORE_ADDR |
7d9b040b | 2361 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
b0cf273e JB |
2362 | struct regcache *regcache, CORE_ADDR bp_addr, |
2363 | int nargs, struct value **args, CORE_ADDR sp, | |
2364 | int struct_return, CORE_ADDR struct_addr) | |
5769d3cd | 2365 | { |
b0cf273e JB |
2366 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
2367 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
e17a4113 | 2368 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
78f8b424 | 2369 | int i; |
5769d3cd | 2370 | |
78f8b424 JB |
2371 | /* If the i'th argument is passed as a reference to a copy, then |
2372 | copy_addr[i] is the address of the copy we made. */ | |
2373 | CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); | |
5769d3cd | 2374 | |
c0cc4c83 | 2375 | /* Reserve space for the reference-to-copy area. */ |
78f8b424 JB |
2376 | for (i = 0; i < nargs; i++) |
2377 | { | |
2378 | struct value *arg = args[i]; | |
56b9d9ac | 2379 | struct type *type = check_typedef (value_type (arg)); |
78f8b424 | 2380 | unsigned length = TYPE_LENGTH (type); |
5769d3cd | 2381 | |
b0cf273e | 2382 | if (s390_function_arg_pass_by_reference (type)) |
01c464e9 | 2383 | { |
78f8b424 | 2384 | sp -= length; |
5b03f266 | 2385 | sp = align_down (sp, alignment_of (type)); |
78f8b424 | 2386 | copy_addr[i] = sp; |
01c464e9 | 2387 | } |
5769d3cd | 2388 | } |
5769d3cd | 2389 | |
78f8b424 JB |
2390 | /* Reserve space for the parameter area. As a conservative |
2391 | simplification, we assume that everything will be passed on the | |
b0cf273e JB |
2392 | stack. Since every argument larger than 8 bytes will be |
2393 | passed by reference, we use this simple upper bound. */ | |
2394 | sp -= nargs * 8; | |
78f8b424 | 2395 | |
78f8b424 JB |
2396 | /* After all that, make sure it's still aligned on an eight-byte |
2397 | boundary. */ | |
5b03f266 | 2398 | sp = align_down (sp, 8); |
78f8b424 | 2399 | |
c0cc4c83 UW |
2400 | /* Allocate the standard frame areas: the register save area, the |
2401 | word reserved for the compiler (which seems kind of meaningless), | |
2402 | and the back chain pointer. */ | |
2403 | sp -= 16*word_size + 32; | |
2404 | ||
2405 | /* Now we have the final SP value. Make sure we didn't underflow; | |
2406 | on 31-bit, this would result in addresses with the high bit set, | |
2407 | which causes confusion elsewhere. Note that if we error out | |
2408 | here, stack and registers remain untouched. */ | |
2409 | if (gdbarch_addr_bits_remove (gdbarch, sp) != sp) | |
2410 | error (_("Stack overflow")); | |
2411 | ||
2412 | ||
78f8b424 JB |
2413 | /* Finally, place the actual parameters, working from SP towards |
2414 | higher addresses. The code above is supposed to reserve enough | |
2415 | space for this. */ | |
2416 | { | |
2417 | int fr = 0; | |
2418 | int gr = 2; | |
c0cc4c83 | 2419 | CORE_ADDR starg = sp + 16*word_size + 32; |
78f8b424 | 2420 | |
b0cf273e | 2421 | /* A struct is returned using general register 2. */ |
4d819d0e | 2422 | if (struct_return) |
b0cf273e JB |
2423 | { |
2424 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2425 | struct_addr); | |
2426 | gr++; | |
2427 | } | |
4d819d0e | 2428 | |
78f8b424 JB |
2429 | for (i = 0; i < nargs; i++) |
2430 | { | |
2431 | struct value *arg = args[i]; | |
56b9d9ac | 2432 | struct type *type = check_typedef (value_type (arg)); |
b0cf273e JB |
2433 | unsigned length = TYPE_LENGTH (type); |
2434 | ||
2435 | if (s390_function_arg_pass_by_reference (type)) | |
2436 | { | |
c0cc4c83 UW |
2437 | /* Actually copy the argument contents to the stack slot |
2438 | that was reserved above. */ | |
2439 | write_memory (copy_addr[i], value_contents (arg), length); | |
2440 | ||
b0cf273e JB |
2441 | if (gr <= 6) |
2442 | { | |
2443 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
2444 | copy_addr[i]); | |
2445 | gr++; | |
2446 | } | |
2447 | else | |
2448 | { | |
e17a4113 UW |
2449 | write_memory_unsigned_integer (starg, word_size, byte_order, |
2450 | copy_addr[i]); | |
b0cf273e JB |
2451 | starg += word_size; |
2452 | } | |
2453 | } | |
2454 | else if (s390_function_arg_float (type)) | |
2455 | { | |
2456 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, | |
2457 | the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ | |
2458 | if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) | |
2459 | { | |
2460 | /* When we store a single-precision value in an FP register, | |
2461 | it occupies the leftmost bits. */ | |
2462 | regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, | |
0fd88904 | 2463 | 0, length, value_contents (arg)); |
b0cf273e JB |
2464 | fr += 2; |
2465 | } | |
2466 | else | |
2467 | { | |
2468 | /* When we store a single-precision value in a stack slot, | |
2469 | it occupies the rightmost bits. */ | |
2470 | starg = align_up (starg + length, word_size); | |
0fd88904 | 2471 | write_memory (starg - length, value_contents (arg), length); |
b0cf273e JB |
2472 | } |
2473 | } | |
2474 | else if (s390_function_arg_integer (type) && length <= word_size) | |
2475 | { | |
2476 | if (gr <= 6) | |
2477 | { | |
2478 | /* Integer arguments are always extended to word size. */ | |
2479 | regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, | |
c378eb4e MS |
2480 | extend_simple_arg (gdbarch, |
2481 | arg)); | |
b0cf273e JB |
2482 | gr++; |
2483 | } | |
2484 | else | |
2485 | { | |
2486 | /* Integer arguments are always extended to word size. */ | |
e17a4113 UW |
2487 | write_memory_signed_integer (starg, word_size, byte_order, |
2488 | extend_simple_arg (gdbarch, arg)); | |
b0cf273e JB |
2489 | starg += word_size; |
2490 | } | |
2491 | } | |
2492 | else if (s390_function_arg_integer (type) && length == 2*word_size) | |
2493 | { | |
2494 | if (gr <= 5) | |
2495 | { | |
2496 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr, | |
0fd88904 | 2497 | value_contents (arg)); |
b0cf273e | 2498 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, |
0fd88904 | 2499 | value_contents (arg) + word_size); |
b0cf273e JB |
2500 | gr += 2; |
2501 | } | |
2502 | else | |
2503 | { | |
2504 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG | |
2505 | in it, then don't go back and use it again later. */ | |
2506 | gr = 7; | |
2507 | ||
0fd88904 | 2508 | write_memory (starg, value_contents (arg), length); |
b0cf273e JB |
2509 | starg += length; |
2510 | } | |
2511 | } | |
2512 | else | |
e2e0b3e5 | 2513 | internal_error (__FILE__, __LINE__, _("unknown argument type")); |
78f8b424 JB |
2514 | } |
2515 | } | |
2516 | ||
b0cf273e JB |
2517 | /* Store return address. */ |
2518 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); | |
2519 | ||
2520 | /* Store updated stack pointer. */ | |
2521 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); | |
78f8b424 | 2522 | |
a8c99f38 | 2523 | /* We need to return the 'stack part' of the frame ID, |
121d8485 UW |
2524 | which is actually the top of the register save area. */ |
2525 | return sp + 16*word_size + 32; | |
5769d3cd AC |
2526 | } |
2527 | ||
f089c433 | 2528 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
b0cf273e JB |
2529 | dummy frame. The frame ID's base needs to match the TOS value |
2530 | returned by push_dummy_call, and the PC match the dummy frame's | |
2531 | breakpoint. */ | |
2532 | static struct frame_id | |
f089c433 | 2533 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
b0cf273e | 2534 | { |
a8c99f38 | 2535 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
f089c433 UW |
2536 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2537 | sp = gdbarch_addr_bits_remove (gdbarch, sp); | |
a8c99f38 | 2538 | |
121d8485 | 2539 | return frame_id_build (sp + 16*word_size + 32, |
f089c433 | 2540 | get_frame_pc (this_frame)); |
b0cf273e | 2541 | } |
c8f9d51c | 2542 | |
4074e13c JB |
2543 | static CORE_ADDR |
2544 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
2545 | { | |
2546 | /* Both the 32- and 64-bit ABI's say that the stack pointer should | |
2547 | always be aligned on an eight-byte boundary. */ | |
2548 | return (addr & -8); | |
2549 | } | |
2550 | ||
2551 | ||
b0cf273e JB |
2552 | /* Function return value access. */ |
2553 | ||
2554 | static enum return_value_convention | |
2555 | s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) | |
c8f9d51c | 2556 | { |
b0cf273e JB |
2557 | int length = TYPE_LENGTH (type); |
2558 | if (length > 8) | |
2559 | return RETURN_VALUE_STRUCT_CONVENTION; | |
2560 | ||
2561 | switch (TYPE_CODE (type)) | |
2562 | { | |
2563 | case TYPE_CODE_STRUCT: | |
2564 | case TYPE_CODE_UNION: | |
2565 | case TYPE_CODE_ARRAY: | |
56b9d9ac | 2566 | case TYPE_CODE_COMPLEX: |
b0cf273e | 2567 | return RETURN_VALUE_STRUCT_CONVENTION; |
c8f9d51c | 2568 | |
b0cf273e JB |
2569 | default: |
2570 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2571 | } | |
c8f9d51c JB |
2572 | } |
2573 | ||
b0cf273e | 2574 | static enum return_value_convention |
c055b101 CV |
2575 | s390_return_value (struct gdbarch *gdbarch, struct type *func_type, |
2576 | struct type *type, struct regcache *regcache, | |
2577 | gdb_byte *out, const gdb_byte *in) | |
5769d3cd | 2578 | { |
e17a4113 | 2579 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
b0cf273e | 2580 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
56b9d9ac UW |
2581 | enum return_value_convention rvc; |
2582 | int length; | |
2583 | ||
2584 | type = check_typedef (type); | |
2585 | rvc = s390_return_value_convention (gdbarch, type); | |
2586 | length = TYPE_LENGTH (type); | |
2587 | ||
b0cf273e JB |
2588 | if (in) |
2589 | { | |
2590 | switch (rvc) | |
2591 | { | |
2592 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2593 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2594 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2595 | { |
2596 | /* When we store a single-precision value in an FP register, | |
2597 | it occupies the leftmost bits. */ | |
2598 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, | |
2599 | 0, length, in); | |
2600 | } | |
2601 | else if (length <= word_size) | |
2602 | { | |
2603 | /* Integer arguments are always extended to word size. */ | |
2604 | if (TYPE_UNSIGNED (type)) | |
2605 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, | |
e17a4113 | 2606 | extract_unsigned_integer (in, length, byte_order)); |
b0cf273e JB |
2607 | else |
2608 | regcache_cooked_write_signed (regcache, S390_R2_REGNUM, | |
e17a4113 | 2609 | extract_signed_integer (in, length, byte_order)); |
b0cf273e JB |
2610 | } |
2611 | else if (length == 2*word_size) | |
2612 | { | |
2613 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); | |
43af2100 | 2614 | regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size); |
b0cf273e JB |
2615 | } |
2616 | else | |
e2e0b3e5 | 2617 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e JB |
2618 | break; |
2619 | ||
2620 | case RETURN_VALUE_STRUCT_CONVENTION: | |
8a3fe4f8 | 2621 | error (_("Cannot set function return value.")); |
b0cf273e JB |
2622 | break; |
2623 | } | |
2624 | } | |
2625 | else if (out) | |
2626 | { | |
2627 | switch (rvc) | |
2628 | { | |
2629 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2630 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2631 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2632 | { |
2633 | /* When we store a single-precision value in an FP register, | |
2634 | it occupies the leftmost bits. */ | |
2635 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, | |
2636 | 0, length, out); | |
2637 | } | |
2638 | else if (length <= word_size) | |
2639 | { | |
2640 | /* Integer arguments occupy the rightmost bits. */ | |
2641 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, | |
2642 | word_size - length, length, out); | |
2643 | } | |
2644 | else if (length == 2*word_size) | |
2645 | { | |
2646 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); | |
43af2100 | 2647 | regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size); |
b0cf273e JB |
2648 | } |
2649 | else | |
e2e0b3e5 | 2650 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e | 2651 | break; |
5769d3cd | 2652 | |
b0cf273e | 2653 | case RETURN_VALUE_STRUCT_CONVENTION: |
8a3fe4f8 | 2654 | error (_("Function return value unknown.")); |
b0cf273e JB |
2655 | break; |
2656 | } | |
2657 | } | |
2658 | ||
2659 | return rvc; | |
2660 | } | |
5769d3cd AC |
2661 | |
2662 | ||
a8c99f38 JB |
2663 | /* Breakpoints. */ |
2664 | ||
43af2100 | 2665 | static const gdb_byte * |
c378eb4e MS |
2666 | s390_breakpoint_from_pc (struct gdbarch *gdbarch, |
2667 | CORE_ADDR *pcptr, int *lenptr) | |
5769d3cd | 2668 | { |
43af2100 | 2669 | static const gdb_byte breakpoint[] = { 0x0, 0x1 }; |
5769d3cd AC |
2670 | |
2671 | *lenptr = sizeof (breakpoint); | |
2672 | return breakpoint; | |
2673 | } | |
2674 | ||
5769d3cd | 2675 | |
a8c99f38 | 2676 | /* Address handling. */ |
5769d3cd AC |
2677 | |
2678 | static CORE_ADDR | |
24568a2c | 2679 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
5769d3cd | 2680 | { |
a8c99f38 | 2681 | return addr & 0x7fffffff; |
5769d3cd AC |
2682 | } |
2683 | ||
ffc65945 KB |
2684 | static int |
2685 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) | |
2686 | { | |
2687 | if (byte_size == 4) | |
119ac181 | 2688 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2689 | else |
2690 | return 0; | |
2691 | } | |
2692 | ||
2693 | static const char * | |
2694 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) | |
2695 | { | |
119ac181 | 2696 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
ffc65945 KB |
2697 | return "mode32"; |
2698 | else | |
2699 | return NULL; | |
2700 | } | |
2701 | ||
a78f21af | 2702 | static int |
c378eb4e MS |
2703 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
2704 | const char *name, | |
ffc65945 KB |
2705 | int *type_flags_ptr) |
2706 | { | |
2707 | if (strcmp (name, "mode32") == 0) | |
2708 | { | |
119ac181 | 2709 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2710 | return 1; |
2711 | } | |
2712 | else | |
2713 | return 0; | |
2714 | } | |
2715 | ||
a8c99f38 JB |
2716 | /* Set up gdbarch struct. */ |
2717 | ||
a78f21af | 2718 | static struct gdbarch * |
5769d3cd AC |
2719 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2720 | { | |
7803799a UW |
2721 | const struct target_desc *tdesc = info.target_desc; |
2722 | struct tdesc_arch_data *tdesc_data = NULL; | |
5769d3cd AC |
2723 | struct gdbarch *gdbarch; |
2724 | struct gdbarch_tdep *tdep; | |
7803799a UW |
2725 | int tdep_abi; |
2726 | int have_upper = 0; | |
2727 | int first_pseudo_reg, last_pseudo_reg; | |
2728 | ||
2729 | /* Default ABI and register size. */ | |
2730 | switch (info.bfd_arch_info->mach) | |
2731 | { | |
2732 | case bfd_mach_s390_31: | |
2733 | tdep_abi = ABI_LINUX_S390; | |
2734 | break; | |
2735 | ||
2736 | case bfd_mach_s390_64: | |
2737 | tdep_abi = ABI_LINUX_ZSERIES; | |
2738 | break; | |
2739 | ||
2740 | default: | |
2741 | return NULL; | |
2742 | } | |
2743 | ||
2744 | /* Use default target description if none provided by the target. */ | |
2745 | if (!tdesc_has_registers (tdesc)) | |
2746 | { | |
2747 | if (tdep_abi == ABI_LINUX_S390) | |
2748 | tdesc = tdesc_s390_linux32; | |
2749 | else | |
2750 | tdesc = tdesc_s390x_linux64; | |
2751 | } | |
2752 | ||
2753 | /* Check any target description for validity. */ | |
2754 | if (tdesc_has_registers (tdesc)) | |
2755 | { | |
2756 | static const char *const gprs[] = { | |
2757 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
2758 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
2759 | }; | |
2760 | static const char *const fprs[] = { | |
2761 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
2762 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" | |
2763 | }; | |
2764 | static const char *const acrs[] = { | |
2765 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", | |
2766 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" | |
2767 | }; | |
2768 | static const char *const gprs_lower[] = { | |
2769 | "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", | |
2770 | "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" | |
2771 | }; | |
2772 | static const char *const gprs_upper[] = { | |
2773 | "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", | |
2774 | "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" | |
2775 | }; | |
2776 | const struct tdesc_feature *feature; | |
2777 | int i, valid_p = 1; | |
2778 | ||
2779 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); | |
2780 | if (feature == NULL) | |
2781 | return NULL; | |
2782 | ||
2783 | tdesc_data = tdesc_data_alloc (); | |
2784 | ||
2785 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2786 | S390_PSWM_REGNUM, "pswm"); | |
2787 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2788 | S390_PSWA_REGNUM, "pswa"); | |
2789 | ||
2790 | if (tdesc_unnumbered_register (feature, "r0")) | |
2791 | { | |
2792 | for (i = 0; i < 16; i++) | |
2793 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2794 | S390_R0_REGNUM + i, gprs[i]); | |
2795 | } | |
2796 | else | |
2797 | { | |
2798 | have_upper = 1; | |
2799 | ||
2800 | for (i = 0; i < 16; i++) | |
2801 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2802 | S390_R0_REGNUM + i, | |
2803 | gprs_lower[i]); | |
2804 | for (i = 0; i < 16; i++) | |
2805 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2806 | S390_R0_UPPER_REGNUM + i, | |
2807 | gprs_upper[i]); | |
2808 | } | |
2809 | ||
2810 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); | |
2811 | if (feature == NULL) | |
2812 | { | |
2813 | tdesc_data_cleanup (tdesc_data); | |
2814 | return NULL; | |
2815 | } | |
2816 | ||
2817 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2818 | S390_FPC_REGNUM, "fpc"); | |
2819 | for (i = 0; i < 16; i++) | |
2820 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2821 | S390_F0_REGNUM + i, fprs[i]); | |
5769d3cd | 2822 | |
7803799a UW |
2823 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); |
2824 | if (feature == NULL) | |
2825 | { | |
2826 | tdesc_data_cleanup (tdesc_data); | |
2827 | return NULL; | |
2828 | } | |
2829 | ||
2830 | for (i = 0; i < 16; i++) | |
2831 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2832 | S390_A0_REGNUM + i, acrs[i]); | |
2833 | ||
2834 | if (!valid_p) | |
2835 | { | |
2836 | tdesc_data_cleanup (tdesc_data); | |
2837 | return NULL; | |
2838 | } | |
2839 | } | |
5769d3cd | 2840 | |
7803799a UW |
2841 | /* Find a candidate among extant architectures. */ |
2842 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
2843 | arches != NULL; | |
2844 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
2845 | { | |
2846 | tdep = gdbarch_tdep (arches->gdbarch); | |
2847 | if (!tdep) | |
2848 | continue; | |
2849 | if (tdep->abi != tdep_abi) | |
2850 | continue; | |
2851 | if ((tdep->gpr_full_regnum != -1) != have_upper) | |
2852 | continue; | |
2853 | if (tdesc_data != NULL) | |
2854 | tdesc_data_cleanup (tdesc_data); | |
2855 | return arches->gdbarch; | |
2856 | } | |
5769d3cd | 2857 | |
7803799a | 2858 | /* Otherwise create a new gdbarch for the specified machine type. */ |
d0f54f9d | 2859 | tdep = XCALLOC (1, struct gdbarch_tdep); |
7803799a | 2860 | tdep->abi = tdep_abi; |
d0f54f9d | 2861 | gdbarch = gdbarch_alloc (&info, tdep); |
5769d3cd AC |
2862 | |
2863 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); | |
4e409299 | 2864 | set_gdbarch_char_signed (gdbarch, 0); |
5769d3cd | 2865 | |
1de90795 UW |
2866 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
2867 | We can safely let them default to 128-bit, since the debug info | |
2868 | will give the size of type actually used in each case. */ | |
2869 | set_gdbarch_long_double_bit (gdbarch, 128); | |
2870 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
2871 | ||
aaab4dba | 2872 | /* Amount PC must be decremented by after a breakpoint. This is |
3b3b875c | 2873 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
aaab4dba | 2874 | always. */ |
5769d3cd | 2875 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
5769d3cd AC |
2876 | /* Stack grows downward. */ |
2877 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
5769d3cd AC |
2878 | set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); |
2879 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); | |
d0f54f9d | 2880 | set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); |
a8c99f38 | 2881 | |
7803799a | 2882 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
5769d3cd | 2883 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); |
d0f54f9d | 2884 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
d0f54f9d | 2885 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
d0f54f9d | 2886 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
9acbedc0 | 2887 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
d0f54f9d JB |
2888 | set_gdbarch_regset_from_core_section (gdbarch, |
2889 | s390_regset_from_core_section); | |
7803799a UW |
2890 | set_gdbarch_core_read_description (gdbarch, s390_core_read_description); |
2891 | if (have_upper) | |
2892 | set_gdbarch_core_regset_sections (gdbarch, s390_upper_regset_sections); | |
2893 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); | |
2894 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); | |
2895 | set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); | |
2896 | set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); | |
2897 | set_tdesc_pseudo_register_reggroup_p (gdbarch, | |
2898 | s390_pseudo_register_reggroup_p); | |
2899 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); | |
2900 | ||
2901 | /* Assign pseudo register numbers. */ | |
2902 | first_pseudo_reg = gdbarch_num_regs (gdbarch); | |
2903 | last_pseudo_reg = first_pseudo_reg; | |
2904 | tdep->gpr_full_regnum = -1; | |
2905 | if (have_upper) | |
2906 | { | |
2907 | tdep->gpr_full_regnum = last_pseudo_reg; | |
2908 | last_pseudo_reg += 16; | |
2909 | } | |
2910 | tdep->pc_regnum = last_pseudo_reg++; | |
2911 | tdep->cc_regnum = last_pseudo_reg++; | |
2912 | set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); | |
2913 | set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); | |
5769d3cd | 2914 | |
b0cf273e JB |
2915 | /* Inferior function calls. */ |
2916 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); | |
f089c433 | 2917 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
4074e13c | 2918 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
b0cf273e | 2919 | set_gdbarch_return_value (gdbarch, s390_return_value); |
5769d3cd | 2920 | |
a8c99f38 | 2921 | /* Frame handling. */ |
a431654a | 2922 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
7803799a | 2923 | dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); |
f089c433 | 2924 | dwarf2_append_unwinders (gdbarch); |
a431654a | 2925 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
f089c433 UW |
2926 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
2927 | frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); | |
2928 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); | |
a8c99f38 JB |
2929 | frame_base_set_default (gdbarch, &s390_frame_base); |
2930 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); | |
2931 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); | |
2932 | ||
1db4e8a0 UW |
2933 | /* Displaced stepping. */ |
2934 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
2935 | simple_displaced_step_copy_insn); | |
2936 | set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); | |
2937 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
2938 | simple_displaced_step_free_closure); | |
2939 | set_gdbarch_displaced_step_location (gdbarch, | |
2940 | displaced_step_at_entry_point); | |
2941 | set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); | |
2942 | ||
70728992 PA |
2943 | /* Note that GNU/Linux is the only OS supported on this |
2944 | platform. */ | |
2945 | linux_init_abi (info, gdbarch); | |
2946 | ||
7803799a | 2947 | switch (tdep->abi) |
5769d3cd | 2948 | { |
7803799a | 2949 | case ABI_LINUX_S390: |
d0f54f9d JB |
2950 | tdep->gregset = &s390_gregset; |
2951 | tdep->sizeof_gregset = s390_sizeof_gregset; | |
2952 | tdep->fpregset = &s390_fpregset; | |
2953 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
2954 | |
2955 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); | |
76a9d10f MK |
2956 | set_solib_svr4_fetch_link_map_offsets |
2957 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); | |
5769d3cd | 2958 | break; |
b0cf273e | 2959 | |
7803799a | 2960 | case ABI_LINUX_ZSERIES: |
d0f54f9d JB |
2961 | tdep->gregset = &s390x_gregset; |
2962 | tdep->sizeof_gregset = s390x_sizeof_gregset; | |
2963 | tdep->fpregset = &s390_fpregset; | |
2964 | tdep->sizeof_fpregset = s390_sizeof_fpregset; | |
5769d3cd AC |
2965 | |
2966 | set_gdbarch_long_bit (gdbarch, 64); | |
2967 | set_gdbarch_long_long_bit (gdbarch, 64); | |
2968 | set_gdbarch_ptr_bit (gdbarch, 64); | |
76a9d10f MK |
2969 | set_solib_svr4_fetch_link_map_offsets |
2970 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
ffc65945 KB |
2971 | set_gdbarch_address_class_type_flags (gdbarch, |
2972 | s390_address_class_type_flags); | |
2973 | set_gdbarch_address_class_type_flags_to_name (gdbarch, | |
2974 | s390_address_class_type_flags_to_name); | |
2975 | set_gdbarch_address_class_name_to_type_flags (gdbarch, | |
2976 | s390_address_class_name_to_type_flags); | |
5769d3cd AC |
2977 | break; |
2978 | } | |
2979 | ||
36482093 AC |
2980 | set_gdbarch_print_insn (gdbarch, print_insn_s390); |
2981 | ||
982e9687 UW |
2982 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
2983 | ||
b2756930 KB |
2984 | /* Enable TLS support. */ |
2985 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
2986 | svr4_fetch_objfile_link_map); | |
2987 | ||
5769d3cd AC |
2988 | return gdbarch; |
2989 | } | |
2990 | ||
2991 | ||
a78f21af AC |
2992 | extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ |
2993 | ||
5769d3cd | 2994 | void |
5ae5f592 | 2995 | _initialize_s390_tdep (void) |
5769d3cd | 2996 | { |
5769d3cd AC |
2997 | /* Hook us into the gdbarch mechanism. */ |
2998 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); | |
7803799a UW |
2999 | |
3000 | /* Initialize the Linux target descriptions. */ | |
3001 | initialize_tdesc_s390_linux32 (); | |
3002 | initialize_tdesc_s390_linux64 (); | |
3003 | initialize_tdesc_s390x_linux64 (); | |
5769d3cd | 3004 | } |