Fix typo in skip_prologue_sal's comment.
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
0b302171 3 Copyright (C) 2001-2012 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
27#include "symtab.h"
28#include "target.h"
29#include "gdbcore.h"
30#include "gdbcmd.h"
5769d3cd 31#include "objfiles.h"
5769d3cd
AC
32#include "floatformat.h"
33#include "regcache.h"
a8c99f38
JB
34#include "trad-frame.h"
35#include "frame-base.h"
36#include "frame-unwind.h"
a431654a 37#include "dwarf2-frame.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
d0f54f9d 46#include "s390-tdep.h"
5769d3cd 47
55aa24fb
SDJ
48#include "stap-probe.h"
49#include "ax.h"
50#include "ax-gdb.h"
51#include "user-regs.h"
52#include "cli/cli-utils.h"
53#include <ctype.h>
54
7803799a 55#include "features/s390-linux32.c"
c642a434
UW
56#include "features/s390-linux32v1.c"
57#include "features/s390-linux32v2.c"
7803799a 58#include "features/s390-linux64.c"
c642a434
UW
59#include "features/s390-linux64v1.c"
60#include "features/s390-linux64v2.c"
7803799a 61#include "features/s390x-linux64.c"
c642a434
UW
62#include "features/s390x-linux64v1.c"
63#include "features/s390x-linux64v2.c"
7803799a 64
d0f54f9d
JB
65/* The tdep structure. */
66
67struct gdbarch_tdep
5769d3cd 68{
b0cf273e
JB
69 /* ABI version. */
70 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
71
7803799a
UW
72 /* Pseudo register numbers. */
73 int gpr_full_regnum;
74 int pc_regnum;
75 int cc_regnum;
76
d0f54f9d
JB
77 /* Core file register sets. */
78 const struct regset *gregset;
79 int sizeof_gregset;
80
81 const struct regset *fpregset;
82 int sizeof_fpregset;
83};
84
85
7803799a
UW
86/* ABI call-saved register information. */
87
88static int
89s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 90{
7803799a
UW
91 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
92
93 switch (tdep->abi)
6707b003 94 {
7803799a
UW
95 case ABI_LINUX_S390:
96 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
97 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
98 || regnum == S390_A0_REGNUM)
99 return 1;
6707b003 100
7803799a
UW
101 break;
102
103 case ABI_LINUX_ZSERIES:
104 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
105 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
106 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
107 return 1;
108
109 break;
110 }
111
112 return 0;
5769d3cd
AC
113}
114
c642a434
UW
115static int
116s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
117{
118 /* The last-break address is read-only. */
119 return regnum == S390_LAST_BREAK_REGNUM;
120}
121
122static void
123s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
124{
125 struct gdbarch *gdbarch = get_regcache_arch (regcache);
126 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
127
128 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
129
130 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
131 messing with the PC we just installed, if we happen to be within
132 an interrupted system call that the kernel wants to restart.
133
134 Note that after we return from the dummy call, the SYSTEM_CALL and
135 ORIG_R2 registers will be automatically restored, and the kernel
136 continues to restart the system call at this point. */
137 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
138 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
139}
140
7803799a 141
d0f54f9d
JB
142/* DWARF Register Mapping. */
143
144static int s390_dwarf_regmap[] =
145{
146 /* General Purpose Registers. */
147 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
148 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
149 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
150 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
151
152 /* Floating Point Registers. */
153 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
154 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
155 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
156 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
157
158 /* Control Registers (not mapped). */
159 -1, -1, -1, -1, -1, -1, -1, -1,
160 -1, -1, -1, -1, -1, -1, -1, -1,
161
162 /* Access Registers. */
163 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
164 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
165 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
166 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
167
168 /* Program Status Word. */
169 S390_PSWM_REGNUM,
7803799a
UW
170 S390_PSWA_REGNUM,
171
172 /* GPR Lower Half Access. */
173 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
174 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
175 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
176 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 177
94eae614 178 /* GNU/Linux-specific registers (not mapped). */
c642a434 179 -1, -1, -1,
d0f54f9d
JB
180};
181
182/* Convert DWARF register number REG to the appropriate register
183 number used by GDB. */
a78f21af 184static int
d3f73121 185s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 186{
7803799a
UW
187 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
188
189 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
190 GPRs. Note that call frame information still refers to the 32-bit
191 lower halves, because s390_adjust_frame_regnum uses register numbers
192 66 .. 81 to access GPRs. */
193 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
194 return tdep->gpr_full_regnum + reg;
d0f54f9d 195
16aff9a6 196 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 197 return s390_dwarf_regmap[reg];
d0f54f9d 198
7803799a
UW
199 warning (_("Unmapped DWARF Register #%d encountered."), reg);
200 return -1;
201}
d0f54f9d 202
7803799a
UW
203/* Translate a .eh_frame register to DWARF register, or adjust a
204 .debug_frame register. */
205static int
206s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
207{
208 /* See s390_dwarf_reg_to_regnum for comments. */
209 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
210}
211
d0f54f9d 212
7803799a
UW
213/* Pseudo registers. */
214
215static const char *
216s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 217{
7803799a 218 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 219
7803799a
UW
220 if (regnum == tdep->pc_regnum)
221 return "pc";
d0f54f9d 222
7803799a
UW
223 if (regnum == tdep->cc_regnum)
224 return "cc";
d0f54f9d 225
7803799a
UW
226 if (tdep->gpr_full_regnum != -1
227 && regnum >= tdep->gpr_full_regnum
228 && regnum < tdep->gpr_full_regnum + 16)
229 {
230 static const char *full_name[] = {
231 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
232 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
233 };
234 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 235 }
7803799a
UW
236
237 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
238}
239
7803799a
UW
240static struct type *
241s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 242{
7803799a 243 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 244
7803799a
UW
245 if (regnum == tdep->pc_regnum)
246 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 247
7803799a
UW
248 if (regnum == tdep->cc_regnum)
249 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 250
7803799a
UW
251 if (tdep->gpr_full_regnum != -1
252 && regnum >= tdep->gpr_full_regnum
253 && regnum < tdep->gpr_full_regnum + 16)
254 return builtin_type (gdbarch)->builtin_uint64;
255
256 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
257}
258
05d1431c 259static enum register_status
7803799a
UW
260s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
261 int regnum, gdb_byte *buf)
d0f54f9d 262{
7803799a 263 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 264 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 265 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
266 ULONGEST val;
267
7803799a 268 if (regnum == tdep->pc_regnum)
d0f54f9d 269 {
05d1431c
PA
270 enum register_status status;
271
272 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
273 if (status == REG_VALID)
274 {
275 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
276 val &= 0x7fffffff;
277 store_unsigned_integer (buf, regsize, byte_order, val);
278 }
279 return status;
7803799a 280 }
d0f54f9d 281
7803799a
UW
282 if (regnum == tdep->cc_regnum)
283 {
05d1431c
PA
284 enum register_status status;
285
286 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
287 if (status == REG_VALID)
288 {
289 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
290 val = (val >> 12) & 3;
291 else
292 val = (val >> 44) & 3;
293 store_unsigned_integer (buf, regsize, byte_order, val);
294 }
295 return status;
7803799a 296 }
d0f54f9d 297
7803799a
UW
298 if (tdep->gpr_full_regnum != -1
299 && regnum >= tdep->gpr_full_regnum
300 && regnum < tdep->gpr_full_regnum + 16)
301 {
05d1431c 302 enum register_status status;
7803799a 303 ULONGEST val_upper;
05d1431c 304
7803799a
UW
305 regnum -= tdep->gpr_full_regnum;
306
05d1431c
PA
307 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
308 if (status == REG_VALID)
309 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
310 &val_upper);
311 if (status == REG_VALID)
312 {
313 val |= val_upper << 32;
314 store_unsigned_integer (buf, regsize, byte_order, val);
315 }
316 return status;
d0f54f9d 317 }
7803799a
UW
318
319 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
320}
321
322static void
7803799a
UW
323s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
324 int regnum, const gdb_byte *buf)
d0f54f9d 325{
7803799a 326 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 327 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 328 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
329 ULONGEST val, psw;
330
7803799a 331 if (regnum == tdep->pc_regnum)
d0f54f9d 332 {
7803799a
UW
333 val = extract_unsigned_integer (buf, regsize, byte_order);
334 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
335 {
336 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
337 val = (psw & 0x80000000) | (val & 0x7fffffff);
338 }
339 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
340 return;
341 }
d0f54f9d 342
7803799a
UW
343 if (regnum == tdep->cc_regnum)
344 {
345 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 346 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
347 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
348 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
349 else
350 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
351 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
352 return;
353 }
d0f54f9d 354
7803799a
UW
355 if (tdep->gpr_full_regnum != -1
356 && regnum >= tdep->gpr_full_regnum
357 && regnum < tdep->gpr_full_regnum + 16)
358 {
359 regnum -= tdep->gpr_full_regnum;
360 val = extract_unsigned_integer (buf, regsize, byte_order);
361 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
362 val & 0xffffffff);
363 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
364 val >> 32);
365 return;
d0f54f9d 366 }
7803799a
UW
367
368 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
369}
370
371/* 'float' values are stored in the upper half of floating-point
372 registers, even though we are otherwise a big-endian platform. */
373
9acbedc0
UW
374static struct value *
375s390_value_from_register (struct type *type, int regnum,
376 struct frame_info *frame)
d0f54f9d 377{
9acbedc0 378 struct value *value = default_value_from_register (type, regnum, frame);
56b9d9ac 379 int len = TYPE_LENGTH (check_typedef (type));
d0f54f9d 380
9acbedc0
UW
381 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM && len < 8)
382 set_value_offset (value, 0);
d0f54f9d 383
9acbedc0 384 return value;
d0f54f9d
JB
385}
386
387/* Register groups. */
388
a78f21af 389static int
7803799a
UW
390s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
391 struct reggroup *group)
d0f54f9d
JB
392{
393 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
394
d6db1fab
UW
395 /* We usually save/restore the whole PSW, which includes PC and CC.
396 However, some older gdbservers may not support saving/restoring
397 the whole PSW yet, and will return an XML register description
398 excluding those from the save/restore register groups. In those
399 cases, we still need to explicitly save/restore PC and CC in order
400 to push or pop frames. Since this doesn't hurt anything if we
401 already save/restore the whole PSW (it's just redundant), we add
402 PC and CC at this point unconditionally. */
d0f54f9d 403 if (group == save_reggroup || group == restore_reggroup)
7803799a 404 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
405
406 return default_register_reggroup_p (gdbarch, regnum, group);
407}
408
409
410/* Core file register sets. */
411
412int s390_regmap_gregset[S390_NUM_REGS] =
413{
414 /* Program Status Word. */
415 0x00, 0x04,
416 /* General Purpose Registers. */
417 0x08, 0x0c, 0x10, 0x14,
418 0x18, 0x1c, 0x20, 0x24,
419 0x28, 0x2c, 0x30, 0x34,
420 0x38, 0x3c, 0x40, 0x44,
421 /* Access Registers. */
422 0x48, 0x4c, 0x50, 0x54,
423 0x58, 0x5c, 0x60, 0x64,
424 0x68, 0x6c, 0x70, 0x74,
425 0x78, 0x7c, 0x80, 0x84,
426 /* Floating Point Control Word. */
427 -1,
428 /* Floating Point Registers. */
429 -1, -1, -1, -1, -1, -1, -1, -1,
430 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
431 /* GPR Uppper Halves. */
432 -1, -1, -1, -1, -1, -1, -1, -1,
433 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 434 /* GNU/Linux-specific optional "registers". */
c642a434 435 0x88, -1, -1,
d0f54f9d
JB
436};
437
438int s390x_regmap_gregset[S390_NUM_REGS] =
439{
7803799a 440 /* Program Status Word. */
d0f54f9d
JB
441 0x00, 0x08,
442 /* General Purpose Registers. */
443 0x10, 0x18, 0x20, 0x28,
444 0x30, 0x38, 0x40, 0x48,
445 0x50, 0x58, 0x60, 0x68,
446 0x70, 0x78, 0x80, 0x88,
447 /* Access Registers. */
448 0x90, 0x94, 0x98, 0x9c,
449 0xa0, 0xa4, 0xa8, 0xac,
450 0xb0, 0xb4, 0xb8, 0xbc,
451 0xc0, 0xc4, 0xc8, 0xcc,
452 /* Floating Point Control Word. */
453 -1,
454 /* Floating Point Registers. */
455 -1, -1, -1, -1, -1, -1, -1, -1,
456 -1, -1, -1, -1, -1, -1, -1, -1,
7803799a
UW
457 /* GPR Uppper Halves. */
458 0x10, 0x18, 0x20, 0x28,
459 0x30, 0x38, 0x40, 0x48,
460 0x50, 0x58, 0x60, 0x68,
461 0x70, 0x78, 0x80, 0x88,
94eae614 462 /* GNU/Linux-specific optional "registers". */
c642a434 463 0xd0, -1, -1,
d0f54f9d
JB
464};
465
466int s390_regmap_fpregset[S390_NUM_REGS] =
467{
468 /* Program Status Word. */
469 -1, -1,
470 /* General Purpose Registers. */
471 -1, -1, -1, -1, -1, -1, -1, -1,
472 -1, -1, -1, -1, -1, -1, -1, -1,
473 /* Access Registers. */
474 -1, -1, -1, -1, -1, -1, -1, -1,
475 -1, -1, -1, -1, -1, -1, -1, -1,
476 /* Floating Point Control Word. */
477 0x00,
478 /* Floating Point Registers. */
479 0x08, 0x10, 0x18, 0x20,
480 0x28, 0x30, 0x38, 0x40,
481 0x48, 0x50, 0x58, 0x60,
482 0x68, 0x70, 0x78, 0x80,
7803799a
UW
483 /* GPR Uppper Halves. */
484 -1, -1, -1, -1, -1, -1, -1, -1,
485 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 486 /* GNU/Linux-specific optional "registers". */
c642a434 487 -1, -1, -1,
7803799a
UW
488};
489
490int s390_regmap_upper[S390_NUM_REGS] =
491{
492 /* Program Status Word. */
493 -1, -1,
494 /* General Purpose Registers. */
495 -1, -1, -1, -1, -1, -1, -1, -1,
496 -1, -1, -1, -1, -1, -1, -1, -1,
497 /* Access Registers. */
498 -1, -1, -1, -1, -1, -1, -1, -1,
499 -1, -1, -1, -1, -1, -1, -1, -1,
500 /* Floating Point Control Word. */
501 -1,
502 /* Floating Point Registers. */
503 -1, -1, -1, -1, -1, -1, -1, -1,
504 -1, -1, -1, -1, -1, -1, -1, -1,
505 /* GPR Uppper Halves. */
506 0x00, 0x04, 0x08, 0x0c,
507 0x10, 0x14, 0x18, 0x1c,
508 0x20, 0x24, 0x28, 0x2c,
509 0x30, 0x34, 0x38, 0x3c,
94eae614 510 /* GNU/Linux-specific optional "registers". */
c642a434
UW
511 -1, -1, -1,
512};
513
514int s390_regmap_last_break[S390_NUM_REGS] =
515{
516 /* Program Status Word. */
517 -1, -1,
518 /* General Purpose Registers. */
519 -1, -1, -1, -1, -1, -1, -1, -1,
520 -1, -1, -1, -1, -1, -1, -1, -1,
521 /* Access Registers. */
522 -1, -1, -1, -1, -1, -1, -1, -1,
523 -1, -1, -1, -1, -1, -1, -1, -1,
524 /* Floating Point Control Word. */
525 -1,
526 /* Floating Point Registers. */
527 -1, -1, -1, -1, -1, -1, -1, -1,
528 -1, -1, -1, -1, -1, -1, -1, -1,
529 /* GPR Uppper Halves. */
530 -1, -1, -1, -1, -1, -1, -1, -1,
531 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 532 /* GNU/Linux-specific optional "registers". */
c642a434
UW
533 -1, 4, -1,
534};
535
536int s390x_regmap_last_break[S390_NUM_REGS] =
537{
538 /* Program Status Word. */
539 -1, -1,
540 /* General Purpose Registers. */
541 -1, -1, -1, -1, -1, -1, -1, -1,
542 -1, -1, -1, -1, -1, -1, -1, -1,
543 /* Access Registers. */
544 -1, -1, -1, -1, -1, -1, -1, -1,
545 -1, -1, -1, -1, -1, -1, -1, -1,
546 /* Floating Point Control Word. */
547 -1,
548 /* Floating Point Registers. */
549 -1, -1, -1, -1, -1, -1, -1, -1,
550 -1, -1, -1, -1, -1, -1, -1, -1,
551 /* GPR Uppper Halves. */
552 -1, -1, -1, -1, -1, -1, -1, -1,
553 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 554 /* GNU/Linux-specific optional "registers". */
c642a434
UW
555 -1, 0, -1,
556};
557
558int s390_regmap_system_call[S390_NUM_REGS] =
559{
560 /* Program Status Word. */
561 -1, -1,
562 /* General Purpose Registers. */
563 -1, -1, -1, -1, -1, -1, -1, -1,
564 -1, -1, -1, -1, -1, -1, -1, -1,
565 /* Access Registers. */
566 -1, -1, -1, -1, -1, -1, -1, -1,
567 -1, -1, -1, -1, -1, -1, -1, -1,
568 /* Floating Point Control Word. */
569 -1,
570 /* Floating Point Registers. */
571 -1, -1, -1, -1, -1, -1, -1, -1,
572 -1, -1, -1, -1, -1, -1, -1, -1,
573 /* GPR Uppper Halves. */
574 -1, -1, -1, -1, -1, -1, -1, -1,
575 -1, -1, -1, -1, -1, -1, -1, -1,
94eae614 576 /* GNU/Linux-specific optional "registers". */
c642a434 577 -1, -1, 0,
d0f54f9d
JB
578};
579
580/* Supply register REGNUM from the register set REGSET to register cache
581 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
582static void
583s390_supply_regset (const struct regset *regset, struct regcache *regcache,
584 int regnum, const void *regs, size_t len)
585{
586 const int *offset = regset->descr;
587 int i;
588
589 for (i = 0; i < S390_NUM_REGS; i++)
590 {
591 if ((regnum == i || regnum == -1) && offset[i] != -1)
592 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
593 }
594}
595
92f38ec2
UW
596/* Collect register REGNUM from the register cache REGCACHE and store
597 it in the buffer specified by REGS and LEN as described by the
598 general-purpose register set REGSET. If REGNUM is -1, do this for
599 all registers in REGSET. */
600static void
601s390_collect_regset (const struct regset *regset,
602 const struct regcache *regcache,
603 int regnum, void *regs, size_t len)
604{
605 const int *offset = regset->descr;
606 int i;
607
608 for (i = 0; i < S390_NUM_REGS; i++)
609 {
610 if ((regnum == i || regnum == -1) && offset[i] != -1)
611 regcache_raw_collect (regcache, i, (char *)regs + offset[i]);
612 }
613}
614
d0f54f9d
JB
615static const struct regset s390_gregset = {
616 s390_regmap_gregset,
92f38ec2
UW
617 s390_supply_regset,
618 s390_collect_regset
d0f54f9d
JB
619};
620
621static const struct regset s390x_gregset = {
622 s390x_regmap_gregset,
92f38ec2
UW
623 s390_supply_regset,
624 s390_collect_regset
d0f54f9d
JB
625};
626
627static const struct regset s390_fpregset = {
628 s390_regmap_fpregset,
92f38ec2
UW
629 s390_supply_regset,
630 s390_collect_regset
d0f54f9d
JB
631};
632
7803799a
UW
633static const struct regset s390_upper_regset = {
634 s390_regmap_upper,
635 s390_supply_regset,
636 s390_collect_regset
637};
638
c642a434
UW
639static const struct regset s390_last_break_regset = {
640 s390_regmap_last_break,
641 s390_supply_regset,
642 s390_collect_regset
643};
644
645static const struct regset s390x_last_break_regset = {
646 s390x_regmap_last_break,
647 s390_supply_regset,
648 s390_collect_regset
649};
650
651static const struct regset s390_system_call_regset = {
652 s390_regmap_system_call,
653 s390_supply_regset,
654 s390_collect_regset
655};
656
657static struct core_regset_section s390_linux32_regset_sections[] =
658{
659 { ".reg", s390_sizeof_gregset, "general-purpose" },
660 { ".reg2", s390_sizeof_fpregset, "floating-point" },
661 { NULL, 0}
662};
663
664static struct core_regset_section s390_linux32v1_regset_sections[] =
665{
666 { ".reg", s390_sizeof_gregset, "general-purpose" },
667 { ".reg2", s390_sizeof_fpregset, "floating-point" },
668 { ".reg-s390-last-break", 8, "s390 last-break address" },
669 { NULL, 0}
670};
671
672static struct core_regset_section s390_linux32v2_regset_sections[] =
673{
674 { ".reg", s390_sizeof_gregset, "general-purpose" },
675 { ".reg2", s390_sizeof_fpregset, "floating-point" },
676 { ".reg-s390-last-break", 8, "s390 last-break address" },
677 { ".reg-s390-system-call", 4, "s390 system-call" },
678 { NULL, 0}
679};
680
681static struct core_regset_section s390_linux64_regset_sections[] =
7803799a
UW
682{
683 { ".reg", s390_sizeof_gregset, "general-purpose" },
684 { ".reg2", s390_sizeof_fpregset, "floating-point" },
685 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
686 { NULL, 0}
687};
688
c642a434
UW
689static struct core_regset_section s390_linux64v1_regset_sections[] =
690{
691 { ".reg", s390_sizeof_gregset, "general-purpose" },
692 { ".reg2", s390_sizeof_fpregset, "floating-point" },
693 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
694 { ".reg-s390-last-break", 8, "s930 last-break address" },
695 { NULL, 0}
696};
697
698static struct core_regset_section s390_linux64v2_regset_sections[] =
699{
700 { ".reg", s390_sizeof_gregset, "general-purpose" },
701 { ".reg2", s390_sizeof_fpregset, "floating-point" },
702 { ".reg-s390-high-gprs", 16*4, "s390 GPR upper halves" },
703 { ".reg-s390-last-break", 8, "s930 last-break address" },
704 { ".reg-s390-system-call", 4, "s390 system-call" },
705 { NULL, 0}
706};
707
708static struct core_regset_section s390x_linux64_regset_sections[] =
709{
710 { ".reg", s390x_sizeof_gregset, "general-purpose" },
711 { ".reg2", s390_sizeof_fpregset, "floating-point" },
712 { NULL, 0}
713};
714
715static struct core_regset_section s390x_linux64v1_regset_sections[] =
716{
717 { ".reg", s390x_sizeof_gregset, "general-purpose" },
718 { ".reg2", s390_sizeof_fpregset, "floating-point" },
719 { ".reg-s390-last-break", 8, "s930 last-break address" },
720 { NULL, 0}
721};
722
723static struct core_regset_section s390x_linux64v2_regset_sections[] =
724{
725 { ".reg", s390x_sizeof_gregset, "general-purpose" },
726 { ".reg2", s390_sizeof_fpregset, "floating-point" },
727 { ".reg-s390-last-break", 8, "s930 last-break address" },
728 { ".reg-s390-system-call", 4, "s390 system-call" },
729 { NULL, 0}
730};
731
732
d0f54f9d
JB
733/* Return the appropriate register set for the core section identified
734 by SECT_NAME and SECT_SIZE. */
63807e1d 735static const struct regset *
d0f54f9d
JB
736s390_regset_from_core_section (struct gdbarch *gdbarch,
737 const char *sect_name, size_t sect_size)
738{
739 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
740
e31dcd20 741 if (strcmp (sect_name, ".reg") == 0 && sect_size >= tdep->sizeof_gregset)
d0f54f9d
JB
742 return tdep->gregset;
743
e31dcd20 744 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= tdep->sizeof_fpregset)
d0f54f9d
JB
745 return tdep->fpregset;
746
7803799a
UW
747 if (strcmp (sect_name, ".reg-s390-high-gprs") == 0 && sect_size >= 16*4)
748 return &s390_upper_regset;
749
c642a434
UW
750 if (strcmp (sect_name, ".reg-s390-last-break") == 0 && sect_size >= 8)
751 return (gdbarch_ptr_bit (gdbarch) == 32
752 ? &s390_last_break_regset : &s390x_last_break_regset);
753
754 if (strcmp (sect_name, ".reg-s390-system-call") == 0 && sect_size >= 4)
755 return &s390_system_call_regset;
756
d0f54f9d 757 return NULL;
5769d3cd
AC
758}
759
7803799a
UW
760static const struct target_desc *
761s390_core_read_description (struct gdbarch *gdbarch,
762 struct target_ops *target, bfd *abfd)
763{
764 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
765 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
766 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a
UW
767 asection *section = bfd_get_section_by_name (abfd, ".reg");
768 if (!section)
769 return NULL;
770
771 switch (bfd_section_size (abfd, section))
772 {
773 case s390_sizeof_gregset:
c642a434
UW
774 if (high_gprs)
775 return (v2? tdesc_s390_linux64v2 :
776 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
777 else
778 return (v2? tdesc_s390_linux32v2 :
779 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
780
781 case s390x_sizeof_gregset:
c642a434
UW
782 return (v2? tdesc_s390x_linux64v2 :
783 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
784
785 default:
786 return NULL;
787 }
788}
789
d0f54f9d 790
4bc8c588
JB
791/* Decoding S/390 instructions. */
792
793/* Named opcode values for the S/390 instructions we recognize. Some
794 instructions have their opcode split across two fields; those are the
795 op1_* and op2_* enums. */
796enum
797 {
a8c99f38
JB
798 op1_lhi = 0xa7, op2_lhi = 0x08,
799 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 800 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 801 op_lr = 0x18,
a8c99f38
JB
802 op_lgr = 0xb904,
803 op_l = 0x58,
804 op1_ly = 0xe3, op2_ly = 0x58,
805 op1_lg = 0xe3, op2_lg = 0x04,
806 op_lm = 0x98,
807 op1_lmy = 0xeb, op2_lmy = 0x98,
808 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 809 op_st = 0x50,
a8c99f38 810 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 811 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 812 op_std = 0x60,
4bc8c588 813 op_stm = 0x90,
a8c99f38 814 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 815 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
816 op1_aghi = 0xa7, op2_aghi = 0x0b,
817 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
818 op1_agfi = 0xc2, op2_agfi = 0x08,
819 op1_afi = 0xc2, op2_afi = 0x09,
820 op1_algfi= 0xc2, op2_algfi= 0x0a,
821 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
822 op_ar = 0x1a,
823 op_agr = 0xb908,
824 op_a = 0x5a,
825 op1_ay = 0xe3, op2_ay = 0x5a,
826 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
827 op1_slgfi= 0xc2, op2_slgfi= 0x04,
828 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
829 op_sr = 0x1b,
830 op_sgr = 0xb909,
831 op_s = 0x5b,
832 op1_sy = 0xe3, op2_sy = 0x5b,
833 op1_sg = 0xe3, op2_sg = 0x09,
834 op_nr = 0x14,
835 op_ngr = 0xb980,
836 op_la = 0x41,
837 op1_lay = 0xe3, op2_lay = 0x71,
838 op1_larl = 0xc0, op2_larl = 0x00,
839 op_basr = 0x0d,
840 op_bas = 0x4d,
841 op_bcr = 0x07,
842 op_bc = 0x0d,
1db4e8a0
UW
843 op_bctr = 0x06,
844 op_bctgr = 0xb946,
845 op_bct = 0x46,
846 op1_bctg = 0xe3, op2_bctg = 0x46,
847 op_bxh = 0x86,
848 op1_bxhg = 0xeb, op2_bxhg = 0x44,
849 op_bxle = 0x87,
850 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
851 op1_bras = 0xa7, op2_bras = 0x05,
852 op1_brasl= 0xc0, op2_brasl= 0x05,
853 op1_brc = 0xa7, op2_brc = 0x04,
854 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
855 op1_brct = 0xa7, op2_brct = 0x06,
856 op1_brctg= 0xa7, op2_brctg= 0x07,
857 op_brxh = 0x84,
858 op1_brxhg= 0xec, op2_brxhg= 0x44,
859 op_brxle = 0x85,
860 op1_brxlg= 0xec, op2_brxlg= 0x45,
4bc8c588
JB
861 };
862
863
a8c99f38
JB
864/* Read a single instruction from address AT. */
865
866#define S390_MAX_INSTR_SIZE 6
867static int
868s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
869{
870 static int s390_instrlen[] = { 2, 4, 4, 6 };
871 int instrlen;
872
8defab1a 873 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
874 return -1;
875 instrlen = s390_instrlen[instr[0] >> 6];
876 if (instrlen > 2)
877 {
8defab1a 878 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
a8c99f38
JB
879 return -1;
880 }
881 return instrlen;
882}
883
884
4bc8c588
JB
885/* The functions below are for recognizing and decoding S/390
886 instructions of various formats. Each of them checks whether INSN
887 is an instruction of the given format, with the specified opcodes.
888 If it is, it sets the remaining arguments to the values of the
889 instruction's fields, and returns a non-zero value; otherwise, it
890 returns zero.
891
892 These functions' arguments appear in the order they appear in the
893 instruction, not in the machine-language form. So, opcodes always
894 come first, even though they're sometimes scattered around the
895 instructions. And displacements appear before base and extension
896 registers, as they do in the assembly syntax, not at the end, as
897 they do in the machine language. */
a78f21af 898static int
4bc8c588
JB
899is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
900{
901 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
902 {
903 *r1 = (insn[1] >> 4) & 0xf;
904 /* i2 is a 16-bit signed quantity. */
905 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
906 return 1;
907 }
908 else
909 return 0;
910}
8ac0e65a 911
5769d3cd 912
4bc8c588
JB
913static int
914is_ril (bfd_byte *insn, int op1, int op2,
915 unsigned int *r1, int *i2)
916{
917 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
918 {
919 *r1 = (insn[1] >> 4) & 0xf;
920 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
921 no sign extension is necessary, but we don't want to assume
922 that. */
923 *i2 = (((insn[2] << 24)
924 | (insn[3] << 16)
925 | (insn[4] << 8)
926 | (insn[5])) ^ 0x80000000) - 0x80000000;
927 return 1;
928 }
929 else
930 return 0;
931}
932
933
934static int
935is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
936{
937 if (insn[0] == op)
938 {
939 *r1 = (insn[1] >> 4) & 0xf;
940 *r2 = insn[1] & 0xf;
941 return 1;
942 }
943 else
944 return 0;
945}
946
947
948static int
949is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
950{
951 if (((insn[0] << 8) | insn[1]) == op)
952 {
953 /* Yes, insn[3]. insn[2] is unused in RRE format. */
954 *r1 = (insn[3] >> 4) & 0xf;
955 *r2 = insn[3] & 0xf;
956 return 1;
957 }
958 else
959 return 0;
960}
961
962
963static int
964is_rs (bfd_byte *insn, int op,
965 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
966{
967 if (insn[0] == op)
968 {
969 *r1 = (insn[1] >> 4) & 0xf;
970 *r3 = insn[1] & 0xf;
971 *b2 = (insn[2] >> 4) & 0xf;
972 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
973 return 1;
974 }
975 else
976 return 0;
977}
978
979
980static int
a8c99f38 981is_rsy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
982 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
983{
984 if (insn[0] == op1
4bc8c588
JB
985 && insn[5] == op2)
986 {
987 *r1 = (insn[1] >> 4) & 0xf;
988 *r3 = insn[1] & 0xf;
989 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
990 /* The 'long displacement' is a 20-bit signed integer. */
991 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
992 ^ 0x80000) - 0x80000;
4bc8c588
JB
993 return 1;
994 }
995 else
996 return 0;
997}
998
999
1db4e8a0
UW
1000static int
1001is_rsi (bfd_byte *insn, int op,
1002 unsigned int *r1, unsigned int *r3, int *i2)
1003{
1004 if (insn[0] == op)
1005 {
1006 *r1 = (insn[1] >> 4) & 0xf;
1007 *r3 = insn[1] & 0xf;
1008 /* i2 is a 16-bit signed quantity. */
1009 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1010 return 1;
1011 }
1012 else
1013 return 0;
1014}
1015
1016
1017static int
1018is_rie (bfd_byte *insn, int op1, int op2,
1019 unsigned int *r1, unsigned int *r3, int *i2)
1020{
1021 if (insn[0] == op1
1022 && insn[5] == op2)
1023 {
1024 *r1 = (insn[1] >> 4) & 0xf;
1025 *r3 = insn[1] & 0xf;
1026 /* i2 is a 16-bit signed quantity. */
1027 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
1028 return 1;
1029 }
1030 else
1031 return 0;
1032}
1033
1034
4bc8c588
JB
1035static int
1036is_rx (bfd_byte *insn, int op,
1037 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1038{
1039 if (insn[0] == op)
1040 {
1041 *r1 = (insn[1] >> 4) & 0xf;
1042 *x2 = insn[1] & 0xf;
1043 *b2 = (insn[2] >> 4) & 0xf;
1044 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1045 return 1;
1046 }
1047 else
1048 return 0;
1049}
1050
1051
1052static int
a8c99f38 1053is_rxy (bfd_byte *insn, int op1, int op2,
4bc8c588
JB
1054 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1055{
1056 if (insn[0] == op1
4bc8c588
JB
1057 && insn[5] == op2)
1058 {
1059 *r1 = (insn[1] >> 4) & 0xf;
1060 *x2 = insn[1] & 0xf;
1061 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38
JB
1062 /* The 'long displacement' is a 20-bit signed integer. */
1063 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
1064 ^ 0x80000) - 0x80000;
4bc8c588
JB
1065 return 1;
1066 }
1067 else
1068 return 0;
1069}
1070
1071
3fc46200 1072/* Prologue analysis. */
4bc8c588 1073
d0f54f9d
JB
1074#define S390_NUM_GPRS 16
1075#define S390_NUM_FPRS 16
4bc8c588 1076
a8c99f38
JB
1077struct s390_prologue_data {
1078
ee1b3323
UW
1079 /* The stack. */
1080 struct pv_area *stack;
1081
e17a4113 1082 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
1083 int gpr_size;
1084 int fpr_size;
e17a4113 1085 enum bfd_endian byte_order;
a8c99f38
JB
1086
1087 /* The general-purpose registers. */
3fc46200 1088 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
1089
1090 /* The floating-point registers. */
3fc46200 1091 pv_t fpr[S390_NUM_FPRS];
a8c99f38 1092
121d8485
UW
1093 /* The offset relative to the CFA where the incoming GPR N was saved
1094 by the function prologue. 0 if not saved or unknown. */
1095 int gpr_slot[S390_NUM_GPRS];
4bc8c588 1096
121d8485
UW
1097 /* Likewise for FPRs. */
1098 int fpr_slot[S390_NUM_FPRS];
4bc8c588 1099
121d8485
UW
1100 /* Nonzero if the backchain was saved. This is assumed to be the
1101 case when the incoming SP is saved at the current SP location. */
1102 int back_chain_saved_p;
1103};
4bc8c588 1104
3fc46200
UW
1105/* Return the effective address for an X-style instruction, like:
1106
1107 L R1, D2(X2, B2)
1108
1109 Here, X2 and B2 are registers, and D2 is a signed 20-bit
1110 constant; the effective address is the sum of all three. If either
1111 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1112 means that r0 can't be used as either X2 or B2. */
1113static pv_t
1114s390_addr (struct s390_prologue_data *data,
1115 int d2, unsigned int x2, unsigned int b2)
1116{
1117 pv_t result;
1118
1119 result = pv_constant (d2);
1120 if (x2)
1121 result = pv_add (result, data->gpr[x2]);
1122 if (b2)
1123 result = pv_add (result, data->gpr[b2]);
1124
1125 return result;
1126}
1127
1128/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 1129static void
3fc46200
UW
1130s390_store (struct s390_prologue_data *data,
1131 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
1132 pv_t value)
4bc8c588 1133{
3fc46200 1134 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 1135 pv_t offset;
121d8485
UW
1136
1137 /* Check whether we are storing the backchain. */
3fc46200 1138 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 1139
3fc46200 1140 if (pv_is_constant (offset) && offset.k == 0)
121d8485 1141 if (size == data->gpr_size
3fc46200 1142 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
1143 {
1144 data->back_chain_saved_p = 1;
1145 return;
1146 }
1147
1148
1149 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
1150 if (!pv_area_store_would_trash (data->stack, addr))
1151 pv_area_store (data->stack, addr, size, value);
4bc8c588 1152
a8c99f38 1153
121d8485
UW
1154 /* Note: If this is some store we cannot identify, you might think we
1155 should forget our cached values, as any of those might have been hit.
1156
1157 However, we make the assumption that the register save areas are only
1158 ever stored to once in any given function, and we do recognize these
1159 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 1160}
4bc8c588 1161
3fc46200
UW
1162/* Do a SIZE-byte load from D2(X2,B2). */
1163static pv_t
1164s390_load (struct s390_prologue_data *data,
1165 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
1166
4bc8c588 1167{
3fc46200 1168 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 1169
a8c99f38
JB
1170 /* If it's a load from an in-line constant pool, then we can
1171 simulate that, under the assumption that the code isn't
1172 going to change between the time the processor actually
1173 executed it creating the current frame, and the time when
1174 we're analyzing the code to unwind past that frame. */
3fc46200 1175 if (pv_is_constant (addr))
4bc8c588 1176 {
0542c86d 1177 struct target_section *secp;
3fc46200 1178 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38
JB
1179 if (secp != NULL
1180 && (bfd_get_section_flags (secp->bfd, secp->the_bfd_section)
1181 & SEC_READONLY))
e17a4113
UW
1182 return pv_constant (read_memory_integer (addr.k, size,
1183 data->byte_order));
a8c99f38 1184 }
7666f43c 1185
121d8485 1186 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1187 return pv_area_fetch (data->stack, addr, size);
1188}
121d8485 1189
ee1b3323
UW
1190/* Function for finding saved registers in a 'struct pv_area'; we pass
1191 this to pv_area_scan.
121d8485 1192
ee1b3323
UW
1193 If VALUE is a saved register, ADDR says it was saved at a constant
1194 offset from the frame base, and SIZE indicates that the whole
1195 register was saved, record its offset in the reg_offset table in
1196 PROLOGUE_UNTYPED. */
1197static void
c378eb4e
MS
1198s390_check_for_saved (void *data_untyped, pv_t addr,
1199 CORE_ADDR size, pv_t value)
ee1b3323
UW
1200{
1201 struct s390_prologue_data *data = data_untyped;
1202 int i, offset;
1203
1204 if (!pv_is_register (addr, S390_SP_REGNUM))
1205 return;
1206
1207 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1208
ee1b3323
UW
1209 /* If we are storing the original value of a register, we want to
1210 record the CFA offset. If the same register is stored multiple
1211 times, the stack slot with the highest address counts. */
1212
1213 for (i = 0; i < S390_NUM_GPRS; i++)
1214 if (size == data->gpr_size
1215 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1216 if (data->gpr_slot[i] == 0
1217 || data->gpr_slot[i] > offset)
1218 {
1219 data->gpr_slot[i] = offset;
1220 return;
1221 }
1222
1223 for (i = 0; i < S390_NUM_FPRS; i++)
1224 if (size == data->fpr_size
1225 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1226 if (data->fpr_slot[i] == 0
1227 || data->fpr_slot[i] > offset)
1228 {
1229 data->fpr_slot[i] = offset;
1230 return;
1231 }
a8c99f38 1232}
4bc8c588 1233
a8c99f38
JB
1234/* Analyze the prologue of the function starting at START_PC,
1235 continuing at most until CURRENT_PC. Initialize DATA to
1236 hold all information we find out about the state of the registers
1237 and stack slots. Return the address of the instruction after
1238 the last one that changed the SP, FP, or back chain; or zero
1239 on error. */
1240static CORE_ADDR
1241s390_analyze_prologue (struct gdbarch *gdbarch,
1242 CORE_ADDR start_pc,
1243 CORE_ADDR current_pc,
1244 struct s390_prologue_data *data)
4bc8c588 1245{
a8c99f38
JB
1246 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1247
4bc8c588 1248 /* Our return value:
a8c99f38
JB
1249 The address of the instruction after the last one that changed
1250 the SP, FP, or back chain; zero if we got an error trying to
1251 read memory. */
1252 CORE_ADDR result = start_pc;
4bc8c588 1253
4bc8c588
JB
1254 /* The current PC for our abstract interpretation. */
1255 CORE_ADDR pc;
1256
1257 /* The address of the next instruction after that. */
1258 CORE_ADDR next_pc;
1259
4bc8c588
JB
1260 /* Set up everything's initial value. */
1261 {
1262 int i;
1263
55f960e1 1264 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1265
a8c99f38
JB
1266 /* For the purpose of prologue tracking, we consider the GPR size to
1267 be equal to the ABI word size, even if it is actually larger
1268 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1269 data->gpr_size = word_size;
1270 data->fpr_size = 8;
e17a4113 1271 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1272
4bc8c588 1273 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1274 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1275
1276 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1277 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1278
121d8485
UW
1279 for (i = 0; i < S390_NUM_GPRS; i++)
1280 data->gpr_slot[i] = 0;
1281
1282 for (i = 0; i < S390_NUM_FPRS; i++)
1283 data->fpr_slot[i] = 0;
4bc8c588 1284
121d8485 1285 data->back_chain_saved_p = 0;
4bc8c588
JB
1286 }
1287
a8c99f38
JB
1288 /* Start interpreting instructions, until we hit the frame's
1289 current PC or the first branch instruction. */
1290 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1291 {
4bc8c588 1292 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1293 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1294
3fc46200
UW
1295 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1296 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1297 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1298
4bc8c588 1299 /* Fields for various kinds of instructions. */
a8c99f38
JB
1300 unsigned int b2, r1, r2, x2, r3;
1301 int i2, d2;
4bc8c588 1302
121d8485 1303 /* The values of SP and FP before this instruction,
4bc8c588 1304 for detecting instructions that change them. */
3fc46200 1305 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1306 /* Likewise for the flag whether the back chain was saved. */
1307 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1308
1309 /* If we got an error trying to read the instruction, report it. */
1310 if (insn_len < 0)
8ac0e65a 1311 {
a8c99f38 1312 result = 0;
4bc8c588
JB
1313 break;
1314 }
1315
1316 next_pc = pc + insn_len;
1317
a8c99f38
JB
1318 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1319 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1320 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1321
4bc8c588 1322
3fc46200
UW
1323 /* LHI r1, i2 --- load halfword immediate. */
1324 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1325 /* LGFI r1, i2 --- load fullword immediate. */
1326 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
1327 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1328 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
1329 data->gpr[r1] = pv_constant (i2);
1330
1331 /* LR r1, r2 --- load from register. */
1332 /* LGR r1, r2 --- load from register (64-bit version). */
1333 else if (is_rr (insn32, op_lr, &r1, &r2)
1334 || is_rre (insn64, op_lgr, &r1, &r2))
1335 data->gpr[r1] = data->gpr[r2];
1336
1337 /* L r1, d2(x2, b2) --- load. */
1338 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1339 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1340 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1341 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1342 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1343 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1344
1345 /* ST r1, d2(x2, b2) --- store. */
1346 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1347 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1348 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1349 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1350 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1351 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1352
1353 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1354 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1355 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1356
1357 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1358 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1359 version). */
3fc46200
UW
1360 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1361 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1362 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1363 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
4bc8c588 1364 {
3fc46200
UW
1365 for (; r1 <= r3; r1++, d2 += data->gpr_size)
1366 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
4bc8c588
JB
1367 }
1368
3fc46200
UW
1369 /* AHI r1, i2 --- add halfword immediate. */
1370 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1371 /* AFI r1, i2 --- add fullword immediate. */
1372 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1373 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1374 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1375 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1376 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1377 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1378
1379 /* ALFI r1, i2 --- add logical immediate. */
1380 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1381 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1382 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1383 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1384 (CORE_ADDR)i2 & 0xffffffff);
1385
1386 /* AR r1, r2 -- add register. */
1387 /* AGR r1, r2 -- add register (64-bit version). */
1388 else if (is_rr (insn32, op_ar, &r1, &r2)
1389 || is_rre (insn64, op_agr, &r1, &r2))
1390 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1391
1392 /* A r1, d2(x2, b2) -- add. */
1393 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1394 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1395 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1396 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1397 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1398 data->gpr[r1] = pv_add (data->gpr[r1],
1399 s390_load (data, d2, x2, b2, data->gpr_size));
1400
1401 /* SLFI r1, i2 --- subtract logical immediate. */
1402 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1403 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1404 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1405 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1406 -((CORE_ADDR)i2 & 0xffffffff));
1407
1408 /* SR r1, r2 -- subtract register. */
1409 /* SGR r1, r2 -- subtract register (64-bit version). */
1410 else if (is_rr (insn32, op_sr, &r1, &r2)
1411 || is_rre (insn64, op_sgr, &r1, &r2))
1412 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1413
1414 /* S r1, d2(x2, b2) -- subtract. */
1415 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1416 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1417 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1418 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1419 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1420 data->gpr[r1] = pv_subtract (data->gpr[r1],
1421 s390_load (data, d2, x2, b2, data->gpr_size));
1422
1423 /* LA r1, d2(x2, b2) --- load address. */
1424 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1425 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
1426 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
1427 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1428
1429 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1430 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1431 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1432
3fc46200 1433 /* BASR r1, 0 --- branch and save.
a8c99f38
JB
1434 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1435 else if (is_rr (insn, op_basr, &r1, &r2)
1436 && r2 == 0)
3fc46200 1437 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1438
3fc46200 1439 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38
JB
1440 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1441 {
3fc46200 1442 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1443 next_pc = pc + i2 * 2;
4bc8c588 1444
a8c99f38
JB
1445 /* We'd better not interpret any backward branches. We'll
1446 never terminate. */
1447 if (next_pc <= pc)
4bc8c588
JB
1448 break;
1449 }
1450
a8c99f38
JB
1451 /* Terminate search when hitting any other branch instruction. */
1452 else if (is_rr (insn, op_basr, &r1, &r2)
1453 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1454 || is_rr (insn, op_bcr, &r1, &r2)
1455 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1456 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1457 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1458 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1459 break;
1460
4bc8c588
JB
1461 else
1462 /* An instruction we don't know how to simulate. The only
1463 safe thing to do would be to set every value we're tracking
a8c99f38
JB
1464 to 'unknown'. Instead, we'll be optimistic: we assume that
1465 we *can* interpret every instruction that the compiler uses
1466 to manipulate any of the data we're interested in here --
1467 then we can just ignore anything else. */
1468 ;
4bc8c588
JB
1469
1470 /* Record the address after the last instruction that changed
1471 the FP, SP, or backlink. Ignore instructions that changed
1472 them back to their original values --- those are probably
1473 restore instructions. (The back chain is never restored,
1474 just popped.) */
1475 {
3fc46200
UW
1476 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1477 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588 1478
3fc46200
UW
1479 if ((! pv_is_identical (pre_insn_sp, sp)
1480 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
1481 && sp.kind != pvk_unknown)
1482 || (! pv_is_identical (pre_insn_fp, fp)
1483 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
1484 && fp.kind != pvk_unknown)
121d8485 1485 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
a8c99f38 1486 result = next_pc;
4bc8c588 1487 }
5769d3cd 1488 }
4bc8c588 1489
ee1b3323
UW
1490 /* Record where all the registers were saved. */
1491 pv_area_scan (data->stack, s390_check_for_saved, data);
1492
1493 free_pv_area (data->stack);
1494 data->stack = NULL;
1495
4bc8c588 1496 return result;
5769d3cd
AC
1497}
1498
a8c99f38
JB
1499/* Advance PC across any function entry prologue instructions to reach
1500 some "real" code. */
1501static CORE_ADDR
6093d2eb 1502s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1503{
1504 struct s390_prologue_data data;
1505 CORE_ADDR skip_pc;
6093d2eb 1506 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1507 return skip_pc ? skip_pc : pc;
1508}
1509
d0f54f9d
JB
1510/* Return true if we are in the functin's epilogue, i.e. after the
1511 instruction that destroyed the function's stack frame. */
1512static int
1513s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1514{
1515 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1516
1517 /* In frameless functions, there's not frame to destroy and thus
1518 we don't care about the epilogue.
1519
1520 In functions with frame, the epilogue sequence is a pair of
1521 a LM-type instruction that restores (amongst others) the
1522 return register %r14 and the stack pointer %r15, followed
1523 by a branch 'br %r14' --or equivalent-- that effects the
1524 actual return.
1525
1526 In that situation, this function needs to return 'true' in
1527 exactly one case: when pc points to that branch instruction.
1528
1529 Thus we try to disassemble the one instructions immediately
177b42fe 1530 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1531 modifying the stack pointer.
1532
1533 Note that disassembling backwards is not reliable, so there
1534 is a slight chance of false positives here ... */
1535
1536 bfd_byte insn[6];
1537 unsigned int r1, r3, b2;
1538 int d2;
1539
1540 if (word_size == 4
8defab1a 1541 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1542 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1543 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1544 return 1;
1545
a8c99f38 1546 if (word_size == 4
8defab1a 1547 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1548 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1549 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1550 return 1;
1551
d0f54f9d 1552 if (word_size == 8
8defab1a 1553 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1554 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1555 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1556 return 1;
1557
1558 return 0;
1559}
5769d3cd 1560
1db4e8a0
UW
1561/* Displaced stepping. */
1562
1563/* Fix up the state of registers and memory after having single-stepped
1564 a displaced instruction. */
1565static void
1566s390_displaced_step_fixup (struct gdbarch *gdbarch,
1567 struct displaced_step_closure *closure,
1568 CORE_ADDR from, CORE_ADDR to,
1569 struct regcache *regs)
1570{
1571 /* Since we use simple_displaced_step_copy_insn, our closure is a
1572 copy of the instruction. */
1573 gdb_byte *insn = (gdb_byte *) closure;
1574 static int s390_instrlen[] = { 2, 4, 4, 6 };
1575 int insnlen = s390_instrlen[insn[0] >> 6];
1576
1577 /* Fields for various kinds of instructions. */
1578 unsigned int b2, r1, r2, x2, r3;
1579 int i2, d2;
1580
1581 /* Get current PC and addressing mode bit. */
1582 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1583 ULONGEST amode = 0;
1db4e8a0
UW
1584
1585 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1586 {
1587 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1588 amode &= 0x80000000;
1589 }
1590
1591 if (debug_displaced)
1592 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1593 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1594 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1595 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1596
1597 /* Handle absolute branch and save instructions. */
1598 if (is_rr (insn, op_basr, &r1, &r2)
1599 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1600 {
1601 /* Recompute saved return address in R1. */
1602 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1603 amode | (from + insnlen));
1604 }
1605
1606 /* Handle absolute branch instructions. */
1607 else if (is_rr (insn, op_bcr, &r1, &r2)
1608 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1609 || is_rr (insn, op_bctr, &r1, &r2)
1610 || is_rre (insn, op_bctgr, &r1, &r2)
1611 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1612 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1613 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1614 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1615 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1616 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1617 {
1618 /* Update PC iff branch was *not* taken. */
1619 if (pc == to + insnlen)
1620 regcache_write_pc (regs, from + insnlen);
1621 }
1622
1623 /* Handle PC-relative branch and save instructions. */
1624 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
1625 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1626 {
1627 /* Update PC. */
1628 regcache_write_pc (regs, pc - to + from);
1629 /* Recompute saved return address in R1. */
1630 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1631 amode | (from + insnlen));
1632 }
1633
1634 /* Handle PC-relative branch instructions. */
1635 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1636 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1637 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1638 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1639 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1640 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1641 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1642 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1643 {
1644 /* Update PC. */
1645 regcache_write_pc (regs, pc - to + from);
1646 }
1647
1648 /* Handle LOAD ADDRESS RELATIVE LONG. */
1649 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1650 {
0161e4b9
UW
1651 /* Update PC. */
1652 regcache_write_pc (regs, from + insnlen);
1db4e8a0
UW
1653 /* Recompute output address in R1. */
1654 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1655 amode | (from + i2 * 2));
1db4e8a0
UW
1656 }
1657
1658 /* If we executed a breakpoint instruction, point PC right back at it. */
1659 else if (insn[0] == 0x0 && insn[1] == 0x1)
1660 regcache_write_pc (regs, from);
1661
1662 /* For any other insn, PC points right after the original instruction. */
1663 else
1664 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1665
1666 if (debug_displaced)
1667 fprintf_unfiltered (gdb_stdlog,
1668 "displaced: (s390) pc is now %s\n",
1669 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1670}
a8c99f38 1671
d6db1fab
UW
1672
1673/* Helper routine to unwind pseudo registers. */
1674
1675static struct value *
1676s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1677{
1678 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1679 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1680 struct type *type = register_type (gdbarch, regnum);
1681
1682 /* Unwind PC via PSW address. */
1683 if (regnum == tdep->pc_regnum)
1684 {
1685 struct value *val;
1686
1687 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1688 if (!value_optimized_out (val))
1689 {
1690 LONGEST pswa = value_as_long (val);
1691
1692 if (TYPE_LENGTH (type) == 4)
1693 return value_from_pointer (type, pswa & 0x7fffffff);
1694 else
1695 return value_from_pointer (type, pswa);
1696 }
1697 }
1698
1699 /* Unwind CC via PSW mask. */
1700 if (regnum == tdep->cc_regnum)
1701 {
1702 struct value *val;
1703
1704 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1705 if (!value_optimized_out (val))
1706 {
1707 LONGEST pswm = value_as_long (val);
1708
1709 if (TYPE_LENGTH (type) == 4)
1710 return value_from_longest (type, (pswm >> 12) & 3);
1711 else
1712 return value_from_longest (type, (pswm >> 44) & 3);
1713 }
1714 }
1715
1716 /* Unwind full GPRs to show at least the lower halves (as the
1717 upper halves are undefined). */
1718 if (tdep->gpr_full_regnum != -1
1719 && regnum >= tdep->gpr_full_regnum
1720 && regnum < tdep->gpr_full_regnum + 16)
1721 {
1722 int reg = regnum - tdep->gpr_full_regnum;
1723 struct value *val;
1724
1725 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1726 if (!value_optimized_out (val))
1727 return value_cast (type, val);
1728 }
1729
1730 return allocate_optimized_out_value (type);
1731}
1732
1733static struct value *
1734s390_trad_frame_prev_register (struct frame_info *this_frame,
1735 struct trad_frame_saved_reg saved_regs[],
1736 int regnum)
1737{
1738 if (regnum < S390_NUM_REGS)
1739 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1740 else
1741 return s390_unwind_pseudo_register (this_frame, regnum);
1742}
1743
1744
a8c99f38
JB
1745/* Normal stack frames. */
1746
1747struct s390_unwind_cache {
1748
1749 CORE_ADDR func;
1750 CORE_ADDR frame_base;
1751 CORE_ADDR local_base;
1752
1753 struct trad_frame_saved_reg *saved_regs;
1754};
1755
a78f21af 1756static int
f089c433 1757s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1758 struct s390_unwind_cache *info)
5769d3cd 1759{
f089c433 1760 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1761 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1762 struct s390_prologue_data data;
3fc46200
UW
1763 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1764 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1765 int i;
1766 CORE_ADDR cfa;
a8c99f38
JB
1767 CORE_ADDR func;
1768 CORE_ADDR result;
1769 ULONGEST reg;
1770 CORE_ADDR prev_sp;
1771 int frame_pointer;
1772 int size;
edb3359d 1773 struct frame_info *next_frame;
a8c99f38
JB
1774
1775 /* Try to find the function start address. If we can't find it, we don't
1776 bother searching for it -- with modern compilers this would be mostly
1777 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1778 or else a valid backchain ... */
f089c433 1779 func = get_frame_func (this_frame);
a8c99f38
JB
1780 if (!func)
1781 return 0;
5769d3cd 1782
a8c99f38
JB
1783 /* Try to analyze the prologue. */
1784 result = s390_analyze_prologue (gdbarch, func,
f089c433 1785 get_frame_pc (this_frame), &data);
a8c99f38 1786 if (!result)
5769d3cd 1787 return 0;
5769d3cd 1788
a8c99f38
JB
1789 /* If this was successful, we should have found the instruction that
1790 sets the stack pointer register to the previous value of the stack
1791 pointer minus the frame size. */
3fc46200 1792 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1793 return 0;
a8c99f38
JB
1794
1795 /* A frame size of zero at this point can mean either a real
1796 frameless function, or else a failure to find the prologue.
1797 Perform some sanity checks to verify we really have a
1798 frameless function. */
1799 if (sp->k == 0)
5769d3cd 1800 {
a8c99f38
JB
1801 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1802 size zero. This is only possible if the next frame is a sentinel
1803 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1804 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1805 needed, instead the code should simpliy rely on its
1806 analysis. */
edb3359d
DJ
1807 next_frame = get_next_frame (this_frame);
1808 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1809 next_frame = get_next_frame (next_frame);
1810 if (next_frame
f089c433 1811 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1812 return 0;
5769d3cd 1813
a8c99f38
JB
1814 /* If we really have a frameless function, %r14 must be valid
1815 -- in particular, it must point to a different function. */
f089c433 1816 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1817 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1818 if (get_pc_function_start (reg) == func)
5769d3cd 1819 {
a8c99f38
JB
1820 /* However, there is one case where it *is* valid for %r14
1821 to point to the same function -- if this is a recursive
1822 call, and we have stopped in the prologue *before* the
1823 stack frame was allocated.
1824
1825 Recognize this case by looking ahead a bit ... */
5769d3cd 1826
a8c99f38 1827 struct s390_prologue_data data2;
3fc46200 1828 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1829
1830 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
3fc46200 1831 && pv_is_register (*sp, S390_SP_REGNUM)
a8c99f38
JB
1832 && sp->k != 0))
1833 return 0;
5769d3cd 1834 }
5769d3cd 1835 }
5769d3cd
AC
1836
1837
a8c99f38
JB
1838 /* OK, we've found valid prologue data. */
1839 size = -sp->k;
5769d3cd 1840
a8c99f38
JB
1841 /* If the frame pointer originally also holds the same value
1842 as the stack pointer, we're probably using it. If it holds
1843 some other value -- even a constant offset -- it is most
1844 likely used as temp register. */
3fc46200 1845 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1846 frame_pointer = S390_FRAME_REGNUM;
1847 else
1848 frame_pointer = S390_SP_REGNUM;
1849
1850 /* If we've detected a function with stack frame, we'll still have to
1851 treat it as frameless if we're currently within the function epilog
c378eb4e 1852 code at a point where the frame pointer has already been restored.
a8c99f38 1853 This can only happen in an innermost frame. */
0e100dab
AC
1854 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1855 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1856 next_frame = get_next_frame (this_frame);
1857 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1858 next_frame = get_next_frame (next_frame);
f089c433 1859 if (size > 0
edb3359d 1860 && (next_frame == NULL
f089c433 1861 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1862 {
a8c99f38
JB
1863 /* See the comment in s390_in_function_epilogue_p on why this is
1864 not completely reliable ... */
f089c433 1865 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1866 {
a8c99f38
JB
1867 memset (&data, 0, sizeof (data));
1868 size = 0;
1869 frame_pointer = S390_SP_REGNUM;
5769d3cd 1870 }
5769d3cd 1871 }
5769d3cd 1872
a8c99f38
JB
1873 /* Once we know the frame register and the frame size, we can unwind
1874 the current value of the frame register from the next frame, and
1875 add back the frame size to arrive that the previous frame's
1876 stack pointer value. */
f089c433 1877 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1878 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1879
7803799a
UW
1880 /* Set up ABI call-saved/call-clobbered registers. */
1881 for (i = 0; i < S390_NUM_REGS; i++)
1882 if (!s390_register_call_saved (gdbarch, i))
1883 trad_frame_set_unknown (info->saved_regs, i);
1884
1885 /* CC is always call-clobbered. */
d6db1fab 1886 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1887
121d8485
UW
1888 /* Record the addresses of all register spill slots the prologue parser
1889 has recognized. Consider only registers defined as call-saved by the
1890 ABI; for call-clobbered registers the parser may have recognized
1891 spurious stores. */
5769d3cd 1892
7803799a
UW
1893 for (i = 0; i < 16; i++)
1894 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1895 && data.gpr_slot[i] != 0)
121d8485 1896 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1897
7803799a
UW
1898 for (i = 0; i < 16; i++)
1899 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1900 && data.fpr_slot[i] != 0)
1901 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1902
1903 /* Function return will set PC to %r14. */
d6db1fab 1904 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1905
1906 /* In frameless functions, we unwind simply by moving the return
1907 address to the PC. However, if we actually stored to the
1908 save area, use that -- we might only think the function frameless
1909 because we're in the middle of the prologue ... */
1910 if (size == 0
d6db1fab 1911 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1912 {
d6db1fab 1913 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1914 }
a8c99f38
JB
1915
1916 /* Another sanity check: unless this is a frameless function,
1917 we should have found spill slots for SP and PC.
1918 If not, we cannot unwind further -- this happens e.g. in
1919 libc's thread_start routine. */
1920 if (size > 0)
5769d3cd 1921 {
a8c99f38 1922 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1923 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1924 prev_sp = -1;
5769d3cd 1925 }
a8c99f38
JB
1926
1927 /* We use the current value of the frame register as local_base,
1928 and the top of the register save area as frame_base. */
1929 if (prev_sp != -1)
1930 {
1931 info->frame_base = prev_sp + 16*word_size + 32;
1932 info->local_base = prev_sp - size;
1933 }
1934
1935 info->func = func;
1936 return 1;
5769d3cd
AC
1937}
1938
a78f21af 1939static void
f089c433 1940s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1941 struct s390_unwind_cache *info)
5769d3cd 1942{
f089c433 1943 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1944 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1945 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1946 CORE_ADDR backchain;
1947 ULONGEST reg;
1948 LONGEST sp;
7803799a
UW
1949 int i;
1950
1951 /* Set up ABI call-saved/call-clobbered registers. */
1952 for (i = 0; i < S390_NUM_REGS; i++)
1953 if (!s390_register_call_saved (gdbarch, i))
1954 trad_frame_set_unknown (info->saved_regs, i);
1955
1956 /* CC is always call-clobbered. */
d6db1fab 1957 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1958
1959 /* Get the backchain. */
f089c433 1960 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1961 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1962
1963 /* A zero backchain terminates the frame chain. As additional
1964 sanity check, let's verify that the spill slot for SP in the
1965 save area pointed to by the backchain in fact links back to
1966 the save area. */
1967 if (backchain != 0
e17a4113
UW
1968 && safe_read_memory_integer (backchain + 15*word_size,
1969 word_size, byte_order, &sp)
a8c99f38
JB
1970 && (CORE_ADDR)sp == backchain)
1971 {
1972 /* We don't know which registers were saved, but it will have
1973 to be at least %r14 and %r15. This will allow us to continue
1974 unwinding, but other prev-frame registers may be incorrect ... */
1975 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1976 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1977
1978 /* Function return will set PC to %r14. */
d6db1fab 1979 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1980 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1981
1982 /* We use the current value of the frame register as local_base,
1983 and the top of the register save area as frame_base. */
1984 info->frame_base = backchain + 16*word_size + 32;
1985 info->local_base = reg;
1986 }
1987
f089c433 1988 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1989}
1990
a8c99f38 1991static struct s390_unwind_cache *
f089c433 1992s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1993 void **this_prologue_cache)
1994{
1995 struct s390_unwind_cache *info;
1996 if (*this_prologue_cache)
1997 return *this_prologue_cache;
1998
1999 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
2000 *this_prologue_cache = info;
f089c433 2001 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2002 info->func = -1;
2003 info->frame_base = -1;
2004 info->local_base = -1;
2005
2006 /* Try to use prologue analysis to fill the unwind cache.
2007 If this fails, fall back to reading the stack backchain. */
f089c433
UW
2008 if (!s390_prologue_frame_unwind_cache (this_frame, info))
2009 s390_backchain_frame_unwind_cache (this_frame, info);
a8c99f38
JB
2010
2011 return info;
2012}
5769d3cd 2013
a78f21af 2014static void
f089c433 2015s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2016 void **this_prologue_cache,
2017 struct frame_id *this_id)
5769d3cd 2018{
a8c99f38 2019 struct s390_unwind_cache *info
f089c433 2020 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 2021
a8c99f38
JB
2022 if (info->frame_base == -1)
2023 return;
5769d3cd 2024
a8c99f38 2025 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
2026}
2027
f089c433
UW
2028static struct value *
2029s390_frame_prev_register (struct frame_info *this_frame,
2030 void **this_prologue_cache, int regnum)
a8c99f38 2031{
7803799a 2032 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2033 struct s390_unwind_cache *info
f089c433 2034 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 2035
d6db1fab 2036 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2037}
2038
2039static const struct frame_unwind s390_frame_unwind = {
2040 NORMAL_FRAME,
8fbca658 2041 default_frame_unwind_stop_reason,
a8c99f38 2042 s390_frame_this_id,
f089c433
UW
2043 s390_frame_prev_register,
2044 NULL,
2045 default_frame_sniffer
a8c99f38
JB
2046};
2047
5769d3cd 2048
8e645ae7
AC
2049/* Code stubs and their stack frames. For things like PLTs and NULL
2050 function calls (where there is no true frame and the return address
2051 is in the RETADDR register). */
a8c99f38 2052
8e645ae7
AC
2053struct s390_stub_unwind_cache
2054{
a8c99f38
JB
2055 CORE_ADDR frame_base;
2056 struct trad_frame_saved_reg *saved_regs;
2057};
2058
8e645ae7 2059static struct s390_stub_unwind_cache *
f089c433 2060s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 2061 void **this_prologue_cache)
5769d3cd 2062{
f089c433 2063 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 2064 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 2065 struct s390_stub_unwind_cache *info;
a8c99f38 2066 ULONGEST reg;
5c3cf190 2067
a8c99f38
JB
2068 if (*this_prologue_cache)
2069 return *this_prologue_cache;
5c3cf190 2070
8e645ae7 2071 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 2072 *this_prologue_cache = info;
f089c433 2073 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
2074
2075 /* The return address is in register %r14. */
d6db1fab 2076 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
2077
2078 /* Retrieve stack pointer and determine our frame base. */
f089c433 2079 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
2080 info->frame_base = reg + 16*word_size + 32;
2081
2082 return info;
5769d3cd
AC
2083}
2084
a8c99f38 2085static void
f089c433 2086s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
2087 void **this_prologue_cache,
2088 struct frame_id *this_id)
5769d3cd 2089{
8e645ae7 2090 struct s390_stub_unwind_cache *info
f089c433
UW
2091 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
2092 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 2093}
5769d3cd 2094
f089c433
UW
2095static struct value *
2096s390_stub_frame_prev_register (struct frame_info *this_frame,
2097 void **this_prologue_cache, int regnum)
8e645ae7
AC
2098{
2099 struct s390_stub_unwind_cache *info
f089c433 2100 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2101 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2102}
2103
f089c433
UW
2104static int
2105s390_stub_frame_sniffer (const struct frame_unwind *self,
2106 struct frame_info *this_frame,
2107 void **this_prologue_cache)
a8c99f38 2108{
93d42b30 2109 CORE_ADDR addr_in_block;
8e645ae7
AC
2110 bfd_byte insn[S390_MAX_INSTR_SIZE];
2111
2112 /* If the current PC points to non-readable memory, we assume we
2113 have trapped due to an invalid function pointer call. We handle
2114 the non-existing current function like a PLT stub. */
f089c433 2115 addr_in_block = get_frame_address_in_block (this_frame);
93d42b30 2116 if (in_plt_section (addr_in_block, NULL)
f089c433
UW
2117 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
2118 return 1;
2119 return 0;
a8c99f38 2120}
5769d3cd 2121
f089c433
UW
2122static const struct frame_unwind s390_stub_frame_unwind = {
2123 NORMAL_FRAME,
8fbca658 2124 default_frame_unwind_stop_reason,
f089c433
UW
2125 s390_stub_frame_this_id,
2126 s390_stub_frame_prev_register,
2127 NULL,
2128 s390_stub_frame_sniffer
2129};
2130
5769d3cd 2131
a8c99f38 2132/* Signal trampoline stack frames. */
5769d3cd 2133
a8c99f38
JB
2134struct s390_sigtramp_unwind_cache {
2135 CORE_ADDR frame_base;
2136 struct trad_frame_saved_reg *saved_regs;
2137};
5769d3cd 2138
a8c99f38 2139static struct s390_sigtramp_unwind_cache *
f089c433 2140s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 2141 void **this_prologue_cache)
5769d3cd 2142{
f089c433 2143 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 2144 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2145 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2146 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
2147 struct s390_sigtramp_unwind_cache *info;
2148 ULONGEST this_sp, prev_sp;
7803799a 2149 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
2150 int i;
2151
2152 if (*this_prologue_cache)
2153 return *this_prologue_cache;
5769d3cd 2154
a8c99f38
JB
2155 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
2156 *this_prologue_cache = info;
f089c433 2157 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 2158
f089c433
UW
2159 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2160 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
2161 next_cfa = this_sp + 16*word_size + 32;
2162
2163 /* New-style RT frame:
2164 retcode + alignment (8 bytes)
2165 siginfo (128 bytes)
c378eb4e 2166 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
2167 if (next_ra == next_cfa)
2168 {
f0f63663 2169 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2170 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2171 upper GPR halves if present. */
2172 sigreg_high_off = 8;
a8c99f38
JB
2173 }
2174
2175 /* Old-style RT frame and all non-RT frames:
2176 old signal mask (8 bytes)
c378eb4e 2177 pointer to sigregs. */
5769d3cd
AC
2178 else
2179 {
e17a4113
UW
2180 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2181 word_size, byte_order);
7803799a
UW
2182 /* sigregs are followed by signo (4 bytes), then by the
2183 upper GPR halves if present. */
2184 sigreg_high_off = 4;
a8c99f38 2185 }
5769d3cd 2186
a8c99f38
JB
2187 /* The sigregs structure looks like this:
2188 long psw_mask;
2189 long psw_addr;
2190 long gprs[16];
2191 int acrs[16];
2192 int fpc;
2193 int __pad;
2194 double fprs[16]; */
5769d3cd 2195
7803799a
UW
2196 /* PSW mask and address. */
2197 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2198 sigreg_ptr += word_size;
7803799a 2199 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2200 sigreg_ptr += word_size;
2201
2202 /* Then the GPRs. */
2203 for (i = 0; i < 16; i++)
2204 {
2205 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2206 sigreg_ptr += word_size;
2207 }
2208
2209 /* Then the ACRs. */
2210 for (i = 0; i < 16; i++)
2211 {
2212 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2213 sigreg_ptr += 4;
5769d3cd 2214 }
5769d3cd 2215
a8c99f38
JB
2216 /* The floating-point control word. */
2217 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2218 sigreg_ptr += 8;
5769d3cd 2219
a8c99f38
JB
2220 /* And finally the FPRs. */
2221 for (i = 0; i < 16; i++)
2222 {
2223 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2224 sigreg_ptr += 8;
2225 }
2226
7803799a
UW
2227 /* If we have them, the GPR upper halves are appended at the end. */
2228 sigreg_ptr += sigreg_high_off;
2229 if (tdep->gpr_full_regnum != -1)
2230 for (i = 0; i < 16; i++)
2231 {
2232 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
2233 sigreg_ptr += 4;
2234 }
2235
a8c99f38
JB
2236 /* Restore the previous frame's SP. */
2237 prev_sp = read_memory_unsigned_integer (
2238 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2239 word_size, byte_order);
5769d3cd 2240
a8c99f38
JB
2241 /* Determine our frame base. */
2242 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2243
a8c99f38 2244 return info;
5769d3cd
AC
2245}
2246
a8c99f38 2247static void
f089c433 2248s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2249 void **this_prologue_cache,
2250 struct frame_id *this_id)
5769d3cd 2251{
a8c99f38 2252 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2253 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2254 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2255}
2256
f089c433
UW
2257static struct value *
2258s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2259 void **this_prologue_cache, int regnum)
a8c99f38
JB
2260{
2261 struct s390_sigtramp_unwind_cache *info
f089c433 2262 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2263 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2264}
2265
f089c433
UW
2266static int
2267s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2268 struct frame_info *this_frame,
2269 void **this_prologue_cache)
5769d3cd 2270{
f089c433 2271 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2272 bfd_byte sigreturn[2];
4c8287ac 2273
8defab1a 2274 if (target_read_memory (pc, sigreturn, 2))
f089c433 2275 return 0;
4c8287ac 2276
a8c99f38 2277 if (sigreturn[0] != 0x0a /* svc */)
f089c433 2278 return 0;
5769d3cd 2279
a8c99f38
JB
2280 if (sigreturn[1] != 119 /* sigreturn */
2281 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2282 return 0;
a8c99f38 2283
f089c433 2284 return 1;
5769d3cd
AC
2285}
2286
f089c433
UW
2287static const struct frame_unwind s390_sigtramp_frame_unwind = {
2288 SIGTRAMP_FRAME,
8fbca658 2289 default_frame_unwind_stop_reason,
f089c433
UW
2290 s390_sigtramp_frame_this_id,
2291 s390_sigtramp_frame_prev_register,
2292 NULL,
2293 s390_sigtramp_frame_sniffer
2294};
2295
4c8287ac 2296
a8c99f38
JB
2297/* Frame base handling. */
2298
2299static CORE_ADDR
f089c433 2300s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2301{
a8c99f38 2302 struct s390_unwind_cache *info
f089c433 2303 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2304 return info->frame_base;
2305}
2306
2307static CORE_ADDR
f089c433 2308s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2309{
2310 struct s390_unwind_cache *info
f089c433 2311 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2312 return info->local_base;
2313}
2314
2315static const struct frame_base s390_frame_base = {
2316 &s390_frame_unwind,
2317 s390_frame_base_address,
2318 s390_local_base_address,
2319 s390_local_base_address
2320};
2321
2322static CORE_ADDR
2323s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2324{
7803799a 2325 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2326 ULONGEST pc;
7803799a 2327 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2328 return gdbarch_addr_bits_remove (gdbarch, pc);
2329}
2330
2331static CORE_ADDR
2332s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2333{
2334 ULONGEST sp;
2335 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2336 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2337}
2338
2339
a431654a
AC
2340/* DWARF-2 frame support. */
2341
7803799a
UW
2342static struct value *
2343s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2344 int regnum)
2345{
d6db1fab 2346 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2347}
2348
a431654a
AC
2349static void
2350s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
aff37fc1 2351 struct dwarf2_frame_state_reg *reg,
4a4e5149 2352 struct frame_info *this_frame)
a431654a
AC
2353{
2354 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2355
d6db1fab
UW
2356 /* The condition code (and thus PSW mask) is call-clobbered. */
2357 if (regnum == S390_PSWM_REGNUM)
2358 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2359
2360 /* The PSW address unwinds to the return address. */
2361 else if (regnum == S390_PSWA_REGNUM)
2362 reg->how = DWARF2_FRAME_REG_RA;
2363
7803799a
UW
2364 /* Fixed registers are call-saved or call-clobbered
2365 depending on the ABI in use. */
d6db1fab 2366 else if (regnum < S390_NUM_REGS)
a431654a 2367 {
7803799a 2368 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2369 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2370 else
a431654a 2371 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2372 }
a431654a 2373
d6db1fab
UW
2374 /* We install a special function to unwind pseudos. */
2375 else
7803799a
UW
2376 {
2377 reg->how = DWARF2_FRAME_REG_FN;
2378 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2379 }
2380}
2381
2382
b0cf273e
JB
2383/* Dummy function calls. */
2384
78f8b424
JB
2385/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2386 "Integer-like" types are those that should be passed the way
2387 integers are: integers, enums, ranges, characters, and booleans. */
2388static int
2389is_integer_like (struct type *type)
2390{
2391 enum type_code code = TYPE_CODE (type);
2392
2393 return (code == TYPE_CODE_INT
2394 || code == TYPE_CODE_ENUM
2395 || code == TYPE_CODE_RANGE
2396 || code == TYPE_CODE_CHAR
2397 || code == TYPE_CODE_BOOL);
2398}
2399
78f8b424
JB
2400/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2401 "Pointer-like" types are those that should be passed the way
2402 pointers are: pointers and references. */
2403static int
2404is_pointer_like (struct type *type)
2405{
2406 enum type_code code = TYPE_CODE (type);
2407
2408 return (code == TYPE_CODE_PTR
2409 || code == TYPE_CODE_REF);
2410}
2411
2412
20a940cc
JB
2413/* Return non-zero if TYPE is a `float singleton' or `double
2414 singleton', zero otherwise.
2415
2416 A `T singleton' is a struct type with one member, whose type is
2417 either T or a `T singleton'. So, the following are all float
2418 singletons:
2419
2420 struct { float x };
2421 struct { struct { float x; } x; };
2422 struct { struct { struct { float x; } x; } x; };
2423
2424 ... and so on.
2425
b0cf273e
JB
2426 All such structures are passed as if they were floats or doubles,
2427 as the (revised) ABI says. */
20a940cc
JB
2428static int
2429is_float_singleton (struct type *type)
2430{
b0cf273e
JB
2431 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2432 {
2433 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2434 CHECK_TYPEDEF (singleton_type);
2435
2436 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2437 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2438 || is_float_singleton (singleton_type));
2439 }
2440
2441 return 0;
20a940cc
JB
2442}
2443
2444
2445/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2446 "Struct-like" types are those that should be passed as structs are:
2447 structs and unions.
2448
2449 As an odd quirk, not mentioned in the ABI, GCC passes float and
2450 double singletons as if they were a plain float, double, etc. (The
2451 corresponding union types are handled normally.) So we exclude
2452 those types here. *shrug* */
2453static int
2454is_struct_like (struct type *type)
2455{
2456 enum type_code code = TYPE_CODE (type);
2457
2458 return (code == TYPE_CODE_UNION
2459 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2460}
2461
2462
2463/* Return non-zero if TYPE is a float-like type, zero otherwise.
2464 "Float-like" types are those that should be passed as
2465 floating-point values are.
2466
2467 You'd think this would just be floats, doubles, long doubles, etc.
2468 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2469 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2470 corresponding union types are handled normally.) So we include
20a940cc
JB
2471 those types here. *shrug* */
2472static int
2473is_float_like (struct type *type)
2474{
2475 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2476 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
20a940cc
JB
2477 || is_float_singleton (type));
2478}
2479
2480
78f8b424 2481static int
b0cf273e 2482is_power_of_two (unsigned int n)
78f8b424 2483{
b0cf273e 2484 return ((n & (n - 1)) == 0);
78f8b424
JB
2485}
2486
b0cf273e
JB
2487/* Return non-zero if TYPE should be passed as a pointer to a copy,
2488 zero otherwise. */
4d819d0e 2489static int
b0cf273e 2490s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2491{
354ecfd5 2492 if (TYPE_LENGTH (type) > 8)
b0cf273e 2493 return 1;
4d819d0e 2494
56b9d9ac
UW
2495 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2496 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2497 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2498}
2499
b0cf273e
JB
2500/* Return non-zero if TYPE should be passed in a float register
2501 if possible. */
78f8b424 2502static int
b0cf273e 2503s390_function_arg_float (struct type *type)
78f8b424 2504{
354ecfd5 2505 if (TYPE_LENGTH (type) > 8)
b0cf273e 2506 return 0;
78f8b424 2507
b0cf273e 2508 return is_float_like (type);
4d819d0e
JB
2509}
2510
b0cf273e
JB
2511/* Return non-zero if TYPE should be passed in an integer register
2512 (or a pair of integer registers) if possible. */
78f8b424 2513static int
b0cf273e 2514s390_function_arg_integer (struct type *type)
78f8b424 2515{
354ecfd5 2516 if (TYPE_LENGTH (type) > 8)
b0cf273e 2517 return 0;
78f8b424 2518
b0cf273e
JB
2519 return is_integer_like (type)
2520 || is_pointer_like (type)
354ecfd5 2521 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2522}
2523
78f8b424
JB
2524/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2525 word as required for the ABI. */
2526static LONGEST
e17a4113 2527extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2528{
e17a4113 2529 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2530 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2531
2532 /* Even structs get passed in the least significant bits of the
2533 register / memory word. It's not really right to extract them as
2534 an integer, but it does take care of the extension. */
2535 if (TYPE_UNSIGNED (type))
0fd88904 2536 return extract_unsigned_integer (value_contents (arg),
e17a4113 2537 TYPE_LENGTH (type), byte_order);
78f8b424 2538 else
0fd88904 2539 return extract_signed_integer (value_contents (arg),
e17a4113 2540 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2541}
2542
2543
78f8b424
JB
2544/* Return the alignment required by TYPE. */
2545static int
2546alignment_of (struct type *type)
2547{
2548 int alignment;
2549
2550 if (is_integer_like (type)
2551 || is_pointer_like (type)
a16b8bcd
UW
2552 || TYPE_CODE (type) == TYPE_CODE_FLT
2553 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2554 alignment = TYPE_LENGTH (type);
2555 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2556 || TYPE_CODE (type) == TYPE_CODE_UNION)
2557 {
2558 int i;
2559
2560 alignment = 1;
2561 for (i = 0; i < TYPE_NFIELDS (type); i++)
2562 {
56b9d9ac
UW
2563 int field_alignment
2564 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424
JB
2565
2566 if (field_alignment > alignment)
2567 alignment = field_alignment;
2568 }
2569 }
2570 else
2571 alignment = 1;
2572
2573 /* Check that everything we ever return is a power of two. Lots of
2574 code doesn't want to deal with aligning things to arbitrary
2575 boundaries. */
2576 gdb_assert ((alignment & (alignment - 1)) == 0);
2577
2578 return alignment;
2579}
2580
2581
2582/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2583 place to be passed to a function, as specified by the "GNU/Linux
2584 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2585
2586 SP is the current stack pointer. We must put arguments, links,
2587 padding, etc. whereever they belong, and return the new stack
2588 pointer value.
2589
2590 If STRUCT_RETURN is non-zero, then the function we're calling is
2591 going to return a structure by value; STRUCT_ADDR is the address of
2592 a block we've allocated for it on the stack.
2593
2594 Our caller has taken care of any type promotions needed to satisfy
2595 prototypes or the old K&R argument-passing rules. */
a78f21af 2596static CORE_ADDR
7d9b040b 2597s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2598 struct regcache *regcache, CORE_ADDR bp_addr,
2599 int nargs, struct value **args, CORE_ADDR sp,
2600 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2601{
b0cf273e
JB
2602 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2603 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2604 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2605 int i;
5769d3cd 2606
78f8b424
JB
2607 /* If the i'th argument is passed as a reference to a copy, then
2608 copy_addr[i] is the address of the copy we made. */
2609 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2610
c0cc4c83 2611 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2612 for (i = 0; i < nargs; i++)
2613 {
2614 struct value *arg = args[i];
56b9d9ac 2615 struct type *type = check_typedef (value_type (arg));
5769d3cd 2616
b0cf273e 2617 if (s390_function_arg_pass_by_reference (type))
01c464e9 2618 {
354ecfd5 2619 sp -= TYPE_LENGTH (type);
5b03f266 2620 sp = align_down (sp, alignment_of (type));
78f8b424 2621 copy_addr[i] = sp;
01c464e9 2622 }
5769d3cd 2623 }
5769d3cd 2624
78f8b424
JB
2625 /* Reserve space for the parameter area. As a conservative
2626 simplification, we assume that everything will be passed on the
b0cf273e
JB
2627 stack. Since every argument larger than 8 bytes will be
2628 passed by reference, we use this simple upper bound. */
2629 sp -= nargs * 8;
78f8b424 2630
78f8b424
JB
2631 /* After all that, make sure it's still aligned on an eight-byte
2632 boundary. */
5b03f266 2633 sp = align_down (sp, 8);
78f8b424 2634
c0cc4c83
UW
2635 /* Allocate the standard frame areas: the register save area, the
2636 word reserved for the compiler (which seems kind of meaningless),
2637 and the back chain pointer. */
2638 sp -= 16*word_size + 32;
2639
2640 /* Now we have the final SP value. Make sure we didn't underflow;
2641 on 31-bit, this would result in addresses with the high bit set,
2642 which causes confusion elsewhere. Note that if we error out
2643 here, stack and registers remain untouched. */
2644 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2645 error (_("Stack overflow"));
2646
2647
78f8b424
JB
2648 /* Finally, place the actual parameters, working from SP towards
2649 higher addresses. The code above is supposed to reserve enough
2650 space for this. */
2651 {
2652 int fr = 0;
2653 int gr = 2;
c0cc4c83 2654 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2655
b0cf273e 2656 /* A struct is returned using general register 2. */
4d819d0e 2657 if (struct_return)
b0cf273e
JB
2658 {
2659 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2660 struct_addr);
2661 gr++;
2662 }
4d819d0e 2663
78f8b424
JB
2664 for (i = 0; i < nargs; i++)
2665 {
2666 struct value *arg = args[i];
56b9d9ac 2667 struct type *type = check_typedef (value_type (arg));
b0cf273e
JB
2668 unsigned length = TYPE_LENGTH (type);
2669
2670 if (s390_function_arg_pass_by_reference (type))
2671 {
c0cc4c83
UW
2672 /* Actually copy the argument contents to the stack slot
2673 that was reserved above. */
2674 write_memory (copy_addr[i], value_contents (arg), length);
2675
b0cf273e
JB
2676 if (gr <= 6)
2677 {
2678 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2679 copy_addr[i]);
2680 gr++;
2681 }
2682 else
2683 {
e17a4113
UW
2684 write_memory_unsigned_integer (starg, word_size, byte_order,
2685 copy_addr[i]);
b0cf273e
JB
2686 starg += word_size;
2687 }
2688 }
2689 else if (s390_function_arg_float (type))
2690 {
2691 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2692 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2693 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2694 {
2695 /* When we store a single-precision value in an FP register,
2696 it occupies the leftmost bits. */
2697 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2698 0, length, value_contents (arg));
b0cf273e
JB
2699 fr += 2;
2700 }
2701 else
2702 {
2703 /* When we store a single-precision value in a stack slot,
2704 it occupies the rightmost bits. */
2705 starg = align_up (starg + length, word_size);
0fd88904 2706 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2707 }
2708 }
2709 else if (s390_function_arg_integer (type) && length <= word_size)
2710 {
2711 if (gr <= 6)
2712 {
2713 /* Integer arguments are always extended to word size. */
2714 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2715 extend_simple_arg (gdbarch,
2716 arg));
b0cf273e
JB
2717 gr++;
2718 }
2719 else
2720 {
2721 /* Integer arguments are always extended to word size. */
e17a4113
UW
2722 write_memory_signed_integer (starg, word_size, byte_order,
2723 extend_simple_arg (gdbarch, arg));
b0cf273e
JB
2724 starg += word_size;
2725 }
2726 }
2727 else if (s390_function_arg_integer (type) && length == 2*word_size)
2728 {
2729 if (gr <= 5)
2730 {
2731 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2732 value_contents (arg));
b0cf273e 2733 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2734 value_contents (arg) + word_size);
b0cf273e
JB
2735 gr += 2;
2736 }
2737 else
2738 {
2739 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2740 in it, then don't go back and use it again later. */
2741 gr = 7;
2742
0fd88904 2743 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2744 starg += length;
2745 }
2746 }
2747 else
e2e0b3e5 2748 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2749 }
2750 }
2751
8de7d199
UW
2752 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2753 if (word_size == 4)
2754 {
2755 ULONGEST pswa;
2756 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2757 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2758 }
b0cf273e 2759 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2760
b0cf273e
JB
2761 /* Store updated stack pointer. */
2762 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2763
a8c99f38 2764 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2765 which is actually the top of the register save area. */
2766 return sp + 16*word_size + 32;
5769d3cd
AC
2767}
2768
f089c433 2769/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2770 dummy frame. The frame ID's base needs to match the TOS value
2771 returned by push_dummy_call, and the PC match the dummy frame's
2772 breakpoint. */
2773static struct frame_id
f089c433 2774s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2775{
a8c99f38 2776 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2777 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2778 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2779
121d8485 2780 return frame_id_build (sp + 16*word_size + 32,
f089c433 2781 get_frame_pc (this_frame));
b0cf273e 2782}
c8f9d51c 2783
4074e13c
JB
2784static CORE_ADDR
2785s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2786{
2787 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2788 always be aligned on an eight-byte boundary. */
2789 return (addr & -8);
2790}
2791
2792
b0cf273e
JB
2793/* Function return value access. */
2794
2795static enum return_value_convention
2796s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2797{
354ecfd5 2798 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2799 return RETURN_VALUE_STRUCT_CONVENTION;
2800
2801 switch (TYPE_CODE (type))
2802 {
2803 case TYPE_CODE_STRUCT:
2804 case TYPE_CODE_UNION:
2805 case TYPE_CODE_ARRAY:
56b9d9ac 2806 case TYPE_CODE_COMPLEX:
b0cf273e 2807 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2808
b0cf273e
JB
2809 default:
2810 return RETURN_VALUE_REGISTER_CONVENTION;
2811 }
c8f9d51c
JB
2812}
2813
b0cf273e 2814static enum return_value_convention
6a3a010b 2815s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2816 struct type *type, struct regcache *regcache,
2817 gdb_byte *out, const gdb_byte *in)
5769d3cd 2818{
e17a4113 2819 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2820 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2821 enum return_value_convention rvc;
2822 int length;
2823
2824 type = check_typedef (type);
2825 rvc = s390_return_value_convention (gdbarch, type);
2826 length = TYPE_LENGTH (type);
2827
b0cf273e
JB
2828 if (in)
2829 {
2830 switch (rvc)
2831 {
2832 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2833 if (TYPE_CODE (type) == TYPE_CODE_FLT
2834 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2835 {
2836 /* When we store a single-precision value in an FP register,
2837 it occupies the leftmost bits. */
2838 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2839 0, length, in);
2840 }
2841 else if (length <= word_size)
2842 {
2843 /* Integer arguments are always extended to word size. */
2844 if (TYPE_UNSIGNED (type))
2845 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2846 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2847 else
2848 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2849 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2850 }
2851 else if (length == 2*word_size)
2852 {
2853 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2854 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2855 }
2856 else
e2e0b3e5 2857 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2858 break;
2859
2860 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2861 error (_("Cannot set function return value."));
b0cf273e
JB
2862 break;
2863 }
2864 }
2865 else if (out)
2866 {
2867 switch (rvc)
2868 {
2869 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2870 if (TYPE_CODE (type) == TYPE_CODE_FLT
2871 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2872 {
2873 /* When we store a single-precision value in an FP register,
2874 it occupies the leftmost bits. */
2875 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2876 0, length, out);
2877 }
2878 else if (length <= word_size)
2879 {
2880 /* Integer arguments occupy the rightmost bits. */
2881 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2882 word_size - length, length, out);
2883 }
2884 else if (length == 2*word_size)
2885 {
2886 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2887 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2888 }
2889 else
e2e0b3e5 2890 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2891 break;
5769d3cd 2892
b0cf273e 2893 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2894 error (_("Function return value unknown."));
b0cf273e
JB
2895 break;
2896 }
2897 }
2898
2899 return rvc;
2900}
5769d3cd
AC
2901
2902
a8c99f38
JB
2903/* Breakpoints. */
2904
43af2100 2905static const gdb_byte *
c378eb4e
MS
2906s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2907 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2908{
43af2100 2909 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2910
2911 *lenptr = sizeof (breakpoint);
2912 return breakpoint;
2913}
2914
5769d3cd 2915
a8c99f38 2916/* Address handling. */
5769d3cd
AC
2917
2918static CORE_ADDR
24568a2c 2919s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2920{
a8c99f38 2921 return addr & 0x7fffffff;
5769d3cd
AC
2922}
2923
ffc65945
KB
2924static int
2925s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2926{
2927 if (byte_size == 4)
119ac181 2928 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2929 else
2930 return 0;
2931}
2932
2933static const char *
2934s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2935{
119ac181 2936 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2937 return "mode32";
2938 else
2939 return NULL;
2940}
2941
a78f21af 2942static int
c378eb4e
MS
2943s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2944 const char *name,
ffc65945
KB
2945 int *type_flags_ptr)
2946{
2947 if (strcmp (name, "mode32") == 0)
2948 {
119ac181 2949 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2950 return 1;
2951 }
2952 else
2953 return 0;
2954}
2955
55aa24fb
SDJ
2956/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2957 gdbarch.h. */
2958
2959static int
2960s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2961{
2962 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2963 or indirection. */
2964 || *s == '%' /* Register access. */
2965 || isdigit (*s)); /* Literal number. */
2966}
2967
a8c99f38
JB
2968/* Set up gdbarch struct. */
2969
a78f21af 2970static struct gdbarch *
5769d3cd
AC
2971s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2972{
7803799a
UW
2973 const struct target_desc *tdesc = info.target_desc;
2974 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2975 struct gdbarch *gdbarch;
2976 struct gdbarch_tdep *tdep;
7803799a
UW
2977 int tdep_abi;
2978 int have_upper = 0;
c642a434
UW
2979 int have_linux_v1 = 0;
2980 int have_linux_v2 = 0;
7803799a
UW
2981 int first_pseudo_reg, last_pseudo_reg;
2982
2983 /* Default ABI and register size. */
2984 switch (info.bfd_arch_info->mach)
2985 {
2986 case bfd_mach_s390_31:
2987 tdep_abi = ABI_LINUX_S390;
2988 break;
2989
2990 case bfd_mach_s390_64:
2991 tdep_abi = ABI_LINUX_ZSERIES;
2992 break;
2993
2994 default:
2995 return NULL;
2996 }
2997
2998 /* Use default target description if none provided by the target. */
2999 if (!tdesc_has_registers (tdesc))
3000 {
3001 if (tdep_abi == ABI_LINUX_S390)
3002 tdesc = tdesc_s390_linux32;
3003 else
3004 tdesc = tdesc_s390x_linux64;
3005 }
3006
3007 /* Check any target description for validity. */
3008 if (tdesc_has_registers (tdesc))
3009 {
3010 static const char *const gprs[] = {
3011 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3012 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3013 };
3014 static const char *const fprs[] = {
3015 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
3016 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
3017 };
3018 static const char *const acrs[] = {
3019 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
3020 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
3021 };
3022 static const char *const gprs_lower[] = {
3023 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
3024 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
3025 };
3026 static const char *const gprs_upper[] = {
3027 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
3028 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
3029 };
3030 const struct tdesc_feature *feature;
3031 int i, valid_p = 1;
3032
3033 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
3034 if (feature == NULL)
3035 return NULL;
3036
3037 tdesc_data = tdesc_data_alloc ();
3038
3039 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3040 S390_PSWM_REGNUM, "pswm");
3041 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3042 S390_PSWA_REGNUM, "pswa");
3043
3044 if (tdesc_unnumbered_register (feature, "r0"))
3045 {
3046 for (i = 0; i < 16; i++)
3047 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3048 S390_R0_REGNUM + i, gprs[i]);
3049 }
3050 else
3051 {
3052 have_upper = 1;
3053
3054 for (i = 0; i < 16; i++)
3055 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3056 S390_R0_REGNUM + i,
3057 gprs_lower[i]);
3058 for (i = 0; i < 16; i++)
3059 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3060 S390_R0_UPPER_REGNUM + i,
3061 gprs_upper[i]);
3062 }
3063
3064 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
3065 if (feature == NULL)
3066 {
3067 tdesc_data_cleanup (tdesc_data);
3068 return NULL;
3069 }
3070
3071 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3072 S390_FPC_REGNUM, "fpc");
3073 for (i = 0; i < 16; i++)
3074 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3075 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 3076
7803799a
UW
3077 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
3078 if (feature == NULL)
3079 {
3080 tdesc_data_cleanup (tdesc_data);
3081 return NULL;
3082 }
3083
3084 for (i = 0; i < 16; i++)
3085 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3086 S390_A0_REGNUM + i, acrs[i]);
3087
94eae614 3088 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
3089 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
3090 if (feature)
3091 {
3092 tdesc_numbered_register (feature, tdesc_data,
3093 S390_ORIG_R2_REGNUM, "orig_r2");
3094
3095 if (tdesc_numbered_register (feature, tdesc_data,
3096 S390_LAST_BREAK_REGNUM, "last_break"))
3097 have_linux_v1 = 1;
3098
3099 if (tdesc_numbered_register (feature, tdesc_data,
3100 S390_SYSTEM_CALL_REGNUM, "system_call"))
3101 have_linux_v2 = 1;
3102
3103 if (have_linux_v2 > have_linux_v1)
3104 valid_p = 0;
3105 }
3106
7803799a
UW
3107 if (!valid_p)
3108 {
3109 tdesc_data_cleanup (tdesc_data);
3110 return NULL;
3111 }
3112 }
5769d3cd 3113
7803799a
UW
3114 /* Find a candidate among extant architectures. */
3115 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3116 arches != NULL;
3117 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3118 {
3119 tdep = gdbarch_tdep (arches->gdbarch);
3120 if (!tdep)
3121 continue;
3122 if (tdep->abi != tdep_abi)
3123 continue;
3124 if ((tdep->gpr_full_regnum != -1) != have_upper)
3125 continue;
3126 if (tdesc_data != NULL)
3127 tdesc_data_cleanup (tdesc_data);
3128 return arches->gdbarch;
3129 }
5769d3cd 3130
7803799a 3131 /* Otherwise create a new gdbarch for the specified machine type. */
d0f54f9d 3132 tdep = XCALLOC (1, struct gdbarch_tdep);
7803799a 3133 tdep->abi = tdep_abi;
d0f54f9d 3134 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3135
3136 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3137 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3138
1de90795
UW
3139 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3140 We can safely let them default to 128-bit, since the debug info
3141 will give the size of type actually used in each case. */
3142 set_gdbarch_long_double_bit (gdbarch, 128);
3143 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3144
aaab4dba 3145 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3146 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3147 always. */
5769d3cd 3148 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3149 /* Stack grows downward. */
3150 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3151 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3152 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3153 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3154
7803799a 3155 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3156 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3157 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3158 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3159 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3160 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
d0f54f9d
JB
3161 set_gdbarch_regset_from_core_section (gdbarch,
3162 s390_regset_from_core_section);
7803799a 3163 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
c642a434
UW
3164 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3165 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3166 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3167 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3168 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3169 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3170 set_tdesc_pseudo_register_reggroup_p (gdbarch,
3171 s390_pseudo_register_reggroup_p);
3172 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3173
3174 /* Assign pseudo register numbers. */
3175 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3176 last_pseudo_reg = first_pseudo_reg;
3177 tdep->gpr_full_regnum = -1;
3178 if (have_upper)
3179 {
3180 tdep->gpr_full_regnum = last_pseudo_reg;
3181 last_pseudo_reg += 16;
3182 }
3183 tdep->pc_regnum = last_pseudo_reg++;
3184 tdep->cc_regnum = last_pseudo_reg++;
3185 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3186 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3187
b0cf273e
JB
3188 /* Inferior function calls. */
3189 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3190 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3191 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3192 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3193
a8c99f38 3194 /* Frame handling. */
a431654a 3195 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3196 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3197 dwarf2_append_unwinders (gdbarch);
a431654a 3198 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3199 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3200 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3201 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3202 frame_base_set_default (gdbarch, &s390_frame_base);
3203 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3204 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3205
1db4e8a0
UW
3206 /* Displaced stepping. */
3207 set_gdbarch_displaced_step_copy_insn (gdbarch,
3208 simple_displaced_step_copy_insn);
3209 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3210 set_gdbarch_displaced_step_free_closure (gdbarch,
3211 simple_displaced_step_free_closure);
3212 set_gdbarch_displaced_step_location (gdbarch,
3213 displaced_step_at_entry_point);
3214 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3215
70728992
PA
3216 /* Note that GNU/Linux is the only OS supported on this
3217 platform. */
3218 linux_init_abi (info, gdbarch);
3219
7803799a 3220 switch (tdep->abi)
5769d3cd 3221 {
7803799a 3222 case ABI_LINUX_S390:
d0f54f9d
JB
3223 tdep->gregset = &s390_gregset;
3224 tdep->sizeof_gregset = s390_sizeof_gregset;
3225 tdep->fpregset = &s390_fpregset;
3226 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3227
3228 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3229 set_solib_svr4_fetch_link_map_offsets
3230 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434
UW
3231
3232 if (have_upper)
3233 {
3234 if (have_linux_v2)
3235 set_gdbarch_core_regset_sections (gdbarch,
3236 s390_linux64v2_regset_sections);
3237 else if (have_linux_v1)
3238 set_gdbarch_core_regset_sections (gdbarch,
3239 s390_linux64v1_regset_sections);
3240 else
3241 set_gdbarch_core_regset_sections (gdbarch,
3242 s390_linux64_regset_sections);
3243 }
3244 else
3245 {
3246 if (have_linux_v2)
3247 set_gdbarch_core_regset_sections (gdbarch,
3248 s390_linux32v2_regset_sections);
3249 else if (have_linux_v1)
3250 set_gdbarch_core_regset_sections (gdbarch,
3251 s390_linux32v1_regset_sections);
3252 else
3253 set_gdbarch_core_regset_sections (gdbarch,
3254 s390_linux32_regset_sections);
3255 }
5769d3cd 3256 break;
b0cf273e 3257
7803799a 3258 case ABI_LINUX_ZSERIES:
d0f54f9d
JB
3259 tdep->gregset = &s390x_gregset;
3260 tdep->sizeof_gregset = s390x_sizeof_gregset;
3261 tdep->fpregset = &s390_fpregset;
3262 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
3263
3264 set_gdbarch_long_bit (gdbarch, 64);
3265 set_gdbarch_long_long_bit (gdbarch, 64);
3266 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3267 set_solib_svr4_fetch_link_map_offsets
3268 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945
KB
3269 set_gdbarch_address_class_type_flags (gdbarch,
3270 s390_address_class_type_flags);
3271 set_gdbarch_address_class_type_flags_to_name (gdbarch,
3272 s390_address_class_type_flags_to_name);
3273 set_gdbarch_address_class_name_to_type_flags (gdbarch,
3274 s390_address_class_name_to_type_flags);
c642a434
UW
3275
3276 if (have_linux_v2)
3277 set_gdbarch_core_regset_sections (gdbarch,
3278 s390x_linux64v2_regset_sections);
3279 else if (have_linux_v1)
3280 set_gdbarch_core_regset_sections (gdbarch,
3281 s390x_linux64v1_regset_sections);
3282 else
3283 set_gdbarch_core_regset_sections (gdbarch,
3284 s390x_linux64_regset_sections);
5769d3cd
AC
3285 break;
3286 }
3287
36482093
AC
3288 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3289
982e9687
UW
3290 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3291
b2756930
KB
3292 /* Enable TLS support. */
3293 set_gdbarch_fetch_tls_load_module_address (gdbarch,
3294 svr4_fetch_objfile_link_map);
3295
1dd635ac
UW
3296 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3297
55aa24fb
SDJ
3298 /* SystemTap functions. */
3299 set_gdbarch_stap_register_prefix (gdbarch, "%");
3300 set_gdbarch_stap_register_indirection_prefix (gdbarch, "(");
3301 set_gdbarch_stap_register_indirection_suffix (gdbarch, ")");
3302 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
3303
5769d3cd
AC
3304 return gdbarch;
3305}
3306
3307
a78f21af
AC
3308extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3309
5769d3cd 3310void
5ae5f592 3311_initialize_s390_tdep (void)
5769d3cd 3312{
5769d3cd
AC
3313 /* Hook us into the gdbarch mechanism. */
3314 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3315
94eae614 3316 /* Initialize the GNU/Linux target descriptions. */
7803799a 3317 initialize_tdesc_s390_linux32 ();
c642a434
UW
3318 initialize_tdesc_s390_linux32v1 ();
3319 initialize_tdesc_s390_linux32v2 ();
7803799a 3320 initialize_tdesc_s390_linux64 ();
c642a434
UW
3321 initialize_tdesc_s390_linux64v1 ();
3322 initialize_tdesc_s390_linux64v2 ();
7803799a 3323 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3324 initialize_tdesc_s390x_linux64v1 ();
3325 initialize_tdesc_s390x_linux64v2 ();
5769d3cd 3326}
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