2004-02-17 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
[deliverable/binutils-gdb.git] / gdb / s390-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
9ab9195f 3 Copyright 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
23 02111-1307, USA. */
24
d0f54f9d 25#include "defs.h"
5769d3cd
AC
26#include "arch-utils.h"
27#include "frame.h"
28#include "inferior.h"
29#include "symtab.h"
30#include "target.h"
31#include "gdbcore.h"
32#include "gdbcmd.h"
5769d3cd
AC
33#include "objfiles.h"
34#include "tm.h"
35#include "../bfd/bfd.h"
36#include "floatformat.h"
37#include "regcache.h"
d0f54f9d
JB
38#include "reggroups.h"
39#include "regset.h"
fd0407d6 40#include "value.h"
78f8b424 41#include "gdb_assert.h"
a89aa300 42#include "dis-asm.h"
5769d3cd 43
d0f54f9d 44#include "s390-tdep.h"
5769d3cd 45
60e6cc42 46
d0f54f9d
JB
47/* The tdep structure. */
48
49struct gdbarch_tdep
5769d3cd 50{
b0cf273e
JB
51 /* ABI version. */
52 enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi;
53
d0f54f9d
JB
54 /* Core file register sets. */
55 const struct regset *gregset;
56 int sizeof_gregset;
57
58 const struct regset *fpregset;
59 int sizeof_fpregset;
60};
61
62
63/* Register information. */
64
65struct s390_register_info
66{
67 char *name;
68 struct type **type;
69};
70
71static struct s390_register_info s390_register_info[S390_NUM_TOTAL_REGS] =
72{
73 /* Program Status Word. */
74 { "pswm", &builtin_type_long },
75 { "pswa", &builtin_type_long },
76
77 /* General Purpose Registers. */
78 { "r0", &builtin_type_long },
79 { "r1", &builtin_type_long },
80 { "r2", &builtin_type_long },
81 { "r3", &builtin_type_long },
82 { "r4", &builtin_type_long },
83 { "r5", &builtin_type_long },
84 { "r6", &builtin_type_long },
85 { "r7", &builtin_type_long },
86 { "r8", &builtin_type_long },
87 { "r9", &builtin_type_long },
88 { "r10", &builtin_type_long },
89 { "r11", &builtin_type_long },
90 { "r12", &builtin_type_long },
91 { "r13", &builtin_type_long },
92 { "r14", &builtin_type_long },
93 { "r15", &builtin_type_long },
94
95 /* Access Registers. */
96 { "acr0", &builtin_type_int },
97 { "acr1", &builtin_type_int },
98 { "acr2", &builtin_type_int },
99 { "acr3", &builtin_type_int },
100 { "acr4", &builtin_type_int },
101 { "acr5", &builtin_type_int },
102 { "acr6", &builtin_type_int },
103 { "acr7", &builtin_type_int },
104 { "acr8", &builtin_type_int },
105 { "acr9", &builtin_type_int },
106 { "acr10", &builtin_type_int },
107 { "acr11", &builtin_type_int },
108 { "acr12", &builtin_type_int },
109 { "acr13", &builtin_type_int },
110 { "acr14", &builtin_type_int },
111 { "acr15", &builtin_type_int },
112
113 /* Floating Point Control Word. */
114 { "fpc", &builtin_type_int },
115
116 /* Floating Point Registers. */
117 { "f0", &builtin_type_double },
118 { "f1", &builtin_type_double },
119 { "f2", &builtin_type_double },
120 { "f3", &builtin_type_double },
121 { "f4", &builtin_type_double },
122 { "f5", &builtin_type_double },
123 { "f6", &builtin_type_double },
124 { "f7", &builtin_type_double },
125 { "f8", &builtin_type_double },
126 { "f9", &builtin_type_double },
127 { "f10", &builtin_type_double },
128 { "f11", &builtin_type_double },
129 { "f12", &builtin_type_double },
130 { "f13", &builtin_type_double },
131 { "f14", &builtin_type_double },
132 { "f15", &builtin_type_double },
133
134 /* Pseudo registers. */
135 { "pc", &builtin_type_void_func_ptr },
136 { "cc", &builtin_type_int },
137};
138
139/* Return the name of register REGNUM. */
140static const char *
141s390_register_name (int regnum)
142{
143 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
144 return s390_register_info[regnum].name;
145}
146
147/* Return the GDB type object for the "standard" data type of data in
148 register REGNUM. */
149static struct type *
150s390_register_type (struct gdbarch *gdbarch, int regnum)
151{
152 gdb_assert (regnum >= 0 && regnum < S390_NUM_TOTAL_REGS);
153 return *s390_register_info[regnum].type;
5769d3cd
AC
154}
155
d0f54f9d
JB
156/* DWARF Register Mapping. */
157
158static int s390_dwarf_regmap[] =
159{
160 /* General Purpose Registers. */
161 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
162 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
163 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
164 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
165
166 /* Floating Point Registers. */
167 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
168 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
169 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
170 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
171
172 /* Control Registers (not mapped). */
173 -1, -1, -1, -1, -1, -1, -1, -1,
174 -1, -1, -1, -1, -1, -1, -1, -1,
175
176 /* Access Registers. */
177 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
178 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
179 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
180 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
181
182 /* Program Status Word. */
183 S390_PSWM_REGNUM,
184 S390_PSWA_REGNUM
185};
186
187/* Convert DWARF register number REG to the appropriate register
188 number used by GDB. */
a78f21af 189static int
d0f54f9d
JB
190s390_dwarf_reg_to_regnum (int reg)
191{
192 int regnum = -1;
193
194 if (reg >= 0 || reg < ARRAY_SIZE (s390_dwarf_regmap))
195 regnum = s390_dwarf_regmap[reg];
196
197 if (regnum == -1)
198 warning ("Unmapped DWARF Register #%d encountered\n", reg);
199
200 return regnum;
201}
202
203/* Pseudo registers - PC and condition code. */
204
205static void
206s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
207 int regnum, void *buf)
208{
209 ULONGEST val;
210
211 switch (regnum)
212 {
213 case S390_PC_REGNUM:
214 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
215 store_unsigned_integer (buf, 4, val & 0x7fffffff);
216 break;
217
218 case S390_CC_REGNUM:
219 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
220 store_unsigned_integer (buf, 4, (val >> 12) & 3);
221 break;
222
223 default:
224 internal_error (__FILE__, __LINE__, "invalid regnum");
225 }
226}
227
228static void
229s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
230 int regnum, const void *buf)
5769d3cd 231{
d0f54f9d
JB
232 ULONGEST val, psw;
233
234 switch (regnum)
235 {
236 case S390_PC_REGNUM:
237 val = extract_unsigned_integer (buf, 4);
238 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
239 psw = (psw & 0x80000000) | (val & 0x7fffffff);
240 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, psw);
241 break;
242
243 case S390_CC_REGNUM:
244 val = extract_unsigned_integer (buf, 4);
245 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
246 psw = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
247 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
248 break;
249
250 default:
251 internal_error (__FILE__, __LINE__, "invalid regnum");
252 }
5769d3cd
AC
253}
254
d0f54f9d
JB
255static void
256s390x_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
257 int regnum, void *buf)
258{
259 ULONGEST val;
260
261 switch (regnum)
262 {
263 case S390_PC_REGNUM:
264 regcache_raw_read (regcache, S390_PSWA_REGNUM, buf);
265 break;
266
267 case S390_CC_REGNUM:
268 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
269 store_unsigned_integer (buf, 4, (val >> 44) & 3);
270 break;
271
272 default:
273 internal_error (__FILE__, __LINE__, "invalid regnum");
274 }
275}
276
277static void
278s390x_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
279 int regnum, const void *buf)
280{
281 ULONGEST val, psw;
282
283 switch (regnum)
284 {
285 case S390_PC_REGNUM:
286 regcache_raw_write (regcache, S390_PSWA_REGNUM, buf);
287 break;
288
289 case S390_CC_REGNUM:
290 val = extract_unsigned_integer (buf, 4);
291 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
292 psw = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
293 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, psw);
294 break;
295
296 default:
297 internal_error (__FILE__, __LINE__, "invalid regnum");
298 }
299}
300
301/* 'float' values are stored in the upper half of floating-point
302 registers, even though we are otherwise a big-endian platform. */
303
a78f21af 304static int
d0f54f9d 305s390_convert_register_p (int regno, struct type *type)
5769d3cd 306{
d0f54f9d
JB
307 return (regno >= S390_F0_REGNUM && regno <= S390_F15_REGNUM)
308 && TYPE_LENGTH (type) < 8;
5769d3cd
AC
309}
310
d0f54f9d
JB
311static void
312s390_register_to_value (struct frame_info *frame, int regnum,
313 struct type *valtype, void *out)
314{
315 char in[8];
316 int len = TYPE_LENGTH (valtype);
317 gdb_assert (len < 8);
318
319 get_frame_register (frame, regnum, in);
320 memcpy (out, in, len);
321}
322
323static void
324s390_value_to_register (struct frame_info *frame, int regnum,
325 struct type *valtype, const void *in)
326{
327 char out[8];
328 int len = TYPE_LENGTH (valtype);
329 gdb_assert (len < 8);
330
331 memset (out, 0, 8);
332 memcpy (out, in, len);
333 put_frame_register (frame, regnum, out);
334}
335
336/* Register groups. */
337
a78f21af 338static int
d0f54f9d
JB
339s390_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
340 struct reggroup *group)
341{
342 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
343
344 /* Registers displayed via 'info regs'. */
345 if (group == general_reggroup)
346 return (regnum >= S390_R0_REGNUM && regnum <= S390_R15_REGNUM)
347 || regnum == S390_PC_REGNUM
348 || regnum == S390_CC_REGNUM;
349
350 /* Registers displayed via 'info float'. */
351 if (group == float_reggroup)
352 return (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM)
353 || regnum == S390_FPC_REGNUM;
354
355 /* Registers that need to be saved/restored in order to
356 push or pop frames. */
357 if (group == save_reggroup || group == restore_reggroup)
358 return regnum != S390_PSWM_REGNUM && regnum != S390_PSWA_REGNUM;
359
360 return default_register_reggroup_p (gdbarch, regnum, group);
361}
362
363
364/* Core file register sets. */
365
366int s390_regmap_gregset[S390_NUM_REGS] =
367{
368 /* Program Status Word. */
369 0x00, 0x04,
370 /* General Purpose Registers. */
371 0x08, 0x0c, 0x10, 0x14,
372 0x18, 0x1c, 0x20, 0x24,
373 0x28, 0x2c, 0x30, 0x34,
374 0x38, 0x3c, 0x40, 0x44,
375 /* Access Registers. */
376 0x48, 0x4c, 0x50, 0x54,
377 0x58, 0x5c, 0x60, 0x64,
378 0x68, 0x6c, 0x70, 0x74,
379 0x78, 0x7c, 0x80, 0x84,
380 /* Floating Point Control Word. */
381 -1,
382 /* Floating Point Registers. */
383 -1, -1, -1, -1, -1, -1, -1, -1,
384 -1, -1, -1, -1, -1, -1, -1, -1,
385};
386
387int s390x_regmap_gregset[S390_NUM_REGS] =
388{
389 0x00, 0x08,
390 /* General Purpose Registers. */
391 0x10, 0x18, 0x20, 0x28,
392 0x30, 0x38, 0x40, 0x48,
393 0x50, 0x58, 0x60, 0x68,
394 0x70, 0x78, 0x80, 0x88,
395 /* Access Registers. */
396 0x90, 0x94, 0x98, 0x9c,
397 0xa0, 0xa4, 0xa8, 0xac,
398 0xb0, 0xb4, 0xb8, 0xbc,
399 0xc0, 0xc4, 0xc8, 0xcc,
400 /* Floating Point Control Word. */
401 -1,
402 /* Floating Point Registers. */
403 -1, -1, -1, -1, -1, -1, -1, -1,
404 -1, -1, -1, -1, -1, -1, -1, -1,
405};
406
407int s390_regmap_fpregset[S390_NUM_REGS] =
408{
409 /* Program Status Word. */
410 -1, -1,
411 /* General Purpose Registers. */
412 -1, -1, -1, -1, -1, -1, -1, -1,
413 -1, -1, -1, -1, -1, -1, -1, -1,
414 /* Access Registers. */
415 -1, -1, -1, -1, -1, -1, -1, -1,
416 -1, -1, -1, -1, -1, -1, -1, -1,
417 /* Floating Point Control Word. */
418 0x00,
419 /* Floating Point Registers. */
420 0x08, 0x10, 0x18, 0x20,
421 0x28, 0x30, 0x38, 0x40,
422 0x48, 0x50, 0x58, 0x60,
423 0x68, 0x70, 0x78, 0x80,
424};
425
426/* Supply register REGNUM from the register set REGSET to register cache
427 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
428static void
429s390_supply_regset (const struct regset *regset, struct regcache *regcache,
430 int regnum, const void *regs, size_t len)
431{
432 const int *offset = regset->descr;
433 int i;
434
435 for (i = 0; i < S390_NUM_REGS; i++)
436 {
437 if ((regnum == i || regnum == -1) && offset[i] != -1)
438 regcache_raw_supply (regcache, i, (const char *)regs + offset[i]);
439 }
440}
441
442static const struct regset s390_gregset = {
443 s390_regmap_gregset,
444 s390_supply_regset
445};
446
447static const struct regset s390x_gregset = {
448 s390x_regmap_gregset,
449 s390_supply_regset
450};
451
452static const struct regset s390_fpregset = {
453 s390_regmap_fpregset,
454 s390_supply_regset
455};
456
457/* Return the appropriate register set for the core section identified
458 by SECT_NAME and SECT_SIZE. */
459const struct regset *
460s390_regset_from_core_section (struct gdbarch *gdbarch,
461 const char *sect_name, size_t sect_size)
462{
463 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
464
465 if (strcmp (sect_name, ".reg") == 0 && sect_size == tdep->sizeof_gregset)
466 return tdep->gregset;
467
468 if (strcmp (sect_name, ".reg2") == 0 && sect_size == tdep->sizeof_fpregset)
469 return tdep->fpregset;
470
471 return NULL;
5769d3cd
AC
472}
473
d0f54f9d
JB
474
475#define GDB_TARGET_IS_ESAME (TARGET_ARCHITECTURE->mach == bfd_mach_s390_64)
476#define S390_GPR_SIZE (GDB_TARGET_IS_ESAME ? 8 : 4)
477#define S390_FPR_SIZE (8)
5769d3cd
AC
478#define S390_MAX_INSTR_SIZE (6)
479#define S390_SYSCALL_OPCODE (0x0a)
480#define S390_SYSCALL_SIZE (2)
481#define S390_SIGCONTEXT_SREGS_OFFSET (8)
482#define S390X_SIGCONTEXT_SREGS_OFFSET (8)
483#define S390_SIGREGS_FP0_OFFSET (144)
484#define S390X_SIGREGS_FP0_OFFSET (216)
485#define S390_UC_MCONTEXT_OFFSET (256)
486#define S390X_UC_MCONTEXT_OFFSET (344)
5769d3cd
AC
487#define S390_SIGNAL_FRAMESIZE (GDB_TARGET_IS_ESAME ? 160:96)
488#define s390_NR_sigreturn 119
489#define s390_NR_rt_sigreturn 173
490
491
492
493struct frame_extra_info
494{
495 int initialised;
496 int good_prologue;
497 CORE_ADDR function_start;
498 CORE_ADDR skip_prologue_function_start;
499 CORE_ADDR saved_pc_valid;
500 CORE_ADDR saved_pc;
501 CORE_ADDR sig_fixed_saved_pc_valid;
502 CORE_ADDR sig_fixed_saved_pc;
503 CORE_ADDR frame_pointer_saved_pc; /* frame pointer needed for alloca */
a9dd42f1 504 CORE_ADDR stack_bought_valid;
5769d3cd
AC
505 CORE_ADDR stack_bought; /* amount we decrement the stack pointer by */
506 CORE_ADDR sigcontext;
507};
508
509
510static CORE_ADDR s390_frame_saved_pc_nofix (struct frame_info *fi);
511
a78f21af 512static int
a788de9b 513s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
5769d3cd
AC
514{
515 int instrlen;
516
517 static int s390_instrlen[] = {
518 2,
519 4,
520 4,
521 6
522 };
a788de9b 523 if (target_read_memory (at, &instr[0], 2))
5769d3cd
AC
524 return -1;
525 instrlen = s390_instrlen[instr[0] >> 6];
c5e243bb
JB
526 if (instrlen > 2)
527 {
a788de9b 528 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
c5e243bb
JB
529 return -1;
530 }
5769d3cd
AC
531 return instrlen;
532}
533
534static void
535s390_memset_extra_info (struct frame_extra_info *fextra_info)
536{
537 memset (fextra_info, 0, sizeof (struct frame_extra_info));
538}
539
540
4bc8c588
JB
541/* Prologue analysis. */
542
543/* When we analyze a prologue, we're really doing 'abstract
544 interpretation' or 'pseudo-evaluation': running the function's code
545 in simulation, but using conservative approximations of the values
546 it would have when it actually runs. For example, if our function
547 starts with the instruction:
548
549 ahi r1, 42 # add halfword immediate 42 to r1
550
551 we don't know exactly what value will be in r1 after executing this
552 instruction, but we do know it'll be 42 greater than its original
553 value.
554
555 If we then see an instruction like:
556
557 ahi r1, 22 # add halfword immediate 22 to r1
558
559 we still don't know what r1's value is, but again, we can say it is
560 now 64 greater than its original value.
561
562 If the next instruction were:
563
564 lr r2, r1 # set r2 to r1's value
565
566 then we can say that r2's value is now the original value of r1
567 plus 64. And so on.
568
569 Of course, this can only go so far before it gets unreasonable. If
570 we wanted to be able to say anything about the value of r1 after
571 the instruction:
572
573 xr r1, r3 # exclusive-or r1 and r3, place result in r1
574
575 then things would get pretty complex. But remember, we're just
576 doing a conservative approximation; if exclusive-or instructions
577 aren't relevant to prologues, we can just say r1's value is now
578 'unknown'. We can ignore things that are too complex, if that loss
579 of information is acceptable for our application.
580
581 Once you've reached an instruction that you don't know how to
582 simulate, you stop. Now you examine the state of the registers and
583 stack slots you've kept track of. For example:
584
585 - To see how large your stack frame is, just check the value of sp;
586 if it's the original value of sp minus a constant, then that
587 constant is the stack frame's size. If the sp's value has been
588 marked as 'unknown', then that means the prologue has done
589 something too complex for us to track, and we don't know the
590 frame size.
591
592 - To see whether we've saved the SP in the current frame's back
593 chain slot, we just check whether the current value of the back
594 chain stack slot is the original value of the sp.
595
596 Sure, this takes some work. But prologue analyzers aren't
597 quick-and-simple pattern patching to recognize a few fixed prologue
598 forms any more; they're big, hairy functions. Along with inferior
599 function calls, prologue analysis accounts for a substantial
600 portion of the time needed to stabilize a GDB port. So I think
601 it's worthwhile to look for an approach that will be easier to
602 understand and maintain. In the approach used here:
603
604 - It's easier to see that the analyzer is correct: you just see
605 whether the analyzer properly (albiet conservatively) simulates
606 the effect of each instruction.
607
608 - It's easier to extend the analyzer: you can add support for new
609 instructions, and know that you haven't broken anything that
610 wasn't already broken before.
611
612 - It's orthogonal: to gather new information, you don't need to
613 complicate the code for each instruction. As long as your domain
614 of conservative values is already detailed enough to tell you
615 what you need, then all the existing instruction simulations are
616 already gathering the right data for you.
617
618 A 'struct prologue_value' is a conservative approximation of the
619 real value the register or stack slot will have. */
620
621struct prologue_value {
622
623 /* What sort of value is this? This determines the interpretation
624 of subsequent fields. */
625 enum {
626
627 /* We don't know anything about the value. This is also used for
628 values we could have kept track of, when doing so would have
629 been too complex and we don't want to bother. The bottom of
630 our lattice. */
631 pv_unknown,
632
633 /* A known constant. K is its value. */
634 pv_constant,
635
636 /* The value that register REG originally had *UPON ENTRY TO THE
637 FUNCTION*, plus K. If K is zero, this means, obviously, just
638 the value REG had upon entry to the function. REG is a GDB
639 register number. Before we start interpreting, we initialize
640 every register R to { pv_register, R, 0 }. */
641 pv_register,
642
643 } kind;
644
645 /* The meanings of the following fields depend on 'kind'; see the
646 comments for the specific 'kind' values. */
647 int reg;
648 CORE_ADDR k;
649};
650
651
652/* Set V to be unknown. */
653static void
654pv_set_to_unknown (struct prologue_value *v)
655{
656 v->kind = pv_unknown;
657}
658
659
660/* Set V to the constant K. */
661static void
662pv_set_to_constant (struct prologue_value *v, CORE_ADDR k)
663{
664 v->kind = pv_constant;
665 v->k = k;
666}
667
668
669/* Set V to the original value of register REG, plus K. */
670static void
671pv_set_to_register (struct prologue_value *v, int reg, CORE_ADDR k)
672{
673 v->kind = pv_register;
674 v->reg = reg;
675 v->k = k;
676}
677
678
679/* If one of *A and *B is a constant, and the other isn't, swap the
680 pointers as necessary to ensure that *B points to the constant.
681 This can reduce the number of cases we need to analyze in the
682 functions below. */
683static void
684pv_constant_last (struct prologue_value **a,
685 struct prologue_value **b)
686{
687 if ((*a)->kind == pv_constant
688 && (*b)->kind != pv_constant)
689 {
690 struct prologue_value *temp = *a;
691 *a = *b;
692 *b = temp;
693 }
694}
695
696
697/* Set SUM to the sum of A and B. SUM, A, and B may point to the same
698 'struct prologue_value' object. */
699static void
700pv_add (struct prologue_value *sum,
701 struct prologue_value *a,
702 struct prologue_value *b)
703{
704 pv_constant_last (&a, &b);
705
706 /* We can handle adding constants to registers, and other constants. */
707 if (b->kind == pv_constant
708 && (a->kind == pv_register
709 || a->kind == pv_constant))
710 {
711 sum->kind = a->kind;
712 sum->reg = a->reg; /* not meaningful if a is pv_constant, but
713 harmless */
714 sum->k = a->k + b->k;
715 }
716
717 /* Anything else we don't know how to add. We don't have a
718 representation for, say, the sum of two registers, or a multiple
719 of a register's value (adding a register to itself). */
720 else
721 sum->kind = pv_unknown;
722}
723
724
725/* Add the constant K to V. */
726static void
727pv_add_constant (struct prologue_value *v, CORE_ADDR k)
728{
729 struct prologue_value pv_k;
730
731 /* Rather than thinking of all the cases we can and can't handle,
732 we'll just let pv_add take care of that for us. */
733 pv_set_to_constant (&pv_k, k);
734 pv_add (v, v, &pv_k);
735}
736
737
738/* Subtract B from A, and put the result in DIFF.
739
740 This isn't quite the same as negating B and adding it to A, since
741 we don't have a representation for the negation of anything but a
742 constant. For example, we can't negate { pv_register, R1, 10 },
743 but we do know that { pv_register, R1, 10 } minus { pv_register,
744 R1, 5 } is { pv_constant, <ignored>, 5 }.
745
746 This means, for example, that we can subtract two stack addresses;
747 they're both relative to the original SP. Since the frame pointer
748 is set based on the SP, its value will be the original SP plus some
749 constant (probably zero), so we can use its value just fine. */
750static void
751pv_subtract (struct prologue_value *diff,
752 struct prologue_value *a,
753 struct prologue_value *b)
754{
755 pv_constant_last (&a, &b);
756
757 /* We can subtract a constant from another constant, or from a
758 register. */
759 if (b->kind == pv_constant
760 && (a->kind == pv_register
761 || a->kind == pv_constant))
762 {
763 diff->kind = a->kind;
764 diff->reg = a->reg; /* not always meaningful, but harmless */
765 diff->k = a->k - b->k;
766 }
767
768 /* We can subtract a register from itself, yielding a constant. */
769 else if (a->kind == pv_register
770 && b->kind == pv_register
771 && a->reg == b->reg)
772 {
773 diff->kind = pv_constant;
774 diff->k = a->k - b->k;
775 }
776
777 /* We don't know how to subtract anything else. */
778 else
779 diff->kind = pv_unknown;
780}
781
782
783/* Set AND to the logical and of A and B. */
784static void
785pv_logical_and (struct prologue_value *and,
786 struct prologue_value *a,
787 struct prologue_value *b)
788{
789 pv_constant_last (&a, &b);
790
791 /* We can 'and' two constants. */
792 if (a->kind == pv_constant
793 && b->kind == pv_constant)
794 {
795 and->kind = pv_constant;
796 and->k = a->k & b->k;
797 }
798
799 /* We can 'and' anything with the constant zero. */
800 else if (b->kind == pv_constant
801 && b->k == 0)
802 {
803 and->kind = pv_constant;
804 and->k = 0;
805 }
806
807 /* We can 'and' anything with ~0. */
808 else if (b->kind == pv_constant
809 && b->k == ~ (CORE_ADDR) 0)
810 *and = *a;
811
812 /* We can 'and' a register with itself. */
813 else if (a->kind == pv_register
814 && b->kind == pv_register
815 && a->reg == b->reg
816 && a->k == b->k)
817 *and = *a;
818
819 /* Otherwise, we don't know. */
820 else
821 pv_set_to_unknown (and);
822}
823
824
825/* Return non-zero iff A and B are identical expressions.
826
827 This is not the same as asking if the two values are equal; the
828 result of such a comparison would have to be a pv_boolean, and
829 asking whether two 'unknown' values were equal would give you
830 pv_maybe. Same for comparing, say, { pv_register, R1, 0 } and {
831 pv_register, R2, 0}. Instead, this is asking whether the two
832 representations are the same. */
12bffad7 833static int
4bc8c588
JB
834pv_is_identical (struct prologue_value *a,
835 struct prologue_value *b)
12bffad7 836{
4bc8c588
JB
837 if (a->kind != b->kind)
838 return 0;
839
840 switch (a->kind)
841 {
842 case pv_unknown:
843 return 1;
844 case pv_constant:
845 return (a->k == b->k);
846 case pv_register:
847 return (a->reg == b->reg && a->k == b->k);
848 default:
849 gdb_assert (0);
850 }
12bffad7
JB
851}
852
5769d3cd 853
4bc8c588
JB
854/* Return non-zero if A is the original value of register number R
855 plus K, zero otherwise. */
856static int
857pv_is_register (struct prologue_value *a, int r, CORE_ADDR k)
858{
859 return (a->kind == pv_register
860 && a->reg == r
861 && a->k == k);
862}
5769d3cd 863
5769d3cd 864
4bc8c588
JB
865/* A prologue-value-esque boolean type, including "maybe", when we
866 can't figure out whether something is true or not. */
867enum pv_boolean {
868 pv_maybe,
869 pv_definite_yes,
870 pv_definite_no,
871};
872
873
874/* Decide whether a reference to SIZE bytes at ADDR refers exactly to
875 an element of an array. The array starts at ARRAY_ADDR, and has
876 ARRAY_LEN values of ELT_SIZE bytes each. If ADDR definitely does
877 refer to an array element, set *I to the index of the referenced
878 element in the array, and return pv_definite_yes. If it definitely
879 doesn't, return pv_definite_no. If we can't tell, return pv_maybe.
880
881 If the reference does touch the array, but doesn't fall exactly on
882 an element boundary, or doesn't refer to the whole element, return
883 pv_maybe. */
884static enum pv_boolean
885pv_is_array_ref (struct prologue_value *addr,
886 CORE_ADDR size,
887 struct prologue_value *array_addr,
888 CORE_ADDR array_len,
889 CORE_ADDR elt_size,
890 int *i)
891{
892 struct prologue_value offset;
5769d3cd 893
4bc8c588
JB
894 /* Note that, since ->k is a CORE_ADDR, and CORE_ADDR is unsigned,
895 if addr is *before* the start of the array, then this isn't going
896 to be negative... */
897 pv_subtract (&offset, addr, array_addr);
898
899 if (offset.kind == pv_constant)
900 {
901 /* This is a rather odd test. We want to know if the SIZE bytes
902 at ADDR don't overlap the array at all, so you'd expect it to
903 be an || expression: "if we're completely before || we're
904 completely after". But with unsigned arithmetic, things are
905 different: since it's a number circle, not a number line, the
906 right values for offset.k are actually one contiguous range. */
907 if (offset.k <= -size
908 && offset.k >= array_len * elt_size)
909 return pv_definite_no;
910 else if (offset.k % elt_size != 0
911 || size != elt_size)
912 return pv_maybe;
913 else
914 {
915 *i = offset.k / elt_size;
916 return pv_definite_yes;
917 }
918 }
919 else
920 return pv_maybe;
921}
922
923
924
925/* Decoding S/390 instructions. */
926
927/* Named opcode values for the S/390 instructions we recognize. Some
928 instructions have their opcode split across two fields; those are the
929 op1_* and op2_* enums. */
930enum
931 {
932 op1_aghi = 0xa7, op2_aghi = 0xb,
933 op1_ahi = 0xa7, op2_ahi = 0xa,
934 op_ar = 0x1a,
935 op_basr = 0x0d,
936 op1_bras = 0xa7, op2_bras = 0x5,
937 op_l = 0x58,
938 op_la = 0x41,
939 op1_larl = 0xc0, op2_larl = 0x0,
940 op_lgr = 0xb904,
941 op1_lghi = 0xa7, op2_lghi = 0x9,
942 op1_lhi = 0xa7, op2_lhi = 0x8,
943 op_lr = 0x18,
944 op_nr = 0x14,
945 op_ngr = 0xb980,
946 op_s = 0x5b,
947 op_st = 0x50,
948 op_std = 0x60,
949 op1_stg = 0xe3, op2_stg = 0x24,
950 op_stm = 0x90,
951 op1_stmg = 0xeb, op2_stmg = 0x24,
d0f54f9d
JB
952 op_lm = 0x98,
953 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588
JB
954 op_svc = 0x0a,
955 };
956
957
958/* The functions below are for recognizing and decoding S/390
959 instructions of various formats. Each of them checks whether INSN
960 is an instruction of the given format, with the specified opcodes.
961 If it is, it sets the remaining arguments to the values of the
962 instruction's fields, and returns a non-zero value; otherwise, it
963 returns zero.
964
965 These functions' arguments appear in the order they appear in the
966 instruction, not in the machine-language form. So, opcodes always
967 come first, even though they're sometimes scattered around the
968 instructions. And displacements appear before base and extension
969 registers, as they do in the assembly syntax, not at the end, as
970 they do in the machine language. */
a78f21af 971static int
4bc8c588
JB
972is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
973{
974 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
975 {
976 *r1 = (insn[1] >> 4) & 0xf;
977 /* i2 is a 16-bit signed quantity. */
978 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
979 return 1;
980 }
981 else
982 return 0;
983}
8ac0e65a 984
5769d3cd 985
4bc8c588
JB
986static int
987is_ril (bfd_byte *insn, int op1, int op2,
988 unsigned int *r1, int *i2)
989{
990 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
991 {
992 *r1 = (insn[1] >> 4) & 0xf;
993 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
994 no sign extension is necessary, but we don't want to assume
995 that. */
996 *i2 = (((insn[2] << 24)
997 | (insn[3] << 16)
998 | (insn[4] << 8)
999 | (insn[5])) ^ 0x80000000) - 0x80000000;
1000 return 1;
1001 }
1002 else
1003 return 0;
1004}
1005
1006
1007static int
1008is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1009{
1010 if (insn[0] == op)
1011 {
1012 *r1 = (insn[1] >> 4) & 0xf;
1013 *r2 = insn[1] & 0xf;
1014 return 1;
1015 }
1016 else
1017 return 0;
1018}
1019
1020
1021static int
1022is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
1023{
1024 if (((insn[0] << 8) | insn[1]) == op)
1025 {
1026 /* Yes, insn[3]. insn[2] is unused in RRE format. */
1027 *r1 = (insn[3] >> 4) & 0xf;
1028 *r2 = insn[3] & 0xf;
1029 return 1;
1030 }
1031 else
1032 return 0;
1033}
1034
1035
1036static int
1037is_rs (bfd_byte *insn, int op,
1038 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
1039{
1040 if (insn[0] == op)
1041 {
1042 *r1 = (insn[1] >> 4) & 0xf;
1043 *r3 = insn[1] & 0xf;
1044 *b2 = (insn[2] >> 4) & 0xf;
1045 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1046 return 1;
1047 }
1048 else
1049 return 0;
1050}
1051
1052
1053static int
1054is_rse (bfd_byte *insn, int op1, int op2,
1055 unsigned int *r1, unsigned int *r3, unsigned int *d2, unsigned int *b2)
1056{
1057 if (insn[0] == op1
1058 /* Yes, insn[5]. insn[4] is unused. */
1059 && insn[5] == op2)
1060 {
1061 *r1 = (insn[1] >> 4) & 0xf;
1062 *r3 = insn[1] & 0xf;
1063 *b2 = (insn[2] >> 4) & 0xf;
1064 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1065 return 1;
1066 }
1067 else
1068 return 0;
1069}
1070
1071
1072static int
1073is_rx (bfd_byte *insn, int op,
1074 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1075{
1076 if (insn[0] == op)
1077 {
1078 *r1 = (insn[1] >> 4) & 0xf;
1079 *x2 = insn[1] & 0xf;
1080 *b2 = (insn[2] >> 4) & 0xf;
1081 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1082 return 1;
1083 }
1084 else
1085 return 0;
1086}
1087
1088
1089static int
1090is_rxe (bfd_byte *insn, int op1, int op2,
1091 unsigned int *r1, unsigned int *d2, unsigned int *x2, unsigned int *b2)
1092{
1093 if (insn[0] == op1
1094 /* Yes, insn[5]. insn[4] is unused. */
1095 && insn[5] == op2)
1096 {
1097 *r1 = (insn[1] >> 4) & 0xf;
1098 *x2 = insn[1] & 0xf;
1099 *b2 = (insn[2] >> 4) & 0xf;
1100 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
1101 return 1;
1102 }
1103 else
1104 return 0;
1105}
1106
1107
1108/* Set ADDR to the effective address for an X-style instruction, like:
1109
1110 L R1, D2(X2, B2)
1111
1112 Here, X2 and B2 are registers, and D2 is an unsigned 12-bit
1113 constant; the effective address is the sum of all three. If either
1114 X2 or B2 are zero, then it doesn't contribute to the sum --- this
1115 means that r0 can't be used as either X2 or B2.
1116
1117 GPR is an array of general register values, indexed by GPR number,
1118 not GDB register number. */
1119static void
1120compute_x_addr (struct prologue_value *addr,
1121 struct prologue_value *gpr,
1122 unsigned int d2, unsigned int x2, unsigned int b2)
1123{
1124 /* We can't just add stuff directly in addr; it might alias some of
1125 the registers we need to read. */
1126 struct prologue_value result;
1127
1128 pv_set_to_constant (&result, d2);
1129 if (x2)
1130 pv_add (&result, &result, &gpr[x2]);
1131 if (b2)
1132 pv_add (&result, &result, &gpr[b2]);
1133
1134 *addr = result;
1135}
1136
1137
1138/* The number of GPR and FPR spill slots in an S/390 stack frame. We
1139 track general-purpose registers r2 -- r15, and floating-point
1140 registers f0, f2, f4, and f6. */
1141#define S390_NUM_SPILL_SLOTS (14 + 4)
d0f54f9d
JB
1142#define S390_NUM_GPRS 16
1143#define S390_NUM_FPRS 16
4bc8c588
JB
1144
1145
1146/* If the SIZE bytes at ADDR are a stack slot we're actually tracking,
1147 return pv_definite_yes and set *STACK to point to the slot. If
1148 we're sure that they are not any of our stack slots, then return
1149 pv_definite_no. Otherwise, return pv_maybe.
1150 - GPR is an array indexed by GPR number giving the current values
1151 of the general-purpose registers.
1152 - SPILL is an array tracking the spill area of the caller's frame;
1153 SPILL[i] is the i'th spill slot. The spill slots are designated
1154 for r2 -- r15, and then f0, f2, f4, and f6.
1155 - BACK_CHAIN is the value of the back chain slot; it's only valid
1156 when the current frame actually has some space for a back chain
1157 slot --- that is, when the current value of the stack pointer
1158 (according to GPR) is at least S390_STACK_FRAME_OVERHEAD bytes
1159 less than its original value. */
1160static enum pv_boolean
1161s390_on_stack (struct prologue_value *addr,
1162 CORE_ADDR size,
1163 struct prologue_value *gpr,
1164 struct prologue_value *spill,
1165 struct prologue_value *back_chain,
1166 struct prologue_value **stack)
1167{
1168 struct prologue_value gpr_spill_addr;
1169 struct prologue_value fpr_spill_addr;
1170 struct prologue_value back_chain_addr;
1171 int i;
1172 enum pv_boolean b;
1173
1174 /* Construct the addresses of the spill arrays and the back chain. */
1175 pv_set_to_register (&gpr_spill_addr, S390_SP_REGNUM, 2 * S390_GPR_SIZE);
1176 pv_set_to_register (&fpr_spill_addr, S390_SP_REGNUM, 16 * S390_GPR_SIZE);
d0f54f9d 1177 back_chain_addr = gpr[S390_SP_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1178
1179 /* We have to check for GPR and FPR references using two separate
1180 calls to pv_is_array_ref, since the GPR and FPR spill slots are
1181 different sizes. (SPILL is an array, but the thing it tracks
1182 isn't really an array.) */
1183
1184 /* Was it a reference to the GPR spill array? */
1185 b = pv_is_array_ref (addr, size, &gpr_spill_addr, 14, S390_GPR_SIZE, &i);
1186 if (b == pv_definite_yes)
1187 {
1188 *stack = &spill[i];
1189 return pv_definite_yes;
1190 }
1191 if (b == pv_maybe)
1192 return pv_maybe;
1193
1194 /* Was it a reference to the FPR spill array? */
1195 b = pv_is_array_ref (addr, size, &fpr_spill_addr, 4, S390_FPR_SIZE, &i);
1196 if (b == pv_definite_yes)
5769d3cd 1197 {
4bc8c588
JB
1198 *stack = &spill[14 + i];
1199 return pv_definite_yes;
5769d3cd 1200 }
4bc8c588
JB
1201 if (b == pv_maybe)
1202 return pv_maybe;
1203
1204 /* Was it a reference to the back chain?
1205 This isn't quite right. We ought to check whether we have
1206 actually allocated any new frame at all. */
1207 b = pv_is_array_ref (addr, size, &back_chain_addr, 1, S390_GPR_SIZE, &i);
1208 if (b == pv_definite_yes)
5769d3cd 1209 {
4bc8c588
JB
1210 *stack = back_chain;
1211 return pv_definite_yes;
1212 }
1213 if (b == pv_maybe)
1214 return pv_maybe;
1215
1216 /* All the above queries returned definite 'no's. */
1217 return pv_definite_no;
1218}
1219
1220
1221/* Do a SIZE-byte store of VALUE to ADDR. GPR, SPILL, and BACK_CHAIN,
1222 and the return value are as described for s390_on_stack, above.
1223 Note that, when this returns pv_maybe, we have to assume that all
1224 of our memory now contains unknown values. */
1225static enum pv_boolean
1226s390_store (struct prologue_value *addr,
1227 CORE_ADDR size,
1228 struct prologue_value *value,
1229 struct prologue_value *gpr,
1230 struct prologue_value *spill,
1231 struct prologue_value *back_chain)
1232{
1233 struct prologue_value *stack;
1234 enum pv_boolean on_stack
1235 = s390_on_stack (addr, size, gpr, spill, back_chain, &stack);
1236
1237 if (on_stack == pv_definite_yes)
1238 *stack = *value;
1239
1240 return on_stack;
1241}
1242
1243
1244/* The current frame looks like a signal delivery frame: the first
1245 instruction is an 'svc' opcode. If the next frame is a signal
1246 handler's frame, set FI's saved register map to point into the
1247 signal context structure. */
1248static void
1249s390_get_signal_frame_info (struct frame_info *fi)
1250{
1251 struct frame_info *next_frame = get_next_frame (fi);
1252
1253 if (next_frame
1254 && get_frame_extra_info (next_frame)
1255 && get_frame_extra_info (next_frame)->sigcontext)
1256 {
1257 /* We're definitely backtracing from a signal handler. */
1b1d3794 1258 CORE_ADDR *saved_regs = deprecated_get_frame_saved_regs (fi);
4bc8c588 1259 CORE_ADDR save_reg_addr = (get_frame_extra_info (next_frame)->sigcontext
d0f54f9d 1260 + DEPRECATED_REGISTER_BYTE (S390_R0_REGNUM));
4bc8c588
JB
1261 int reg;
1262
1263 for (reg = 0; reg < S390_NUM_GPRS; reg++)
7666f43c 1264 {
d0f54f9d 1265 saved_regs[S390_R0_REGNUM + reg] = save_reg_addr;
4bc8c588 1266 save_reg_addr += S390_GPR_SIZE;
7666f43c
JB
1267 }
1268
4bc8c588
JB
1269 save_reg_addr = (get_frame_extra_info (next_frame)->sigcontext
1270 + (GDB_TARGET_IS_ESAME ? S390X_SIGREGS_FP0_OFFSET :
1271 S390_SIGREGS_FP0_OFFSET));
1272 for (reg = 0; reg < S390_NUM_FPRS; reg++)
1273 {
d0f54f9d 1274 saved_regs[S390_F0_REGNUM + reg] = save_reg_addr;
4bc8c588
JB
1275 save_reg_addr += S390_FPR_SIZE;
1276 }
5769d3cd 1277 }
4bc8c588
JB
1278}
1279
1280
1281static int
1282s390_get_frame_info (CORE_ADDR start_pc,
1283 struct frame_extra_info *fextra_info,
1284 struct frame_info *fi,
1285 int init_extra_info)
1286{
1287 /* Our return value:
1288 zero if we were able to read all the instructions we wanted, or
1289 -1 if we got an error trying to read memory. */
1290 int result = 0;
1291
4bc8c588
JB
1292 /* The current PC for our abstract interpretation. */
1293 CORE_ADDR pc;
1294
1295 /* The address of the next instruction after that. */
1296 CORE_ADDR next_pc;
1297
1298 /* The general-purpose registers. */
1299 struct prologue_value gpr[S390_NUM_GPRS];
1300
1301 /* The floating-point registers. */
1302 struct prologue_value fpr[S390_NUM_FPRS];
1303
1304 /* The register spill stack slots in the caller's frame ---
1305 general-purpose registers r2 through r15, and floating-point
1306 registers. spill[i] is where gpr i+2 gets spilled;
1307 spill[(14, 15, 16, 17)] is where (f0, f2, f4, f6) get spilled. */
1308 struct prologue_value spill[S390_NUM_SPILL_SLOTS];
1309
1310 /* The value of the back chain slot. This is only valid if the stack
1311 pointer is known to be less than its original value --- that is,
1312 if we have indeed allocated space on the stack. */
1313 struct prologue_value back_chain;
1314
1315 /* The address of the instruction after the last one that changed
1316 the SP, FP, or back chain. */
1317 CORE_ADDR after_last_frame_setup_insn = start_pc;
1318
4bc8c588
JB
1319 /* Set up everything's initial value. */
1320 {
1321 int i;
1322
1323 for (i = 0; i < S390_NUM_GPRS; i++)
d0f54f9d 1324 pv_set_to_register (&gpr[i], S390_R0_REGNUM + i, 0);
4bc8c588
JB
1325
1326 for (i = 0; i < S390_NUM_FPRS; i++)
d0f54f9d 1327 pv_set_to_register (&fpr[i], S390_F0_REGNUM + i, 0);
4bc8c588
JB
1328
1329 for (i = 0; i < S390_NUM_SPILL_SLOTS; i++)
1330 pv_set_to_unknown (&spill[i]);
1331
1332 pv_set_to_unknown (&back_chain);
1333 }
1334
1335 /* Start interpreting instructions, until we hit something we don't
1336 know how to interpret. (Ideally, we should stop at the frame's
1337 real current PC, but at the moment, our callers don't give us
1338 that info.) */
1339 for (pc = start_pc; ; pc = next_pc)
5769d3cd 1340 {
4bc8c588 1341 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1342 int insn_len = s390_readinstruction (insn, pc);
4bc8c588
JB
1343
1344 /* Fields for various kinds of instructions. */
1345 unsigned int b2, r1, r2, d2, x2, r3;
1346 int i2;
1347
1348 /* The values of SP, FP, and back chain before this instruction,
1349 for detecting instructions that change them. */
1350 struct prologue_value pre_insn_sp, pre_insn_fp, pre_insn_back_chain;
1351
1352 /* If we got an error trying to read the instruction, report it. */
1353 if (insn_len < 0)
8ac0e65a 1354 {
4bc8c588
JB
1355 result = -1;
1356 break;
1357 }
1358
1359 next_pc = pc + insn_len;
1360
d0f54f9d
JB
1361 pre_insn_sp = gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1362 pre_insn_fp = gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1363 pre_insn_back_chain = back_chain;
1364
1365 /* A special case, first --- only recognized as the very first
1366 instruction of the function, for signal delivery frames:
1367 SVC i --- system call */
1368 if (pc == start_pc
1369 && is_rr (insn, op_svc, &r1, &r2))
1370 {
1371 if (fi)
1372 s390_get_signal_frame_info (fi);
1373 break;
8ac0e65a
JB
1374 }
1375
4bc8c588
JB
1376 /* AHI r1, i2 --- add halfword immediate */
1377 else if (is_ri (insn, op1_ahi, op2_ahi, &r1, &i2))
1378 pv_add_constant (&gpr[r1], i2);
1379
1380
1381 /* AGHI r1, i2 --- add halfword immediate (64-bit version) */
1382 else if (GDB_TARGET_IS_ESAME
1383 && is_ri (insn, op1_aghi, op2_aghi, &r1, &i2))
1384 pv_add_constant (&gpr[r1], i2);
1385
1386 /* AR r1, r2 -- add register */
1387 else if (is_rr (insn, op_ar, &r1, &r2))
1388 pv_add (&gpr[r1], &gpr[r1], &gpr[r2]);
1389
1390 /* BASR r1, 0 --- branch and save
1391 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
1392 else if (is_rr (insn, op_basr, &r1, &r2)
1393 && r2 == 0)
1394 pv_set_to_constant (&gpr[r1], next_pc);
1395
1396 /* BRAS r1, i2 --- branch relative and save */
1397 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
1398 {
1399 pv_set_to_constant (&gpr[r1], next_pc);
1400 next_pc = pc + i2 * 2;
1401
1402 /* We'd better not interpret any backward branches. We'll
1403 never terminate. */
1404 if (next_pc <= pc)
1405 break;
1406 }
1407
1408 /* L r1, d2(x2, b2) --- load */
1409 else if (is_rx (insn, op_l, &r1, &d2, &x2, &b2))
1410 {
1411 struct prologue_value addr;
1412 struct prologue_value *stack;
1413
1414 compute_x_addr (&addr, gpr, d2, x2, b2);
1415
1416 /* If it's a load from an in-line constant pool, then we can
1417 simulate that, under the assumption that the code isn't
1418 going to change between the time the processor actually
1419 executed it creating the current frame, and the time when
1420 we're analyzing the code to unwind past that frame. */
1421 if (addr.kind == pv_constant
1422 && start_pc <= addr.k
1423 && addr.k < next_pc)
1424 pv_set_to_constant (&gpr[r1],
1425 read_memory_integer (addr.k, 4));
1426
1427 /* If it's definitely a reference to something on the stack,
1428 we can do that. */
1429 else if (s390_on_stack (&addr, 4, gpr, spill, &back_chain, &stack)
1430 == pv_definite_yes)
1431 gpr[r1] = *stack;
1432
1433 /* Otherwise, we don't know the value. */
1434 else
1435 pv_set_to_unknown (&gpr[r1]);
1436 }
1437
1438 /* LA r1, d2(x2, b2) --- load address */
1439 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2))
1440 compute_x_addr (&gpr[r1], gpr, d2, x2, b2);
1441
1442 /* LARL r1, i2 --- load address relative long */
1443 else if (GDB_TARGET_IS_ESAME
1444 && is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1445 pv_set_to_constant (&gpr[r1], pc + i2 * 2);
1446
1447 /* LGR r1, r2 --- load from register */
1448 else if (GDB_TARGET_IS_ESAME
1449 && is_rre (insn, op_lgr, &r1, &r2))
1450 gpr[r1] = gpr[r2];
1451
1452 /* LHI r1, i2 --- load halfword immediate */
1453 else if (is_ri (insn, op1_lhi, op2_lhi, &r1, &i2))
1454 pv_set_to_constant (&gpr[r1], i2);
1455
1456 /* LGHI r1, i2 --- load halfword immediate --- 64-bit version */
1457 else if (is_ri (insn, op1_lghi, op2_lghi, &r1, &i2))
1458 pv_set_to_constant (&gpr[r1], i2);
1459
1460 /* LR r1, r2 --- load from register */
1461 else if (is_rr (insn, op_lr, &r1, &r2))
1462 gpr[r1] = gpr[r2];
1463
1464 /* NGR r1, r2 --- logical and --- 64-bit version */
1465 else if (GDB_TARGET_IS_ESAME
1466 && is_rre (insn, op_ngr, &r1, &r2))
1467 pv_logical_and (&gpr[r1], &gpr[r1], &gpr[r2]);
1468
1469 /* NR r1, r2 --- logical and */
1470 else if (is_rr (insn, op_nr, &r1, &r2))
1471 pv_logical_and (&gpr[r1], &gpr[r1], &gpr[r2]);
1472
1473 /* NGR r1, r2 --- logical and --- 64-bit version */
1474 else if (GDB_TARGET_IS_ESAME
1475 && is_rre (insn, op_ngr, &r1, &r2))
1476 pv_logical_and (&gpr[r1], &gpr[r1], &gpr[r2]);
1477
1478 /* NR r1, r2 --- logical and */
1479 else if (is_rr (insn, op_nr, &r1, &r2))
1480 pv_logical_and (&gpr[r1], &gpr[r1], &gpr[r2]);
1481
1482 /* S r1, d2(x2, b2) --- subtract from memory */
1483 else if (is_rx (insn, op_s, &r1, &d2, &x2, &b2))
1484 {
1485 struct prologue_value addr;
1486 struct prologue_value value;
1487 struct prologue_value *stack;
1488
1489 compute_x_addr (&addr, gpr, d2, x2, b2);
1490
1491 /* If it's a load from an in-line constant pool, then we can
1492 simulate that, under the assumption that the code isn't
1493 going to change between the time the processor actually
1494 executed it and the time when we're analyzing it. */
1495 if (addr.kind == pv_constant
1496 && start_pc <= addr.k
1497 && addr.k < pc)
1498 pv_set_to_constant (&value, read_memory_integer (addr.k, 4));
1499
1500 /* If it's definitely a reference to something on the stack,
1501 we could do that. */
1502 else if (s390_on_stack (&addr, 4, gpr, spill, &back_chain, &stack)
1503 == pv_definite_yes)
1504 value = *stack;
1505
1506 /* Otherwise, we don't know the value. */
1507 else
1508 pv_set_to_unknown (&value);
1509
1510 pv_subtract (&gpr[r1], &gpr[r1], &value);
1511 }
1512
1513 /* ST r1, d2(x2, b2) --- store */
1514 else if (is_rx (insn, op_st, &r1, &d2, &x2, &b2))
1515 {
1516 struct prologue_value addr;
1517
1518 compute_x_addr (&addr, gpr, d2, x2, b2);
1519
1520 /* The below really should be '4', not 'S390_GPR_SIZE'; this
1521 instruction always stores 32 bits, regardless of the full
1522 size of the GPR. */
1523 if (s390_store (&addr, 4, &gpr[r1], gpr, spill, &back_chain)
1524 == pv_maybe)
1525 /* If we can't be sure that it's *not* a store to
1526 something we're tracing, then we would have to mark all
1527 our memory as unknown --- after all, it *could* be a
1528 store to any of them --- so we might as well just stop
1529 interpreting. */
1530 break;
1531 }
1532
1533 /* STD r1, d2(x2,b2) --- store floating-point register */
1534 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
1535 {
1536 struct prologue_value addr;
1537
1538 compute_x_addr (&addr, gpr, d2, x2, b2);
1539
1540 if (s390_store (&addr, 8, &fpr[r1], gpr, spill, &back_chain)
1541 == pv_maybe)
1542 /* If we can't be sure that it's *not* a store to
1543 something we're tracing, then we would have to mark all
1544 our memory as unknown --- after all, it *could* be a
1545 store to any of them --- so we might as well just stop
1546 interpreting. */
1547 break;
1548 }
1549
1550 /* STG r1, d2(x2, b2) --- 64-bit store */
1551 else if (GDB_TARGET_IS_ESAME
1552 && is_rxe (insn, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1553 {
1554 struct prologue_value addr;
1555
1556 compute_x_addr (&addr, gpr, d2, x2, b2);
1557
1558 /* The below really should be '8', not 'S390_GPR_SIZE'; this
1559 instruction always stores 64 bits, regardless of the full
1560 size of the GPR. */
1561 if (s390_store (&addr, 8, &gpr[r1], gpr, spill, &back_chain)
1562 == pv_maybe)
1563 /* If we can't be sure that it's *not* a store to
1564 something we're tracing, then we would have to mark all
1565 our memory as unknown --- after all, it *could* be a
1566 store to any of them --- so we might as well just stop
1567 interpreting. */
1568 break;
1569 }
1570
1571 /* STM r1, r3, d2(b2) --- store multiple */
1572 else if (is_rs (insn, op_stm, &r1, &r3, &d2, &b2))
1573 {
1574 int regnum;
1575 int offset;
1576 struct prologue_value addr;
1577
1578 for (regnum = r1, offset = 0;
1579 regnum <= r3;
1580 regnum++, offset += 4)
1581 {
1582 compute_x_addr (&addr, gpr, d2 + offset, 0, b2);
1583
1584 if (s390_store (&addr, 4, &gpr[regnum], gpr, spill, &back_chain)
1585 == pv_maybe)
1586 /* If we can't be sure that it's *not* a store to
1587 something we're tracing, then we would have to mark all
1588 our memory as unknown --- after all, it *could* be a
1589 store to any of them --- so we might as well just stop
1590 interpreting. */
1591 break;
1592 }
1593
1594 /* If we left the loop early, we should stop interpreting
1595 altogether. */
1596 if (regnum <= r3)
1597 break;
1598 }
1599
1600 /* STMG r1, r3, d2(b2) --- store multiple, 64-bit */
1601 else if (GDB_TARGET_IS_ESAME
1602 && is_rse (insn, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
1603 {
1604 int regnum;
1605 int offset;
1606 struct prologue_value addr;
1607
1608 for (regnum = r1, offset = 0;
1609 regnum <= r3;
1610 regnum++, offset += 8)
1611 {
1612 compute_x_addr (&addr, gpr, d2 + offset, 0, b2);
1613
1614 if (s390_store (&addr, 8, &gpr[regnum], gpr, spill, &back_chain)
1615 == pv_maybe)
1616 /* If we can't be sure that it's *not* a store to
1617 something we're tracing, then we would have to mark all
1618 our memory as unknown --- after all, it *could* be a
1619 store to any of them --- so we might as well just stop
1620 interpreting. */
1621 break;
1622 }
1623
1624 /* If we left the loop early, we should stop interpreting
1625 altogether. */
1626 if (regnum <= r3)
1627 break;
1628 }
1629
1630 else
1631 /* An instruction we don't know how to simulate. The only
1632 safe thing to do would be to set every value we're tracking
1633 to 'unknown'. Instead, we'll be optimistic: we just stop
1634 interpreting, and assume that the machine state we've got
1635 now is good enough for unwinding the stack. */
1636 break;
1637
1638 /* Record the address after the last instruction that changed
1639 the FP, SP, or backlink. Ignore instructions that changed
1640 them back to their original values --- those are probably
1641 restore instructions. (The back chain is never restored,
1642 just popped.) */
1643 {
d0f54f9d
JB
1644 struct prologue_value *sp = &gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1645 struct prologue_value *fp = &gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1646
1647 if ((! pv_is_identical (&pre_insn_sp, sp)
1648 && ! pv_is_register (sp, S390_SP_REGNUM, 0))
1649 || (! pv_is_identical (&pre_insn_fp, fp)
1650 && ! pv_is_register (fp, S390_FRAME_REGNUM, 0))
1651 || ! pv_is_identical (&pre_insn_back_chain, &back_chain))
1652 after_last_frame_setup_insn = next_pc;
1653 }
5769d3cd 1654 }
4bc8c588
JB
1655
1656 /* Okay, now gpr[], fpr[], spill[], and back_chain reflect the state
1657 of the machine as of the first instruction we couldn't interpret
1658 (hopefully the first non-prologue instruction). */
1659 {
1660 /* The size of the frame, or (CORE_ADDR) -1 if we couldn't figure
1661 that out. */
1662 CORE_ADDR frame_size = -1;
1663
1664 /* The value the SP had upon entry to the function, or
1665 (CORE_ADDR) -1 if we can't figure that out. */
1666 CORE_ADDR original_sp = -1;
1667
1668 /* Are we using S390_FRAME_REGNUM as a frame pointer register? */
1669 int using_frame_pointer = 0;
1670
1671 /* If S390_FRAME_REGNUM is some constant offset from the SP, then
1672 that strongly suggests that we're going to use that as our
1673 frame pointer register, not the SP. */
5769d3cd 1674 {
d0f54f9d 1675 struct prologue_value *fp = &gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1676
1677 if (fp->kind == pv_register
1678 && fp->reg == S390_SP_REGNUM)
1679 using_frame_pointer = 1;
5769d3cd 1680 }
4bc8c588
JB
1681
1682 /* If we were given a frame_info structure, we may be able to use
1683 the frame's base address to figure out the actual value of the
1684 original SP. */
1685 if (fi && get_frame_base (fi))
1686 {
1687 int frame_base_regno;
1688 struct prologue_value *frame_base;
1689
1690 /* The meaning of the frame base depends on whether the
1691 function uses a frame pointer register other than the SP or
1692 not (see s390_read_fp):
1693 - If the function does use a frame pointer register other
1694 than the SP, then the frame base is that register's
1695 value.
1696 - If the function doesn't use a frame pointer, then the
1697 frame base is the SP itself.
1698 We're duplicating some of the logic of s390_fp_regnum here,
1699 but we don't want to call that, because it would just do
1700 exactly the same analysis we've already done above. */
1701 if (using_frame_pointer)
1702 frame_base_regno = S390_FRAME_REGNUM;
1703 else
1704 frame_base_regno = S390_SP_REGNUM;
1705
d0f54f9d 1706 frame_base = &gpr[frame_base_regno - S390_R0_REGNUM];
4bc8c588
JB
1707
1708 /* We know the frame base address; if the value of whatever
1709 register it came from is a constant offset from the
1710 original SP, then we can reconstruct the original SP just
1711 by subtracting off that constant. */
1712 if (frame_base->kind == pv_register
1713 && frame_base->reg == S390_SP_REGNUM)
1714 original_sp = get_frame_base (fi) - frame_base->k;
1715 }
1716
1717 /* If the analysis said that the current SP value is the original
1718 value less some constant, then that constant is the frame size. */
1719 {
d0f54f9d 1720 struct prologue_value *sp = &gpr[S390_SP_REGNUM - S390_R0_REGNUM];
4bc8c588
JB
1721
1722 if (sp->kind == pv_register
1723 && sp->reg == S390_SP_REGNUM)
1724 frame_size = -sp->k;
1725 }
1726
1727 /* If we knew other registers' current values, we could check if
1728 the analysis said any of those were related to the original SP
1729 value, too. But for now, we'll just punt. */
1730
1731 /* If the caller passed in an 'extra info' structure, fill in the
1732 parts we can. */
1733 if (fextra_info)
1734 {
1735 if (init_extra_info || ! fextra_info->initialised)
1736 {
1737 s390_memset_extra_info (fextra_info);
1738 fextra_info->function_start = start_pc;
1739 fextra_info->initialised = 1;
1740 }
1741
1742 if (frame_size != -1)
1743 {
a9dd42f1 1744 fextra_info->stack_bought_valid = 1;
4bc8c588
JB
1745 fextra_info->stack_bought = frame_size;
1746 }
1747
1748 /* Assume everything was okay, and indicate otherwise when we
1749 find something amiss. */
1750 fextra_info->good_prologue = 1;
1751
1752 if (using_frame_pointer)
1753 /* Actually, nobody cares about the exact PC, so any
1754 non-zero value will do here. */
1755 fextra_info->frame_pointer_saved_pc = 1;
1756
1757 /* If we weren't able to find the size of the frame, or find
1758 the original sp based on actual current register values,
1759 then we're not going to be able to unwind this frame.
1760
1761 (If we're just doing prologue analysis to set a breakpoint,
1762 then frame_size might be known, but original_sp unknown; if
1763 we're analyzing a real frame which uses alloca, then
1764 original_sp might be known (from the frame pointer
1765 register), but the frame size might be unknown.) */
1766 if (original_sp == -1 && frame_size == -1)
1767 fextra_info->good_prologue = 0;
1768
1769 if (fextra_info->good_prologue)
1770 fextra_info->skip_prologue_function_start
1771 = after_last_frame_setup_insn;
1772 else
1773 /* If the prologue was too complex for us to make sense of,
1774 then perhaps it's better to just not skip anything at
1775 all. */
1776 fextra_info->skip_prologue_function_start = start_pc;
1777 }
1778
1779 /* Indicate where registers were saved on the stack, if:
1780 - the caller seems to want to know,
1781 - the caller provided an actual SP, and
1782 - the analysis gave us enough information to actually figure it
1783 out. */
1784 if (fi
1b1d3794 1785 && deprecated_get_frame_saved_regs (fi)
4bc8c588
JB
1786 && original_sp != -1)
1787 {
1788 int slot_num;
1789 CORE_ADDR slot_addr;
1b1d3794 1790 CORE_ADDR *saved_regs = deprecated_get_frame_saved_regs (fi);
4bc8c588
JB
1791
1792 /* Scan the spill array; if a spill slot says it holds the
1793 original value of some register, then record that slot's
1794 address as the place that register was saved.
1795
1796 Just for kicks, note that, even if registers aren't saved
1797 in their officially-sanctioned slots, this will still work
1798 --- we know what really got put where. */
1799
1800 /* First, the slots for r2 -- r15. */
1801 for (slot_num = 0, slot_addr = original_sp + 2 * S390_GPR_SIZE;
1802 slot_num < 14;
1803 slot_num++, slot_addr += S390_GPR_SIZE)
1804 {
1805 struct prologue_value *slot = &spill[slot_num];
1806
1807 if (slot->kind == pv_register
1808 && slot->k == 0)
1809 saved_regs[slot->reg] = slot_addr;
1810 }
1811
1812 /* Then, the slots for f0, f2, f4, and f6. They're a
1813 different size. */
1814 for (slot_num = 14, slot_addr = original_sp + 16 * S390_GPR_SIZE;
1815 slot_num < S390_NUM_SPILL_SLOTS;
1816 slot_num++, slot_addr += S390_FPR_SIZE)
1817 {
1818 struct prologue_value *slot = &spill[slot_num];
1819
1820 if (slot->kind == pv_register
1821 && slot->k == 0)
1822 saved_regs[slot->reg] = slot_addr;
1823 }
1824
1825 /* The stack pointer's element of saved_regs[] is special. */
1826 saved_regs[S390_SP_REGNUM] = original_sp;
1827 }
1828 }
1829
1830 return result;
5769d3cd
AC
1831}
1832
d0f54f9d
JB
1833/* Return true if we are in the functin's epilogue, i.e. after the
1834 instruction that destroyed the function's stack frame. */
1835static int
1836s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1837{
1838 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1839
1840 /* In frameless functions, there's not frame to destroy and thus
1841 we don't care about the epilogue.
1842
1843 In functions with frame, the epilogue sequence is a pair of
1844 a LM-type instruction that restores (amongst others) the
1845 return register %r14 and the stack pointer %r15, followed
1846 by a branch 'br %r14' --or equivalent-- that effects the
1847 actual return.
1848
1849 In that situation, this function needs to return 'true' in
1850 exactly one case: when pc points to that branch instruction.
1851
1852 Thus we try to disassemble the one instructions immediately
1853 preceeding pc and check whether it is an LM-type instruction
1854 modifying the stack pointer.
1855
1856 Note that disassembling backwards is not reliable, so there
1857 is a slight chance of false positives here ... */
1858
1859 bfd_byte insn[6];
1860 unsigned int r1, r3, b2;
1861 int d2;
1862
1863 if (word_size == 4
1864 && !read_memory_nobpt (pc - 4, insn, 4)
1865 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1866 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1867 return 1;
1868
1869 if (word_size == 8
1870 && !read_memory_nobpt (pc - 6, insn, 6)
1871 && is_rse (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
1872 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1873 return 1;
1874
1875 return 0;
1876}
5769d3cd 1877
a78f21af 1878static int
5769d3cd
AC
1879s390_check_function_end (CORE_ADDR pc)
1880{
1881 bfd_byte instr[S390_MAX_INSTR_SIZE];
5769d3cd
AC
1882 int regidx, instrlen;
1883
a788de9b 1884 instrlen = s390_readinstruction (instr, pc);
5769d3cd
AC
1885 if (instrlen < 0)
1886 return -1;
1887 /* check for BR */
1888 if (instrlen != 2 || instr[0] != 07 || (instr[1] >> 4) != 0xf)
1889 return 0;
1890 regidx = instr[1] & 0xf;
1891 /* Check for LMG or LG */
1892 instrlen =
a788de9b 1893 s390_readinstruction (instr, pc - (GDB_TARGET_IS_ESAME ? 6 : 4));
5769d3cd
AC
1894 if (instrlen < 0)
1895 return -1;
1896 if (GDB_TARGET_IS_ESAME)
1897 {
1898
1899 if (instrlen != 6 || instr[0] != 0xeb || instr[5] != 0x4)
1900 return 0;
1901 }
1902 else if (instrlen != 4 || instr[0] != 0x98)
1903 {
1904 return 0;
1905 }
1906 if ((instr[2] >> 4) != 0xf)
1907 return 0;
1908 if (regidx == 14)
1909 return 1;
a788de9b 1910 instrlen = s390_readinstruction (instr, pc - (GDB_TARGET_IS_ESAME ? 12 : 8));
5769d3cd
AC
1911 if (instrlen < 0)
1912 return -1;
1913 if (GDB_TARGET_IS_ESAME)
1914 {
1915 /* Check for LG */
1916 if (instrlen != 6 || instr[0] != 0xe3 || instr[5] != 0x4)
1917 return 0;
1918 }
1919 else
1920 {
1921 /* Check for L */
1922 if (instrlen != 4 || instr[0] != 0x58)
1923 return 0;
1924 }
1925 if (instr[2] >> 4 != 0xf)
1926 return 0;
1927 if (instr[1] >> 4 != regidx)
1928 return 0;
1929 return 1;
1930}
1931
1932static CORE_ADDR
1933s390_sniff_pc_function_start (CORE_ADDR pc, struct frame_info *fi)
1934{
1935 CORE_ADDR function_start, test_function_start;
1936 int loop_cnt, err, function_end;
1937 struct frame_extra_info fextra_info;
1938 function_start = get_pc_function_start (pc);
1939
1940 if (function_start == 0)
1941 {
1942 test_function_start = pc;
1943 if (test_function_start & 1)
1944 return 0; /* This has to be bogus */
1945 loop_cnt = 0;
1946 do
1947 {
1948
1949 err =
1950 s390_get_frame_info (test_function_start, &fextra_info, fi, 1);
1951 loop_cnt++;
1952 test_function_start -= 2;
1953 function_end = s390_check_function_end (test_function_start);
1954 }
1955 while (!(function_end == 1 || err || loop_cnt >= 4096 ||
1956 (fextra_info.good_prologue)));
1957 if (fextra_info.good_prologue)
1958 function_start = fextra_info.function_start;
1959 else if (function_end == 1)
1960 function_start = test_function_start;
1961 }
1962 return function_start;
1963}
1964
1965
a78f21af 1966static int
5769d3cd
AC
1967s390_frameless_function_invocation (struct frame_info *fi)
1968{
1969 struct frame_extra_info fextra_info, *fextra_info_ptr;
1970 int frameless = 0;
1971
11c02a10 1972 if (get_next_frame (fi) == NULL) /* no may be frameless */
5769d3cd 1973 {
da50a4b7
AC
1974 if (get_frame_extra_info (fi))
1975 fextra_info_ptr = get_frame_extra_info (fi);
5769d3cd
AC
1976 else
1977 {
1978 fextra_info_ptr = &fextra_info;
50abf9e5 1979 s390_get_frame_info (s390_sniff_pc_function_start (get_frame_pc (fi), fi),
5769d3cd
AC
1980 fextra_info_ptr, fi, 1);
1981 }
a9dd42f1
JB
1982 frameless = (fextra_info_ptr->stack_bought_valid
1983 && fextra_info_ptr->stack_bought == 0);
5769d3cd
AC
1984 }
1985 return frameless;
1986
1987}
1988
1989
1990static int
1991s390_is_sigreturn (CORE_ADDR pc, struct frame_info *sighandler_fi,
1992 CORE_ADDR *sregs, CORE_ADDR *sigcaller_pc)
1993{
1994 bfd_byte instr[S390_MAX_INSTR_SIZE];
5769d3cd
AC
1995 int instrlen;
1996 CORE_ADDR scontext;
1997 int retval = 0;
1998 CORE_ADDR orig_sp;
1999 CORE_ADDR temp_sregs;
2000
2001 scontext = temp_sregs = 0;
2002
a788de9b 2003 instrlen = s390_readinstruction (instr, pc);
5769d3cd
AC
2004 if (sigcaller_pc)
2005 *sigcaller_pc = 0;
2006 if (((instrlen == S390_SYSCALL_SIZE) &&
2007 (instr[0] == S390_SYSCALL_OPCODE)) &&
2008 ((instr[1] == s390_NR_sigreturn) || (instr[1] == s390_NR_rt_sigreturn)))
2009 {
2010 if (sighandler_fi)
2011 {
2012 if (s390_frameless_function_invocation (sighandler_fi))
1e2330ba 2013 orig_sp = get_frame_base (sighandler_fi);
5769d3cd
AC
2014 else
2015 orig_sp = ADDR_BITS_REMOVE ((CORE_ADDR)
1e2330ba 2016 read_memory_integer (get_frame_base (sighandler_fi),
5769d3cd
AC
2017 S390_GPR_SIZE));
2018 if (orig_sp && sigcaller_pc)
2019 {
2020 scontext = orig_sp + S390_SIGNAL_FRAMESIZE;
2021 if (pc == scontext && instr[1] == s390_NR_rt_sigreturn)
2022 {
2023 /* We got a new style rt_signal */
2024 /* get address of read ucontext->uc_mcontext */
2025 temp_sregs = orig_sp + (GDB_TARGET_IS_ESAME ?
2026 S390X_UC_MCONTEXT_OFFSET :
2027 S390_UC_MCONTEXT_OFFSET);
2028 }
2029 else
2030 {
2031 /* read sigcontext->sregs */
2032 temp_sregs = ADDR_BITS_REMOVE ((CORE_ADDR)
2033 read_memory_integer (scontext
2034 +
2035 (GDB_TARGET_IS_ESAME
2036 ?
2037 S390X_SIGCONTEXT_SREGS_OFFSET
2038 :
2039 S390_SIGCONTEXT_SREGS_OFFSET),
2040 S390_GPR_SIZE));
2041
2042 }
2043 /* read sigregs->psw.addr */
2044 *sigcaller_pc =
2045 ADDR_BITS_REMOVE ((CORE_ADDR)
2046 read_memory_integer (temp_sregs +
d0f54f9d
JB
2047 DEPRECATED_REGISTER_BYTE (S390_PSWA_REGNUM),
2048 S390_GPR_SIZE));
5769d3cd
AC
2049 }
2050 }
2051 retval = 1;
2052 }
2053 if (sregs)
2054 *sregs = temp_sregs;
2055 return retval;
2056}
2057
2058/*
2059 We need to do something better here but this will keep us out of trouble
2060 for the moment.
2061 For some reason the blockframe.c calls us with fi->next->fromleaf
2062 so this seems of little use to us. */
a78f21af 2063static CORE_ADDR
5769d3cd
AC
2064s390_init_frame_pc_first (int next_fromleaf, struct frame_info *fi)
2065{
2066 CORE_ADDR sigcaller_pc;
97f46953 2067 CORE_ADDR pc = 0;
5769d3cd
AC
2068 if (next_fromleaf)
2069 {
97f46953 2070 pc = ADDR_BITS_REMOVE (read_register (S390_RETADDR_REGNUM));
5769d3cd
AC
2071 /* fix signal handlers */
2072 }
97f46953
AC
2073 else if (get_next_frame (fi) && get_frame_pc (get_next_frame (fi)))
2074 pc = s390_frame_saved_pc_nofix (get_next_frame (fi));
2075 if (pc && get_next_frame (fi) && get_frame_base (get_next_frame (fi))
2076 && s390_is_sigreturn (pc, get_next_frame (fi), NULL, &sigcaller_pc))
5769d3cd 2077 {
97f46953 2078 pc = sigcaller_pc;
5769d3cd 2079 }
97f46953 2080 return pc;
5769d3cd
AC
2081}
2082
a78f21af 2083static void
5769d3cd
AC
2084s390_init_extra_frame_info (int fromleaf, struct frame_info *fi)
2085{
a00a19e9 2086 frame_extra_info_zalloc (fi, sizeof (struct frame_extra_info));
50abf9e5
AC
2087 if (get_frame_pc (fi))
2088 s390_get_frame_info (s390_sniff_pc_function_start (get_frame_pc (fi), fi),
da50a4b7 2089 get_frame_extra_info (fi), fi, 1);
5769d3cd 2090 else
da50a4b7 2091 s390_memset_extra_info (get_frame_extra_info (fi));
5769d3cd
AC
2092}
2093
2094/* If saved registers of frame FI are not known yet, read and cache them.
2095 &FEXTRA_INFOP contains struct frame_extra_info; TDATAP can be NULL,
2096 in which case the framedata are read. */
2097
a78f21af 2098static void
5769d3cd
AC
2099s390_frame_init_saved_regs (struct frame_info *fi)
2100{
2101
2102 int quick;
2103
1b1d3794 2104 if (deprecated_get_frame_saved_regs (fi) == NULL)
5769d3cd
AC
2105 {
2106 /* zalloc memsets the saved regs */
2107 frame_saved_regs_zalloc (fi);
50abf9e5 2108 if (get_frame_pc (fi))
5769d3cd 2109 {
da50a4b7
AC
2110 quick = (get_frame_extra_info (fi)
2111 && get_frame_extra_info (fi)->initialised
2112 && get_frame_extra_info (fi)->good_prologue);
2113 s390_get_frame_info (quick
2114 ? get_frame_extra_info (fi)->function_start
2115 : s390_sniff_pc_function_start (get_frame_pc (fi), fi),
2116 get_frame_extra_info (fi), fi, !quick);
5769d3cd
AC
2117 }
2118 }
2119}
2120
2121
2122
5769d3cd
AC
2123static CORE_ADDR
2124s390_frame_saved_pc_nofix (struct frame_info *fi)
2125{
da50a4b7
AC
2126 if (get_frame_extra_info (fi) && get_frame_extra_info (fi)->saved_pc_valid)
2127 return get_frame_extra_info (fi)->saved_pc;
5c3cf190 2128
1e2330ba
AC
2129 if (deprecated_generic_find_dummy_frame (get_frame_pc (fi),
2130 get_frame_base (fi)))
2131 return deprecated_read_register_dummy (get_frame_pc (fi),
2132 get_frame_base (fi), S390_PC_REGNUM);
5c3cf190 2133
5769d3cd 2134 s390_frame_init_saved_regs (fi);
da50a4b7 2135 if (get_frame_extra_info (fi))
5769d3cd 2136 {
da50a4b7
AC
2137 get_frame_extra_info (fi)->saved_pc_valid = 1;
2138 if (get_frame_extra_info (fi)->good_prologue
1b1d3794 2139 && deprecated_get_frame_saved_regs (fi)[S390_RETADDR_REGNUM])
da50a4b7 2140 get_frame_extra_info (fi)->saved_pc
529765f4 2141 = ADDR_BITS_REMOVE (read_memory_integer
1b1d3794 2142 (deprecated_get_frame_saved_regs (fi)[S390_RETADDR_REGNUM],
529765f4
JB
2143 S390_GPR_SIZE));
2144 else
da50a4b7 2145 get_frame_extra_info (fi)->saved_pc
529765f4 2146 = ADDR_BITS_REMOVE (read_register (S390_RETADDR_REGNUM));
da50a4b7 2147 return get_frame_extra_info (fi)->saved_pc;
5769d3cd
AC
2148 }
2149 return 0;
2150}
2151
a78f21af 2152static CORE_ADDR
5769d3cd
AC
2153s390_frame_saved_pc (struct frame_info *fi)
2154{
2155 CORE_ADDR saved_pc = 0, sig_pc;
2156
da50a4b7
AC
2157 if (get_frame_extra_info (fi)
2158 && get_frame_extra_info (fi)->sig_fixed_saved_pc_valid)
2159 return get_frame_extra_info (fi)->sig_fixed_saved_pc;
5769d3cd
AC
2160 saved_pc = s390_frame_saved_pc_nofix (fi);
2161
da50a4b7 2162 if (get_frame_extra_info (fi))
5769d3cd 2163 {
da50a4b7 2164 get_frame_extra_info (fi)->sig_fixed_saved_pc_valid = 1;
5769d3cd
AC
2165 if (saved_pc)
2166 {
2167 if (s390_is_sigreturn (saved_pc, fi, NULL, &sig_pc))
2168 saved_pc = sig_pc;
2169 }
da50a4b7 2170 get_frame_extra_info (fi)->sig_fixed_saved_pc = saved_pc;
5769d3cd
AC
2171 }
2172 return saved_pc;
2173}
2174
2175
2176
2177
5a203e44
AC
2178/* We want backtraces out of signal handlers so we don't set
2179 (get_frame_type (thisframe) == SIGTRAMP_FRAME) to 1 */
5769d3cd 2180
a78f21af 2181static CORE_ADDR
5769d3cd
AC
2182s390_frame_chain (struct frame_info *thisframe)
2183{
2184 CORE_ADDR prev_fp = 0;
2185
1e2330ba
AC
2186 if (deprecated_generic_find_dummy_frame (get_frame_pc (thisframe),
2187 get_frame_base (thisframe)))
2188 return deprecated_read_register_dummy (get_frame_pc (thisframe),
2189 get_frame_base (thisframe),
135c175f 2190 S390_SP_REGNUM);
5769d3cd
AC
2191 else
2192 {
2193 int sigreturn = 0;
2194 CORE_ADDR sregs = 0;
2195 struct frame_extra_info prev_fextra_info;
2196
2197 memset (&prev_fextra_info, 0, sizeof (prev_fextra_info));
50abf9e5 2198 if (get_frame_pc (thisframe))
5769d3cd
AC
2199 {
2200 CORE_ADDR saved_pc, sig_pc;
2201
2202 saved_pc = s390_frame_saved_pc_nofix (thisframe);
2203 if (saved_pc)
2204 {
2205 if ((sigreturn =
2206 s390_is_sigreturn (saved_pc, thisframe, &sregs, &sig_pc)))
2207 saved_pc = sig_pc;
2208 s390_get_frame_info (s390_sniff_pc_function_start
2209 (saved_pc, NULL), &prev_fextra_info, NULL,
2210 1);
2211 }
2212 }
2213 if (sigreturn)
2214 {
2215 /* read sigregs,regs.gprs[11 or 15] */
2216 prev_fp = read_memory_integer (sregs +
d0f54f9d 2217 DEPRECATED_REGISTER_BYTE (S390_R0_REGNUM +
5769d3cd
AC
2218 (prev_fextra_info.
2219 frame_pointer_saved_pc
2220 ? 11 : 15)),
2221 S390_GPR_SIZE);
da50a4b7 2222 get_frame_extra_info (thisframe)->sigcontext = sregs;
5769d3cd
AC
2223 }
2224 else
2225 {
1b1d3794 2226 if (deprecated_get_frame_saved_regs (thisframe))
5769d3cd 2227 {
5769d3cd
AC
2228 int regno;
2229
31c4d430 2230 if (prev_fextra_info.frame_pointer_saved_pc
1b1d3794 2231 && deprecated_get_frame_saved_regs (thisframe)[S390_FRAME_REGNUM])
31c4d430
JB
2232 regno = S390_FRAME_REGNUM;
2233 else
2234 regno = S390_SP_REGNUM;
2235
1b1d3794 2236 if (deprecated_get_frame_saved_regs (thisframe)[regno])
31c4d430
JB
2237 {
2238 /* The SP's entry of `saved_regs' is special. */
2239 if (regno == S390_SP_REGNUM)
1b1d3794 2240 prev_fp = deprecated_get_frame_saved_regs (thisframe)[regno];
31c4d430
JB
2241 else
2242 prev_fp =
1b1d3794 2243 read_memory_integer (deprecated_get_frame_saved_regs (thisframe)[regno],
31c4d430
JB
2244 S390_GPR_SIZE);
2245 }
5769d3cd
AC
2246 }
2247 }
2248 }
2249 return ADDR_BITS_REMOVE (prev_fp);
2250}
2251
2252/*
2253 Whether struct frame_extra_info is actually needed I'll have to figure
2254 out as our frames are similar to rs6000 there is a possibility
2255 i386 dosen't need it. */
2256
5769d3cd 2257/* Not the most efficent code in the world */
a78f21af 2258static int
5ae5f592 2259s390_fp_regnum (void)
5769d3cd
AC
2260{
2261 int regno = S390_SP_REGNUM;
2262 struct frame_extra_info fextra_info;
2263
2264 CORE_ADDR pc = ADDR_BITS_REMOVE (read_register (S390_PC_REGNUM));
2265
2266 s390_get_frame_info (s390_sniff_pc_function_start (pc, NULL), &fextra_info,
2267 NULL, 1);
2268 if (fextra_info.frame_pointer_saved_pc)
2269 regno = S390_FRAME_REGNUM;
2270 return regno;
2271}
2272
a78f21af 2273static CORE_ADDR
5ae5f592 2274s390_read_fp (void)
5769d3cd
AC
2275{
2276 return read_register (s390_fp_regnum ());
2277}
2278
2279
4c8287ac
JB
2280static void
2281s390_pop_frame_regular (struct frame_info *frame)
5769d3cd 2282{
4c8287ac
JB
2283 int regnum;
2284
8bedc050 2285 write_register (S390_PC_REGNUM, DEPRECATED_FRAME_SAVED_PC (frame));
4c8287ac
JB
2286
2287 /* Restore any saved registers. */
1b1d3794 2288 if (deprecated_get_frame_saved_regs (frame))
1a889ea5
JB
2289 {
2290 for (regnum = 0; regnum < NUM_REGS; regnum++)
1b1d3794 2291 if (deprecated_get_frame_saved_regs (frame)[regnum] != 0)
1a889ea5
JB
2292 {
2293 ULONGEST value;
2294
1b1d3794 2295 value = read_memory_unsigned_integer (deprecated_get_frame_saved_regs (frame)[regnum],
12c266ea 2296 DEPRECATED_REGISTER_RAW_SIZE (regnum));
1a889ea5
JB
2297 write_register (regnum, value);
2298 }
2299
2300 /* Actually cut back the stack. Remember that the SP's element of
2301 saved_regs is the old SP itself, not the address at which it is
2302 saved. */
1b1d3794 2303 write_register (S390_SP_REGNUM, deprecated_get_frame_saved_regs (frame)[S390_SP_REGNUM]);
1a889ea5 2304 }
5769d3cd 2305
4c8287ac
JB
2306 /* Throw away any cached frame information. */
2307 flush_cached_frames ();
5769d3cd
AC
2308}
2309
4c8287ac
JB
2310
2311/* Destroy the innermost (Top-Of-Stack) stack frame, restoring the
2312 machine state that was in effect before the frame was created.
2313 Used in the contexts of the "return" command, and of
2314 target function calls from the debugger. */
a78f21af 2315static void
5ae5f592 2316s390_pop_frame (void)
4c8287ac
JB
2317{
2318 /* This function checks for and handles generic dummy frames, and
2319 calls back to our function for ordinary frames. */
2320 generic_pop_current_frame (s390_pop_frame_regular);
2321}
2322
2323
b0cf273e
JB
2324/* Dummy function calls. */
2325
78f8b424
JB
2326/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2327 "Integer-like" types are those that should be passed the way
2328 integers are: integers, enums, ranges, characters, and booleans. */
2329static int
2330is_integer_like (struct type *type)
2331{
2332 enum type_code code = TYPE_CODE (type);
2333
2334 return (code == TYPE_CODE_INT
2335 || code == TYPE_CODE_ENUM
2336 || code == TYPE_CODE_RANGE
2337 || code == TYPE_CODE_CHAR
2338 || code == TYPE_CODE_BOOL);
2339}
2340
78f8b424
JB
2341/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2342 "Pointer-like" types are those that should be passed the way
2343 pointers are: pointers and references. */
2344static int
2345is_pointer_like (struct type *type)
2346{
2347 enum type_code code = TYPE_CODE (type);
2348
2349 return (code == TYPE_CODE_PTR
2350 || code == TYPE_CODE_REF);
2351}
2352
2353
20a940cc
JB
2354/* Return non-zero if TYPE is a `float singleton' or `double
2355 singleton', zero otherwise.
2356
2357 A `T singleton' is a struct type with one member, whose type is
2358 either T or a `T singleton'. So, the following are all float
2359 singletons:
2360
2361 struct { float x };
2362 struct { struct { float x; } x; };
2363 struct { struct { struct { float x; } x; } x; };
2364
2365 ... and so on.
2366
b0cf273e
JB
2367 All such structures are passed as if they were floats or doubles,
2368 as the (revised) ABI says. */
20a940cc
JB
2369static int
2370is_float_singleton (struct type *type)
2371{
b0cf273e
JB
2372 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2373 {
2374 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2375 CHECK_TYPEDEF (singleton_type);
2376
2377 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
2378 || is_float_singleton (singleton_type));
2379 }
2380
2381 return 0;
20a940cc
JB
2382}
2383
2384
2385/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2386 "Struct-like" types are those that should be passed as structs are:
2387 structs and unions.
2388
2389 As an odd quirk, not mentioned in the ABI, GCC passes float and
2390 double singletons as if they were a plain float, double, etc. (The
2391 corresponding union types are handled normally.) So we exclude
2392 those types here. *shrug* */
2393static int
2394is_struct_like (struct type *type)
2395{
2396 enum type_code code = TYPE_CODE (type);
2397
2398 return (code == TYPE_CODE_UNION
2399 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
2400}
2401
2402
2403/* Return non-zero if TYPE is a float-like type, zero otherwise.
2404 "Float-like" types are those that should be passed as
2405 floating-point values are.
2406
2407 You'd think this would just be floats, doubles, long doubles, etc.
2408 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2409 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2410 corresponding union types are handled normally.) So we include
20a940cc
JB
2411 those types here. *shrug* */
2412static int
2413is_float_like (struct type *type)
2414{
2415 return (TYPE_CODE (type) == TYPE_CODE_FLT
2416 || is_float_singleton (type));
2417}
2418
2419
78f8b424 2420static int
b0cf273e 2421is_power_of_two (unsigned int n)
78f8b424 2422{
b0cf273e 2423 return ((n & (n - 1)) == 0);
78f8b424
JB
2424}
2425
b0cf273e
JB
2426/* Return non-zero if TYPE should be passed as a pointer to a copy,
2427 zero otherwise. */
4d819d0e 2428static int
b0cf273e 2429s390_function_arg_pass_by_reference (struct type *type)
4d819d0e
JB
2430{
2431 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2432 if (length > 8)
2433 return 1;
4d819d0e 2434
b0cf273e
JB
2435 /* FIXME: All complex and vector types are also returned by reference. */
2436 return is_struct_like (type) && !is_power_of_two (length);
4d819d0e
JB
2437}
2438
b0cf273e
JB
2439/* Return non-zero if TYPE should be passed in a float register
2440 if possible. */
78f8b424 2441static int
b0cf273e 2442s390_function_arg_float (struct type *type)
78f8b424 2443{
78f8b424 2444 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2445 if (length > 8)
2446 return 0;
78f8b424 2447
b0cf273e 2448 return is_float_like (type);
4d819d0e
JB
2449}
2450
b0cf273e
JB
2451/* Return non-zero if TYPE should be passed in an integer register
2452 (or a pair of integer registers) if possible. */
78f8b424 2453static int
b0cf273e 2454s390_function_arg_integer (struct type *type)
78f8b424 2455{
78f8b424 2456 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2457 if (length > 8)
2458 return 0;
78f8b424 2459
b0cf273e
JB
2460 return is_integer_like (type)
2461 || is_pointer_like (type)
2462 || (is_struct_like (type) && is_power_of_two (length));
78f8b424
JB
2463}
2464
78f8b424
JB
2465/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2466 word as required for the ABI. */
2467static LONGEST
2468extend_simple_arg (struct value *arg)
2469{
2470 struct type *type = VALUE_TYPE (arg);
2471
2472 /* Even structs get passed in the least significant bits of the
2473 register / memory word. It's not really right to extract them as
2474 an integer, but it does take care of the extension. */
2475 if (TYPE_UNSIGNED (type))
2476 return extract_unsigned_integer (VALUE_CONTENTS (arg),
2477 TYPE_LENGTH (type));
2478 else
2479 return extract_signed_integer (VALUE_CONTENTS (arg),
2480 TYPE_LENGTH (type));
2481}
2482
2483
78f8b424
JB
2484/* Return the alignment required by TYPE. */
2485static int
2486alignment_of (struct type *type)
2487{
2488 int alignment;
2489
2490 if (is_integer_like (type)
2491 || is_pointer_like (type)
2492 || TYPE_CODE (type) == TYPE_CODE_FLT)
2493 alignment = TYPE_LENGTH (type);
2494 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
2495 || TYPE_CODE (type) == TYPE_CODE_UNION)
2496 {
2497 int i;
2498
2499 alignment = 1;
2500 for (i = 0; i < TYPE_NFIELDS (type); i++)
2501 {
2502 int field_alignment = alignment_of (TYPE_FIELD_TYPE (type, i));
2503
2504 if (field_alignment > alignment)
2505 alignment = field_alignment;
2506 }
2507 }
2508 else
2509 alignment = 1;
2510
2511 /* Check that everything we ever return is a power of two. Lots of
2512 code doesn't want to deal with aligning things to arbitrary
2513 boundaries. */
2514 gdb_assert ((alignment & (alignment - 1)) == 0);
2515
2516 return alignment;
2517}
2518
2519
2520/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2521 place to be passed to a function, as specified by the "GNU/Linux
2522 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2523
2524 SP is the current stack pointer. We must put arguments, links,
2525 padding, etc. whereever they belong, and return the new stack
2526 pointer value.
2527
2528 If STRUCT_RETURN is non-zero, then the function we're calling is
2529 going to return a structure by value; STRUCT_ADDR is the address of
2530 a block we've allocated for it on the stack.
2531
2532 Our caller has taken care of any type promotions needed to satisfy
2533 prototypes or the old K&R argument-passing rules. */
a78f21af 2534static CORE_ADDR
b0cf273e
JB
2535s390_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr,
2536 struct regcache *regcache, CORE_ADDR bp_addr,
2537 int nargs, struct value **args, CORE_ADDR sp,
2538 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2539{
b0cf273e
JB
2540 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2541 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2542 ULONGEST orig_sp;
78f8b424 2543 int i;
5769d3cd 2544
78f8b424
JB
2545 /* If the i'th argument is passed as a reference to a copy, then
2546 copy_addr[i] is the address of the copy we made. */
2547 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2548
78f8b424 2549 /* Build the reference-to-copy area. */
78f8b424
JB
2550 for (i = 0; i < nargs; i++)
2551 {
2552 struct value *arg = args[i];
2553 struct type *type = VALUE_TYPE (arg);
2554 unsigned length = TYPE_LENGTH (type);
5769d3cd 2555
b0cf273e 2556 if (s390_function_arg_pass_by_reference (type))
01c464e9 2557 {
78f8b424 2558 sp -= length;
5b03f266 2559 sp = align_down (sp, alignment_of (type));
78f8b424
JB
2560 write_memory (sp, VALUE_CONTENTS (arg), length);
2561 copy_addr[i] = sp;
01c464e9 2562 }
5769d3cd 2563 }
5769d3cd 2564
78f8b424
JB
2565 /* Reserve space for the parameter area. As a conservative
2566 simplification, we assume that everything will be passed on the
b0cf273e
JB
2567 stack. Since every argument larger than 8 bytes will be
2568 passed by reference, we use this simple upper bound. */
2569 sp -= nargs * 8;
78f8b424 2570
78f8b424
JB
2571 /* After all that, make sure it's still aligned on an eight-byte
2572 boundary. */
5b03f266 2573 sp = align_down (sp, 8);
78f8b424
JB
2574
2575 /* Finally, place the actual parameters, working from SP towards
2576 higher addresses. The code above is supposed to reserve enough
2577 space for this. */
2578 {
2579 int fr = 0;
2580 int gr = 2;
2581 CORE_ADDR starg = sp;
2582
b0cf273e 2583 /* A struct is returned using general register 2. */
4d819d0e 2584 if (struct_return)
b0cf273e
JB
2585 {
2586 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2587 struct_addr);
2588 gr++;
2589 }
4d819d0e 2590
78f8b424
JB
2591 for (i = 0; i < nargs; i++)
2592 {
2593 struct value *arg = args[i];
2594 struct type *type = VALUE_TYPE (arg);
b0cf273e
JB
2595 unsigned length = TYPE_LENGTH (type);
2596
2597 if (s390_function_arg_pass_by_reference (type))
2598 {
2599 if (gr <= 6)
2600 {
2601 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
2602 copy_addr[i]);
2603 gr++;
2604 }
2605 else
2606 {
2607 write_memory_unsigned_integer (starg, word_size, copy_addr[i]);
2608 starg += word_size;
2609 }
2610 }
2611 else if (s390_function_arg_float (type))
2612 {
2613 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2614 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2615 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2616 {
2617 /* When we store a single-precision value in an FP register,
2618 it occupies the leftmost bits. */
2619 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
2620 0, length, VALUE_CONTENTS (arg));
2621 fr += 2;
2622 }
2623 else
2624 {
2625 /* When we store a single-precision value in a stack slot,
2626 it occupies the rightmost bits. */
2627 starg = align_up (starg + length, word_size);
2628 write_memory (starg - length, VALUE_CONTENTS (arg), length);
2629 }
2630 }
2631 else if (s390_function_arg_integer (type) && length <= word_size)
2632 {
2633 if (gr <= 6)
2634 {
2635 /* Integer arguments are always extended to word size. */
2636 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
2637 extend_simple_arg (arg));
2638 gr++;
2639 }
2640 else
2641 {
2642 /* Integer arguments are always extended to word size. */
2643 write_memory_signed_integer (starg, word_size,
2644 extend_simple_arg (arg));
2645 starg += word_size;
2646 }
2647 }
2648 else if (s390_function_arg_integer (type) && length == 2*word_size)
2649 {
2650 if (gr <= 5)
2651 {
2652 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
2653 VALUE_CONTENTS (arg));
2654 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
2655 VALUE_CONTENTS (arg) + word_size);
2656 gr += 2;
2657 }
2658 else
2659 {
2660 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2661 in it, then don't go back and use it again later. */
2662 gr = 7;
2663
2664 write_memory (starg, VALUE_CONTENTS (arg), length);
2665 starg += length;
2666 }
2667 }
2668 else
2669 internal_error (__FILE__, __LINE__, "unknown argument type");
78f8b424
JB
2670 }
2671 }
2672
2673 /* Allocate the standard frame areas: the register save area, the
2674 word reserved for the compiler (which seems kind of meaningless),
2675 and the back chain pointer. */
b0cf273e 2676 sp -= 16*word_size + 32;
78f8b424
JB
2677
2678 /* Write the back chain pointer into the first word of the stack
b0cf273e
JB
2679 frame. This is needed to unwind across a dummy frame. */
2680 regcache_cooked_read_unsigned (regcache, S390_SP_REGNUM, &orig_sp);
2681 write_memory_unsigned_integer (sp, word_size, orig_sp);
2682
2683 /* Store return address. */
2684 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
2685
2686 /* Store updated stack pointer. */
2687 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2688
b0cf273e 2689 /* Return stack pointer. */
78f8b424 2690 return sp;
5769d3cd
AC
2691}
2692
b0cf273e
JB
2693/* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
2694 dummy frame. The frame ID's base needs to match the TOS value
2695 returned by push_dummy_call, and the PC match the dummy frame's
2696 breakpoint. */
2697static struct frame_id
2698s390_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame)
2699{
2700 ULONGEST sp;
2701 frame_unwind_unsigned_register (next_frame, S390_SP_REGNUM, &sp);
2702 return frame_id_build (sp, frame_pc_unwind (next_frame));
2703}
c8f9d51c 2704
4074e13c
JB
2705static CORE_ADDR
2706s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2707{
2708 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2709 always be aligned on an eight-byte boundary. */
2710 return (addr & -8);
2711}
2712
2713
b0cf273e
JB
2714/* Function return value access. */
2715
2716static enum return_value_convention
2717s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2718{
b0cf273e
JB
2719 int length = TYPE_LENGTH (type);
2720 if (length > 8)
2721 return RETURN_VALUE_STRUCT_CONVENTION;
2722
2723 switch (TYPE_CODE (type))
2724 {
2725 case TYPE_CODE_STRUCT:
2726 case TYPE_CODE_UNION:
2727 case TYPE_CODE_ARRAY:
2728 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2729
b0cf273e
JB
2730 default:
2731 return RETURN_VALUE_REGISTER_CONVENTION;
2732 }
c8f9d51c
JB
2733}
2734
b0cf273e
JB
2735static enum return_value_convention
2736s390_return_value (struct gdbarch *gdbarch, struct type *type,
2737 struct regcache *regcache, void *out, const void *in)
5769d3cd 2738{
b0cf273e
JB
2739 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
2740 int length = TYPE_LENGTH (type);
2741 enum return_value_convention rvc =
2742 s390_return_value_convention (gdbarch, type);
2743 if (in)
2744 {
2745 switch (rvc)
2746 {
2747 case RETURN_VALUE_REGISTER_CONVENTION:
2748 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2749 {
2750 /* When we store a single-precision value in an FP register,
2751 it occupies the leftmost bits. */
2752 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
2753 0, length, in);
2754 }
2755 else if (length <= word_size)
2756 {
2757 /* Integer arguments are always extended to word size. */
2758 if (TYPE_UNSIGNED (type))
2759 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
2760 extract_unsigned_integer (in, length));
2761 else
2762 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
2763 extract_signed_integer (in, length));
2764 }
2765 else if (length == 2*word_size)
2766 {
2767 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
2768 regcache_cooked_write (regcache, S390_R3_REGNUM,
2769 (const char *)in + word_size);
2770 }
2771 else
2772 internal_error (__FILE__, __LINE__, "invalid return type");
2773 break;
2774
2775 case RETURN_VALUE_STRUCT_CONVENTION:
2776 error ("Cannot set function return value.");
2777 break;
2778 }
2779 }
2780 else if (out)
2781 {
2782 switch (rvc)
2783 {
2784 case RETURN_VALUE_REGISTER_CONVENTION:
2785 if (TYPE_CODE (type) == TYPE_CODE_FLT)
2786 {
2787 /* When we store a single-precision value in an FP register,
2788 it occupies the leftmost bits. */
2789 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
2790 0, length, out);
2791 }
2792 else if (length <= word_size)
2793 {
2794 /* Integer arguments occupy the rightmost bits. */
2795 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
2796 word_size - length, length, out);
2797 }
2798 else if (length == 2*word_size)
2799 {
2800 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
2801 regcache_cooked_read (regcache, S390_R3_REGNUM,
2802 (char *)out + word_size);
2803 }
2804 else
2805 internal_error (__FILE__, __LINE__, "invalid return type");
2806 break;
5769d3cd 2807
b0cf273e
JB
2808 case RETURN_VALUE_STRUCT_CONVENTION:
2809 error ("Function return value unknown.");
2810 break;
2811 }
2812 }
2813
2814 return rvc;
2815}
5769d3cd
AC
2816
2817
a78f21af 2818static const unsigned char *
5769d3cd
AC
2819s390_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
2820{
2821 static unsigned char breakpoint[] = { 0x0, 0x1 };
2822
2823 *lenptr = sizeof (breakpoint);
2824 return breakpoint;
2825}
2826
2827/* Advance PC across any function entry prologue instructions to reach some
2828 "real" code. */
a78f21af 2829static CORE_ADDR
5769d3cd
AC
2830s390_skip_prologue (CORE_ADDR pc)
2831{
2832 struct frame_extra_info fextra_info;
2833
2834 s390_get_frame_info (pc, &fextra_info, NULL, 1);
2835 return fextra_info.skip_prologue_function_start;
2836}
2837
5769d3cd
AC
2838/* Immediately after a function call, return the saved pc.
2839 Can't go through the frames for this because on some machines
2840 the new frame is not set up until the new function executes
2841 some instructions. */
a78f21af 2842static CORE_ADDR
5769d3cd
AC
2843s390_saved_pc_after_call (struct frame_info *frame)
2844{
2845 return ADDR_BITS_REMOVE (read_register (S390_RETADDR_REGNUM));
2846}
2847
2848static CORE_ADDR
2849s390_addr_bits_remove (CORE_ADDR addr)
2850{
2851 return (addr) & 0x7fffffff;
2852}
2853
ffc65945
KB
2854static int
2855s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2856{
2857 if (byte_size == 4)
2858 return TYPE_FLAG_ADDRESS_CLASS_1;
2859 else
2860 return 0;
2861}
2862
2863static const char *
2864s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2865{
2866 if (type_flags & TYPE_FLAG_ADDRESS_CLASS_1)
2867 return "mode32";
2868 else
2869 return NULL;
2870}
2871
a78f21af 2872static int
ffc65945
KB
2873s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, const char *name,
2874 int *type_flags_ptr)
2875{
2876 if (strcmp (name, "mode32") == 0)
2877 {
2878 *type_flags_ptr = TYPE_FLAG_ADDRESS_CLASS_1;
2879 return 1;
2880 }
2881 else
2882 return 0;
2883}
2884
a78f21af 2885static struct gdbarch *
5769d3cd
AC
2886s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2887{
5769d3cd
AC
2888 struct gdbarch *gdbarch;
2889 struct gdbarch_tdep *tdep;
5769d3cd
AC
2890
2891 /* First see if there is already a gdbarch that can satisfy the request. */
2892 arches = gdbarch_list_lookup_by_info (arches, &info);
2893 if (arches != NULL)
2894 return arches->gdbarch;
2895
2896 /* None found: is the request for a s390 architecture? */
2897 if (info.bfd_arch_info->arch != bfd_arch_s390)
2898 return NULL; /* No; then it's not for us. */
2899
2900 /* Yes: create a new gdbarch for the specified machine type. */
d0f54f9d
JB
2901 tdep = XCALLOC (1, struct gdbarch_tdep);
2902 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd 2903
a5afb99f
AC
2904 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2905 ready to unwind the PC first (see frame.c:get_prev_frame()). */
0968aa8c 2906 set_gdbarch_deprecated_init_frame_pc (gdbarch, deprecated_init_frame_pc_default);
a5afb99f 2907
5769d3cd 2908 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 2909 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 2910
618ce49f 2911 set_gdbarch_deprecated_frame_chain (gdbarch, s390_frame_chain);
f30ee0bc 2912 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch, s390_frame_init_saved_regs);
aaab4dba
AC
2913 /* Amount PC must be decremented by after a breakpoint. This is
2914 often the number of bytes returned by BREAKPOINT_FROM_PC but not
2915 always. */
5769d3cd 2916 set_gdbarch_decr_pc_after_break (gdbarch, 2);
749b82f6 2917 set_gdbarch_deprecated_pop_frame (gdbarch, s390_pop_frame);
5769d3cd
AC
2918 /* Stack grows downward. */
2919 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
2920 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
2921 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
e9582e71 2922 set_gdbarch_deprecated_init_extra_frame_info (gdbarch, s390_init_extra_frame_info);
2ca6c561 2923 set_gdbarch_deprecated_init_frame_pc_first (gdbarch, s390_init_frame_pc_first);
0ba6dca9 2924 set_gdbarch_deprecated_target_read_fp (gdbarch, s390_read_fp);
d0f54f9d 2925 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
5769d3cd
AC
2926 /* This function that tells us whether the function invocation represented
2927 by FI does not have a frame on the stack associated with it. If it
2928 does not, FRAMELESS is set to 1, else 0. */
19772a2c 2929 set_gdbarch_deprecated_frameless_function_invocation (gdbarch, s390_frameless_function_invocation);
5769d3cd 2930 /* Return saved PC from a frame */
8bedc050 2931 set_gdbarch_deprecated_frame_saved_pc (gdbarch, s390_frame_saved_pc);
618ce49f
AC
2932 /* DEPRECATED_FRAME_CHAIN takes a frame's nominal address and
2933 produces the frame's chain-pointer. */
2934 set_gdbarch_deprecated_frame_chain (gdbarch, s390_frame_chain);
6913c89a 2935 set_gdbarch_deprecated_saved_pc_after_call (gdbarch, s390_saved_pc_after_call);
5769d3cd
AC
2936 set_gdbarch_pc_regnum (gdbarch, S390_PC_REGNUM);
2937 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d
JB
2938 set_gdbarch_deprecated_fp_regnum (gdbarch, S390_SP_REGNUM);
2939 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
5769d3cd 2940 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
d0f54f9d 2941 set_gdbarch_num_pseudo_regs (gdbarch, S390_NUM_PSEUDO_REGS);
5769d3cd 2942 set_gdbarch_register_name (gdbarch, s390_register_name);
d0f54f9d
JB
2943 set_gdbarch_register_type (gdbarch, s390_register_type);
2944 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2945 set_gdbarch_dwarf_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2946 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
2947 set_gdbarch_convert_register_p (gdbarch, s390_convert_register_p);
2948 set_gdbarch_register_to_value (gdbarch, s390_register_to_value);
2949 set_gdbarch_value_to_register (gdbarch, s390_value_to_register);
2950 set_gdbarch_register_reggroup_p (gdbarch, s390_register_reggroup_p);
2951 set_gdbarch_regset_from_core_section (gdbarch,
2952 s390_regset_from_core_section);
5769d3cd 2953
b0cf273e
JB
2954 /* Inferior function calls. */
2955 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
2956 set_gdbarch_unwind_dummy_id (gdbarch, s390_unwind_dummy_id);
4074e13c 2957 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 2958 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd
AC
2959
2960 switch (info.bfd_arch_info->mach)
2961 {
b8b8b047 2962 case bfd_mach_s390_31:
b0cf273e
JB
2963 tdep->abi = ABI_LINUX_S390;
2964
d0f54f9d
JB
2965 tdep->gregset = &s390_gregset;
2966 tdep->sizeof_gregset = s390_sizeof_gregset;
2967 tdep->fpregset = &s390_fpregset;
2968 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2969
2970 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
d0f54f9d
JB
2971 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
2972 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
5769d3cd 2973 break;
b8b8b047 2974 case bfd_mach_s390_64:
b0cf273e
JB
2975 tdep->abi = ABI_LINUX_ZSERIES;
2976
d0f54f9d
JB
2977 tdep->gregset = &s390x_gregset;
2978 tdep->sizeof_gregset = s390x_sizeof_gregset;
2979 tdep->fpregset = &s390_fpregset;
2980 tdep->sizeof_fpregset = s390_sizeof_fpregset;
5769d3cd
AC
2981
2982 set_gdbarch_long_bit (gdbarch, 64);
2983 set_gdbarch_long_long_bit (gdbarch, 64);
2984 set_gdbarch_ptr_bit (gdbarch, 64);
d0f54f9d
JB
2985 set_gdbarch_pseudo_register_read (gdbarch, s390x_pseudo_register_read);
2986 set_gdbarch_pseudo_register_write (gdbarch, s390x_pseudo_register_write);
ffc65945
KB
2987 set_gdbarch_address_class_type_flags (gdbarch,
2988 s390_address_class_type_flags);
2989 set_gdbarch_address_class_type_flags_to_name (gdbarch,
2990 s390_address_class_type_flags_to_name);
2991 set_gdbarch_address_class_name_to_type_flags (gdbarch,
2992 s390_address_class_name_to_type_flags);
5769d3cd
AC
2993 break;
2994 }
2995
36482093
AC
2996 set_gdbarch_print_insn (gdbarch, print_insn_s390);
2997
5769d3cd
AC
2998 return gdbarch;
2999}
3000
3001
3002
a78f21af
AC
3003extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3004
5769d3cd 3005void
5ae5f592 3006_initialize_s390_tdep (void)
5769d3cd
AC
3007{
3008
3009 /* Hook us into the gdbarch mechanism. */
3010 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
5769d3cd 3011}
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