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c906108c | 1 | /* Functions specific to running gdb native on a SPARC running SunOS4. |
b6ba6518 KB |
2 | Copyright 1989, 1992, 1993, 1994, 1996, 1997, 1998, 1999, 2000, 2001 |
3 | Free Software Foundation, Inc. | |
c906108c | 4 | |
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
c906108c | 16 | |
c5aa993b JM |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | #include "defs.h" | |
23 | #include "inferior.h" | |
24 | #include "target.h" | |
25 | #include "gdbcore.h" | |
4e052eda | 26 | #include "regcache.h" |
c906108c SS |
27 | |
28 | #include <signal.h> | |
29 | #include <sys/ptrace.h> | |
30 | #include <sys/wait.h> | |
31 | #ifdef __linux__ | |
32 | #include <asm/reg.h> | |
33 | #else | |
34 | #include <machine/reg.h> | |
35 | #endif | |
36 | #include <sys/user.h> | |
37 | ||
38 | /* We don't store all registers immediately when requested, since they | |
39 | get sent over in large chunks anyway. Instead, we accumulate most | |
40 | of the changes and send them over once. "deferred_stores" keeps | |
41 | track of which sets of registers we have locally-changed copies of, | |
42 | so we only need send the groups that have changed. */ | |
43 | ||
44 | #define INT_REGS 1 | |
45 | #define STACK_REGS 2 | |
46 | #define FP_REGS 4 | |
47 | ||
c906108c SS |
48 | /* Fetch one or more registers from the inferior. REGNO == -1 to get |
49 | them all. We actually fetch more than requested, when convenient, | |
50 | marking them as valid so we won't fetch them again. */ | |
51 | ||
52 | void | |
fba45db2 | 53 | fetch_inferior_registers (int regno) |
c906108c SS |
54 | { |
55 | struct regs inferior_registers; | |
56 | struct fp_status inferior_fp_registers; | |
57 | int i; | |
58 | ||
59 | /* We should never be called with deferred stores, because a prerequisite | |
60 | for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ | |
c5aa993b | 61 | if (deferred_stores) |
e1e9e218 | 62 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
c906108c SS |
63 | |
64 | DO_DEFERRED_STORES; | |
65 | ||
66 | /* Global and Out regs are fetched directly, as well as the control | |
67 | registers. If we're getting one of the in or local regs, | |
68 | and the stack pointer has not yet been fetched, | |
69 | we have to do that first, since they're found in memory relative | |
70 | to the stack pointer. */ | |
c5aa993b | 71 | if (regno < O7_REGNUM /* including -1 */ |
c906108c SS |
72 | || regno >= Y_REGNUM |
73 | || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) | |
74 | { | |
39f77062 | 75 | if (0 != ptrace (PTRACE_GETREGS, PIDGET (inferior_ptid), |
c5aa993b JM |
76 | (PTRACE_ARG3_TYPE) & inferior_registers, 0)) |
77 | perror ("ptrace_getregs"); | |
78 | ||
c906108c SS |
79 | registers[REGISTER_BYTE (0)] = 0; |
80 | memcpy (®isters[REGISTER_BYTE (1)], &inferior_registers.r_g1, | |
81 | 15 * REGISTER_RAW_SIZE (G0_REGNUM)); | |
c5aa993b JM |
82 | *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; |
83 | *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; | |
84 | *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; | |
85 | *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; | |
c906108c SS |
86 | |
87 | for (i = G0_REGNUM; i <= O7_REGNUM; i++) | |
88 | register_valid[i] = 1; | |
89 | register_valid[Y_REGNUM] = 1; | |
90 | register_valid[PS_REGNUM] = 1; | |
91 | register_valid[PC_REGNUM] = 1; | |
92 | register_valid[NPC_REGNUM] = 1; | |
93 | /* If we don't set these valid, read_register_bytes() rereads | |
c5aa993b | 94 | all the regs every time it is called! FIXME. */ |
c906108c SS |
95 | register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ |
96 | register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ | |
97 | register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
98 | } | |
99 | ||
100 | /* Floating point registers */ | |
101 | if (regno == -1 || | |
102 | regno == FPS_REGNUM || | |
103 | (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) | |
104 | { | |
39f77062 | 105 | if (0 != ptrace (PTRACE_GETFPREGS, PIDGET (inferior_ptid), |
c5aa993b | 106 | (PTRACE_ARG3_TYPE) & inferior_fp_registers, |
c906108c | 107 | 0)) |
c5aa993b | 108 | perror ("ptrace_getfpregs"); |
c906108c SS |
109 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], &inferior_fp_registers, |
110 | sizeof inferior_fp_registers.fpu_fr); | |
111 | memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], | |
c5aa993b JM |
112 | &inferior_fp_registers.Fpu_fsr, |
113 | sizeof (FPU_FSR_TYPE)); | |
114 | for (i = FP0_REGNUM; i <= FP0_REGNUM + 31; i++) | |
c906108c SS |
115 | register_valid[i] = 1; |
116 | register_valid[FPS_REGNUM] = 1; | |
117 | } | |
118 | ||
119 | /* These regs are saved on the stack by the kernel. Only read them | |
120 | all (16 ptrace calls!) if we really need them. */ | |
121 | if (regno == -1) | |
122 | { | |
c5aa993b JM |
123 | target_read_memory (*(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)], |
124 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
125 | 16 * REGISTER_RAW_SIZE (L0_REGNUM)); | |
c906108c SS |
126 | for (i = L0_REGNUM; i <= I7_REGNUM; i++) |
127 | register_valid[i] = 1; | |
128 | } | |
129 | else if (regno >= L0_REGNUM && regno <= I7_REGNUM) | |
130 | { | |
c5aa993b | 131 | CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)]; |
c906108c SS |
132 | i = REGISTER_BYTE (regno); |
133 | if (register_valid[regno]) | |
c5aa993b | 134 | printf_unfiltered ("register %d valid and read\n", regno); |
c906108c SS |
135 | target_read_memory (sp + i - REGISTER_BYTE (L0_REGNUM), |
136 | ®isters[i], REGISTER_RAW_SIZE (regno)); | |
137 | register_valid[regno] = 1; | |
138 | } | |
139 | } | |
140 | ||
141 | /* Store our register values back into the inferior. | |
142 | If REGNO is -1, do this for all registers. | |
143 | Otherwise, REGNO specifies which register (so we can save time). */ | |
144 | ||
145 | void | |
fba45db2 | 146 | store_inferior_registers (int regno) |
c906108c SS |
147 | { |
148 | struct regs inferior_registers; | |
149 | struct fp_status inferior_fp_registers; | |
150 | int wanna_store = INT_REGS + STACK_REGS + FP_REGS; | |
151 | ||
152 | /* First decide which pieces of machine-state we need to modify. | |
153 | Default for regno == -1 case is all pieces. */ | |
154 | if (regno >= 0) | |
155 | if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) | |
156 | { | |
157 | wanna_store = FP_REGS; | |
158 | } | |
c5aa993b | 159 | else |
c906108c SS |
160 | { |
161 | if (regno == SP_REGNUM) | |
162 | wanna_store = INT_REGS + STACK_REGS; | |
163 | else if (regno < L0_REGNUM || regno > I7_REGNUM) | |
164 | wanna_store = INT_REGS; | |
165 | else if (regno == FPS_REGNUM) | |
166 | wanna_store = FP_REGS; | |
167 | else | |
168 | wanna_store = STACK_REGS; | |
169 | } | |
170 | ||
171 | /* See if we're forcing the stores to happen now, or deferring. */ | |
172 | if (regno == -2) | |
173 | { | |
174 | wanna_store = deferred_stores; | |
175 | deferred_stores = 0; | |
176 | } | |
177 | else | |
178 | { | |
179 | if (wanna_store == STACK_REGS) | |
180 | { | |
181 | /* Fall through and just store one stack reg. If we deferred | |
182 | it, we'd have to store them all, or remember more info. */ | |
183 | } | |
184 | else | |
185 | { | |
186 | deferred_stores |= wanna_store; | |
187 | return; | |
188 | } | |
189 | } | |
190 | ||
191 | if (wanna_store & STACK_REGS) | |
192 | { | |
c5aa993b | 193 | CORE_ADDR sp = *(CORE_ADDR *) & registers[REGISTER_BYTE (SP_REGNUM)]; |
c906108c SS |
194 | |
195 | if (regno < 0 || regno == SP_REGNUM) | |
196 | { | |
c5aa993b | 197 | if (!register_valid[L0_REGNUM + 5]) |
e1e9e218 | 198 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
c5aa993b | 199 | target_write_memory (sp, |
c906108c | 200 | ®isters[REGISTER_BYTE (L0_REGNUM)], |
c5aa993b | 201 | 16 * REGISTER_RAW_SIZE (L0_REGNUM)); |
c906108c SS |
202 | } |
203 | else | |
204 | { | |
c5aa993b | 205 | if (!register_valid[regno]) |
e1e9e218 | 206 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
c906108c SS |
207 | target_write_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), |
208 | ®isters[REGISTER_BYTE (regno)], | |
209 | REGISTER_RAW_SIZE (regno)); | |
210 | } | |
c5aa993b | 211 | |
c906108c SS |
212 | } |
213 | ||
214 | if (wanna_store & INT_REGS) | |
215 | { | |
c5aa993b | 216 | if (!register_valid[G1_REGNUM]) |
e1e9e218 | 217 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
c906108c SS |
218 | |
219 | memcpy (&inferior_registers.r_g1, ®isters[REGISTER_BYTE (G1_REGNUM)], | |
220 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
221 | ||
222 | inferior_registers.r_ps = | |
c5aa993b | 223 | *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)]; |
c906108c | 224 | inferior_registers.r_pc = |
c5aa993b | 225 | *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)]; |
c906108c | 226 | inferior_registers.r_npc = |
c5aa993b | 227 | *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)]; |
c906108c | 228 | inferior_registers.r_y = |
c5aa993b | 229 | *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)]; |
c906108c | 230 | |
39f77062 | 231 | if (0 != ptrace (PTRACE_SETREGS, PIDGET (inferior_ptid), |
c5aa993b JM |
232 | (PTRACE_ARG3_TYPE) & inferior_registers, 0)) |
233 | perror ("ptrace_setregs"); | |
c906108c SS |
234 | } |
235 | ||
236 | if (wanna_store & FP_REGS) | |
237 | { | |
c5aa993b | 238 | if (!register_valid[FP0_REGNUM + 9]) |
e1e9e218 | 239 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); |
c906108c SS |
240 | memcpy (&inferior_fp_registers, ®isters[REGISTER_BYTE (FP0_REGNUM)], |
241 | sizeof inferior_fp_registers.fpu_fr); | |
c5aa993b | 242 | memcpy (&inferior_fp_registers.Fpu_fsr, |
c906108c SS |
243 | ®isters[REGISTER_BYTE (FPS_REGNUM)], sizeof (FPU_FSR_TYPE)); |
244 | if (0 != | |
39f77062 | 245 | ptrace (PTRACE_SETFPREGS, PIDGET (inferior_ptid), |
c5aa993b JM |
246 | (PTRACE_ARG3_TYPE) & inferior_fp_registers, 0)) |
247 | perror ("ptrace_setfpregs"); | |
c906108c SS |
248 | } |
249 | } | |
250 | ||
c67b4c45 KB |
251 | /* Provide registers to GDB from a core file. |
252 | ||
253 | CORE_REG_SECT points to an array of bytes, which are the contents | |
254 | of a `note' from a core file which BFD thinks might contain | |
255 | register contents. CORE_REG_SIZE is its size. | |
256 | ||
257 | WHICH says which register set corelow suspects this is: | |
258 | 0 --- the general-purpose register set | |
259 | 2 --- the floating-point register set | |
260 | ||
261 | IGNORE is unused. */ | |
c906108c SS |
262 | |
263 | static void | |
c67b4c45 KB |
264 | fetch_core_registers (char *core_reg_sect, unsigned core_reg_size, |
265 | int which, CORE_ADDR ignore) | |
c906108c SS |
266 | { |
267 | ||
c5aa993b JM |
268 | if (which == 0) |
269 | { | |
c906108c | 270 | |
c5aa993b | 271 | /* Integer registers */ |
c906108c SS |
272 | |
273 | #define gregs ((struct regs *)core_reg_sect) | |
c5aa993b JM |
274 | /* G0 *always* holds 0. */ |
275 | *(int *) ®isters[REGISTER_BYTE (0)] = 0; | |
c906108c | 276 | |
c5aa993b JM |
277 | /* The globals and output registers. */ |
278 | memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], &gregs->r_g1, | |
279 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
280 | *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; | |
281 | *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; | |
282 | *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; | |
283 | *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; | |
284 | ||
285 | /* My best guess at where to get the locals and input | |
286 | registers is exactly where they usually are, right above | |
287 | the stack pointer. If the core dump was caused by a bus error | |
288 | from blowing away the stack pointer (as is possible) then this | |
289 | won't work, but it's worth the try. */ | |
290 | { | |
291 | int sp; | |
292 | ||
293 | sp = *(int *) ®isters[REGISTER_BYTE (SP_REGNUM)]; | |
294 | if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], | |
295 | 16 * REGISTER_RAW_SIZE (L0_REGNUM))) | |
296 | { | |
297 | /* fprintf_unfiltered so user can still use gdb */ | |
298 | fprintf_unfiltered (gdb_stderr, | |
299 | "Couldn't read input and local registers from core file\n"); | |
300 | } | |
301 | } | |
c906108c | 302 | } |
c5aa993b JM |
303 | else if (which == 2) |
304 | { | |
c906108c | 305 | |
c5aa993b | 306 | /* Floating point registers */ |
c906108c SS |
307 | |
308 | #define fpuregs ((struct fpu *) core_reg_sect) | |
c5aa993b JM |
309 | if (core_reg_size >= sizeof (struct fpu)) |
310 | { | |
311 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], fpuregs->fpu_regs, | |
312 | sizeof (fpuregs->fpu_regs)); | |
313 | memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], &fpuregs->fpu_fsr, | |
314 | sizeof (FPU_FSR_TYPE)); | |
315 | } | |
316 | else | |
317 | fprintf_unfiltered (gdb_stderr, "Couldn't read float regs from core file\n"); | |
318 | } | |
c906108c SS |
319 | } |
320 | ||
321 | int | |
fba45db2 | 322 | kernel_u_size (void) |
c906108c SS |
323 | { |
324 | return (sizeof (struct user)); | |
325 | } | |
c906108c | 326 | \f |
c5aa993b | 327 | |
c906108c SS |
328 | /* Register that we are able to handle sparc core file formats. |
329 | FIXME: is this really bfd_target_unknown_flavour? */ | |
330 | ||
331 | static struct core_fns sparc_core_fns = | |
332 | { | |
2acceee2 JM |
333 | bfd_target_unknown_flavour, /* core_flavour */ |
334 | default_check_format, /* check_format */ | |
335 | default_core_sniffer, /* core_sniffer */ | |
336 | fetch_core_registers, /* core_read_registers */ | |
337 | NULL /* next */ | |
c906108c SS |
338 | }; |
339 | ||
340 | void | |
fba45db2 | 341 | _initialize_core_sparc (void) |
c906108c SS |
342 | { |
343 | add_core_fns (&sparc_core_fns); | |
344 | } |