Commit | Line | Data |
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f9e3b3cc | 1 | /* Target-dependent code for the SPARC for GDB, the GNU debugger. |
012be3ce | 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996 |
94d4b713 | 3 | Free Software Foundation, Inc. |
bd5635a1 RP |
4 | |
5 | This file is part of GDB. | |
6 | ||
5259796b | 7 | This program is free software; you can redistribute it and/or modify |
bd5635a1 | 8 | it under the terms of the GNU General Public License as published by |
5259796b JG |
9 | the Free Software Foundation; either version 2 of the License, or |
10 | (at your option) any later version. | |
bd5635a1 | 11 | |
5259796b | 12 | This program is distributed in the hope that it will be useful, |
bd5635a1 RP |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
5259796b | 18 | along with this program; if not, write to the Free Software |
673e1bab | 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
bd5635a1 | 20 | |
8b0f5a9d DE |
21 | /* ??? Support for calling functions from gdb in sparc64 is unfinished. */ |
22 | ||
bd5635a1 | 23 | #include "defs.h" |
bd5635a1 RP |
24 | #include "frame.h" |
25 | #include "inferior.h" | |
26 | #include "obstack.h" | |
bd5635a1 | 27 | #include "target.h" |
48792545 | 28 | #include "value.h" |
4365c36c | 29 | |
8f86a4e4 JG |
30 | #ifdef USE_PROC_FS |
31 | #include <sys/procfs.h> | |
8f86a4e4 | 32 | #endif |
bd5635a1 | 33 | |
bd5635a1 RP |
34 | #include "gdbcore.h" |
35 | ||
8b0f5a9d | 36 | #ifdef GDB_TARGET_IS_SPARC64 |
012be3ce | 37 | #define FP_REGISTER_BYTES (64 * 4) |
8b0f5a9d | 38 | #else |
012be3ce DP |
39 | #define FP_REGISTER_BYTES (32 * 4) |
40 | #endif | |
41 | ||
42 | /* If not defined, assume 32 bit sparc. */ | |
43 | #ifndef FP_MAX_REGNUM | |
44 | #define FP_MAX_REGNUM (FP0_REGNUM + 32) | |
8b0f5a9d DE |
45 | #endif |
46 | ||
47 | #define SPARC_INTREG_SIZE (REGISTER_RAW_SIZE (G0_REGNUM)) | |
48 | ||
bd5635a1 RP |
49 | /* From infrun.c */ |
50 | extern int stop_after_trap; | |
51 | ||
b38f304c JG |
52 | /* We don't store all registers immediately when requested, since they |
53 | get sent over in large chunks anyway. Instead, we accumulate most | |
54 | of the changes and send them over once. "deferred_stores" keeps | |
55 | track of which sets of registers we have locally-changed copies of, | |
56 | so we only need send the groups that have changed. */ | |
57 | ||
58 | int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ | |
59 | ||
8b0f5a9d DE |
60 | /* Branches with prediction are treated like their non-predicting cousins. */ |
61 | /* FIXME: What about floating point branches? */ | |
62 | ||
ee7b9e92 JK |
63 | /* Macros to extract fields from sparc instructions. */ |
64 | #define X_OP(i) (((i) >> 30) & 0x3) | |
65 | #define X_RD(i) (((i) >> 25) & 0x1f) | |
66 | #define X_A(i) (((i) >> 29) & 1) | |
67 | #define X_COND(i) (((i) >> 25) & 0xf) | |
68 | #define X_OP2(i) (((i) >> 22) & 0x7) | |
69 | #define X_IMM22(i) ((i) & 0x3fffff) | |
70 | #define X_OP3(i) (((i) >> 19) & 0x3f) | |
71 | #define X_RS1(i) (((i) >> 14) & 0x1f) | |
72 | #define X_I(i) (((i) >> 13) & 1) | |
73 | #define X_IMM13(i) ((i) & 0x1fff) | |
74 | /* Sign extension macros. */ | |
75 | #define X_SIMM13(i) ((X_IMM13 (i) ^ 0x1000) - 0x1000) | |
76 | #define X_DISP22(i) ((X_IMM22 (i) ^ 0x200000) - 0x200000) | |
8b0f5a9d DE |
77 | #ifdef GDB_TARGET_IS_SPARC64 |
78 | #define X_CC(i) (((i) >> 20) & 3) | |
79 | #define X_P(i) (((i) >> 19) & 1) | |
80 | #define X_DISP19(i) ((((i) & 0x7ffff) ^ 0x40000) - 0x40000) | |
81 | #define X_RCOND(i) (((i) >> 25) & 7) | |
82 | #define X_DISP16(i) ((((((i) >> 6) && 0xc000) | ((i) & 0x3fff)) ^ 0x8000) - 0x8000) | |
83 | #define X_FCN(i) (((i) >> 25) & 31) | |
84 | #endif | |
ee7b9e92 | 85 | |
bd5635a1 RP |
86 | typedef enum |
87 | { | |
8b0f5a9d DE |
88 | Error, not_branch, bicc, bicca, ba, baa, ticc, ta, |
89 | #ifdef GDB_TARGET_IS_SPARC64 | |
90 | done_retry | |
91 | #endif | |
bd5635a1 RP |
92 | } branch_type; |
93 | ||
94 | /* Simulate single-step ptrace call for sun4. Code written by Gary | |
95 | Beihl (beihl@mcc.com). */ | |
96 | ||
97 | /* npc4 and next_pc describe the situation at the time that the | |
98 | step-breakpoint was set, not necessary the current value of NPC_REGNUM. */ | |
99 | static CORE_ADDR next_pc, npc4, target; | |
100 | static int brknpc4, brktrg; | |
101 | typedef char binsn_quantum[BREAKPOINT_MAX]; | |
102 | static binsn_quantum break_mem[3]; | |
103 | ||
104 | /* Non-zero if we just simulated a single-step ptrace call. This is | |
105 | needed because we cannot remove the breakpoints in the inferior | |
106 | process until after the `wait' in `wait_for_inferior'. Used for | |
107 | sun4. */ | |
108 | ||
109 | int one_stepped; | |
110 | ||
d11c44f1 JG |
111 | /* single_step() is called just before we want to resume the inferior, |
112 | if we want to single-step it but there is no hardware or kernel single-step | |
113 | support (as on all SPARCs). We find all the possible targets of the | |
114 | coming instruction and breakpoint them. | |
115 | ||
116 | single_step is also called just after the inferior stops. If we had | |
117 | set up a simulated single-step, we undo our damage. */ | |
118 | ||
bd5635a1 | 119 | void |
8f86a4e4 JG |
120 | single_step (ignore) |
121 | int ignore; /* pid, but we don't need it */ | |
bd5635a1 | 122 | { |
8b0f5a9d | 123 | branch_type br, isbranch(); |
bd5635a1 RP |
124 | CORE_ADDR pc; |
125 | long pc_instruction; | |
126 | ||
127 | if (!one_stepped) | |
128 | { | |
129 | /* Always set breakpoint for NPC. */ | |
130 | next_pc = read_register (NPC_REGNUM); | |
131 | npc4 = next_pc + 4; /* branch not taken */ | |
132 | ||
133 | target_insert_breakpoint (next_pc, break_mem[0]); | |
f1de67d3 | 134 | /* printf_unfiltered ("set break at %x\n",next_pc); */ |
bd5635a1 RP |
135 | |
136 | pc = read_register (PC_REGNUM); | |
ee7b9e92 | 137 | pc_instruction = read_memory_integer (pc, 4); |
8b0f5a9d | 138 | br = isbranch (pc_instruction, pc, &target); |
bd5635a1 RP |
139 | brknpc4 = brktrg = 0; |
140 | ||
141 | if (br == bicca) | |
142 | { | |
143 | /* Conditional annulled branch will either end up at | |
144 | npc (if taken) or at npc+4 (if not taken). | |
145 | Trap npc+4. */ | |
146 | brknpc4 = 1; | |
147 | target_insert_breakpoint (npc4, break_mem[1]); | |
148 | } | |
149 | else if (br == baa && target != next_pc) | |
150 | { | |
151 | /* Unconditional annulled branch will always end up at | |
152 | the target. */ | |
153 | brktrg = 1; | |
154 | target_insert_breakpoint (target, break_mem[2]); | |
155 | } | |
8b0f5a9d DE |
156 | #ifdef GDB_TARGET_IS_SPARC64 |
157 | else if (br == done_retry) | |
158 | { | |
159 | brktrg = 1; | |
160 | target_insert_breakpoint (target, break_mem[2]); | |
161 | } | |
162 | #endif | |
bd5635a1 | 163 | |
d11c44f1 | 164 | /* We are ready to let it go */ |
bd5635a1 RP |
165 | one_stepped = 1; |
166 | return; | |
167 | } | |
168 | else | |
169 | { | |
170 | /* Remove breakpoints */ | |
171 | target_remove_breakpoint (next_pc, break_mem[0]); | |
172 | ||
173 | if (brknpc4) | |
174 | target_remove_breakpoint (npc4, break_mem[1]); | |
175 | ||
176 | if (brktrg) | |
177 | target_remove_breakpoint (target, break_mem[2]); | |
178 | ||
179 | one_stepped = 0; | |
180 | } | |
181 | } | |
182 | \f | |
84bdfea6 PS |
183 | /* Call this for each newly created frame. For SPARC, we need to calculate |
184 | the bottom of the frame, and do some extra work if the prologue | |
185 | has been generated via the -mflat option to GCC. In particular, | |
186 | we need to know where the previous fp and the pc have been stashed, | |
187 | since their exact position within the frame may vary. */ | |
188 | ||
189 | void | |
190 | sparc_init_extra_frame_info (fromleaf, fi) | |
191 | int fromleaf; | |
192 | struct frame_info *fi; | |
193 | { | |
194 | char *name; | |
195 | CORE_ADDR addr; | |
ee7b9e92 | 196 | int insn; |
84bdfea6 PS |
197 | |
198 | fi->bottom = | |
199 | (fi->next ? | |
200 | (fi->frame == fi->next->frame ? fi->next->bottom : fi->next->frame) : | |
201 | read_register (SP_REGNUM)); | |
202 | ||
ee7b9e92 JK |
203 | /* If fi->next is NULL, then we already set ->frame by passing read_fp() |
204 | to create_new_frame. */ | |
205 | if (fi->next) | |
206 | { | |
207 | char buf[MAX_REGISTER_RAW_SIZE]; | |
208 | int err; | |
209 | ||
210 | /* Compute ->frame as if not flat. If it is flat, we'll change | |
211 | it later. */ | |
212 | /* FIXME: If error reading memory, should just stop backtracing, rather | |
213 | than error(). */ | |
214 | get_saved_register (buf, 0, 0, fi, FP_REGNUM, 0); | |
215 | fi->frame = extract_address (buf, REGISTER_RAW_SIZE (FP_REGNUM)); | |
216 | } | |
217 | ||
84bdfea6 PS |
218 | /* Decide whether this is a function with a ``flat register window'' |
219 | frame. For such functions, the frame pointer is actually in %i7. */ | |
220 | fi->flat = 0; | |
221 | if (find_pc_partial_function (fi->pc, &name, &addr, NULL)) | |
222 | { | |
223 | /* See if the function starts with an add (which will be of a | |
ee7b9e92 JK |
224 | negative number if a flat frame) to the sp. FIXME: Does not |
225 | handle large frames which will need more than one instruction | |
226 | to adjust the sp. */ | |
227 | insn = read_memory_integer (addr, 4); | |
228 | if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0 | |
229 | && X_I (insn) && X_SIMM13 (insn) < 0) | |
84bdfea6 | 230 | { |
ee7b9e92 JK |
231 | int offset = X_SIMM13 (insn); |
232 | ||
84bdfea6 | 233 | /* Then look for a save of %i7 into the frame. */ |
ee7b9e92 JK |
234 | insn = read_memory_integer (addr + 4, 4); |
235 | if (X_OP (insn) == 3 | |
236 | && X_RD (insn) == 31 | |
237 | && X_OP3 (insn) == 4 | |
238 | && X_RS1 (insn) == 14) | |
84bdfea6 | 239 | { |
ee7b9e92 JK |
240 | char buf[MAX_REGISTER_RAW_SIZE]; |
241 | ||
84bdfea6 PS |
242 | /* We definitely have a flat frame now. */ |
243 | fi->flat = 1; | |
ee7b9e92 JK |
244 | |
245 | fi->sp_offset = offset; | |
246 | ||
84bdfea6 | 247 | /* Overwrite the frame's address with the value in %i7. */ |
ee7b9e92 JK |
248 | get_saved_register (buf, 0, 0, fi, I7_REGNUM, 0); |
249 | fi->frame = extract_address (buf, REGISTER_RAW_SIZE (I7_REGNUM)); | |
250 | ||
84bdfea6 | 251 | /* Record where the fp got saved. */ |
ee7b9e92 JK |
252 | fi->fp_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn); |
253 | ||
84bdfea6 PS |
254 | /* Also try to collect where the pc got saved to. */ |
255 | fi->pc_addr = 0; | |
ee7b9e92 JK |
256 | insn = read_memory_integer (addr + 12, 4); |
257 | if (X_OP (insn) == 3 | |
258 | && X_RD (insn) == 15 | |
259 | && X_OP3 (insn) == 4 | |
260 | && X_RS1 (insn) == 14) | |
261 | fi->pc_addr = fi->frame + fi->sp_offset + X_SIMM13 (insn); | |
84bdfea6 PS |
262 | } |
263 | } | |
264 | } | |
ee7b9e92 JK |
265 | if (fi->next && fi->frame == 0) |
266 | { | |
267 | /* Kludge to cause init_prev_frame_info to destroy the new frame. */ | |
268 | fi->frame = fi->next->frame; | |
269 | fi->pc = fi->next->pc; | |
270 | } | |
84bdfea6 PS |
271 | } |
272 | ||
d11c44f1 | 273 | CORE_ADDR |
84bdfea6 PS |
274 | sparc_frame_chain (frame) |
275 | struct frame_info *frame; | |
d11c44f1 | 276 | { |
ee7b9e92 JK |
277 | /* Value that will cause FRAME_CHAIN_VALID to not worry about the chain |
278 | value. If it realy is zero, we detect it later in | |
279 | sparc_init_prev_frame. */ | |
280 | return (CORE_ADDR)1; | |
d11c44f1 JG |
281 | } |
282 | ||
283 | CORE_ADDR | |
284 | sparc_extract_struct_value_address (regbuf) | |
285 | char regbuf[REGISTER_BYTES]; | |
286 | { | |
b9e58503 PS |
287 | #ifdef GDB_TARGET_IS_SPARC64 |
288 | return extract_address (regbuf + REGISTER_BYTE (O0_REGNUM), | |
289 | REGISTER_RAW_SIZE (O0_REGNUM)); | |
290 | #else | |
8b0f5a9d | 291 | return read_memory_integer (((int *)(regbuf)) [SP_REGNUM] + (16 * SPARC_INTREG_SIZE), |
f1de67d3 | 292 | TARGET_PTR_BIT / TARGET_CHAR_BIT); |
b9e58503 | 293 | #endif |
d11c44f1 JG |
294 | } |
295 | ||
f9e3b3cc JG |
296 | /* Find the pc saved in frame FRAME. */ |
297 | ||
bd5635a1 | 298 | CORE_ADDR |
8bf94f44 | 299 | sparc_frame_saved_pc (frame) |
84bdfea6 | 300 | struct frame_info *frame; |
bd5635a1 | 301 | { |
f1de67d3 | 302 | char buf[MAX_REGISTER_RAW_SIZE]; |
34df79fc | 303 | CORE_ADDR addr; |
f9e3b3cc | 304 | |
48792545 JK |
305 | if (frame->signal_handler_caller) |
306 | { | |
307 | /* This is the signal trampoline frame. | |
308 | Get the saved PC from the sigcontext structure. */ | |
309 | ||
310 | #ifndef SIGCONTEXT_PC_OFFSET | |
311 | #define SIGCONTEXT_PC_OFFSET 12 | |
312 | #endif | |
313 | ||
314 | CORE_ADDR sigcontext_addr; | |
315 | char scbuf[TARGET_PTR_BIT / HOST_CHAR_BIT]; | |
94d4b713 JK |
316 | int saved_pc_offset = SIGCONTEXT_PC_OFFSET; |
317 | char *name = NULL; | |
318 | ||
319 | /* Solaris2 ucbsigvechandler passes a pointer to a sigcontext | |
320 | as the third parameter. The offset to the saved pc is 12. */ | |
321 | find_pc_partial_function (frame->pc, &name, | |
322 | (CORE_ADDR *)NULL,(CORE_ADDR *)NULL); | |
323 | if (name && STREQ (name, "ucbsigvechandler")) | |
324 | saved_pc_offset = 12; | |
48792545 JK |
325 | |
326 | /* The sigcontext address is contained in register O2. */ | |
327 | get_saved_register (buf, (int *)NULL, (CORE_ADDR *)NULL, | |
328 | frame, O0_REGNUM + 2, (enum lval_type *)NULL); | |
8b0f5a9d | 329 | sigcontext_addr = extract_address (buf, REGISTER_RAW_SIZE (O0_REGNUM + 2)); |
48792545 JK |
330 | |
331 | /* Don't cause a memory_error when accessing sigcontext in case the | |
332 | stack layout has changed or the stack is corrupt. */ | |
94d4b713 | 333 | target_read_memory (sigcontext_addr + saved_pc_offset, |
48792545 JK |
334 | scbuf, sizeof (scbuf)); |
335 | return extract_address (scbuf, sizeof (scbuf)); | |
336 | } | |
84bdfea6 PS |
337 | if (frame->flat) |
338 | addr = frame->pc_addr; | |
339 | else | |
340 | addr = frame->bottom + FRAME_SAVED_I0 + | |
8b0f5a9d | 341 | SPARC_INTREG_SIZE * (I7_REGNUM - I0_REGNUM); |
ee7b9e92 JK |
342 | |
343 | if (addr == 0) | |
344 | /* A flat frame leaf function might not save the PC anywhere, | |
345 | just leave it in %o7. */ | |
346 | return PC_ADJUST (read_register (O7_REGNUM)); | |
347 | ||
8b0f5a9d DE |
348 | read_memory (addr, buf, SPARC_INTREG_SIZE); |
349 | return PC_ADJUST (extract_address (buf, SPARC_INTREG_SIZE)); | |
bd5635a1 RP |
350 | } |
351 | ||
84bdfea6 PS |
352 | /* Since an individual frame in the frame cache is defined by two |
353 | arguments (a frame pointer and a stack pointer), we need two | |
354 | arguments to get info for an arbitrary stack frame. This routine | |
355 | takes two arguments and makes the cached frames look as if these | |
356 | two arguments defined a frame on the cache. This allows the rest | |
357 | of info frame to extract the important arguments without | |
358 | difficulty. */ | |
359 | ||
360 | struct frame_info * | |
2093fe68 RP |
361 | setup_arbitrary_frame (argc, argv) |
362 | int argc; | |
84bdfea6 | 363 | CORE_ADDR *argv; |
bd5635a1 | 364 | { |
84bdfea6 | 365 | struct frame_info *frame; |
2093fe68 RP |
366 | |
367 | if (argc != 2) | |
368 | error ("Sparc frame specifications require two arguments: fp and sp"); | |
369 | ||
84bdfea6 | 370 | frame = create_new_frame (argv[0], 0); |
bd5635a1 | 371 | |
84bdfea6 PS |
372 | if (!frame) |
373 | fatal ("internal: create_new_frame returned invalid frame"); | |
bd5635a1 | 374 | |
84bdfea6 PS |
375 | frame->bottom = argv[1]; |
376 | frame->pc = FRAME_SAVED_PC (frame); | |
377 | return frame; | |
bd5635a1 RP |
378 | } |
379 | ||
5259796b JG |
380 | /* Given a pc value, skip it forward past the function prologue by |
381 | disassembling instructions that appear to be a prologue. | |
382 | ||
383 | If FRAMELESS_P is set, we are only testing to see if the function | |
384 | is frameless. This allows a quicker answer. | |
385 | ||
386 | This routine should be more specific in its actions; making sure | |
192cbba9 | 387 | that it uses the same register in the initial prologue section. */ |
84bdfea6 | 388 | |
ee7b9e92 JK |
389 | static CORE_ADDR examine_prologue PARAMS ((CORE_ADDR, int, struct frame_info *, |
390 | struct frame_saved_regs *)); | |
391 | ||
392 | static CORE_ADDR | |
393 | examine_prologue (start_pc, frameless_p, fi, saved_regs) | |
192cbba9 | 394 | CORE_ADDR start_pc; |
5259796b | 395 | int frameless_p; |
ee7b9e92 JK |
396 | struct frame_info *fi; |
397 | struct frame_saved_regs *saved_regs; | |
bd5635a1 | 398 | { |
ee7b9e92 | 399 | int insn; |
bd5635a1 | 400 | int dest = -1; |
192cbba9 | 401 | CORE_ADDR pc = start_pc; |
84bdfea6 | 402 | int is_flat = 0; |
bd5635a1 | 403 | |
ee7b9e92 | 404 | insn = read_memory_integer (pc, 4); |
bd5635a1 RP |
405 | |
406 | /* Recognize the `sethi' insn and record its destination. */ | |
ee7b9e92 | 407 | if (X_OP (insn) == 0 && X_OP2 (insn) == 4) |
bd5635a1 | 408 | { |
ee7b9e92 | 409 | dest = X_RD (insn); |
bd5635a1 | 410 | pc += 4; |
ee7b9e92 | 411 | insn = read_memory_integer (pc, 4); |
bd5635a1 RP |
412 | } |
413 | ||
414 | /* Recognize an add immediate value to register to either %g1 or | |
415 | the destination register recorded above. Actually, this might | |
192cbba9 JK |
416 | well recognize several different arithmetic operations. |
417 | It doesn't check that rs1 == rd because in theory "sub %g0, 5, %g1" | |
418 | followed by "save %sp, %g1, %sp" is a valid prologue (Not that | |
419 | I imagine any compiler really does that, however). */ | |
ee7b9e92 JK |
420 | if (X_OP (insn) == 2 |
421 | && X_I (insn) | |
422 | && (X_RD (insn) == 1 || X_RD (insn) == dest)) | |
bd5635a1 RP |
423 | { |
424 | pc += 4; | |
ee7b9e92 | 425 | insn = read_memory_integer (pc, 4); |
bd5635a1 RP |
426 | } |
427 | ||
ee7b9e92 JK |
428 | /* Recognize any SAVE insn. */ |
429 | if (X_OP (insn) == 2 && X_OP3 (insn) == 60) | |
bd5635a1 RP |
430 | { |
431 | pc += 4; | |
5259796b JG |
432 | if (frameless_p) /* If the save is all we care about, */ |
433 | return pc; /* return before doing more work */ | |
ee7b9e92 | 434 | insn = read_memory_integer (pc, 4); |
bd5635a1 | 435 | } |
ee7b9e92 JK |
436 | /* Recognize add to %sp. */ |
437 | else if (X_OP (insn) == 2 && X_RD (insn) == 14 && X_OP3 (insn) == 0) | |
5259796b | 438 | { |
84bdfea6 PS |
439 | pc += 4; |
440 | if (frameless_p) /* If the add is all we care about, */ | |
441 | return pc; /* return before doing more work */ | |
ee7b9e92 JK |
442 | is_flat = 1; |
443 | insn = read_memory_integer (pc, 4); | |
444 | /* Recognize store of frame pointer (i7). */ | |
445 | if (X_OP (insn) == 3 | |
446 | && X_RD (insn) == 31 | |
447 | && X_OP3 (insn) == 4 | |
448 | && X_RS1 (insn) == 14) | |
449 | { | |
450 | pc += 4; | |
451 | insn = read_memory_integer (pc, 4); | |
452 | ||
453 | /* Recognize sub %sp, <anything>, %i7. */ | |
454 | if (X_OP (insn) == 2 | |
455 | && X_OP3 (insn) == 4 | |
456 | && X_RS1 (insn) == 14 | |
457 | && X_RD (insn) == 31) | |
458 | { | |
459 | pc += 4; | |
460 | insn = read_memory_integer (pc, 4); | |
461 | } | |
462 | else | |
463 | return pc; | |
464 | } | |
465 | else | |
466 | return pc; | |
5259796b | 467 | } |
84bdfea6 PS |
468 | else |
469 | /* Without a save or add instruction, it's not a prologue. */ | |
470 | return start_pc; | |
bd5635a1 | 471 | |
ee7b9e92 | 472 | while (1) |
bd5635a1 | 473 | { |
ee7b9e92 JK |
474 | /* Recognize stores into the frame from the input registers. |
475 | This recognizes all non alternate stores of input register, | |
476 | into a location offset from the frame pointer. */ | |
477 | if ((X_OP (insn) == 3 | |
478 | && (X_OP3 (insn) & 0x3c) == 4 /* Store, non-alternate. */ | |
479 | && (X_RD (insn) & 0x18) == 0x18 /* Input register. */ | |
480 | && X_I (insn) /* Immediate mode. */ | |
481 | && X_RS1 (insn) == 30 /* Off of frame pointer. */ | |
482 | /* Into reserved stack space. */ | |
483 | && X_SIMM13 (insn) >= 0x44 | |
484 | && X_SIMM13 (insn) < 0x5b)) | |
485 | ; | |
486 | else if (is_flat | |
487 | && X_OP (insn) == 3 | |
488 | && X_OP3 (insn) == 4 | |
489 | && X_RS1 (insn) == 14 | |
490 | ) | |
491 | { | |
492 | if (saved_regs && X_I (insn)) | |
493 | saved_regs->regs[X_RD (insn)] = | |
494 | fi->frame + fi->sp_offset + X_SIMM13 (insn); | |
495 | } | |
496 | else | |
497 | break; | |
bd5635a1 | 498 | pc += 4; |
ee7b9e92 | 499 | insn = read_memory_integer (pc, 4); |
bd5635a1 | 500 | } |
84bdfea6 | 501 | |
5259796b | 502 | return pc; |
bd5635a1 RP |
503 | } |
504 | ||
ee7b9e92 JK |
505 | CORE_ADDR |
506 | skip_prologue (start_pc, frameless_p) | |
507 | CORE_ADDR start_pc; | |
508 | int frameless_p; | |
509 | { | |
510 | return examine_prologue (start_pc, frameless_p, NULL, NULL); | |
511 | } | |
512 | ||
8b0f5a9d DE |
513 | /* Check instruction at ADDR to see if it is a branch. |
514 | All non-annulled instructions will go to NPC or will trap. | |
515 | Set *TARGET if we find a candidate branch; set to zero if not. | |
516 | ||
517 | This isn't static as it's used by remote-sa.sparc.c. */ | |
518 | ||
bd5635a1 | 519 | branch_type |
8b0f5a9d | 520 | isbranch (instruction, addr, target) |
bd5635a1 RP |
521 | long instruction; |
522 | CORE_ADDR addr, *target; | |
523 | { | |
524 | branch_type val = not_branch; | |
525 | long int offset; /* Must be signed for sign-extend. */ | |
bd5635a1 RP |
526 | |
527 | *target = 0; | |
bd5635a1 | 528 | |
ee7b9e92 JK |
529 | if (X_OP (instruction) == 0 |
530 | && (X_OP2 (instruction) == 2 | |
531 | || X_OP2 (instruction) == 6 | |
8b0f5a9d DE |
532 | #ifdef GDB_TARGET_IS_SPARC64 |
533 | || X_OP2 (instruction) == 1 | |
534 | || X_OP2 (instruction) == 3 | |
535 | || X_OP2 (instruction) == 5 | |
536 | #else | |
537 | || X_OP2 (instruction) == 7 | |
538 | #endif | |
539 | )) | |
bd5635a1 | 540 | { |
ee7b9e92 JK |
541 | if (X_COND (instruction) == 8) |
542 | val = X_A (instruction) ? baa : ba; | |
bd5635a1 | 543 | else |
ee7b9e92 | 544 | val = X_A (instruction) ? bicca : bicc; |
673e1bab | 545 | switch (X_OP2 (instruction)) |
8b0f5a9d DE |
546 | { |
547 | case 2: | |
548 | case 6: | |
549 | #ifndef GDB_TARGET_IS_SPARC64 | |
550 | case 7: | |
551 | #endif | |
552 | offset = 4 * X_DISP22 (instruction); | |
553 | break; | |
554 | #ifdef GDB_TARGET_IS_SPARC64 | |
555 | case 1: | |
556 | case 5: | |
557 | offset = 4 * X_DISP19 (instruction); | |
558 | break; | |
559 | case 3: | |
560 | offset = 4 * X_DISP16 (instruction); | |
561 | break; | |
562 | #endif | |
563 | } | |
bd5635a1 RP |
564 | *target = addr + offset; |
565 | } | |
8b0f5a9d DE |
566 | #ifdef GDB_TARGET_IS_SPARC64 |
567 | else if (X_OP (instruction) == 2 | |
568 | && X_OP3 (instruction) == 62) | |
569 | { | |
570 | if (X_FCN (instruction) == 0) | |
571 | { | |
572 | /* done */ | |
573 | *target = read_register (TNPC_REGNUM); | |
574 | val = done_retry; | |
575 | } | |
576 | else if (X_FCN (instruction) == 1) | |
577 | { | |
578 | /* retry */ | |
579 | *target = read_register (TPC_REGNUM); | |
580 | val = done_retry; | |
581 | } | |
582 | } | |
583 | #endif | |
bd5635a1 RP |
584 | |
585 | return val; | |
586 | } | |
ee7b9e92 JK |
587 | \f |
588 | /* Find register number REGNUM relative to FRAME and put its | |
589 | (raw) contents in *RAW_BUFFER. Set *OPTIMIZED if the variable | |
590 | was optimized out (and thus can't be fetched). If the variable | |
591 | was fetched from memory, set *ADDRP to where it was fetched from, | |
592 | otherwise it was fetched from a register. | |
593 | ||
594 | The argument RAW_BUFFER must point to aligned memory. */ | |
595 | ||
596 | void | |
597 | get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval) | |
598 | char *raw_buffer; | |
599 | int *optimized; | |
600 | CORE_ADDR *addrp; | |
601 | struct frame_info *frame; | |
602 | int regnum; | |
603 | enum lval_type *lval; | |
604 | { | |
605 | struct frame_info *frame1; | |
606 | CORE_ADDR addr; | |
607 | ||
888a18ee JK |
608 | if (!target_has_registers) |
609 | error ("No registers."); | |
610 | ||
ee7b9e92 JK |
611 | if (optimized) |
612 | *optimized = 0; | |
613 | ||
614 | addr = 0; | |
012be3ce DP |
615 | |
616 | /* FIXME This code extracted from infcmd.c; should put elsewhere! */ | |
617 | if (frame == NULL) | |
618 | { | |
619 | /* error ("No selected frame."); */ | |
620 | if (!target_has_registers) | |
621 | error ("The program has no registers now."); | |
622 | if (selected_frame == NULL) | |
623 | error ("No selected frame."); | |
624 | /* Try to use selected frame */ | |
625 | frame = get_prev_frame (selected_frame); | |
626 | if (frame == 0) | |
627 | error ("Cmd not meaningful in the outermost frame."); | |
628 | } | |
629 | ||
630 | ||
ee7b9e92 JK |
631 | frame1 = frame->next; |
632 | while (frame1 != NULL) | |
633 | { | |
634 | if (frame1->pc >= (frame1->bottom ? frame1->bottom : | |
635 | read_register (SP_REGNUM)) | |
636 | && frame1->pc <= FRAME_FP (frame1)) | |
637 | { | |
012be3ce DP |
638 | /* Dummy frame. All but the window regs are in there somewhere. |
639 | The window registers are saved on the stack, just like in a | |
640 | normal frame. */ | |
ee7b9e92 | 641 | if (regnum >= G1_REGNUM && regnum < G1_REGNUM + 7) |
8b0f5a9d | 642 | addr = frame1->frame + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE |
012be3ce | 643 | - (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE); |
ee7b9e92 | 644 | else if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8) |
012be3ce DP |
645 | addr = (frame1->prev->bottom |
646 | + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE | |
647 | + FRAME_SAVED_I0); | |
648 | else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8) | |
649 | addr = (frame1->prev->bottom | |
650 | + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE | |
651 | + FRAME_SAVED_L0); | |
652 | else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8) | |
653 | addr = frame1->frame + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE | |
654 | - (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE); | |
655 | #ifdef FP0_REGNUM | |
656 | else if (regnum >= FP0_REGNUM && regnum < FP0_REGNUM + 32) | |
8b0f5a9d | 657 | addr = frame1->frame + (regnum - FP0_REGNUM) * 4 |
012be3ce DP |
658 | - (FP_REGISTER_BYTES); |
659 | #ifdef GDB_TARGET_IS_SPARC64 | |
660 | else if (regnum >= FP0_REGNUM + 32 && regnum < FP_MAX_REGNUM) | |
661 | addr = frame1->frame + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8 | |
662 | - (FP_REGISTER_BYTES); | |
663 | #endif | |
664 | #endif /* FP0_REGNUM */ | |
ee7b9e92 | 665 | else if (regnum >= Y_REGNUM && regnum < NUM_REGS) |
8b0f5a9d | 666 | addr = frame1->frame + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE |
012be3ce | 667 | - (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE); |
ee7b9e92 JK |
668 | } |
669 | else if (frame1->flat) | |
670 | { | |
671 | ||
672 | if (regnum == RP_REGNUM) | |
673 | addr = frame1->pc_addr; | |
674 | else if (regnum == I7_REGNUM) | |
675 | addr = frame1->fp_addr; | |
676 | else | |
677 | { | |
678 | CORE_ADDR func_start; | |
679 | struct frame_saved_regs regs; | |
680 | memset (®s, 0, sizeof (regs)); | |
681 | ||
682 | find_pc_partial_function (frame1->pc, NULL, &func_start, NULL); | |
683 | examine_prologue (func_start, 0, frame1, ®s); | |
684 | addr = regs.regs[regnum]; | |
685 | } | |
686 | } | |
687 | else | |
688 | { | |
689 | /* Normal frame. Local and In registers are saved on stack. */ | |
690 | if (regnum >= I0_REGNUM && regnum < I0_REGNUM + 8) | |
691 | addr = (frame1->prev->bottom | |
8b0f5a9d | 692 | + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
ee7b9e92 JK |
693 | + FRAME_SAVED_I0); |
694 | else if (regnum >= L0_REGNUM && regnum < L0_REGNUM + 8) | |
695 | addr = (frame1->prev->bottom | |
8b0f5a9d | 696 | + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE |
ee7b9e92 JK |
697 | + FRAME_SAVED_L0); |
698 | else if (regnum >= O0_REGNUM && regnum < O0_REGNUM + 8) | |
699 | { | |
700 | /* Outs become ins. */ | |
701 | get_saved_register (raw_buffer, optimized, addrp, frame1, | |
702 | (regnum - O0_REGNUM + I0_REGNUM), lval); | |
703 | return; | |
704 | } | |
705 | } | |
706 | if (addr != 0) | |
707 | break; | |
708 | frame1 = frame1->next; | |
709 | } | |
710 | if (addr != 0) | |
711 | { | |
712 | if (lval != NULL) | |
713 | *lval = lval_memory; | |
714 | if (regnum == SP_REGNUM) | |
715 | { | |
716 | if (raw_buffer != NULL) | |
717 | { | |
718 | /* Put it back in target format. */ | |
719 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), addr); | |
720 | } | |
721 | if (addrp != NULL) | |
722 | *addrp = 0; | |
723 | return; | |
724 | } | |
725 | if (raw_buffer != NULL) | |
726 | read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum)); | |
727 | } | |
728 | else | |
729 | { | |
730 | if (lval != NULL) | |
731 | *lval = lval_register; | |
732 | addr = REGISTER_BYTE (regnum); | |
733 | if (raw_buffer != NULL) | |
734 | read_register_gen (regnum, raw_buffer); | |
735 | } | |
736 | if (addrp != NULL) | |
737 | *addrp = addr; | |
738 | } | |
739 | ||
740 | /* Push an empty stack frame, and record in it the current PC, regs, etc. | |
741 | ||
742 | We save the non-windowed registers and the ins. The locals and outs | |
743 | are new; they don't need to be saved. The i's and l's of | |
744 | the last frame were already saved on the stack. */ | |
745 | ||
746 | /* Definitely see tm-sparc.h for more doc of the frame format here. */ | |
747 | ||
8b0f5a9d DE |
748 | #ifdef GDB_TARGET_IS_SPARC64 |
749 | #define DUMMY_REG_SAVE_OFFSET (128 + 16) | |
750 | #else | |
751 | #define DUMMY_REG_SAVE_OFFSET 0x60 | |
752 | #endif | |
753 | ||
754 | /* See tm-sparc.h for how this is calculated. */ | |
012be3ce | 755 | #ifdef FP0_REGNUM |
8b0f5a9d DE |
756 | #define DUMMY_STACK_REG_BUF_SIZE \ |
757 | (((8+8+8) * SPARC_INTREG_SIZE) + (32 * REGISTER_RAW_SIZE (FP0_REGNUM))) | |
012be3ce DP |
758 | #else |
759 | #define DUMMY_STACK_REG_BUF_SIZE \ | |
760 | (((8+8+8) * SPARC_INTREG_SIZE) ) | |
761 | #endif /* FP0_REGNUM */ | |
8b0f5a9d DE |
762 | #define DUMMY_STACK_SIZE (DUMMY_STACK_REG_BUF_SIZE + DUMMY_REG_SAVE_OFFSET) |
763 | ||
ee7b9e92 JK |
764 | void |
765 | sparc_push_dummy_frame () | |
766 | { | |
767 | CORE_ADDR sp, old_sp; | |
8b0f5a9d | 768 | char register_temp[DUMMY_STACK_SIZE]; |
ee7b9e92 JK |
769 | |
770 | old_sp = sp = read_register (SP_REGNUM); | |
771 | ||
8b0f5a9d DE |
772 | #ifdef GDB_TARGET_IS_SPARC64 |
773 | /* FIXME: not sure what needs to be saved here. */ | |
774 | #else | |
ee7b9e92 JK |
775 | /* Y, PS, WIM, TBR, PC, NPC, FPS, CPS regs */ |
776 | read_register_bytes (REGISTER_BYTE (Y_REGNUM), ®ister_temp[0], | |
777 | REGISTER_RAW_SIZE (Y_REGNUM) * 8); | |
8b0f5a9d | 778 | #endif |
ee7b9e92 | 779 | |
8b0f5a9d DE |
780 | read_register_bytes (REGISTER_BYTE (O0_REGNUM), |
781 | ®ister_temp[8 * SPARC_INTREG_SIZE], | |
782 | SPARC_INTREG_SIZE * 8); | |
ee7b9e92 | 783 | |
8b0f5a9d DE |
784 | read_register_bytes (REGISTER_BYTE (G0_REGNUM), |
785 | ®ister_temp[16 * SPARC_INTREG_SIZE], | |
786 | SPARC_INTREG_SIZE * 8); | |
ee7b9e92 | 787 | |
012be3ce | 788 | #ifdef FP0_REGNUM |
8b0f5a9d DE |
789 | read_register_bytes (REGISTER_BYTE (FP0_REGNUM), |
790 | ®ister_temp[24 * SPARC_INTREG_SIZE], | |
012be3ce DP |
791 | FP_REGISTER_BYTES); |
792 | #endif /* FP0_REGNUM */ | |
ee7b9e92 | 793 | |
8b0f5a9d | 794 | sp -= DUMMY_STACK_SIZE; |
ee7b9e92 JK |
795 | |
796 | write_register (SP_REGNUM, sp); | |
797 | ||
8b0f5a9d DE |
798 | write_memory (sp + DUMMY_REG_SAVE_OFFSET, ®ister_temp[0], |
799 | DUMMY_STACK_REG_BUF_SIZE); | |
ee7b9e92 JK |
800 | |
801 | write_register (FP_REGNUM, old_sp); | |
802 | ||
803 | /* Set return address register for the call dummy to the current PC. */ | |
804 | write_register (I7_REGNUM, read_pc() - 8); | |
805 | } | |
bd5635a1 | 806 | |
ee7b9e92 JK |
807 | /* sparc_frame_find_saved_regs (). This function is here only because |
808 | pop_frame uses it. Note there is an interesting corner case which | |
809 | I think few ports of GDB get right--if you are popping a frame | |
810 | which does not save some register that *is* saved by a more inner | |
811 | frame (such a frame will never be a dummy frame because dummy | |
812 | frames save all registers). Rewriting pop_frame to use | |
813 | get_saved_register would solve this problem and also get rid of the | |
814 | ugly duplication between sparc_frame_find_saved_regs and | |
815 | get_saved_register. | |
bd5635a1 RP |
816 | |
817 | Stores, into a struct frame_saved_regs, | |
818 | the addresses of the saved registers of frame described by FRAME_INFO. | |
819 | This includes special registers such as pc and fp saved in special | |
820 | ways in the stack frame. sp is even more special: | |
821 | the address we return for it IS the sp for the next frame. | |
822 | ||
823 | Note that on register window machines, we are currently making the | |
824 | assumption that window registers are being saved somewhere in the | |
825 | frame in which they are being used. If they are stored in an | |
826 | inferior frame, find_saved_register will break. | |
827 | ||
828 | On the Sun 4, the only time all registers are saved is when | |
829 | a dummy frame is involved. Otherwise, the only saved registers | |
830 | are the LOCAL and IN registers which are saved as a result | |
831 | of the "save/restore" opcodes. This condition is determined | |
832 | by address rather than by value. | |
833 | ||
834 | The "pc" is not stored in a frame on the SPARC. (What is stored | |
835 | is a return address minus 8.) sparc_pop_frame knows how to | |
836 | deal with that. Other routines might or might not. | |
837 | ||
838 | See tm-sparc.h (PUSH_FRAME and friends) for CRITICAL information | |
839 | about how this works. */ | |
840 | ||
ee7b9e92 JK |
841 | static void sparc_frame_find_saved_regs PARAMS ((struct frame_info *, |
842 | struct frame_saved_regs *)); | |
843 | ||
844 | static void | |
bd5635a1 RP |
845 | sparc_frame_find_saved_regs (fi, saved_regs_addr) |
846 | struct frame_info *fi; | |
847 | struct frame_saved_regs *saved_regs_addr; | |
848 | { | |
849 | register int regnum; | |
84bdfea6 | 850 | CORE_ADDR frame_addr = FRAME_FP (fi); |
bd5635a1 | 851 | |
84bdfea6 | 852 | if (!fi) |
bd5635a1 RP |
853 | fatal ("Bad frame info struct in FRAME_FIND_SAVED_REGS"); |
854 | ||
b38f304c | 855 | memset (saved_regs_addr, 0, sizeof (*saved_regs_addr)); |
bd5635a1 | 856 | |
bd5635a1 RP |
857 | if (fi->pc >= (fi->bottom ? fi->bottom : |
858 | read_register (SP_REGNUM)) | |
859 | && fi->pc <= FRAME_FP(fi)) | |
860 | { | |
861 | /* Dummy frame. All but the window regs are in there somewhere. */ | |
862 | for (regnum = G1_REGNUM; regnum < G1_REGNUM+7; regnum++) | |
863 | saved_regs_addr->regs[regnum] = | |
8b0f5a9d | 864 | frame_addr + (regnum - G0_REGNUM) * SPARC_INTREG_SIZE |
012be3ce | 865 | - (FP_REGISTER_BYTES + 8 * SPARC_INTREG_SIZE); |
bd5635a1 RP |
866 | for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) |
867 | saved_regs_addr->regs[regnum] = | |
8b0f5a9d | 868 | frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
012be3ce DP |
869 | - (FP_REGISTER_BYTES + 16 * SPARC_INTREG_SIZE); |
870 | #ifdef FP0_REGNUM | |
bd5635a1 RP |
871 | for (regnum = FP0_REGNUM; regnum < FP0_REGNUM + 32; regnum++) |
872 | saved_regs_addr->regs[regnum] = | |
8b0f5a9d | 873 | frame_addr + (regnum - FP0_REGNUM) * 4 |
012be3ce DP |
874 | - (FP_REGISTER_BYTES); |
875 | #ifdef GDB_TARGET_IS_SPARC64 | |
876 | for (regnum = FP0_REGNUM + 32; regnum < FP_MAX_REGNUM; regnum++) | |
877 | saved_regs_addr->regs[regnum] = | |
878 | frame_addr + 32 * 4 + (regnum - FP0_REGNUM - 32) * 8 | |
879 | - (FP_REGISTER_BYTES); | |
880 | #endif | |
881 | #endif /* FP0_REGNUM */ | |
bd5635a1 RP |
882 | for (regnum = Y_REGNUM; regnum < NUM_REGS; regnum++) |
883 | saved_regs_addr->regs[regnum] = | |
8b0f5a9d | 884 | frame_addr + (regnum - Y_REGNUM) * SPARC_INTREG_SIZE - 0xe0; |
012be3ce | 885 | - (FP_REGISTER_BYTES + 24 * SPARC_INTREG_SIZE); |
84bdfea6 | 886 | frame_addr = fi->bottom ? |
bd5635a1 RP |
887 | fi->bottom : read_register (SP_REGNUM); |
888 | } | |
84bdfea6 PS |
889 | else if (fi->flat) |
890 | { | |
ee7b9e92 JK |
891 | CORE_ADDR func_start; |
892 | find_pc_partial_function (fi->pc, NULL, &func_start, NULL); | |
893 | examine_prologue (func_start, 0, fi, saved_regs_addr); | |
894 | ||
84bdfea6 PS |
895 | /* Flat register window frame. */ |
896 | saved_regs_addr->regs[RP_REGNUM] = fi->pc_addr; | |
897 | saved_regs_addr->regs[I7_REGNUM] = fi->fp_addr; | |
84bdfea6 | 898 | } |
bd5635a1 RP |
899 | else |
900 | { | |
901 | /* Normal frame. Just Local and In registers */ | |
84bdfea6 | 902 | frame_addr = fi->bottom ? |
bd5635a1 | 903 | fi->bottom : read_register (SP_REGNUM); |
84bdfea6 | 904 | for (regnum = L0_REGNUM; regnum < L0_REGNUM+8; regnum++) |
16726dd1 | 905 | saved_regs_addr->regs[regnum] = |
8b0f5a9d | 906 | (frame_addr + (regnum - L0_REGNUM) * SPARC_INTREG_SIZE |
84bdfea6 PS |
907 | + FRAME_SAVED_L0); |
908 | for (regnum = I0_REGNUM; regnum < I0_REGNUM+8; regnum++) | |
909 | saved_regs_addr->regs[regnum] = | |
8b0f5a9d | 910 | (frame_addr + (regnum - I0_REGNUM) * SPARC_INTREG_SIZE |
84bdfea6 | 911 | + FRAME_SAVED_I0); |
bd5635a1 RP |
912 | } |
913 | if (fi->next) | |
914 | { | |
84bdfea6 PS |
915 | if (fi->flat) |
916 | { | |
917 | saved_regs_addr->regs[O7_REGNUM] = fi->pc_addr; | |
918 | } | |
919 | else | |
920 | { | |
921 | /* Pull off either the next frame pointer or the stack pointer */ | |
922 | CORE_ADDR next_next_frame_addr = | |
923 | (fi->next->bottom ? | |
924 | fi->next->bottom : | |
925 | read_register (SP_REGNUM)); | |
926 | for (regnum = O0_REGNUM; regnum < O0_REGNUM+8; regnum++) | |
927 | saved_regs_addr->regs[regnum] = | |
928 | (next_next_frame_addr | |
8b0f5a9d | 929 | + (regnum - O0_REGNUM) * SPARC_INTREG_SIZE |
84bdfea6 PS |
930 | + FRAME_SAVED_I0); |
931 | } | |
bd5635a1 RP |
932 | } |
933 | /* Otherwise, whatever we would get from ptrace(GETREGS) is accurate */ | |
934 | saved_regs_addr->regs[SP_REGNUM] = FRAME_FP (fi); | |
935 | } | |
936 | ||
bd5635a1 RP |
937 | /* Discard from the stack the innermost frame, restoring all saved registers. |
938 | ||
939 | Note that the values stored in fsr by get_frame_saved_regs are *in | |
940 | the context of the called frame*. What this means is that the i | |
941 | regs of fsr must be restored into the o regs of the (calling) frame that | |
942 | we pop into. We don't care about the output regs of the calling frame, | |
943 | since unless it's a dummy frame, it won't have any output regs in it. | |
944 | ||
945 | We never have to bother with %l (local) regs, since the called routine's | |
946 | locals get tossed, and the calling routine's locals are already saved | |
947 | on its stack. */ | |
948 | ||
949 | /* Definitely see tm-sparc.h for more doc of the frame format here. */ | |
950 | ||
951 | void | |
952 | sparc_pop_frame () | |
953 | { | |
84bdfea6 | 954 | register struct frame_info *frame = get_current_frame (); |
bd5635a1 RP |
955 | register CORE_ADDR pc; |
956 | struct frame_saved_regs fsr; | |
bd5635a1 | 957 | char raw_buffer[REGISTER_BYTES]; |
84bdfea6 | 958 | int regnum; |
bd5635a1 | 959 | |
ee7b9e92 | 960 | sparc_frame_find_saved_regs (frame, &fsr); |
012be3ce | 961 | #ifdef FP0_REGNUM |
bd5635a1 RP |
962 | if (fsr.regs[FP0_REGNUM]) |
963 | { | |
012be3ce | 964 | read_memory (fsr.regs[FP0_REGNUM], raw_buffer, FP_REGISTER_BYTES); |
8b0f5a9d | 965 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), |
012be3ce | 966 | raw_buffer, FP_REGISTER_BYTES); |
bd5635a1 | 967 | } |
8b0f5a9d | 968 | #ifndef GDB_TARGET_IS_SPARC64 |
f1de67d3 PS |
969 | if (fsr.regs[FPS_REGNUM]) |
970 | { | |
971 | read_memory (fsr.regs[FPS_REGNUM], raw_buffer, 4); | |
972 | write_register_bytes (REGISTER_BYTE (FPS_REGNUM), raw_buffer, 4); | |
973 | } | |
974 | if (fsr.regs[CPS_REGNUM]) | |
975 | { | |
976 | read_memory (fsr.regs[CPS_REGNUM], raw_buffer, 4); | |
977 | write_register_bytes (REGISTER_BYTE (CPS_REGNUM), raw_buffer, 4); | |
978 | } | |
8b0f5a9d | 979 | #endif |
012be3ce | 980 | #endif /* FP0_REGNUM */ |
bd5635a1 RP |
981 | if (fsr.regs[G1_REGNUM]) |
982 | { | |
8b0f5a9d DE |
983 | read_memory (fsr.regs[G1_REGNUM], raw_buffer, 7 * SPARC_INTREG_SIZE); |
984 | write_register_bytes (REGISTER_BYTE (G1_REGNUM), raw_buffer, | |
985 | 7 * SPARC_INTREG_SIZE); | |
bd5635a1 | 986 | } |
84bdfea6 PS |
987 | |
988 | if (frame->flat) | |
989 | { | |
990 | /* Each register might or might not have been saved, need to test | |
991 | individually. */ | |
992 | for (regnum = L0_REGNUM; regnum < L0_REGNUM + 8; ++regnum) | |
993 | if (fsr.regs[regnum]) | |
8b0f5a9d DE |
994 | write_register (regnum, read_memory_integer (fsr.regs[regnum], |
995 | SPARC_INTREG_SIZE)); | |
84bdfea6 PS |
996 | for (regnum = I0_REGNUM; regnum < I0_REGNUM + 8; ++regnum) |
997 | if (fsr.regs[regnum]) | |
8b0f5a9d DE |
998 | write_register (regnum, read_memory_integer (fsr.regs[regnum], |
999 | SPARC_INTREG_SIZE)); | |
ee7b9e92 JK |
1000 | |
1001 | /* Handle all outs except stack pointer (o0-o5; o7). */ | |
1002 | for (regnum = O0_REGNUM; regnum < O0_REGNUM + 6; ++regnum) | |
84bdfea6 | 1003 | if (fsr.regs[regnum]) |
8b0f5a9d DE |
1004 | write_register (regnum, read_memory_integer (fsr.regs[regnum], |
1005 | SPARC_INTREG_SIZE)); | |
ee7b9e92 JK |
1006 | if (fsr.regs[O0_REGNUM + 7]) |
1007 | write_register (O0_REGNUM + 7, | |
8b0f5a9d DE |
1008 | read_memory_integer (fsr.regs[O0_REGNUM + 7], |
1009 | SPARC_INTREG_SIZE)); | |
ee7b9e92 | 1010 | |
6cb4e9e0 | 1011 | write_register (SP_REGNUM, frame->frame); |
84bdfea6 PS |
1012 | } |
1013 | else if (fsr.regs[I0_REGNUM]) | |
bd5635a1 | 1014 | { |
dd99f8e4 JK |
1015 | CORE_ADDR sp; |
1016 | ||
1017 | char reg_temp[REGISTER_BYTES]; | |
1018 | ||
8b0f5a9d | 1019 | read_memory (fsr.regs[I0_REGNUM], raw_buffer, 8 * SPARC_INTREG_SIZE); |
dd99f8e4 JK |
1020 | |
1021 | /* Get the ins and locals which we are about to restore. Just | |
1022 | moving the stack pointer is all that is really needed, except | |
1023 | store_inferior_registers is then going to write the ins and | |
1024 | locals from the registers array, so we need to muck with the | |
1025 | registers array. */ | |
1026 | sp = fsr.regs[SP_REGNUM]; | |
8b0f5a9d | 1027 | read_memory (sp, reg_temp, SPARC_INTREG_SIZE * 16); |
dd99f8e4 JK |
1028 | |
1029 | /* Restore the out registers. | |
1030 | Among other things this writes the new stack pointer. */ | |
1031 | write_register_bytes (REGISTER_BYTE (O0_REGNUM), raw_buffer, | |
8b0f5a9d | 1032 | SPARC_INTREG_SIZE * 8); |
dd99f8e4 JK |
1033 | |
1034 | write_register_bytes (REGISTER_BYTE (L0_REGNUM), reg_temp, | |
8b0f5a9d | 1035 | SPARC_INTREG_SIZE * 16); |
bd5635a1 | 1036 | } |
8b0f5a9d | 1037 | #ifndef GDB_TARGET_IS_SPARC64 |
bd5635a1 RP |
1038 | if (fsr.regs[PS_REGNUM]) |
1039 | write_register (PS_REGNUM, read_memory_integer (fsr.regs[PS_REGNUM], 4)); | |
8b0f5a9d | 1040 | #endif |
bd5635a1 | 1041 | if (fsr.regs[Y_REGNUM]) |
8b0f5a9d | 1042 | write_register (Y_REGNUM, read_memory_integer (fsr.regs[Y_REGNUM], REGISTER_RAW_SIZE (Y_REGNUM))); |
bd5635a1 RP |
1043 | if (fsr.regs[PC_REGNUM]) |
1044 | { | |
1045 | /* Explicitly specified PC (and maybe NPC) -- just restore them. */ | |
8b0f5a9d DE |
1046 | write_register (PC_REGNUM, read_memory_integer (fsr.regs[PC_REGNUM], |
1047 | REGISTER_RAW_SIZE (PC_REGNUM))); | |
bd5635a1 RP |
1048 | if (fsr.regs[NPC_REGNUM]) |
1049 | write_register (NPC_REGNUM, | |
8b0f5a9d DE |
1050 | read_memory_integer (fsr.regs[NPC_REGNUM], |
1051 | REGISTER_RAW_SIZE (NPC_REGNUM))); | |
bd5635a1 | 1052 | } |
ee7b9e92 | 1053 | else if (frame->flat) |
84bdfea6 | 1054 | { |
ee7b9e92 | 1055 | if (frame->pc_addr) |
8b0f5a9d DE |
1056 | pc = PC_ADJUST ((CORE_ADDR) |
1057 | read_memory_integer (frame->pc_addr, | |
1058 | REGISTER_RAW_SIZE (PC_REGNUM))); | |
ee7b9e92 JK |
1059 | else |
1060 | { | |
1061 | /* I think this happens only in the innermost frame, if so then | |
1062 | it is a complicated way of saying | |
1063 | "pc = read_register (O7_REGNUM);". */ | |
1064 | char buf[MAX_REGISTER_RAW_SIZE]; | |
1065 | get_saved_register (buf, 0, 0, frame, O7_REGNUM, 0); | |
1066 | pc = PC_ADJUST (extract_address | |
1067 | (buf, REGISTER_RAW_SIZE (O7_REGNUM))); | |
1068 | } | |
1069 | ||
84bdfea6 PS |
1070 | write_register (PC_REGNUM, pc); |
1071 | write_register (NPC_REGNUM, pc + 4); | |
1072 | } | |
bd5635a1 RP |
1073 | else if (fsr.regs[I7_REGNUM]) |
1074 | { | |
1075 | /* Return address in %i7 -- adjust it, then restore PC and NPC from it */ | |
8b0f5a9d DE |
1076 | pc = PC_ADJUST ((CORE_ADDR) read_memory_integer (fsr.regs[I7_REGNUM], |
1077 | SPARC_INTREG_SIZE)); | |
bd5635a1 RP |
1078 | write_register (PC_REGNUM, pc); |
1079 | write_register (NPC_REGNUM, pc + 4); | |
1080 | } | |
1081 | flush_cached_frames (); | |
bd5635a1 RP |
1082 | } |
1083 | ||
5e5215eb JG |
1084 | /* On the Sun 4 under SunOS, the compile will leave a fake insn which |
1085 | encodes the structure size being returned. If we detect such | |
1086 | a fake insn, step past it. */ | |
1087 | ||
1088 | CORE_ADDR | |
1089 | sparc_pc_adjust(pc) | |
1090 | CORE_ADDR pc; | |
1091 | { | |
34df79fc JK |
1092 | unsigned long insn; |
1093 | char buf[4]; | |
5e5215eb JG |
1094 | int err; |
1095 | ||
34df79fc JK |
1096 | err = target_read_memory (pc + 8, buf, sizeof(long)); |
1097 | insn = extract_unsigned_integer (buf, 4); | |
e4dbd248 | 1098 | if ((err == 0) && (insn & 0xffc00000) == 0) |
5e5215eb JG |
1099 | return pc+12; |
1100 | else | |
1101 | return pc+8; | |
1102 | } | |
84bdfea6 PS |
1103 | |
1104 | /* If pc is in a shared library trampoline, return its target. | |
1105 | The SunOs 4.x linker rewrites the jump table entries for PIC | |
1106 | compiled modules in the main executable to bypass the dynamic linker | |
1107 | with jumps of the form | |
1108 | sethi %hi(addr),%g1 | |
1109 | jmp %g1+%lo(addr) | |
1110 | and removes the corresponding jump table relocation entry in the | |
1111 | dynamic relocations. | |
1112 | find_solib_trampoline_target relies on the presence of the jump | |
1113 | table relocation entry, so we have to detect these jump instructions | |
1114 | by hand. */ | |
1115 | ||
1116 | CORE_ADDR | |
1117 | sunos4_skip_trampoline_code (pc) | |
1118 | CORE_ADDR pc; | |
1119 | { | |
1120 | unsigned long insn1; | |
1121 | char buf[4]; | |
1122 | int err; | |
1123 | ||
1124 | err = target_read_memory (pc, buf, 4); | |
1125 | insn1 = extract_unsigned_integer (buf, 4); | |
1126 | if (err == 0 && (insn1 & 0xffc00000) == 0x03000000) | |
1127 | { | |
1128 | unsigned long insn2; | |
1129 | ||
1130 | err = target_read_memory (pc + 4, buf, 4); | |
1131 | insn2 = extract_unsigned_integer (buf, 4); | |
1132 | if (err == 0 && (insn2 & 0xffffe000) == 0x81c06000) | |
1133 | { | |
1134 | CORE_ADDR target_pc = (insn1 & 0x3fffff) << 10; | |
1135 | int delta = insn2 & 0x1fff; | |
1136 | ||
1137 | /* Sign extend the displacement. */ | |
1138 | if (delta & 0x1000) | |
1139 | delta |= ~0x1fff; | |
1140 | return target_pc + delta; | |
1141 | } | |
1142 | } | |
1143 | return find_solib_trampoline_target (pc); | |
1144 | } | |
8f86a4e4 JG |
1145 | \f |
1146 | #ifdef USE_PROC_FS /* Target dependent support for /proc */ | |
1147 | ||
1148 | /* The /proc interface divides the target machine's register set up into | |
1149 | two different sets, the general register set (gregset) and the floating | |
1150 | point register set (fpregset). For each set, there is an ioctl to get | |
1151 | the current register set and another ioctl to set the current values. | |
1152 | ||
1153 | The actual structure passed through the ioctl interface is, of course, | |
1154 | naturally machine dependent, and is different for each set of registers. | |
1155 | For the sparc for example, the general register set is typically defined | |
1156 | by: | |
1157 | ||
1158 | typedef int gregset_t[38]; | |
1159 | ||
1160 | #define R_G0 0 | |
1161 | ... | |
1162 | #define R_TBR 37 | |
1163 | ||
1164 | and the floating point set by: | |
1165 | ||
1166 | typedef struct prfpregset { | |
1167 | union { | |
1168 | u_long pr_regs[32]; | |
1169 | double pr_dregs[16]; | |
1170 | } pr_fr; | |
1171 | void * pr_filler; | |
1172 | u_long pr_fsr; | |
1173 | u_char pr_qcnt; | |
1174 | u_char pr_q_entrysize; | |
1175 | u_char pr_en; | |
1176 | u_long pr_q[64]; | |
1177 | } prfpregset_t; | |
1178 | ||
1179 | These routines provide the packing and unpacking of gregset_t and | |
1180 | fpregset_t formatted data. | |
1181 | ||
1182 | */ | |
1183 | ||
8b0f5a9d DE |
1184 | /* Given a pointer to a general register set in /proc format (gregset_t *), |
1185 | unpack the register contents and supply them as gdb's idea of the current | |
1186 | register values. */ | |
8f86a4e4 JG |
1187 | |
1188 | void | |
1189 | supply_gregset (gregsetp) | |
1190 | prgregset_t *gregsetp; | |
1191 | { | |
b38f304c | 1192 | register int regi; |
8f86a4e4 | 1193 | register prgreg_t *regp = (prgreg_t *) gregsetp; |
e4dbd248 | 1194 | static char zerobuf[MAX_REGISTER_RAW_SIZE] = {0}; |
8f86a4e4 JG |
1195 | |
1196 | /* GDB register numbers for Gn, On, Ln, In all match /proc reg numbers. */ | |
b38f304c | 1197 | for (regi = G0_REGNUM ; regi <= I7_REGNUM ; regi++) |
8f86a4e4 | 1198 | { |
b38f304c | 1199 | supply_register (regi, (char *) (regp + regi)); |
8f86a4e4 JG |
1200 | } |
1201 | ||
1202 | /* These require a bit more care. */ | |
1203 | supply_register (PS_REGNUM, (char *) (regp + R_PS)); | |
1204 | supply_register (PC_REGNUM, (char *) (regp + R_PC)); | |
1205 | supply_register (NPC_REGNUM,(char *) (regp + R_nPC)); | |
1206 | supply_register (Y_REGNUM, (char *) (regp + R_Y)); | |
e4dbd248 PS |
1207 | |
1208 | /* Fill inaccessible registers with zero. */ | |
1209 | supply_register (WIM_REGNUM, zerobuf); | |
1210 | supply_register (TBR_REGNUM, zerobuf); | |
1211 | supply_register (CPS_REGNUM, zerobuf); | |
8f86a4e4 JG |
1212 | } |
1213 | ||
1214 | void | |
1215 | fill_gregset (gregsetp, regno) | |
1216 | prgregset_t *gregsetp; | |
1217 | int regno; | |
1218 | { | |
1219 | int regi; | |
1220 | register prgreg_t *regp = (prgreg_t *) gregsetp; | |
8f86a4e4 JG |
1221 | |
1222 | for (regi = 0 ; regi <= R_I7 ; regi++) | |
1223 | { | |
1224 | if ((regno == -1) || (regno == regi)) | |
1225 | { | |
b38f304c | 1226 | *(regp + regi) = *(int *) ®isters[REGISTER_BYTE (regi)]; |
8f86a4e4 JG |
1227 | } |
1228 | } | |
1229 | if ((regno == -1) || (regno == PS_REGNUM)) | |
1230 | { | |
1231 | *(regp + R_PS) = *(int *) ®isters[REGISTER_BYTE (PS_REGNUM)]; | |
1232 | } | |
1233 | if ((regno == -1) || (regno == PC_REGNUM)) | |
1234 | { | |
1235 | *(regp + R_PC) = *(int *) ®isters[REGISTER_BYTE (PC_REGNUM)]; | |
1236 | } | |
1237 | if ((regno == -1) || (regno == NPC_REGNUM)) | |
1238 | { | |
1239 | *(regp + R_nPC) = *(int *) ®isters[REGISTER_BYTE (NPC_REGNUM)]; | |
1240 | } | |
1241 | if ((regno == -1) || (regno == Y_REGNUM)) | |
1242 | { | |
1243 | *(regp + R_Y) = *(int *) ®isters[REGISTER_BYTE (Y_REGNUM)]; | |
1244 | } | |
1245 | } | |
1246 | ||
1247 | #if defined (FP0_REGNUM) | |
1248 | ||
1249 | /* Given a pointer to a floating point register set in /proc format | |
1250 | (fpregset_t *), unpack the register contents and supply them as gdb's | |
1251 | idea of the current floating point register values. */ | |
1252 | ||
1253 | void | |
1254 | supply_fpregset (fpregsetp) | |
1255 | prfpregset_t *fpregsetp; | |
1256 | { | |
1257 | register int regi; | |
1258 | char *from; | |
1259 | ||
012be3ce | 1260 | for (regi = FP0_REGNUM ; regi < FP_MAX_REGNUM ; regi++) |
8f86a4e4 JG |
1261 | { |
1262 | from = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; | |
1263 | supply_register (regi, from); | |
1264 | } | |
1265 | supply_register (FPS_REGNUM, (char *) &(fpregsetp->pr_fsr)); | |
1266 | } | |
1267 | ||
1268 | /* Given a pointer to a floating point register set in /proc format | |
1269 | (fpregset_t *), update the register specified by REGNO from gdb's idea | |
1270 | of the current floating point register set. If REGNO is -1, update | |
1271 | them all. */ | |
8b0f5a9d | 1272 | /* ??? This will probably need some changes for sparc64. */ |
8f86a4e4 JG |
1273 | |
1274 | void | |
1275 | fill_fpregset (fpregsetp, regno) | |
1276 | prfpregset_t *fpregsetp; | |
1277 | int regno; | |
1278 | { | |
1279 | int regi; | |
1280 | char *to; | |
1281 | char *from; | |
8f86a4e4 | 1282 | |
012be3ce | 1283 | for (regi = FP0_REGNUM ; regi < FP_MAX_REGNUM ; regi++) |
8f86a4e4 JG |
1284 | { |
1285 | if ((regno == -1) || (regno == regi)) | |
1286 | { | |
1287 | from = (char *) ®isters[REGISTER_BYTE (regi)]; | |
1288 | to = (char *) &fpregsetp->pr_fr.pr_regs[regi-FP0_REGNUM]; | |
b38f304c | 1289 | memcpy (to, from, REGISTER_RAW_SIZE (regi)); |
8f86a4e4 JG |
1290 | } |
1291 | } | |
1292 | if ((regno == -1) || (regno == FPS_REGNUM)) | |
1293 | { | |
1294 | fpregsetp->pr_fsr = *(int *) ®isters[REGISTER_BYTE (FPS_REGNUM)]; | |
1295 | } | |
1296 | } | |
1297 | ||
1298 | #endif /* defined (FP0_REGNUM) */ | |
1299 | ||
1300 | #endif /* USE_PROC_FS */ | |
1301 | ||
1302 | ||
1303 | #ifdef GET_LONGJMP_TARGET | |
f9e3b3cc JG |
1304 | |
1305 | /* Figure out where the longjmp will land. We expect that we have just entered | |
1306 | longjmp and haven't yet setup the stack frame, so the args are still in the | |
1307 | output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we | |
1308 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
1309 | This routine returns true on success */ | |
1310 | ||
1311 | int | |
84bdfea6 | 1312 | get_longjmp_target (pc) |
f9e3b3cc JG |
1313 | CORE_ADDR *pc; |
1314 | { | |
1315 | CORE_ADDR jb_addr; | |
34df79fc JK |
1316 | #define LONGJMP_TARGET_SIZE 4 |
1317 | char buf[LONGJMP_TARGET_SIZE]; | |
f9e3b3cc | 1318 | |
84bdfea6 | 1319 | jb_addr = read_register (O0_REGNUM); |
f9e3b3cc | 1320 | |
84bdfea6 PS |
1321 | if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf, |
1322 | LONGJMP_TARGET_SIZE)) | |
f9e3b3cc JG |
1323 | return 0; |
1324 | ||
34df79fc | 1325 | *pc = extract_address (buf, LONGJMP_TARGET_SIZE); |
f9e3b3cc JG |
1326 | |
1327 | return 1; | |
1328 | } | |
8f86a4e4 | 1329 | #endif /* GET_LONGJMP_TARGET */ |
8b0f5a9d DE |
1330 | \f |
1331 | #ifdef STATIC_TRANSFORM_NAME | |
1332 | /* SunPRO (3.0 at least), encodes the static variables. This is not | |
1333 | related to C++ mangling, it is done for C too. */ | |
1334 | ||
1335 | char * | |
b9e58503 | 1336 | sunpro_static_transform_name (name) |
8b0f5a9d DE |
1337 | char *name; |
1338 | { | |
1339 | char *p; | |
1340 | if (name[0] == '$') | |
1341 | { | |
1342 | /* For file-local statics there will be a dollar sign, a bunch | |
1343 | of junk (the contents of which match a string given in the | |
1344 | N_OPT), a period and the name. For function-local statics | |
1345 | there will be a bunch of junk (which seems to change the | |
1346 | second character from 'A' to 'B'), a period, the name of the | |
1347 | function, and the name. So just skip everything before the | |
1348 | last period. */ | |
1349 | p = strrchr (name, '.'); | |
1350 | if (p != NULL) | |
1351 | name = p + 1; | |
1352 | } | |
1353 | return name; | |
1354 | } | |
1355 | #endif /* STATIC_TRANSFORM_NAME */ | |
1356 | \f | |
1357 | #ifdef GDB_TARGET_IS_SPARC64 | |
1358 | ||
8b0f5a9d DE |
1359 | /* Utilities for printing registers. |
1360 | Page numbers refer to the SPARC Architecture Manual. */ | |
1361 | ||
b9e58503 PS |
1362 | static void dump_ccreg PARAMS ((char *, int)); |
1363 | ||
8b0f5a9d DE |
1364 | static void |
1365 | dump_ccreg (reg, val) | |
1366 | char *reg; | |
1367 | int val; | |
1368 | { | |
1369 | /* page 41 */ | |
1370 | printf_unfiltered ("%s:%s,%s,%s,%s", reg, | |
1371 | val & 8 ? "N" : "NN", | |
1372 | val & 4 ? "Z" : "NZ", | |
1373 | val & 2 ? "O" : "NO", | |
1374 | val & 1 ? "C" : "NC" | |
1375 | ); | |
1376 | } | |
1377 | ||
1378 | static char * | |
1379 | decode_asi (val) | |
1380 | int val; | |
1381 | { | |
1382 | /* page 72 */ | |
1383 | switch (val) | |
1384 | { | |
1385 | case 4 : return "ASI_NUCLEUS"; | |
1386 | case 0x0c : return "ASI_NUCLEUS_LITTLE"; | |
1387 | case 0x10 : return "ASI_AS_IF_USER_PRIMARY"; | |
1388 | case 0x11 : return "ASI_AS_IF_USER_SECONDARY"; | |
1389 | case 0x18 : return "ASI_AS_IF_USER_PRIMARY_LITTLE"; | |
1390 | case 0x19 : return "ASI_AS_IF_USER_SECONDARY_LITTLE"; | |
1391 | case 0x80 : return "ASI_PRIMARY"; | |
1392 | case 0x81 : return "ASI_SECONDARY"; | |
1393 | case 0x82 : return "ASI_PRIMARY_NOFAULT"; | |
1394 | case 0x83 : return "ASI_SECONDARY_NOFAULT"; | |
1395 | case 0x88 : return "ASI_PRIMARY_LITTLE"; | |
1396 | case 0x89 : return "ASI_SECONDARY_LITTLE"; | |
1397 | case 0x8a : return "ASI_PRIMARY_NOFAULT_LITTLE"; | |
1398 | case 0x8b : return "ASI_SECONDARY_NOFAULT_LITTLE"; | |
1399 | default : return NULL; | |
1400 | } | |
1401 | } | |
1402 | ||
1403 | /* PRINT_REGISTER_HOOK routine. | |
1404 | Pretty print various registers. */ | |
1405 | /* FIXME: Would be nice if this did some fancy things for 32 bit sparc. */ | |
1406 | ||
1407 | void | |
1408 | sparc_print_register_hook (regno) | |
1409 | int regno; | |
1410 | { | |
1411 | unsigned LONGEST val; | |
1412 | ||
012be3ce DP |
1413 | /* Handle double/quad versions of lower 32 fp regs. */ |
1414 | if (regno >= FP0_REGNUM && regno < FP0_REGNUM + 32 | |
1415 | && (regno & 1) == 0) | |
1416 | { | |
1417 | char value[16]; | |
1418 | ||
1419 | if (!read_relative_register_raw_bytes (regno, value) | |
1420 | && !read_relative_register_raw_bytes (regno + 1, value + 4)) | |
1421 | { | |
1422 | printf_unfiltered ("\t"); | |
1423 | print_floating (value, builtin_type_double, gdb_stdout); | |
1424 | } | |
1425 | #if 0 /* FIXME: gdb doesn't handle long doubles */ | |
1426 | if ((regno & 3) == 0) | |
1427 | { | |
1428 | if (!read_relative_register_raw_bytes (regno + 2, value + 8) | |
1429 | && !read_relative_register_raw_bytes (regno + 3, value + 12)) | |
1430 | { | |
1431 | printf_unfiltered ("\t"); | |
1432 | print_floating (value, builtin_type_long_double, gdb_stdout); | |
1433 | } | |
1434 | } | |
1435 | #endif | |
1436 | return; | |
1437 | } | |
1438 | ||
1439 | #if 0 /* FIXME: gdb doesn't handle long doubles */ | |
1440 | /* Print upper fp regs as long double if appropriate. */ | |
1441 | if (regno >= FP0_REGNUM + 32 && regno < FP_MAX_REGNUM | |
1442 | /* We test for even numbered regs and not a multiple of 4 because | |
1443 | the upper fp regs are recorded as doubles. */ | |
1444 | && (regno & 1) == 0) | |
8b0f5a9d | 1445 | { |
012be3ce DP |
1446 | char value[16]; |
1447 | ||
1448 | if (!read_relative_register_raw_bytes (regno, value) | |
1449 | && !read_relative_register_raw_bytes (regno + 1, value + 8)) | |
8b0f5a9d | 1450 | { |
012be3ce DP |
1451 | printf_unfiltered ("\t"); |
1452 | print_floating (value, builtin_type_long_double, gdb_stdout); | |
8b0f5a9d DE |
1453 | } |
1454 | return; | |
1455 | } | |
012be3ce | 1456 | #endif |
8b0f5a9d DE |
1457 | |
1458 | /* FIXME: Some of these are priviledged registers. | |
1459 | Not sure how they should be handled. */ | |
1460 | ||
1461 | #define BITS(n, mask) ((int) (((val) >> (n)) & (mask))) | |
1462 | ||
1463 | val = read_register (regno); | |
1464 | ||
1465 | /* pages 40 - 60 */ | |
1466 | switch (regno) | |
1467 | { | |
1468 | case CCR_REGNUM : | |
1469 | printf_unfiltered("\t"); | |
1470 | dump_ccreg ("xcc", val >> 4); | |
1471 | printf_unfiltered(", "); | |
1472 | dump_ccreg ("icc", val & 15); | |
1473 | break; | |
1474 | case FPRS_REGNUM : | |
1475 | printf ("\tfef:%d, du:%d, dl:%d", | |
1476 | BITS (2, 1), BITS (1, 1), BITS (0, 1)); | |
1477 | break; | |
1478 | case FSR_REGNUM : | |
1479 | { | |
1480 | static char *fcc[4] = { "=", "<", ">", "?" }; | |
1481 | static char *rd[4] = { "N", "0", "+", "-" }; | |
1482 | /* Long, yes, but I'd rather leave it as is and use a wide screen. */ | |
1483 | printf ("\t0:%s, 1:%s, 2:%s, 3:%s, rd:%s, tem:%d, ns:%d, ver:%d, ftt:%d, qne:%d, aexc:%d, cexc:%d", | |
1484 | fcc[BITS (10, 3)], fcc[BITS (32, 3)], | |
1485 | fcc[BITS (34, 3)], fcc[BITS (36, 3)], | |
1486 | rd[BITS (30, 3)], BITS (23, 31), BITS (22, 1), BITS (17, 7), | |
1487 | BITS (14, 7), BITS (13, 1), BITS (5, 31), BITS (0, 31)); | |
1488 | break; | |
1489 | } | |
1490 | case ASI_REGNUM : | |
1491 | { | |
1492 | char *asi = decode_asi (val); | |
1493 | if (asi != NULL) | |
1494 | printf ("\t%s", asi); | |
1495 | break; | |
1496 | } | |
1497 | case VER_REGNUM : | |
1498 | printf ("\tmanuf:%d, impl:%d, mask:%d, maxtl:%d, maxwin:%d", | |
1499 | BITS (48, 0xffff), BITS (32, 0xffff), | |
1500 | BITS (24, 0xff), BITS (8, 0xff), BITS (0, 31)); | |
1501 | break; | |
1502 | case PSTATE_REGNUM : | |
1503 | { | |
1504 | static char *mm[4] = { "tso", "pso", "rso", "?" }; | |
1505 | printf ("\tcle:%d, tle:%d, mm:%s, red:%d, pef:%d, am:%d, priv:%d, ie:%d, ag:%d", | |
1506 | BITS (9, 1), BITS (8, 1), mm[BITS (6, 3)], BITS (5, 1), | |
1507 | BITS (4, 1), BITS (3, 1), BITS (2, 1), BITS (1, 1), | |
1508 | BITS (0, 1)); | |
1509 | break; | |
1510 | } | |
1511 | case TSTATE_REGNUM : | |
1512 | /* FIXME: print all 4? */ | |
1513 | break; | |
1514 | case TT_REGNUM : | |
1515 | /* FIXME: print all 4? */ | |
1516 | break; | |
1517 | case TPC_REGNUM : | |
1518 | /* FIXME: print all 4? */ | |
1519 | break; | |
1520 | case TNPC_REGNUM : | |
1521 | /* FIXME: print all 4? */ | |
1522 | break; | |
1523 | case WSTATE_REGNUM : | |
1524 | printf ("\tother:%d, normal:%d", BITS (3, 7), BITS (0, 7)); | |
1525 | break; | |
1526 | case CWP_REGNUM : | |
1527 | printf ("\t%d", BITS (0, 31)); | |
1528 | break; | |
1529 | case CANSAVE_REGNUM : | |
1530 | printf ("\t%-2d before spill", BITS (0, 31)); | |
1531 | break; | |
1532 | case CANRESTORE_REGNUM : | |
1533 | printf ("\t%-2d before fill", BITS (0, 31)); | |
1534 | break; | |
1535 | case CLEANWIN_REGNUM : | |
1536 | printf ("\t%-2d before clean", BITS (0, 31)); | |
1537 | break; | |
1538 | case OTHERWIN_REGNUM : | |
1539 | printf ("\t%d", BITS (0, 31)); | |
1540 | break; | |
1541 | } | |
1542 | ||
1543 | #undef BITS | |
1544 | } | |
1545 | ||
1546 | #endif | |
1547 | \f | |
1548 | void | |
1549 | _initialize_sparc_tdep () | |
1550 | { | |
1551 | tm_print_insn = print_insn_sparc; | |
1552 | } |