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386c036b | 1 | /* Target-dependent code for SPARC. |
c139e7d9 | 2 | |
61baf725 | 3 | Copyright (C) 2003-2017 Free Software Foundation, Inc. |
c139e7d9 DJ |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
c139e7d9 DJ |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c139e7d9 | 19 | |
386c036b MK |
20 | #ifndef SPARC_TDEP_H |
21 | #define SPARC_TDEP_H 1 | |
22 | ||
7a36499a IR |
23 | #define SPARC_CORE_REGISTERS \ |
24 | "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ | |
25 | "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \ | |
26 | "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ | |
27 | "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7" | |
28 | ||
566626fa | 29 | struct frame_info; |
386c036b MK |
30 | struct gdbarch; |
31 | struct regcache; | |
a54124c5 | 32 | struct regset; |
386c036b MK |
33 | struct trad_frame_saved_reg; |
34 | ||
35 | /* Register offsets for the general-purpose register set. */ | |
36 | ||
b4fd25c9 | 37 | struct sparc_gregmap |
386c036b MK |
38 | { |
39 | int r_psr_offset; | |
40 | int r_pc_offset; | |
41 | int r_npc_offset; | |
42 | int r_y_offset; | |
43 | int r_wim_offset; | |
44 | int r_tbr_offset; | |
45 | int r_g1_offset; | |
46 | int r_l0_offset; | |
47 | int r_y_size; | |
48 | }; | |
49 | ||
b4fd25c9 | 50 | struct sparc_fpregmap |
db75c717 DM |
51 | { |
52 | int r_f0_offset; | |
53 | int r_fsr_offset; | |
54 | }; | |
55 | ||
386c036b MK |
56 | /* SPARC architecture-specific information. */ |
57 | ||
58 | struct gdbarch_tdep | |
59 | { | |
60 | /* Register numbers for the PN and nPC registers. The definitions | |
61 | for (64-bit) UltraSPARC differ from the (32-bit) SPARC | |
62 | definitions. */ | |
63 | int pc_regnum; | |
64 | int npc_regnum; | |
65 | ||
3f7b46f2 IR |
66 | /* Register names specific for architecture (sparc32 vs. sparc64) */ |
67 | const char **fpu_register_names; | |
68 | size_t fpu_registers_num; | |
69 | const char **cp0_register_names; | |
70 | size_t cp0_registers_num; | |
71 | ||
a54124c5 | 72 | /* Register sets. */ |
b13feb94 | 73 | const struct regset *gregset; |
a54124c5 | 74 | size_t sizeof_gregset; |
b13feb94 | 75 | const struct regset *fpregset; |
a54124c5 MK |
76 | size_t sizeof_fpregset; |
77 | ||
386c036b MK |
78 | /* Offset of saved PC in jmp_buf. */ |
79 | int jb_pc_offset; | |
80 | ||
81 | /* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't | |
82 | treat the PLT special when doing prologue analysis. */ | |
83 | size_t plt_entry_size; | |
c893be75 MK |
84 | |
85 | /* Alternative location for trap return. Used for single-stepping. */ | |
0b1b3e42 | 86 | CORE_ADDR (*step_trap) (struct frame_info *frame, unsigned long insn); |
209bd28e UW |
87 | |
88 | /* ISA-specific data types. */ | |
89 | struct type *sparc_psr_type; | |
90 | struct type *sparc_fsr_type; | |
91 | struct type *sparc64_pstate_type; | |
92 | struct type *sparc64_fsr_type; | |
93 | struct type *sparc64_fprs_type; | |
386c036b MK |
94 | }; |
95 | ||
96 | /* Register numbers of various important registers. */ | |
97 | ||
98 | enum sparc_regnum | |
99 | { | |
7a36499a | 100 | SPARC_G0_REGNUM = 0, /* %g0 */ |
386c036b MK |
101 | SPARC_G1_REGNUM, |
102 | SPARC_G2_REGNUM, | |
103 | SPARC_G3_REGNUM, | |
104 | SPARC_G4_REGNUM, | |
105 | SPARC_G5_REGNUM, | |
106 | SPARC_G6_REGNUM, | |
107 | SPARC_G7_REGNUM, /* %g7 */ | |
108 | SPARC_O0_REGNUM, /* %o0 */ | |
109 | SPARC_O1_REGNUM, | |
110 | SPARC_O2_REGNUM, | |
111 | SPARC_O3_REGNUM, | |
112 | SPARC_O4_REGNUM, | |
113 | SPARC_O5_REGNUM, | |
114 | SPARC_SP_REGNUM, /* %sp (%o6) */ | |
115 | SPARC_O7_REGNUM, /* %o7 */ | |
116 | SPARC_L0_REGNUM, /* %l0 */ | |
117 | SPARC_L1_REGNUM, | |
118 | SPARC_L2_REGNUM, | |
119 | SPARC_L3_REGNUM, | |
120 | SPARC_L4_REGNUM, | |
121 | SPARC_L5_REGNUM, | |
122 | SPARC_L6_REGNUM, | |
123 | SPARC_L7_REGNUM, /* %l7 */ | |
124 | SPARC_I0_REGNUM, /* %i0 */ | |
125 | SPARC_I1_REGNUM, | |
126 | SPARC_I2_REGNUM, | |
127 | SPARC_I3_REGNUM, | |
128 | SPARC_I4_REGNUM, | |
129 | SPARC_I5_REGNUM, | |
130 | SPARC_FP_REGNUM, /* %fp (%i6) */ | |
131 | SPARC_I7_REGNUM, /* %i7 */ | |
132 | SPARC_F0_REGNUM, /* %f0 */ | |
133 | SPARC_F1_REGNUM, | |
fe10a582 DM |
134 | SPARC_F2_REGNUM, |
135 | SPARC_F3_REGNUM, | |
136 | SPARC_F4_REGNUM, | |
137 | SPARC_F5_REGNUM, | |
138 | SPARC_F6_REGNUM, | |
139 | SPARC_F7_REGNUM, | |
386c036b MK |
140 | SPARC_F31_REGNUM /* %f31 */ |
141 | = SPARC_F0_REGNUM + 31 | |
142 | }; | |
143 | ||
144 | enum sparc32_regnum | |
145 | { | |
146 | SPARC32_Y_REGNUM /* %y */ | |
147 | = SPARC_F31_REGNUM + 1, | |
148 | SPARC32_PSR_REGNUM, /* %psr */ | |
149 | SPARC32_WIM_REGNUM, /* %wim */ | |
150 | SPARC32_TBR_REGNUM, /* %tbr */ | |
151 | SPARC32_PC_REGNUM, /* %pc */ | |
152 | SPARC32_NPC_REGNUM, /* %npc */ | |
153 | SPARC32_FSR_REGNUM, /* %fsr */ | |
154 | SPARC32_CSR_REGNUM, /* %csr */ | |
7a36499a | 155 | }; |
386c036b | 156 | |
7a36499a IR |
157 | /* Pseudo registers. */ |
158 | enum sparc32_pseudo_regnum | |
159 | { | |
160 | SPARC32_D0_REGNUM = 0, /* %d0 */ | |
386c036b MK |
161 | SPARC32_D30_REGNUM /* %d30 */ |
162 | = SPARC32_D0_REGNUM + 15 | |
163 | }; | |
164 | \f | |
165 | ||
166 | struct sparc_frame_cache | |
167 | { | |
168 | /* Base address. */ | |
169 | CORE_ADDR base; | |
170 | CORE_ADDR pc; | |
171 | ||
172 | /* Do we have a frame? */ | |
173 | int frameless_p; | |
174 | ||
369c397b JB |
175 | /* The offset from the base register to the CFA. */ |
176 | int frame_offset; | |
177 | ||
178 | /* Mask of `local' and `in' registers saved in the register save area. */ | |
179 | unsigned short int saved_regs_mask; | |
180 | ||
181 | /* Mask of `out' registers copied or renamed to their `in' sibling. */ | |
182 | unsigned char copied_regs_mask; | |
183 | ||
c378eb4e | 184 | /* Do we have a Structure, Union or Quad-Precision return value? */ |
386c036b MK |
185 | int struct_return_p; |
186 | ||
187 | /* Table of saved registers. */ | |
188 | struct trad_frame_saved_reg *saved_regs; | |
189 | }; | |
190 | ||
191 | /* Fetch the instruction at PC. */ | |
192 | extern unsigned long sparc_fetch_instruction (CORE_ADDR pc); | |
193 | ||
1c800673 | 194 | /* Fetch StackGhost Per-Process XOR cookie. */ |
e17a4113 | 195 | extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch); |
1c800673 | 196 | |
369c397b JB |
197 | /* Record the effect of a SAVE instruction on CACHE. */ |
198 | extern void sparc_record_save_insn (struct sparc_frame_cache *cache); | |
199 | ||
200 | /* Do a full analysis of the prologue at PC and update CACHE accordingly. */ | |
be8626e0 MD |
201 | extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch, |
202 | CORE_ADDR pc, CORE_ADDR current_pc, | |
386c036b MK |
203 | struct sparc_frame_cache *cache); |
204 | ||
205 | extern struct sparc_frame_cache * | |
236369e7 | 206 | sparc_frame_cache (struct frame_info *this_frame, void **this_cache); |
386c036b MK |
207 | |
208 | extern struct sparc_frame_cache * | |
236369e7 | 209 | sparc32_frame_cache (struct frame_info *this_frame, void **this_cache); |
386c036b | 210 | |
961842b2 | 211 | extern int |
c9cf6e20 | 212 | sparc_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc); |
961842b2 | 213 | |
386c036b MK |
214 | \f |
215 | ||
386c036b MK |
216 | extern void sparc_supply_rwindow (struct regcache *regcache, |
217 | CORE_ADDR sp, int regnum); | |
218 | extern void sparc_collect_rwindow (const struct regcache *regcache, | |
219 | CORE_ADDR sp, int regnum); | |
220 | ||
221 | /* Register offsets for SunOS 4. */ | |
b4fd25c9 AA |
222 | extern const struct sparc_gregmap sparc32_sunos4_gregmap; |
223 | extern const struct sparc_fpregmap sparc32_sunos4_fpregmap; | |
224 | extern const struct sparc_fpregmap sparc32_bsd_fpregmap; | |
386c036b | 225 | |
b4fd25c9 | 226 | extern void sparc32_supply_gregset (const struct sparc_gregmap *gregmap, |
386c036b MK |
227 | struct regcache *regcache, |
228 | int regnum, const void *gregs); | |
b4fd25c9 | 229 | extern void sparc32_collect_gregset (const struct sparc_gregmap *gregmap, |
386c036b MK |
230 | const struct regcache *regcache, |
231 | int regnum, void *gregs); | |
b4fd25c9 | 232 | extern void sparc32_supply_fpregset (const struct sparc_fpregmap *fpregmap, |
db75c717 | 233 | struct regcache *regcache, |
386c036b | 234 | int regnum, const void *fpregs); |
b4fd25c9 | 235 | extern void sparc32_collect_fpregset (const struct sparc_fpregmap *fpregmap, |
db75c717 | 236 | const struct regcache *regcache, |
386c036b | 237 | int regnum, void *fpregs); |
d0b5971a JM |
238 | |
239 | extern int sparc_is_annulled_branch_insn (CORE_ADDR pc); | |
386c036b MK |
240 | |
241 | /* Functions and variables exported from sparc-sol2-tdep.c. */ | |
242 | ||
243 | /* Register offsets for Solaris 2. */ | |
b4fd25c9 AA |
244 | extern const struct sparc_gregmap sparc32_sol2_gregmap; |
245 | extern const struct sparc_fpregmap sparc32_sol2_fpregmap; | |
386c036b | 246 | |
2c02bd72 | 247 | extern int sparc_sol2_pc_in_sigtramp (CORE_ADDR pc, const char *name); |
386c036b | 248 | |
0d5cff50 | 249 | extern const char *sparc_sol2_static_transform_name (const char *name); |
149ad273 | 250 | |
386c036b MK |
251 | extern void sparc32_sol2_init_abi (struct gdbarch_info info, |
252 | struct gdbarch *gdbarch); | |
253 | ||
254 | /* Functions and variables exported from sparcnbsd-tdep.c. */ | |
255 | ||
256 | /* Register offsets for NetBSD. */ | |
b4fd25c9 | 257 | extern const struct sparc_gregmap sparc32nbsd_gregmap; |
386c036b | 258 | |
c893be75 MK |
259 | /* Return the address of a system call's alternative return |
260 | address. */ | |
0b1b3e42 UW |
261 | extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame, |
262 | unsigned long insn); | |
c893be75 | 263 | |
1736a7bd PA |
264 | extern void sparc32nbsd_init_abi (struct gdbarch_info info, |
265 | struct gdbarch *gdbarch); | |
19671c2b | 266 | |
566626fa MK |
267 | extern struct trad_frame_saved_reg * |
268 | sparc32nbsd_sigcontext_saved_regs (struct frame_info *next_frame); | |
269 | ||
386c036b | 270 | #endif /* sparc-tdep.h */ |