[deliverable/binutils-gdb.git] / gdb / sparc-tdep.h

/* Target-dependent code for SPARC.

   Copyright (C) 2003-2017 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 3 of the License, or
   (at your option) any later version.

   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License
   along with this program.  If not, see <http://www.gnu.org/licenses/>.  */

#ifndef SPARC_TDEP_H
#define SPARC_TDEP_H 1

#define SPARC_CORE_REGISTERS                      \
  "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
  "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
  "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7"

struct frame_info;
struct gdbarch;
struct regcache;
struct regset;
struct trad_frame_saved_reg;

/* Register offsets for the general-purpose register set.  */

struct sparc_gregmap
{
  int r_psr_offset;
  int r_pc_offset;
  int r_npc_offset;
  int r_y_offset;
  int r_wim_offset;
  int r_tbr_offset;
  int r_g1_offset;
  int r_l0_offset;
  int r_y_size;
};

struct sparc_fpregmap
{
  int r_f0_offset;
  int r_fsr_offset;
};

/* SPARC architecture-specific information.  */

struct gdbarch_tdep
{
  /* Register numbers for the PN and nPC registers.  The definitions
     for (64-bit) UltraSPARC differ from the (32-bit) SPARC
     definitions.  */
  int pc_regnum;
  int npc_regnum;

  /* Register sets.  */
  const struct regset *gregset;
  size_t sizeof_gregset;
  const struct regset *fpregset;
  size_t sizeof_fpregset;

  /* Offset of saved PC in jmp_buf.  */
  int jb_pc_offset;

  /* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
     treat the PLT special when doing prologue analysis.  */
  size_t plt_entry_size;

  /* Alternative location for trap return.  Used for single-stepping.  */
  CORE_ADDR (*step_trap) (struct frame_info *frame, unsigned long insn);

  /* ISA-specific data types.  */
  struct type *sparc_psr_type;
  struct type *sparc_fsr_type;
  struct type *sparc64_pstate_type;
  struct type *sparc64_fsr_type;
  struct type *sparc64_fprs_type;
};

/* Register numbers of various important registers.  */

enum sparc_regnum
{
  SPARC_G0_REGNUM = 0,		/* %g0 */
  SPARC_G1_REGNUM,
  SPARC_G2_REGNUM,
  SPARC_G3_REGNUM,
  SPARC_G4_REGNUM,
  SPARC_G5_REGNUM,
  SPARC_G6_REGNUM,
  SPARC_G7_REGNUM,		/* %g7 */
  SPARC_O0_REGNUM,		/* %o0 */
  SPARC_O1_REGNUM,
  SPARC_O2_REGNUM,
  SPARC_O3_REGNUM,
  SPARC_O4_REGNUM,
  SPARC_O5_REGNUM,
  SPARC_SP_REGNUM,		/* %sp (%o6) */
  SPARC_O7_REGNUM,		/* %o7 */
  SPARC_L0_REGNUM,		/* %l0 */
  SPARC_L1_REGNUM,
  SPARC_L2_REGNUM,
  SPARC_L3_REGNUM,
  SPARC_L4_REGNUM,
  SPARC_L5_REGNUM,
  SPARC_L6_REGNUM,
  SPARC_L7_REGNUM,		/* %l7 */
  SPARC_I0_REGNUM,		/* %i0 */
  SPARC_I1_REGNUM,
  SPARC_I2_REGNUM,
  SPARC_I3_REGNUM,
  SPARC_I4_REGNUM,
  SPARC_I5_REGNUM,
  SPARC_FP_REGNUM,		/* %fp (%i6) */
  SPARC_I7_REGNUM,		/* %i7 */
  SPARC_F0_REGNUM,		/* %f0 */
  SPARC_F1_REGNUM,
  SPARC_F2_REGNUM,
  SPARC_F3_REGNUM,
  SPARC_F4_REGNUM,
  SPARC_F5_REGNUM,
  SPARC_F6_REGNUM,
  SPARC_F7_REGNUM,
  SPARC_F31_REGNUM		/* %f31 */
  = SPARC_F0_REGNUM + 31
};

enum sparc32_regnum
{
  SPARC32_Y_REGNUM		/* %y */
  = SPARC_F31_REGNUM + 1,
  SPARC32_PSR_REGNUM,		/* %psr */
  SPARC32_WIM_REGNUM,		/* %wim */
  SPARC32_TBR_REGNUM,		/* %tbr */
  SPARC32_PC_REGNUM,		/* %pc */
  SPARC32_NPC_REGNUM,		/* %npc */
  SPARC32_FSR_REGNUM,		/* %fsr */
  SPARC32_CSR_REGNUM,		/* %csr */
};

/* Pseudo registers.  */
enum sparc32_pseudo_regnum
{
  SPARC32_D0_REGNUM = 0,	/* %d0 */
  SPARC32_D30_REGNUM		/* %d30 */
  = SPARC32_D0_REGNUM + 15
};
\f

struct sparc_frame_cache
{
  /* Base address.  */
  CORE_ADDR base;
  CORE_ADDR pc;

  /* Do we have a frame?  */
  int frameless_p;

  /* The offset from the base register to the CFA.  */
  int frame_offset;

  /* Mask of `local' and `in' registers saved in the register save area.  */
  unsigned short int saved_regs_mask;

  /* Mask of `out' registers copied or renamed to their `in' sibling.  */
  unsigned char copied_regs_mask;

  /* Do we have a Structure, Union or Quad-Precision return value?  */
  int struct_return_p;

  /* Table of saved registers.  */
  struct trad_frame_saved_reg *saved_regs;
};

/* Fetch the instruction at PC.  */
extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);

/* Fetch StackGhost Per-Process XOR cookie.  */
extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch);

/* Record the effect of a SAVE instruction on CACHE.  */
extern void sparc_record_save_insn (struct sparc_frame_cache *cache);

/* Do a full analysis of the prologue at PC and update CACHE accordingly.  */
extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch,
					 CORE_ADDR pc, CORE_ADDR current_pc,
					 struct sparc_frame_cache *cache);

extern struct sparc_frame_cache *
  sparc_frame_cache (struct frame_info *this_frame, void **this_cache);

extern struct sparc_frame_cache *
  sparc32_frame_cache (struct frame_info *this_frame, void **this_cache);

extern int
  sparc_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc);

\f

extern void sparc_supply_rwindow (struct regcache *regcache,
				  CORE_ADDR sp, int regnum);
extern void sparc_collect_rwindow (const struct regcache *regcache,
				   CORE_ADDR sp, int regnum);

/* Register offsets for SunOS 4.  */
extern const struct sparc_gregmap sparc32_sunos4_gregmap;
extern const struct sparc_fpregmap sparc32_sunos4_fpregmap;
extern const struct sparc_fpregmap sparc32_bsd_fpregmap;

extern void sparc32_supply_gregset (const struct sparc_gregmap *gregmap,
				    struct regcache *regcache,
				    int regnum, const void *gregs);
extern void sparc32_collect_gregset (const struct sparc_gregmap *gregmap,
				     const struct regcache *regcache,
				     int regnum, void *gregs);
extern void sparc32_supply_fpregset (const struct sparc_fpregmap *fpregmap,
				     struct regcache *regcache,
				     int regnum, const void *fpregs);
extern void sparc32_collect_fpregset (const struct sparc_fpregmap *fpregmap,
				      const struct regcache *regcache,
				      int regnum, void *fpregs);

extern int sparc_is_annulled_branch_insn (CORE_ADDR pc);

/* Functions and variables exported from sparc-sol2-tdep.c.  */

/* Register offsets for Solaris 2.  */
extern const struct sparc_gregmap sparc32_sol2_gregmap;
extern const struct sparc_fpregmap sparc32_sol2_fpregmap;

extern int sparc_sol2_pc_in_sigtramp (CORE_ADDR pc, const char *name);

extern const char *sparc_sol2_static_transform_name (const char *name);

extern void sparc32_sol2_init_abi (struct gdbarch_info info,
				   struct gdbarch *gdbarch);

/* Functions and variables exported from sparcnbsd-tdep.c.  */

/* Register offsets for NetBSD.  */
extern const struct sparc_gregmap sparc32nbsd_gregmap;

/* Return the address of a system call's alternative return
   address.  */
extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
				      unsigned long insn);

extern void sparc32nbsd_init_abi (struct gdbarch_info info,
				  struct gdbarch *gdbarch);

extern struct trad_frame_saved_reg *
  sparc32nbsd_sigcontext_saved_regs (struct frame_info *next_frame);

#endif /* sparc-tdep.h */
Commit	Line	Data
386c036b	1	/* Target-dependent code for SPARC.
c139e7d9	2
61baf725	3	Copyright (C) 2003-2017 Free Software Foundation, Inc.
c139e7d9 DJ	4
	5	This file is part of GDB.
	6
	7	This program is free software; you can redistribute it and/or modify
	8	it under the terms of the GNU General Public License as published by
a9762ec7	9	the Free Software Foundation; either version 3 of the License, or
c139e7d9 DJ	10	(at your option) any later version.
	11
	12	This program is distributed in the hope that it will be useful,
	13	but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	GNU General Public License for more details.
	16
	17	You should have received a copy of the GNU General Public License
a9762ec7	18	along with this program. If not, see <http://www.gnu.org/licenses/>. */
c139e7d9	19
386c036b MK	20	#ifndef SPARC_TDEP_H
	21	#define SPARC_TDEP_H 1
	22
7a36499a IR	23	#define SPARC_CORE_REGISTERS \
	24	"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
	25	"o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
	26	"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
	27	"i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7"
	28
566626fa	29	struct frame_info;
386c036b MK	30	struct gdbarch;
386c036b MK	31	struct regcache;
a54124c5	32	struct regset;
386c036b MK	33	struct trad_frame_saved_reg;
	34
	35	/* Register offsets for the general-purpose register set. */
	36
b4fd25c9	37	struct sparc_gregmap
386c036b MK	38	{
	39	int r_psr_offset;
	40	int r_pc_offset;
	41	int r_npc_offset;
	42	int r_y_offset;
	43	int r_wim_offset;
	44	int r_tbr_offset;
	45	int r_g1_offset;
	46	int r_l0_offset;
	47	int r_y_size;
	48	};
	49
b4fd25c9	50	struct sparc_fpregmap
db75c717 DM	51	{
	52	int r_f0_offset;
	53	int r_fsr_offset;
	54	};
	55
386c036b MK	56	/* SPARC architecture-specific information. */
	57
	58	struct gdbarch_tdep
	59	{
	60	/* Register numbers for the PN and nPC registers. The definitions
	61	for (64-bit) UltraSPARC differ from the (32-bit) SPARC
	62	definitions. */
	63	int pc_regnum;
	64	int npc_regnum;
	65
a54124c5	66	/* Register sets. */
b13feb94	67	const struct regset *gregset;
a54124c5	68	size_t sizeof_gregset;
b13feb94	69	const struct regset *fpregset;
a54124c5 MK	70	size_t sizeof_fpregset;
a54124c5 MK	71
386c036b MK	72	/* Offset of saved PC in jmp_buf. */
	73	int jb_pc_offset;
	74
	75	/* Size of an Procedure Linkage Table (PLT) entry, 0 if we shouldn't
	76	treat the PLT special when doing prologue analysis. */
	77	size_t plt_entry_size;
c893be75 MK	78
c893be75 MK	79	/* Alternative location for trap return. Used for single-stepping. */
0b1b3e42	80	CORE_ADDR (step_trap) (struct frame_info frame, unsigned long insn);
209bd28e UW	81
	82	/* ISA-specific data types. */
	83	struct type *sparc_psr_type;
	84	struct type *sparc_fsr_type;
	85	struct type *sparc64_pstate_type;
	86	struct type *sparc64_fsr_type;
	87	struct type *sparc64_fprs_type;
386c036b MK	88	};
	89
	90	/* Register numbers of various important registers. */
	91
	92	enum sparc_regnum
	93	{
7a36499a	94	SPARC_G0_REGNUM = 0, /* %g0 */
386c036b MK	95	SPARC_G1_REGNUM,
	96	SPARC_G2_REGNUM,
	97	SPARC_G3_REGNUM,
	98	SPARC_G4_REGNUM,
	99	SPARC_G5_REGNUM,
	100	SPARC_G6_REGNUM,
	101	SPARC_G7_REGNUM, /* %g7 */
	102	SPARC_O0_REGNUM, /* %o0 */
	103	SPARC_O1_REGNUM,
	104	SPARC_O2_REGNUM,
	105	SPARC_O3_REGNUM,
	106	SPARC_O4_REGNUM,
	107	SPARC_O5_REGNUM,
	108	SPARC_SP_REGNUM, /* %sp (%o6) */
	109	SPARC_O7_REGNUM, /* %o7 */
	110	SPARC_L0_REGNUM, /* %l0 */
	111	SPARC_L1_REGNUM,
	112	SPARC_L2_REGNUM,
	113	SPARC_L3_REGNUM,
	114	SPARC_L4_REGNUM,
	115	SPARC_L5_REGNUM,
	116	SPARC_L6_REGNUM,
	117	SPARC_L7_REGNUM, /* %l7 */
	118	SPARC_I0_REGNUM, /* %i0 */
	119	SPARC_I1_REGNUM,
	120	SPARC_I2_REGNUM,
	121	SPARC_I3_REGNUM,
	122	SPARC_I4_REGNUM,
	123	SPARC_I5_REGNUM,
	124	SPARC_FP_REGNUM, /* %fp (%i6) */
	125	SPARC_I7_REGNUM, /* %i7 */
	126	SPARC_F0_REGNUM, /* %f0 */
	127	SPARC_F1_REGNUM,
fe10a582 DM	128	SPARC_F2_REGNUM,
	129	SPARC_F3_REGNUM,
	130	SPARC_F4_REGNUM,
	131	SPARC_F5_REGNUM,
	132	SPARC_F6_REGNUM,
	133	SPARC_F7_REGNUM,
386c036b MK	134	SPARC_F31_REGNUM /* %f31 */
	135	= SPARC_F0_REGNUM + 31
	136	};
	137
	138	enum sparc32_regnum
	139	{
	140	SPARC32_Y_REGNUM /* %y */
	141	= SPARC_F31_REGNUM + 1,
	142	SPARC32_PSR_REGNUM, /* %psr */
	143	SPARC32_WIM_REGNUM, /* %wim */
	144	SPARC32_TBR_REGNUM, /* %tbr */
	145	SPARC32_PC_REGNUM, /* %pc */
	146	SPARC32_NPC_REGNUM, /* %npc */
	147	SPARC32_FSR_REGNUM, /* %fsr */
	148	SPARC32_CSR_REGNUM, /* %csr */
7a36499a	149	};
386c036b	150
7a36499a IR	151	/* Pseudo registers. */
	152	enum sparc32_pseudo_regnum
	153	{
	154	SPARC32_D0_REGNUM = 0, /* %d0 */
386c036b MK	155	SPARC32_D30_REGNUM /* %d30 */
	156	= SPARC32_D0_REGNUM + 15
	157	};
	158	\f
	159
	160	struct sparc_frame_cache
	161	{
	162	/* Base address. */
	163	CORE_ADDR base;
	164	CORE_ADDR pc;
	165
	166	/* Do we have a frame? */
	167	int frameless_p;
	168
369c397b JB	169	/* The offset from the base register to the CFA. */
	170	int frame_offset;
	171
	172	/* Mask of `local' and `in' registers saved in the register save area. */
	173	unsigned short int saved_regs_mask;
	174
	175	/* Mask of `out' registers copied or renamed to their `in' sibling. */
	176	unsigned char copied_regs_mask;
	177
c378eb4e	178	/* Do we have a Structure, Union or Quad-Precision return value? */
386c036b MK	179	int struct_return_p;
	180
	181	/* Table of saved registers. */
	182	struct trad_frame_saved_reg *saved_regs;
	183	};
	184
	185	/* Fetch the instruction at PC. */
	186	extern unsigned long sparc_fetch_instruction (CORE_ADDR pc);
	187
1c800673	188	/* Fetch StackGhost Per-Process XOR cookie. */
e17a4113	189	extern ULONGEST sparc_fetch_wcookie (struct gdbarch *gdbarch);
1c800673	190
369c397b JB	191	/* Record the effect of a SAVE instruction on CACHE. */
	192	extern void sparc_record_save_insn (struct sparc_frame_cache *cache);
	193
	194	/* Do a full analysis of the prologue at PC and update CACHE accordingly. */
be8626e0 MD	195	extern CORE_ADDR sparc_analyze_prologue (struct gdbarch *gdbarch,
be8626e0 MD	196	CORE_ADDR pc, CORE_ADDR current_pc,
386c036b MK	197	struct sparc_frame_cache *cache);
	198
	199	extern struct sparc_frame_cache *
236369e7	200	sparc_frame_cache (struct frame_info this_frame, void *this_cache);
386c036b MK	201
386c036b MK	202	extern struct sparc_frame_cache *
236369e7	203	sparc32_frame_cache (struct frame_info this_frame, void *this_cache);
386c036b	204
961842b2	205	extern int
c9cf6e20	206	sparc_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc);
961842b2	207
386c036b MK	208	\f
386c036b MK	209
386c036b MK	210	extern void sparc_supply_rwindow (struct regcache *regcache,
	211	CORE_ADDR sp, int regnum);
	212	extern void sparc_collect_rwindow (const struct regcache *regcache,
	213	CORE_ADDR sp, int regnum);
	214
	215	/* Register offsets for SunOS 4. */
b4fd25c9 AA	216	extern const struct sparc_gregmap sparc32_sunos4_gregmap;
	217	extern const struct sparc_fpregmap sparc32_sunos4_fpregmap;
	218	extern const struct sparc_fpregmap sparc32_bsd_fpregmap;
386c036b	219
b4fd25c9	220	extern void sparc32_supply_gregset (const struct sparc_gregmap *gregmap,
386c036b MK	221	struct regcache *regcache,
386c036b MK	222	int regnum, const void *gregs);
b4fd25c9	223	extern void sparc32_collect_gregset (const struct sparc_gregmap *gregmap,
386c036b MK	224	const struct regcache *regcache,
386c036b MK	225	int regnum, void *gregs);
b4fd25c9	226	extern void sparc32_supply_fpregset (const struct sparc_fpregmap *fpregmap,
db75c717	227	struct regcache *regcache,
386c036b	228	int regnum, const void *fpregs);
b4fd25c9	229	extern void sparc32_collect_fpregset (const struct sparc_fpregmap *fpregmap,
db75c717	230	const struct regcache *regcache,
386c036b	231	int regnum, void *fpregs);
d0b5971a JM	232
d0b5971a JM	233	extern int sparc_is_annulled_branch_insn (CORE_ADDR pc);
386c036b MK	234
	235	/* Functions and variables exported from sparc-sol2-tdep.c. */
	236
	237	/* Register offsets for Solaris 2. */
b4fd25c9 AA	238	extern const struct sparc_gregmap sparc32_sol2_gregmap;
b4fd25c9 AA	239	extern const struct sparc_fpregmap sparc32_sol2_fpregmap;
386c036b	240
2c02bd72	241	extern int sparc_sol2_pc_in_sigtramp (CORE_ADDR pc, const char *name);
386c036b	242
0d5cff50	243	extern const char sparc_sol2_static_transform_name (const char name);
149ad273	244
386c036b MK	245	extern void sparc32_sol2_init_abi (struct gdbarch_info info,
	246	struct gdbarch *gdbarch);
	247
	248	/* Functions and variables exported from sparcnbsd-tdep.c. */
	249
	250	/* Register offsets for NetBSD. */
b4fd25c9	251	extern const struct sparc_gregmap sparc32nbsd_gregmap;
386c036b	252
c893be75 MK	253	/* Return the address of a system call's alternative return
c893be75 MK	254	address. */
0b1b3e42 UW	255	extern CORE_ADDR sparcnbsd_step_trap (struct frame_info *frame,
0b1b3e42 UW	256	unsigned long insn);
c893be75	257
1736a7bd PA	258	extern void sparc32nbsd_init_abi (struct gdbarch_info info,
1736a7bd PA	259	struct gdbarch *gdbarch);
19671c2b	260
566626fa MK	261	extern struct trad_frame_saved_reg *
	262	sparc32nbsd_sigcontext_saved_regs (struct frame_info *next_frame);
	263
386c036b	264	#endif /* sparc-tdep.h */