Commit | Line | Data |
---|---|---|
7d9884b9 | 1 | /* Host-dependent code for SPARC host systems, for GDB, the GNU debugger. |
7ed0f002 | 2 | Copyright 1986, 1987, 1989, 1990, 1991, 1992 Free Software Foundation, Inc. |
dd3b648e RP |
3 | |
4 | This file is part of GDB. | |
5 | ||
99a7de40 | 6 | This program is free software; you can redistribute it and/or modify |
dd3b648e | 7 | it under the terms of the GNU General Public License as published by |
99a7de40 JG |
8 | the Free Software Foundation; either version 2 of the License, or |
9 | (at your option) any later version. | |
dd3b648e | 10 | |
99a7de40 | 11 | This program is distributed in the hope that it will be useful, |
dd3b648e RP |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
99a7de40 JG |
17 | along with this program; if not, write to the Free Software |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
dd3b648e | 19 | |
2e00f40a JG |
20 | /* This code only compiles when we have the definitions in tm-sparc.h. */ |
21 | ||
22 | #define TM_FILE_OVERRIDE | |
dd3b648e | 23 | #include "defs.h" |
2e00f40a JG |
24 | #include "tm-sparc.h" |
25 | ||
dd3b648e RP |
26 | #include "inferior.h" |
27 | #include "target.h" | |
28 | ||
29 | #include <sys/param.h> | |
dd3b648e RP |
30 | #include <sys/ptrace.h> |
31 | #include <machine/reg.h> | |
32 | ||
33 | #include "gdbcore.h" | |
34 | #include <sys/core.h> | |
35 | ||
69f29a86 JG |
36 | /* We don't store all registers immediately when requested, since they |
37 | get sent over in large chunks anyway. Instead, we accumulate most | |
38 | of the changes and send them over once. "deferred_stores" keeps | |
39 | track of which sets of registers we have locally-changed copies of, | |
40 | so we only need send the groups that have changed. */ | |
41 | ||
42 | #define INT_REGS 1 | |
43 | #define STACK_REGS 2 | |
44 | #define FP_REGS 4 | |
45 | ||
beff312e RP |
46 | int deferred_stores = 0; /* Cumulates stores we want to do eventually. */ |
47 | ||
dd3b648e RP |
48 | /* Fetch one or more registers from the inferior. REGNO == -1 to get |
49 | them all. We actually fetch more than requested, when convenient, | |
50 | marking them as valid so we won't fetch them again. */ | |
51 | void | |
52 | fetch_inferior_registers (regno) | |
53 | int regno; | |
54 | { | |
55 | struct regs inferior_registers; | |
56 | struct fp_status inferior_fp_registers; | |
57 | int i; | |
58 | ||
59 | /* We should never be called with deferred stores, because a prerequisite | |
60 | for writing regs is to have fetched them all (PREPARE_TO_STORE), sigh. */ | |
61 | if (deferred_stores) abort(); | |
62 | ||
63 | DO_DEFERRED_STORES; | |
64 | ||
65 | /* Global and Out regs are fetched directly, as well as the control | |
66 | registers. If we're getting one of the in or local regs, | |
67 | and the stack pointer has not yet been fetched, | |
68 | we have to do that first, since they're found in memory relative | |
69 | to the stack pointer. */ | |
70 | if (regno < O7_REGNUM /* including -1 */ | |
71 | || regno >= Y_REGNUM | |
72 | || (!register_valid[SP_REGNUM] && regno < I7_REGNUM)) | |
73 | { | |
e676a15f FF |
74 | if (0 != ptrace (PTRACE_GETREGS, inferior_pid, |
75 | (PTRACE_ARG3_TYPE) &inferior_registers, 0)) | |
76 | perror("ptrace_getregs"); | |
dd3b648e RP |
77 | |
78 | registers[REGISTER_BYTE (0)] = 0; | |
51b57ded | 79 | (void) memcpy (®isters[REGISTER_BYTE (1)], &inferior_registers.r_g1, 15 * REGISTER_RAW_SIZE (G0_REGNUM)); |
dd3b648e RP |
80 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = inferior_registers.r_ps; |
81 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = inferior_registers.r_pc; | |
82 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = inferior_registers.r_npc; | |
83 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = inferior_registers.r_y; | |
84 | ||
85 | for (i = G0_REGNUM; i <= O7_REGNUM; i++) | |
86 | register_valid[i] = 1; | |
87 | register_valid[Y_REGNUM] = 1; | |
88 | register_valid[PS_REGNUM] = 1; | |
89 | register_valid[PC_REGNUM] = 1; | |
90 | register_valid[NPC_REGNUM] = 1; | |
91 | /* If we don't set these valid, read_register_bytes() rereads | |
92 | all the regs every time it is called! FIXME. */ | |
93 | register_valid[WIM_REGNUM] = 1; /* Not true yet, FIXME */ | |
94 | register_valid[TBR_REGNUM] = 1; /* Not true yet, FIXME */ | |
95 | register_valid[FPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
96 | register_valid[CPS_REGNUM] = 1; /* Not true yet, FIXME */ | |
97 | } | |
98 | ||
99 | /* Floating point registers */ | |
100 | if (regno == -1 || (regno >= FP0_REGNUM && regno <= FP0_REGNUM + 31)) | |
101 | { | |
e676a15f FF |
102 | if (0 != ptrace (PTRACE_GETFPREGS, inferior_pid, |
103 | (PTRACE_ARG3_TYPE) &inferior_fp_registers, | |
104 | 0)) | |
dd3b648e | 105 | perror("ptrace_getfpregs"); |
51b57ded FF |
106 | (void) memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], |
107 | &inferior_fp_registers, | |
108 | sizeof inferior_fp_registers.fpu_fr); | |
dd3b648e RP |
109 | /* bcopy (&inferior_fp_registers.Fpu_fsr, |
110 | ®isters[REGISTER_BYTE (FPS_REGNUM)], | |
111 | sizeof (FPU_FSR_TYPE)); FIXME??? -- gnu@cyg */ | |
112 | for (i = FP0_REGNUM; i <= FP0_REGNUM+31; i++) | |
113 | register_valid[i] = 1; | |
114 | register_valid[FPS_REGNUM] = 1; | |
115 | } | |
116 | ||
117 | /* These regs are saved on the stack by the kernel. Only read them | |
118 | all (16 ptrace calls!) if we really need them. */ | |
119 | if (regno == -1) | |
120 | { | |
121 | target_xfer_memory (*(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)], | |
122 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
123 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 0); | |
124 | for (i = L0_REGNUM; i <= I7_REGNUM; i++) | |
125 | register_valid[i] = 1; | |
126 | } | |
127 | else if (regno >= L0_REGNUM && regno <= I7_REGNUM) | |
128 | { | |
129 | CORE_ADDR sp = *(CORE_ADDR*)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
130 | i = REGISTER_BYTE (regno); | |
131 | if (register_valid[regno]) | |
132 | printf("register %d valid and read\n", regno); | |
133 | target_xfer_memory (sp + i - REGISTER_BYTE (L0_REGNUM), | |
134 | ®isters[i], REGISTER_RAW_SIZE (regno), 0); | |
135 | register_valid[regno] = 1; | |
136 | } | |
137 | } | |
138 | ||
139 | /* Store our register values back into the inferior. | |
140 | If REGNO is -1, do this for all registers. | |
141 | Otherwise, REGNO specifies which register (so we can save time). */ | |
142 | ||
7ed0f002 | 143 | void |
dd3b648e RP |
144 | store_inferior_registers (regno) |
145 | int regno; | |
146 | { | |
147 | struct regs inferior_registers; | |
148 | struct fp_status inferior_fp_registers; | |
149 | int wanna_store = INT_REGS + STACK_REGS + FP_REGS; | |
150 | ||
151 | /* First decide which pieces of machine-state we need to modify. | |
152 | Default for regno == -1 case is all pieces. */ | |
153 | if (regno >= 0) | |
154 | if (FP0_REGNUM <= regno && regno < FP0_REGNUM + 32) | |
155 | { | |
156 | wanna_store = FP_REGS; | |
157 | } | |
158 | else | |
159 | { | |
160 | if (regno == SP_REGNUM) | |
161 | wanna_store = INT_REGS + STACK_REGS; | |
162 | else if (regno < L0_REGNUM || regno > I7_REGNUM) | |
163 | wanna_store = INT_REGS; | |
164 | else | |
165 | wanna_store = STACK_REGS; | |
166 | } | |
167 | ||
168 | /* See if we're forcing the stores to happen now, or deferring. */ | |
169 | if (regno == -2) | |
170 | { | |
171 | wanna_store = deferred_stores; | |
172 | deferred_stores = 0; | |
173 | } | |
174 | else | |
175 | { | |
176 | if (wanna_store == STACK_REGS) | |
177 | { | |
178 | /* Fall through and just store one stack reg. If we deferred | |
179 | it, we'd have to store them all, or remember more info. */ | |
180 | } | |
181 | else | |
182 | { | |
183 | deferred_stores |= wanna_store; | |
7ed0f002 | 184 | return; |
dd3b648e RP |
185 | } |
186 | } | |
187 | ||
188 | if (wanna_store & STACK_REGS) | |
189 | { | |
190 | CORE_ADDR sp = *(CORE_ADDR *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
191 | ||
192 | if (regno < 0 || regno == SP_REGNUM) | |
193 | { | |
194 | if (!register_valid[L0_REGNUM+5]) abort(); | |
195 | target_xfer_memory (sp, | |
196 | ®isters[REGISTER_BYTE (L0_REGNUM)], | |
197 | 16*REGISTER_RAW_SIZE (L0_REGNUM), 1); | |
198 | } | |
199 | else | |
200 | { | |
201 | if (!register_valid[regno]) abort(); | |
202 | target_xfer_memory (sp + REGISTER_BYTE (regno) - REGISTER_BYTE (L0_REGNUM), | |
203 | ®isters[REGISTER_BYTE (regno)], | |
204 | REGISTER_RAW_SIZE (regno), 1); | |
205 | } | |
206 | ||
207 | } | |
208 | ||
209 | if (wanna_store & INT_REGS) | |
210 | { | |
211 | if (!register_valid[G1_REGNUM]) abort(); | |
212 | ||
51b57ded FF |
213 | (void) memcpy (&inferior_registers.r_g1, |
214 | ®isters[REGISTER_BYTE (G1_REGNUM)], | |
215 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
dd3b648e RP |
216 | |
217 | inferior_registers.r_ps = | |
218 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)]; | |
219 | inferior_registers.r_pc = | |
220 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)]; | |
221 | inferior_registers.r_npc = | |
222 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)]; | |
223 | inferior_registers.r_y = | |
224 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)]; | |
225 | ||
e676a15f FF |
226 | if (0 != ptrace (PTRACE_SETREGS, inferior_pid, |
227 | (PTRACE_ARG3_TYPE) &inferior_registers, 0)) | |
dd3b648e RP |
228 | perror("ptrace_setregs"); |
229 | } | |
230 | ||
231 | if (wanna_store & FP_REGS) | |
232 | { | |
233 | if (!register_valid[FP0_REGNUM+9]) abort(); | |
51b57ded FF |
234 | (void) memcpy (&inferior_fp_registers, |
235 | ®isters[REGISTER_BYTE (FP0_REGNUM)], | |
236 | sizeof inferior_fp_registers.fpu_fr); | |
dd3b648e | 237 | |
51b57ded FF |
238 | /* (void) memcpy (&inferior_fp_registers.Fpu_fsr, |
239 | ®isters[REGISTER_BYTE (FPS_REGNUM)], | |
240 | sizeof (FPU_FSR_TYPE)); | |
dd3b648e RP |
241 | ****/ |
242 | if (0 != | |
e676a15f FF |
243 | ptrace (PTRACE_SETFPREGS, inferior_pid, |
244 | (PTRACE_ARG3_TYPE) &inferior_fp_registers, 0)) | |
dd3b648e RP |
245 | perror("ptrace_setfpregs"); |
246 | } | |
dd3b648e RP |
247 | } |
248 | \f | |
249 | void | |
be772100 | 250 | fetch_core_registers (core_reg_sect, core_reg_size, which, ignore) |
dd3b648e RP |
251 | char *core_reg_sect; |
252 | unsigned core_reg_size; | |
253 | int which; | |
be772100 | 254 | unsigned int ignore; /* reg addr, unused in this version */ |
dd3b648e RP |
255 | { |
256 | ||
257 | if (which == 0) { | |
258 | ||
259 | /* Integer registers */ | |
260 | ||
261 | #define gregs ((struct regs *)core_reg_sect) | |
262 | /* G0 *always* holds 0. */ | |
263 | *(int *)®isters[REGISTER_BYTE (0)] = 0; | |
264 | ||
265 | /* The globals and output registers. */ | |
51b57ded FF |
266 | (void) memcpy (®isters[REGISTER_BYTE (G1_REGNUM)], |
267 | &gregs->r_g1, | |
268 | 15 * REGISTER_RAW_SIZE (G1_REGNUM)); | |
dd3b648e RP |
269 | *(int *)®isters[REGISTER_BYTE (PS_REGNUM)] = gregs->r_ps; |
270 | *(int *)®isters[REGISTER_BYTE (PC_REGNUM)] = gregs->r_pc; | |
271 | *(int *)®isters[REGISTER_BYTE (NPC_REGNUM)] = gregs->r_npc; | |
272 | *(int *)®isters[REGISTER_BYTE (Y_REGNUM)] = gregs->r_y; | |
273 | ||
274 | /* My best guess at where to get the locals and input | |
275 | registers is exactly where they usually are, right above | |
276 | the stack pointer. If the core dump was caused by a bus error | |
277 | from blowing away the stack pointer (as is possible) then this | |
278 | won't work, but it's worth the try. */ | |
279 | { | |
280 | int sp; | |
281 | ||
282 | sp = *(int *)®isters[REGISTER_BYTE (SP_REGNUM)]; | |
283 | if (0 != target_read_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], | |
284 | 16 * REGISTER_RAW_SIZE (L0_REGNUM))) | |
285 | { | |
286 | /* fprintf so user can still use gdb */ | |
287 | fprintf (stderr, | |
288 | "Couldn't read input and local registers from core file\n"); | |
289 | } | |
290 | } | |
291 | } else if (which == 2) { | |
292 | ||
293 | /* Floating point registers */ | |
294 | ||
295 | #define fpuregs ((struct fpu *) core_reg_sect) | |
296 | if (core_reg_size >= sizeof (struct fpu)) | |
297 | { | |
51b57ded FF |
298 | (void) memcpy (®isters[REGISTER_BYTE (FP0_REGNUM)], |
299 | fpuregs->fpu_regs, | |
300 | sizeof (fpuregs->fpu_regs)); | |
301 | (void) memcpy (®isters[REGISTER_BYTE (FPS_REGNUM)], | |
302 | &fpuregs->fpu_fsr, | |
303 | sizeof (FPU_FSR_TYPE)); | |
dd3b648e RP |
304 | } |
305 | else | |
306 | fprintf (stderr, "Couldn't read float regs from core file\n"); | |
307 | } | |
308 | } |