* gdb.texinfo (Hurd Native): New subsection, documents
[deliverable/binutils-gdb.git] / gdb / sparc64-tdep.c
CommitLineData
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1/* Target-dependent code for UltraSPARC.
2
0fd88904 3 Copyright 2003, 2004, 2005 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "floatformat.h"
25#include "frame.h"
26#include "frame-base.h"
27#include "frame-unwind.h"
28#include "gdbcore.h"
29#include "gdbtypes.h"
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30#include "inferior.h"
31#include "symtab.h"
32#include "objfiles.h"
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33#include "osabi.h"
34#include "regcache.h"
35#include "target.h"
36#include "value.h"
37
38#include "gdb_assert.h"
39#include "gdb_string.h"
40
41#include "sparc64-tdep.h"
42
43/* This file implements the The SPARC 64-bit ABI as defined by the
44 section "Low-Level System Information" of the SPARC Compliance
45 Definition (SCD) 2.4.1, which is the 64-bit System V psABI for
46 SPARC. */
47
48/* Please use the sparc32_-prefix for 32-bit specific code, the
49 sparc64_-prefix for 64-bit specific code and the sparc_-prefix for
50 code can handle both. */
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51\f
52/* The functions on this page are intended to be used to classify
53 function arguments. */
54
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55/* Check whether TYPE is "Integral or Pointer". */
56
57static int
58sparc64_integral_or_pointer_p (const struct type *type)
59{
60 switch (TYPE_CODE (type))
61 {
62 case TYPE_CODE_INT:
63 case TYPE_CODE_BOOL:
64 case TYPE_CODE_CHAR:
65 case TYPE_CODE_ENUM:
66 case TYPE_CODE_RANGE:
67 {
68 int len = TYPE_LENGTH (type);
69 gdb_assert (len == 1 || len == 2 || len == 4 || len == 8);
70 }
71 return 1;
72 case TYPE_CODE_PTR:
73 case TYPE_CODE_REF:
74 {
75 int len = TYPE_LENGTH (type);
76 gdb_assert (len == 8);
77 }
78 return 1;
79 default:
80 break;
81 }
82
83 return 0;
84}
85
86/* Check whether TYPE is "Floating". */
87
88static int
89sparc64_floating_p (const struct type *type)
90{
91 switch (TYPE_CODE (type))
92 {
93 case TYPE_CODE_FLT:
94 {
95 int len = TYPE_LENGTH (type);
96 gdb_assert (len == 4 || len == 8 || len == 16);
97 }
98 return 1;
99 default:
100 break;
101 }
102
103 return 0;
104}
105
106/* Check whether TYPE is "Structure or Union". */
107
108static int
109sparc64_structure_or_union_p (const struct type *type)
110{
111 switch (TYPE_CODE (type))
112 {
113 case TYPE_CODE_STRUCT:
114 case TYPE_CODE_UNION:
115 return 1;
116 default:
117 break;
118 }
119
120 return 0;
121}
122
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123/* Register information. */
124
125struct sparc64_register_info
126{
127 char *name;
128 struct type **type;
129};
130
131static struct sparc64_register_info sparc64_register_info[] =
132{
133 { "g0", &builtin_type_int64 },
134 { "g1", &builtin_type_int64 },
135 { "g2", &builtin_type_int64 },
136 { "g3", &builtin_type_int64 },
137 { "g4", &builtin_type_int64 },
138 { "g5", &builtin_type_int64 },
139 { "g6", &builtin_type_int64 },
140 { "g7", &builtin_type_int64 },
141
142 { "o0", &builtin_type_int64 },
143 { "o1", &builtin_type_int64 },
144 { "o2", &builtin_type_int64 },
145 { "o3", &builtin_type_int64 },
146 { "o4", &builtin_type_int64 },
147 { "o5", &builtin_type_int64 },
148 { "sp", &builtin_type_void_data_ptr },
149 { "o7", &builtin_type_int64 },
150
151 { "l0", &builtin_type_int64 },
152 { "l1", &builtin_type_int64 },
153 { "l2", &builtin_type_int64 },
154 { "l3", &builtin_type_int64 },
155 { "l4", &builtin_type_int64 },
156 { "l5", &builtin_type_int64 },
157 { "l6", &builtin_type_int64 },
158 { "l7", &builtin_type_int64 },
159
160 { "i0", &builtin_type_int64 },
161 { "i1", &builtin_type_int64 },
162 { "i2", &builtin_type_int64 },
163 { "i3", &builtin_type_int64 },
164 { "i4", &builtin_type_int64 },
165 { "i5", &builtin_type_int64 },
166 { "fp", &builtin_type_void_data_ptr },
167 { "i7", &builtin_type_int64 },
168
169 { "f0", &builtin_type_float },
170 { "f1", &builtin_type_float },
171 { "f2", &builtin_type_float },
172 { "f3", &builtin_type_float },
173 { "f4", &builtin_type_float },
174 { "f5", &builtin_type_float },
175 { "f6", &builtin_type_float },
176 { "f7", &builtin_type_float },
177 { "f8", &builtin_type_float },
178 { "f9", &builtin_type_float },
179 { "f10", &builtin_type_float },
180 { "f11", &builtin_type_float },
181 { "f12", &builtin_type_float },
182 { "f13", &builtin_type_float },
183 { "f14", &builtin_type_float },
184 { "f15", &builtin_type_float },
185 { "f16", &builtin_type_float },
186 { "f17", &builtin_type_float },
187 { "f18", &builtin_type_float },
188 { "f19", &builtin_type_float },
189 { "f20", &builtin_type_float },
190 { "f21", &builtin_type_float },
191 { "f22", &builtin_type_float },
192 { "f23", &builtin_type_float },
193 { "f24", &builtin_type_float },
194 { "f25", &builtin_type_float },
195 { "f26", &builtin_type_float },
196 { "f27", &builtin_type_float },
197 { "f28", &builtin_type_float },
198 { "f29", &builtin_type_float },
199 { "f30", &builtin_type_float },
200 { "f31", &builtin_type_float },
201 { "f32", &builtin_type_double },
202 { "f34", &builtin_type_double },
203 { "f36", &builtin_type_double },
204 { "f38", &builtin_type_double },
205 { "f40", &builtin_type_double },
206 { "f42", &builtin_type_double },
207 { "f44", &builtin_type_double },
208 { "f46", &builtin_type_double },
209 { "f48", &builtin_type_double },
210 { "f50", &builtin_type_double },
211 { "f52", &builtin_type_double },
212 { "f54", &builtin_type_double },
213 { "f56", &builtin_type_double },
214 { "f58", &builtin_type_double },
215 { "f60", &builtin_type_double },
216 { "f62", &builtin_type_double },
217
218 { "pc", &builtin_type_void_func_ptr },
219 { "npc", &builtin_type_void_func_ptr },
220
221 /* This raw register contains the contents of %cwp, %pstate, %asi
222 and %ccr as laid out in a %tstate register. */
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223 /* FIXME: Give it a name until we start using register groups. */
224 { "state", &builtin_type_int64 },
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225
226 { "fsr", &builtin_type_int64 },
227 { "fprs", &builtin_type_int64 },
228
229 /* "Although Y is a 64-bit register, its high-order 32 bits are
230 reserved and always read as 0." */
231 { "y", &builtin_type_int64 }
232};
233
234/* Total number of registers. */
386c036b 235#define SPARC64_NUM_REGS ARRAY_SIZE (sparc64_register_info)
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236
237/* We provide the aliases %d0..%d62 and %q0..%q60 for the floating
238 registers as "psuedo" registers. */
239
240static struct sparc64_register_info sparc64_pseudo_register_info[] =
241{
242 { "cwp", &builtin_type_int64 },
243 { "pstate", &builtin_type_int64 },
244 { "asi", &builtin_type_int64 },
245 { "ccr", &builtin_type_int64 },
246
247 { "d0", &builtin_type_double },
248 { "d2", &builtin_type_double },
249 { "d4", &builtin_type_double },
250 { "d6", &builtin_type_double },
251 { "d8", &builtin_type_double },
252 { "d10", &builtin_type_double },
253 { "d12", &builtin_type_double },
254 { "d14", &builtin_type_double },
255 { "d16", &builtin_type_double },
256 { "d18", &builtin_type_double },
257 { "d20", &builtin_type_double },
258 { "d22", &builtin_type_double },
259 { "d24", &builtin_type_double },
260 { "d26", &builtin_type_double },
261 { "d28", &builtin_type_double },
262 { "d30", &builtin_type_double },
263 { "d32", &builtin_type_double },
264 { "d34", &builtin_type_double },
265 { "d36", &builtin_type_double },
266 { "d38", &builtin_type_double },
267 { "d40", &builtin_type_double },
268 { "d42", &builtin_type_double },
269 { "d44", &builtin_type_double },
270 { "d46", &builtin_type_double },
271 { "d48", &builtin_type_double },
272 { "d50", &builtin_type_double },
273 { "d52", &builtin_type_double },
274 { "d54", &builtin_type_double },
275 { "d56", &builtin_type_double },
276 { "d58", &builtin_type_double },
277 { "d60", &builtin_type_double },
278 { "d62", &builtin_type_double },
279
280 { "q0", &builtin_type_long_double },
281 { "q4", &builtin_type_long_double },
282 { "q8", &builtin_type_long_double },
283 { "q12", &builtin_type_long_double },
284 { "q16", &builtin_type_long_double },
285 { "q20", &builtin_type_long_double },
286 { "q24", &builtin_type_long_double },
287 { "q28", &builtin_type_long_double },
288 { "q32", &builtin_type_long_double },
289 { "q36", &builtin_type_long_double },
290 { "q40", &builtin_type_long_double },
291 { "q44", &builtin_type_long_double },
292 { "q48", &builtin_type_long_double },
293 { "q52", &builtin_type_long_double },
294 { "q56", &builtin_type_long_double },
295 { "q60", &builtin_type_long_double }
296};
297
298/* Total number of pseudo registers. */
386c036b 299#define SPARC64_NUM_PSEUDO_REGS ARRAY_SIZE (sparc64_pseudo_register_info)
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300
301/* Return the name of register REGNUM. */
302
303static const char *
304sparc64_register_name (int regnum)
305{
306 if (regnum >= 0 && regnum < SPARC64_NUM_REGS)
307 return sparc64_register_info[regnum].name;
308
309 if (regnum >= SPARC64_NUM_REGS
310 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
311 return sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].name;
312
313 return NULL;
314}
315
316/* Return the GDB type object for the "standard" data type of data in
317 register REGNUM. */
318
319static struct type *
320sparc64_register_type (struct gdbarch *gdbarch, int regnum)
321{
322 if (regnum >= SPARC64_NUM_REGS
323 && regnum < SPARC64_NUM_REGS + SPARC64_NUM_PSEUDO_REGS)
324 return *sparc64_pseudo_register_info[regnum - SPARC64_NUM_REGS].type;
325
326 gdb_assert (regnum >= 0 && regnum < SPARC64_NUM_REGS);
327 return *sparc64_register_info[regnum].type;
328}
329
330static void
331sparc64_pseudo_register_read (struct gdbarch *gdbarch,
332 struct regcache *regcache,
333 int regnum, void *buf)
334{
335 gdb_assert (regnum >= SPARC64_NUM_REGS);
336
337 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
338 {
339 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
340 regcache_raw_read (regcache, regnum, buf);
341 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
342 }
343 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
344 {
345 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
346 regcache_raw_read (regcache, regnum, buf);
347 }
348 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
349 {
350 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
351 regcache_raw_read (regcache, regnum, buf);
352 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 4);
353 regcache_raw_read (regcache, regnum + 2, ((char *)buf) + 8);
354 regcache_raw_read (regcache, regnum + 3, ((char *)buf) + 12);
355 }
356 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
357 {
358 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
359 regcache_raw_read (regcache, regnum, buf);
360 regcache_raw_read (regcache, regnum + 1, ((char *)buf) + 8);
361 }
362 else if (regnum == SPARC64_CWP_REGNUM
363 || regnum == SPARC64_PSTATE_REGNUM
364 || regnum == SPARC64_ASI_REGNUM
365 || regnum == SPARC64_CCR_REGNUM)
366 {
367 ULONGEST state;
368
369 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
370 switch (regnum)
371 {
3567a8ea 372 case SPARC64_CWP_REGNUM:
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373 state = (state >> 0) & ((1 << 5) - 1);
374 break;
3567a8ea 375 case SPARC64_PSTATE_REGNUM:
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376 state = (state >> 8) & ((1 << 12) - 1);
377 break;
3567a8ea 378 case SPARC64_ASI_REGNUM:
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379 state = (state >> 24) & ((1 << 8) - 1);
380 break;
3567a8ea 381 case SPARC64_CCR_REGNUM:
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382 state = (state >> 32) & ((1 << 8) - 1);
383 break;
384 }
385 store_unsigned_integer (buf, 8, state);
386 }
387}
388
389static void
390sparc64_pseudo_register_write (struct gdbarch *gdbarch,
391 struct regcache *regcache,
392 int regnum, const void *buf)
393{
394 gdb_assert (regnum >= SPARC64_NUM_REGS);
395
396 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D30_REGNUM)
397 {
398 regnum = SPARC_F0_REGNUM + 2 * (regnum - SPARC64_D0_REGNUM);
399 regcache_raw_write (regcache, regnum, buf);
400 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
401 }
402 else if (regnum >= SPARC64_D32_REGNUM && regnum <= SPARC64_D62_REGNUM)
403 {
404 regnum = SPARC64_F32_REGNUM + (regnum - SPARC64_D32_REGNUM);
405 regcache_raw_write (regcache, regnum, buf);
406 }
407 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q28_REGNUM)
408 {
409 regnum = SPARC_F0_REGNUM + 4 * (regnum - SPARC64_Q0_REGNUM);
410 regcache_raw_write (regcache, regnum, buf);
411 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 4);
412 regcache_raw_write (regcache, regnum + 2, ((const char *)buf) + 8);
413 regcache_raw_write (regcache, regnum + 3, ((const char *)buf) + 12);
414 }
415 else if (regnum >= SPARC64_Q32_REGNUM && regnum <= SPARC64_Q60_REGNUM)
416 {
417 regnum = SPARC64_F32_REGNUM + 2 * (regnum - SPARC64_Q32_REGNUM);
418 regcache_raw_write (regcache, regnum, buf);
419 regcache_raw_write (regcache, regnum + 1, ((const char *)buf) + 8);
420 }
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421 else if (regnum == SPARC64_CWP_REGNUM
422 || regnum == SPARC64_PSTATE_REGNUM
423 || regnum == SPARC64_ASI_REGNUM
424 || regnum == SPARC64_CCR_REGNUM)
425 {
426 ULONGEST state, bits;
427
428 regcache_raw_read_unsigned (regcache, SPARC64_STATE_REGNUM, &state);
429 bits = extract_unsigned_integer (buf, 8);
430 switch (regnum)
431 {
432 case SPARC64_CWP_REGNUM:
433 state |= ((bits & ((1 << 5) - 1)) << 0);
434 break;
435 case SPARC64_PSTATE_REGNUM:
436 state |= ((bits & ((1 << 12) - 1)) << 8);
437 break;
438 case SPARC64_ASI_REGNUM:
439 state |= ((bits & ((1 << 8) - 1)) << 24);
440 break;
441 case SPARC64_CCR_REGNUM:
442 state |= ((bits & ((1 << 8) - 1)) << 32);
443 break;
444 }
445 regcache_raw_write_unsigned (regcache, SPARC64_STATE_REGNUM, state);
446 }
8b39fe56 447}
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448\f
449
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450/* Return PC of first real instruction of the function starting at
451 START_PC. */
452
453static CORE_ADDR
454sparc64_skip_prologue (CORE_ADDR start_pc)
455{
456 struct symtab_and_line sal;
457 CORE_ADDR func_start, func_end;
386c036b 458 struct sparc_frame_cache cache;
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459
460 /* This is the preferred method, find the end of the prologue by
461 using the debugging information. */
462 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
463 {
464 sal = find_pc_line (func_start, 0);
465
466 if (sal.end < func_end
467 && start_pc <= sal.end)
468 return sal.end;
469 }
470
386c036b 471 return sparc_analyze_prologue (start_pc, 0xffffffffffffffffULL, &cache);
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472}
473
474/* Normal frames. */
475
386c036b 476static struct sparc_frame_cache *
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477sparc64_frame_cache (struct frame_info *next_frame, void **this_cache)
478{
386c036b 479 return sparc_frame_cache (next_frame, this_cache);
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480}
481
482static void
483sparc64_frame_this_id (struct frame_info *next_frame, void **this_cache,
484 struct frame_id *this_id)
485{
386c036b 486 struct sparc_frame_cache *cache =
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487 sparc64_frame_cache (next_frame, this_cache);
488
489 /* This marks the outermost frame. */
490 if (cache->base == 0)
491 return;
492
493 (*this_id) = frame_id_build (cache->base, cache->pc);
494}
495
496static void
497sparc64_frame_prev_register (struct frame_info *next_frame, void **this_cache,
498 int regnum, int *optimizedp,
499 enum lval_type *lvalp, CORE_ADDR *addrp,
500 int *realnump, void *valuep)
501{
386c036b 502 struct sparc_frame_cache *cache =
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503 sparc64_frame_cache (next_frame, this_cache);
504
505 if (regnum == SPARC64_PC_REGNUM || regnum == SPARC64_NPC_REGNUM)
506 {
507 *optimizedp = 0;
508 *lvalp = not_lval;
509 *addrp = 0;
510 *realnump = -1;
511 if (valuep)
512 {
513 CORE_ADDR pc = (regnum == SPARC64_NPC_REGNUM) ? 4 : 0;
514
515 regnum = cache->frameless_p ? SPARC_O7_REGNUM : SPARC_I7_REGNUM;
516 pc += frame_unwind_register_unsigned (next_frame, regnum) + 8;
517 store_unsigned_integer (valuep, 8, pc);
518 }
519 return;
520 }
521
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522 /* Handle StackGhost. */
523 {
524 ULONGEST wcookie = sparc_fetch_wcookie ();
525
526 if (wcookie != 0 && !cache->frameless_p && regnum == SPARC_I7_REGNUM)
527 {
528 *optimizedp = 0;
529 *lvalp = not_lval;
530 *addrp = 0;
531 *realnump = -1;
532 if (valuep)
533 {
534 CORE_ADDR addr = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
535 ULONGEST i7;
536
537 /* Read the value in from memory. */
538 i7 = get_frame_memory_unsigned (next_frame, addr, 8);
539 store_unsigned_integer (valuep, 8, i7 ^ wcookie);
540 }
541 return;
542 }
543 }
544
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545 /* The previous frame's `local' and `in' registers have been saved
546 in the register save area. */
547 if (!cache->frameless_p
548 && regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM)
549 {
550 *optimizedp = 0;
551 *lvalp = lval_memory;
5b2d44a0 552 *addrp = cache->base + (regnum - SPARC_L0_REGNUM) * 8;
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553 *realnump = -1;
554 if (valuep)
555 {
556 struct gdbarch *gdbarch = get_frame_arch (next_frame);
557
558 /* Read the value in from memory. */
559 read_memory (*addrp, valuep, register_size (gdbarch, regnum));
560 }
561 return;
562 }
563
564 /* The previous frame's `out' registers are accessable as the
565 current frame's `in' registers. */
566 if (!cache->frameless_p
567 && regnum >= SPARC_O0_REGNUM && regnum <= SPARC_O7_REGNUM)
568 regnum += (SPARC_I0_REGNUM - SPARC_O0_REGNUM);
569
00b25ff3
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570 *optimizedp = 0;
571 *lvalp = lval_register;
572 *addrp = 0;
573 *realnump = regnum;
574 if (valuep)
575 frame_unwind_register (next_frame, regnum, valuep);
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576}
577
578static const struct frame_unwind sparc64_frame_unwind =
579{
580 NORMAL_FRAME,
581 sparc64_frame_this_id,
582 sparc64_frame_prev_register
583};
584
585static const struct frame_unwind *
586sparc64_frame_sniffer (struct frame_info *next_frame)
587{
588 return &sparc64_frame_unwind;
589}
590\f
591
592static CORE_ADDR
593sparc64_frame_base_address (struct frame_info *next_frame, void **this_cache)
594{
386c036b 595 struct sparc_frame_cache *cache =
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596 sparc64_frame_cache (next_frame, this_cache);
597
5b2d44a0 598 return cache->base;
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599}
600
601static const struct frame_base sparc64_frame_base =
602{
603 &sparc64_frame_unwind,
604 sparc64_frame_base_address,
605 sparc64_frame_base_address,
606 sparc64_frame_base_address
607};
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608\f
609/* Check whether TYPE must be 16-byte aligned. */
610
611static int
612sparc64_16_byte_align_p (struct type *type)
613{
614 if (sparc64_floating_p (type) && TYPE_LENGTH (type) == 16)
615 return 1;
616
617 if (sparc64_structure_or_union_p (type))
618 {
619 int i;
620
621 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
622 {
623 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
624
625 if (sparc64_16_byte_align_p (subtype))
626 return 1;
627 }
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MK
628 }
629
630 return 0;
631}
632
633/* Store floating fields of element ELEMENT of an "parameter array"
634 that has type TYPE and is stored at BITPOS in VALBUF in the
635 apropriate registers of REGCACHE. This function can be called
636 recursively and therefore handles floating types in addition to
637 structures. */
638
639static void
640sparc64_store_floating_fields (struct regcache *regcache, struct type *type,
e219d7ce 641 const char *valbuf, int element, int bitpos)
8b39fe56
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642{
643 gdb_assert (element < 16);
644
645 if (sparc64_floating_p (type))
646 {
647 int len = TYPE_LENGTH (type);
648 int regnum;
649
650 if (len == 16)
651 {
652 gdb_assert (bitpos == 0);
653 gdb_assert ((element % 2) == 0);
654
655 regnum = SPARC64_Q0_REGNUM + element / 2;
656 regcache_cooked_write (regcache, regnum, valbuf);
657 }
658 else if (len == 8)
659 {
660 gdb_assert (bitpos == 0 || bitpos == 64);
661
662 regnum = SPARC64_D0_REGNUM + element + bitpos / 64;
663 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
664 }
665 else
666 {
667 gdb_assert (len == 4);
668 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 128);
669
670 regnum = SPARC_F0_REGNUM + element * 2 + bitpos / 32;
671 regcache_cooked_write (regcache, regnum, valbuf + (bitpos / 8));
672 }
673 }
674 else if (sparc64_structure_or_union_p (type))
675 {
676 int i;
677
678 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
679 {
680 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
681 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
682
683 sparc64_store_floating_fields (regcache, subtype, valbuf,
684 element, subpos);
685 }
200cc553
MK
686
687 /* GCC has an interesting bug. If TYPE is a structure that has
688 a single `float' member, GCC doesn't treat it as a structure
689 at all, but rather as an ordinary `float' argument. This
690 argument will be stored in %f1, as required by the psABI.
691 However, as a member of a structure the psABI requires it to
5154b0cd
MK
692 be stored in %f0. This bug is present in GCC 3.3.2, but
693 probably in older releases to. To appease GCC, if a
694 structure has only a single `float' member, we store its
695 value in %f1 too (we already have stored in %f0). */
200cc553
MK
696 if (TYPE_NFIELDS (type) == 1)
697 {
698 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, 0));
699
700 if (sparc64_floating_p (subtype) && TYPE_LENGTH (subtype) == 4)
701 regcache_cooked_write (regcache, SPARC_F1_REGNUM, valbuf);
702 }
8b39fe56
MK
703 }
704}
705
706/* Fetch floating fields from a variable of type TYPE from the
707 appropriate registers for BITPOS in REGCACHE and store it at BITPOS
708 in VALBUF. This function can be called recursively and therefore
709 handles floating types in addition to structures. */
710
711static void
712sparc64_extract_floating_fields (struct regcache *regcache, struct type *type,
713 char *valbuf, int bitpos)
714{
715 if (sparc64_floating_p (type))
716 {
717 int len = TYPE_LENGTH (type);
718 int regnum;
719
720 if (len == 16)
721 {
722 gdb_assert (bitpos == 0 || bitpos == 128);
723
724 regnum = SPARC64_Q0_REGNUM + bitpos / 128;
725 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
726 }
727 else if (len == 8)
728 {
729 gdb_assert (bitpos % 64 == 0 && bitpos >= 0 && bitpos < 256);
730
731 regnum = SPARC64_D0_REGNUM + bitpos / 64;
732 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
733 }
734 else
735 {
736 gdb_assert (len == 4);
737 gdb_assert (bitpos % 32 == 0 && bitpos >= 0 && bitpos < 256);
738
739 regnum = SPARC_F0_REGNUM + bitpos / 32;
740 regcache_cooked_read (regcache, regnum, valbuf + (bitpos / 8));
741 }
742 }
743 else if (sparc64_structure_or_union_p (type))
744 {
745 int i;
746
747 for (i = 0; i < TYPE_NFIELDS (type); i++)
60af1db2
MK
748 {
749 struct type *subtype = check_typedef (TYPE_FIELD_TYPE (type, i));
750 int subpos = bitpos + TYPE_FIELD_BITPOS (type, i);
751
752 sparc64_extract_floating_fields (regcache, subtype, valbuf, subpos);
753 }
8b39fe56
MK
754 }
755}
756
757/* Store the NARGS arguments ARGS and STRUCT_ADDR (if STRUCT_RETURN is
758 non-zero) in REGCACHE and on the stack (starting from address SP). */
759
760static CORE_ADDR
761sparc64_store_arguments (struct regcache *regcache, int nargs,
762 struct value **args, CORE_ADDR sp,
763 int struct_return, CORE_ADDR struct_addr)
764{
765 /* Number of extended words in the "parameter array". */
766 int num_elements = 0;
767 int element = 0;
768 int i;
769
770 /* Take BIAS into account. */
771 sp += BIAS;
772
773 /* First we calculate the number of extended words in the "parameter
774 array". While doing so we also convert some of the arguments. */
775
776 if (struct_return)
777 num_elements++;
778
779 for (i = 0; i < nargs; i++)
780 {
4991999e 781 struct type *type = value_type (args[i]);
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782 int len = TYPE_LENGTH (type);
783
784 if (sparc64_structure_or_union_p (type))
785 {
786 /* Structure or Union arguments. */
787 if (len <= 16)
788 {
789 if (num_elements % 2 && sparc64_16_byte_align_p (type))
790 num_elements++;
791 num_elements += ((len + 7) / 8);
792 }
793 else
794 {
795 /* The psABI says that "Structures or unions larger than
796 sixteen bytes are copied by the caller and passed
797 indirectly; the caller will pass the address of a
798 correctly aligned structure value. This sixty-four
799 bit address will occupy one word in the parameter
800 array, and may be promoted to an %o register like any
801 other pointer value." Allocate memory for these
802 values on the stack. */
803 sp -= len;
804
805 /* Use 16-byte alignment for these values. That's
806 always correct, and wasting a few bytes shouldn't be
807 a problem. */
808 sp &= ~0xf;
809
0fd88904 810 write_memory (sp, value_contents (args[i]), len);
8b39fe56
MK
811 args[i] = value_from_pointer (lookup_pointer_type (type), sp);
812 num_elements++;
813 }
814 }
815 else if (sparc64_floating_p (type))
816 {
817 /* Floating arguments. */
818
819 if (len == 16)
820 {
821 /* The psABI says that "Each quad-precision parameter
822 value will be assigned to two extended words in the
823 parameter array. */
824 num_elements += 2;
825
826 /* The psABI says that "Long doubles must be
827 quad-aligned, and thus a hole might be introduced
828 into the parameter array to force alignment." Skip
829 an element if necessary. */
830 if (num_elements % 2)
831 num_elements++;
832 }
833 else
834 num_elements++;
835 }
836 else
837 {
838 /* Integral and pointer arguments. */
839 gdb_assert (sparc64_integral_or_pointer_p (type));
840
841 /* The psABI says that "Each argument value of integral type
842 smaller than an extended word will be widened by the
843 caller to an extended word according to the signed-ness
844 of the argument type." */
845 if (len < 8)
846 args[i] = value_cast (builtin_type_int64, args[i]);
847 num_elements++;
848 }
849 }
850
851 /* Allocate the "parameter array". */
852 sp -= num_elements * 8;
853
854 /* The psABI says that "Every stack frame must be 16-byte aligned." */
855 sp &= ~0xf;
856
857 /* Now we store the arguments in to the "paramater array". Some
858 Integer or Pointer arguments and Structure or Union arguments
859 will be passed in %o registers. Some Floating arguments and
860 floating members of structures are passed in floating-point
861 registers. However, for functions with variable arguments,
862 floating arguments are stored in an %0 register, and for
863 functions without a prototype floating arguments are stored in
864 both a floating-point and an %o registers, or a floating-point
865 register and memory. To simplify the logic here we always pass
866 arguments in memory, an %o register, and a floating-point
867 register if appropriate. This should be no problem since the
868 contents of any unused memory or registers in the "parameter
869 array" are undefined. */
870
871 if (struct_return)
872 {
873 regcache_cooked_write_unsigned (regcache, SPARC_O0_REGNUM, struct_addr);
874 element++;
875 }
876
877 for (i = 0; i < nargs; i++)
878 {
e219d7ce 879 const char *valbuf = value_contents (args[i]);
4991999e 880 struct type *type = value_type (args[i]);
8b39fe56
MK
881 int len = TYPE_LENGTH (type);
882 int regnum = -1;
883 char buf[16];
884
885 if (sparc64_structure_or_union_p (type))
886 {
887 /* Structure or Union arguments. */
888 gdb_assert (len <= 16);
889 memset (buf, 0, sizeof (buf));
890 valbuf = memcpy (buf, valbuf, len);
891
892 if (element % 2 && sparc64_16_byte_align_p (type))
893 element++;
894
895 if (element < 6)
896 {
897 regnum = SPARC_O0_REGNUM + element;
898 if (len > 8 && element < 5)
899 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
900 }
901
902 if (element < 16)
903 sparc64_store_floating_fields (regcache, type, valbuf, element, 0);
904 }
905 else if (sparc64_floating_p (type))
906 {
907 /* Floating arguments. */
908 if (len == 16)
909 {
910 if (element % 2)
911 element++;
912 if (element < 16)
913 regnum = SPARC64_Q0_REGNUM + element / 2;
914 }
915 else if (len == 8)
916 {
917 if (element < 16)
918 regnum = SPARC64_D0_REGNUM + element;
919 }
920 else
921 {
922 /* The psABI says "Each single-precision parameter value
923 will be assigned to one extended word in the
924 parameter array, and right-justified within that
925 word; the left half (even floatregister) is
926 undefined." Even though the psABI says that "the
927 left half is undefined", set it to zero here. */
928 memset (buf, 0, 4);
8ada74e3
MK
929 memcpy (buf + 4, valbuf, 4);
930 valbuf = buf;
8b39fe56
MK
931 len = 8;
932 if (element < 16)
8ada74e3 933 regnum = SPARC64_D0_REGNUM + element;
8b39fe56
MK
934 }
935 }
936 else
937 {
938 /* Integral and pointer arguments. */
939 gdb_assert (len == 8);
940 if (element < 6)
941 regnum = SPARC_O0_REGNUM + element;
942 }
943
944 if (regnum != -1)
945 {
946 regcache_cooked_write (regcache, regnum, valbuf);
947
948 /* If we're storing the value in a floating-point register,
949 also store it in the corresponding %0 register(s). */
950 if (regnum >= SPARC64_D0_REGNUM && regnum <= SPARC64_D10_REGNUM)
951 {
952 gdb_assert (element < 6);
953 regnum = SPARC_O0_REGNUM + element;
954 regcache_cooked_write (regcache, regnum, valbuf);
955 }
956 else if (regnum >= SPARC64_Q0_REGNUM && regnum <= SPARC64_Q8_REGNUM)
957 {
958 gdb_assert (element < 6);
959 regnum = SPARC_O0_REGNUM + element;
960 regcache_cooked_write (regcache, regnum, valbuf);
d47079be 961 regcache_cooked_write (regcache, regnum + 1, valbuf + 8);
8b39fe56
MK
962 }
963 }
964
c4f2d4d7 965 /* Always store the argument in memory. */
8b39fe56
MK
966 write_memory (sp + element * 8, valbuf, len);
967 element += ((len + 7) / 8);
968 }
969
970 gdb_assert (element == num_elements);
971
972 /* Take BIAS into account. */
973 sp -= BIAS;
974 return sp;
975}
976
977static CORE_ADDR
7d9b040b 978sparc64_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
8b39fe56
MK
979 struct regcache *regcache, CORE_ADDR bp_addr,
980 int nargs, struct value **args, CORE_ADDR sp,
981 int struct_return, CORE_ADDR struct_addr)
982{
983 /* Set return address. */
984 regcache_cooked_write_unsigned (regcache, SPARC_O7_REGNUM, bp_addr - 8);
985
986 /* Set up function arguments. */
987 sp = sparc64_store_arguments (regcache, nargs, args, sp,
988 struct_return, struct_addr);
989
990 /* Allocate the register save area. */
991 sp -= 16 * 8;
992
993 /* Stack should be 16-byte aligned at this point. */
3567a8ea 994 gdb_assert ((sp + BIAS) % 16 == 0);
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MK
995
996 /* Finally, update the stack pointer. */
997 regcache_cooked_write_unsigned (regcache, SPARC_SP_REGNUM, sp);
998
5b2d44a0 999 return sp + BIAS;
8b39fe56
MK
1000}
1001\f
1002
1003/* Extract from an array REGBUF containing the (raw) register state, a
1004 function return value of TYPE, and copy that into VALBUF. */
1005
1006static void
1007sparc64_extract_return_value (struct type *type, struct regcache *regcache,
1008 void *valbuf)
1009{
1010 int len = TYPE_LENGTH (type);
1011 char buf[32];
1012 int i;
1013
1014 if (sparc64_structure_or_union_p (type))
1015 {
1016 /* Structure or Union return values. */
1017 gdb_assert (len <= 32);
1018
1019 for (i = 0; i < ((len + 7) / 8); i++)
1020 regcache_cooked_read (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
1021 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1022 sparc64_extract_floating_fields (regcache, type, buf, 0);
1023 memcpy (valbuf, buf, len);
1024 }
1025 else if (sparc64_floating_p (type))
1026 {
1027 /* Floating return values. */
1028 for (i = 0; i < len / 4; i++)
1029 regcache_cooked_read (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1030 memcpy (valbuf, buf, len);
1031 }
1032 else
1033 {
1034 /* Integral and pointer return values. */
1035 gdb_assert (sparc64_integral_or_pointer_p (type));
1036
1037 /* Just stripping off any unused bytes should preserve the
1038 signed-ness just fine. */
1039 regcache_cooked_read (regcache, SPARC_O0_REGNUM, buf);
1040 memcpy (valbuf, buf + 8 - len, len);
1041 }
1042}
1043
1044/* Write into the appropriate registers a function return value stored
1045 in VALBUF of type TYPE. */
1046
1047static void
1048sparc64_store_return_value (struct type *type, struct regcache *regcache,
1049 const void *valbuf)
1050{
1051 int len = TYPE_LENGTH (type);
1052 char buf[16];
1053 int i;
1054
1055 if (sparc64_structure_or_union_p (type))
1056 {
1057 /* Structure or Union return values. */
1058 gdb_assert (len <= 32);
1059
1060 /* Simplify matters by storing the complete value (including
1061 floating members) into %o0 and %o1. Floating members are
1062 also store in the appropriate floating-point registers. */
1063 memset (buf, 0, sizeof (buf));
1064 memcpy (buf, valbuf, len);
1065 for (i = 0; i < ((len + 7) / 8); i++)
60af1db2 1066 regcache_cooked_write (regcache, SPARC_O0_REGNUM + i, buf + i * 8);
8b39fe56
MK
1067 if (TYPE_CODE (type) != TYPE_CODE_UNION)
1068 sparc64_store_floating_fields (regcache, type, buf, 0, 0);
1069 }
1070 else if (sparc64_floating_p (type))
1071 {
1072 /* Floating return values. */
1073 memcpy (buf, valbuf, len);
1074 for (i = 0; i < len / 4; i++)
1075 regcache_cooked_write (regcache, SPARC_F0_REGNUM + i, buf + i * 4);
1076 }
1077 else
1078 {
1079 /* Integral and pointer return values. */
1080 gdb_assert (sparc64_integral_or_pointer_p (type));
1081
1082 /* ??? Do we need to do any sign-extension here? */
1083 memset (buf, 0, 8);
1084 memcpy (buf + 8 - len, valbuf, len);
1085 regcache_cooked_write (regcache, SPARC_O0_REGNUM, buf);
1086 }
1087}
1088
60af1db2
MK
1089static enum return_value_convention
1090sparc64_return_value (struct gdbarch *gdbarch, struct type *type,
1091 struct regcache *regcache, void *readbuf,
1092 const void *writebuf)
8b39fe56 1093{
60af1db2
MK
1094 if (TYPE_LENGTH (type) > 32)
1095 return RETURN_VALUE_STRUCT_CONVENTION;
1096
1097 if (readbuf)
1098 sparc64_extract_return_value (type, regcache, readbuf);
1099 if (writebuf)
1100 sparc64_store_return_value (type, regcache, writebuf);
1101
1102 return RETURN_VALUE_REGISTER_CONVENTION;
8b39fe56 1103}
8b39fe56 1104\f
8b39fe56
MK
1105
1106void
386c036b 1107sparc64_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
8b39fe56 1108{
386c036b 1109 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8b39fe56 1110
386c036b
MK
1111 tdep->pc_regnum = SPARC64_PC_REGNUM;
1112 tdep->npc_regnum = SPARC64_NPC_REGNUM;
8b39fe56 1113
386c036b 1114 /* This is what all the fuss is about. */
8b39fe56
MK
1115 set_gdbarch_long_bit (gdbarch, 64);
1116 set_gdbarch_long_long_bit (gdbarch, 64);
1117 set_gdbarch_ptr_bit (gdbarch, 64);
8b39fe56
MK
1118
1119 set_gdbarch_num_regs (gdbarch, SPARC64_NUM_REGS);
1120 set_gdbarch_register_name (gdbarch, sparc64_register_name);
1121 set_gdbarch_register_type (gdbarch, sparc64_register_type);
1122 set_gdbarch_num_pseudo_regs (gdbarch, SPARC64_NUM_PSEUDO_REGS);
1123 set_gdbarch_pseudo_register_read (gdbarch, sparc64_pseudo_register_read);
1124 set_gdbarch_pseudo_register_write (gdbarch, sparc64_pseudo_register_write);
1125
1126 /* Register numbers of various important registers. */
8b39fe56 1127 set_gdbarch_pc_regnum (gdbarch, SPARC64_PC_REGNUM); /* %pc */
8b39fe56
MK
1128
1129 /* Call dummy code. */
386c036b
MK
1130 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1131 set_gdbarch_push_dummy_code (gdbarch, NULL);
8b39fe56
MK
1132 set_gdbarch_push_dummy_call (gdbarch, sparc64_push_dummy_call);
1133
60af1db2 1134 set_gdbarch_return_value (gdbarch, sparc64_return_value);
386c036b
MK
1135 set_gdbarch_stabs_argument_has_addr
1136 (gdbarch, default_stabs_argument_has_addr);
8b39fe56
MK
1137
1138 set_gdbarch_skip_prologue (gdbarch, sparc64_skip_prologue);
1139
386c036b 1140 frame_unwind_append_sniffer (gdbarch, sparc64_frame_sniffer);
8b39fe56 1141 frame_base_set_default (gdbarch, &sparc64_frame_base);
386c036b
MK
1142}
1143\f
8b39fe56 1144
386c036b 1145/* Helper functions for dealing with register sets. */
8b39fe56 1146
386c036b
MK
1147#define TSTATE_CWP 0x000000000000001fULL
1148#define TSTATE_ICC 0x0000000f00000000ULL
1149#define TSTATE_XCC 0x000000f000000000ULL
8b39fe56 1150
386c036b
MK
1151#define PSR_S 0x00000080
1152#define PSR_ICC 0x00f00000
1153#define PSR_VERS 0x0f000000
1154#define PSR_IMPL 0xf0000000
1155#define PSR_V8PLUS 0xff000000
1156#define PSR_XCC 0x000f0000
8b39fe56 1157
3567a8ea 1158void
386c036b
MK
1159sparc64_supply_gregset (const struct sparc_gregset *gregset,
1160 struct regcache *regcache,
1161 int regnum, const void *gregs)
8b39fe56 1162{
386c036b
MK
1163 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1164 const char *regs = gregs;
8b39fe56
MK
1165 int i;
1166
386c036b 1167 if (sparc32)
8b39fe56 1168 {
386c036b
MK
1169 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1170 {
1171 int offset = gregset->r_tstate_offset;
1172 ULONGEST tstate, psr;
1173 char buf[4];
1174
1175 tstate = extract_unsigned_integer (regs + offset, 8);
1176 psr = ((tstate & TSTATE_CWP) | PSR_S | ((tstate & TSTATE_ICC) >> 12)
1177 | ((tstate & TSTATE_XCC) >> 20) | PSR_V8PLUS);
1178 store_unsigned_integer (buf, 4, psr);
1179 regcache_raw_supply (regcache, SPARC32_PSR_REGNUM, buf);
1180 }
1181
1182 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1183 regcache_raw_supply (regcache, SPARC32_PC_REGNUM,
1184 regs + gregset->r_pc_offset + 4);
1185
1186 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1187 regcache_raw_supply (regcache, SPARC32_NPC_REGNUM,
1188 regs + gregset->r_npc_offset + 4);
8b39fe56 1189
386c036b 1190 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1191 {
386c036b
MK
1192 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1193 regcache_raw_supply (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK
1194 }
1195 }
1196 else
1197 {
386c036b
MK
1198 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1199 regcache_raw_supply (regcache, SPARC64_STATE_REGNUM,
1200 regs + gregset->r_tstate_offset);
8b39fe56 1201
386c036b
MK
1202 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1203 regcache_raw_supply (regcache, SPARC64_PC_REGNUM,
1204 regs + gregset->r_pc_offset);
1205
1206 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1207 regcache_raw_supply (regcache, SPARC64_NPC_REGNUM,
1208 regs + gregset->r_npc_offset);
1209
1210 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1211 {
386c036b
MK
1212 char buf[8];
1213
1214 memset (buf, 0, 8);
1215 memcpy (buf + 8 - gregset->r_y_size,
1216 regs + gregset->r_y_offset, gregset->r_y_size);
1217 regcache_raw_supply (regcache, SPARC64_Y_REGNUM, buf);
3567a8ea 1218 }
8b39fe56 1219
386c036b
MK
1220 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1221 && gregset->r_fprs_offset != -1)
1222 regcache_raw_supply (regcache, SPARC64_FPRS_REGNUM,
1223 regs + gregset->r_fprs_offset);
1224 }
1225
1226 if (regnum == SPARC_G0_REGNUM || regnum == -1)
1227 regcache_raw_supply (regcache, SPARC_G0_REGNUM, NULL);
1228
1229 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1230 {
1231 int offset = gregset->r_g1_offset;
1232
1233 if (sparc32)
1234 offset += 4;
1235
1236 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
8b39fe56 1237 {
3567a8ea 1238 if (regnum == i || regnum == -1)
386c036b
MK
1239 regcache_raw_supply (regcache, i, regs + offset);
1240 offset += 8;
1241 }
1242 }
1243
1244 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1245 {
1246 /* Not all of the register set variants include Locals and
1247 Inputs. For those that don't, we read them off the stack. */
1248 if (gregset->r_l0_offset == -1)
1249 {
1250 ULONGEST sp;
1251
1252 regcache_cooked_read_unsigned (regcache, SPARC_SP_REGNUM, &sp);
1253 sparc_supply_rwindow (regcache, sp, regnum);
1254 }
1255 else
1256 {
1257 int offset = gregset->r_l0_offset;
1258
1259 if (sparc32)
1260 offset += 4;
1261
1262 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1263 {
386c036b
MK
1264 if (regnum == i || regnum == -1)
1265 regcache_raw_supply (regcache, i, regs + offset);
1266 offset += 8;
3567a8ea 1267 }
8b39fe56
MK
1268 }
1269 }
1270}
1271
1272void
386c036b
MK
1273sparc64_collect_gregset (const struct sparc_gregset *gregset,
1274 const struct regcache *regcache,
1275 int regnum, void *gregs)
8b39fe56 1276{
386c036b
MK
1277 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1278 char *regs = gregs;
3567a8ea
MK
1279 int i;
1280
386c036b 1281 if (sparc32)
8b39fe56 1282 {
386c036b
MK
1283 if (regnum == SPARC32_PSR_REGNUM || regnum == -1)
1284 {
1285 int offset = gregset->r_tstate_offset;
1286 ULONGEST tstate, psr;
1287 char buf[8];
1288
1289 tstate = extract_unsigned_integer (regs + offset, 8);
1290 regcache_raw_collect (regcache, SPARC32_PSR_REGNUM, buf);
1291 psr = extract_unsigned_integer (buf, 4);
1292 tstate |= (psr & PSR_ICC) << 12;
1293 if ((psr & (PSR_VERS | PSR_IMPL)) == PSR_V8PLUS)
1294 tstate |= (psr & PSR_XCC) << 20;
1295 store_unsigned_integer (buf, 8, tstate);
1296 memcpy (regs + offset, buf, 8);
1297 }
8b39fe56 1298
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1299 if (regnum == SPARC32_PC_REGNUM || regnum == -1)
1300 regcache_raw_collect (regcache, SPARC32_PC_REGNUM,
1301 regs + gregset->r_pc_offset + 4);
1302
1303 if (regnum == SPARC32_NPC_REGNUM || regnum == -1)
1304 regcache_raw_collect (regcache, SPARC32_NPC_REGNUM,
1305 regs + gregset->r_npc_offset + 4);
1306
1307 if (regnum == SPARC32_Y_REGNUM || regnum == -1)
8b39fe56 1308 {
386c036b
MK
1309 int offset = gregset->r_y_offset + 8 - gregset->r_y_size;
1310 regcache_raw_collect (regcache, SPARC32_Y_REGNUM, regs + offset);
8b39fe56
MK
1311 }
1312 }
1313 else
1314 {
386c036b
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1315 if (regnum == SPARC64_STATE_REGNUM || regnum == -1)
1316 regcache_raw_collect (regcache, SPARC64_STATE_REGNUM,
1317 regs + gregset->r_tstate_offset);
1318
1319 if (regnum == SPARC64_PC_REGNUM || regnum == -1)
1320 regcache_raw_collect (regcache, SPARC64_PC_REGNUM,
1321 regs + gregset->r_pc_offset);
3567a8ea 1322
386c036b
MK
1323 if (regnum == SPARC64_NPC_REGNUM || regnum == -1)
1324 regcache_raw_collect (regcache, SPARC64_NPC_REGNUM,
1325 regs + gregset->r_npc_offset);
3567a8ea 1326
386c036b 1327 if (regnum == SPARC64_Y_REGNUM || regnum == -1)
3567a8ea 1328 {
386c036b
MK
1329 char buf[8];
1330
1331 regcache_raw_collect (regcache, SPARC64_Y_REGNUM, buf);
1332 memcpy (regs + gregset->r_y_offset,
1333 buf + 8 - gregset->r_y_size, gregset->r_y_size);
1334 }
1335
1336 if ((regnum == SPARC64_FPRS_REGNUM || regnum == -1)
1337 && gregset->r_fprs_offset != -1)
1338 regcache_raw_collect (regcache, SPARC64_FPRS_REGNUM,
1339 regs + gregset->r_fprs_offset);
1340
1341 }
1342
1343 if ((regnum >= SPARC_G1_REGNUM && regnum <= SPARC_O7_REGNUM) || regnum == -1)
1344 {
1345 int offset = gregset->r_g1_offset;
1346
1347 if (sparc32)
1348 offset += 4;
1349
1350 /* %g0 is always zero. */
1351 for (i = SPARC_G1_REGNUM; i <= SPARC_O7_REGNUM; i++)
1352 {
1353 if (regnum == i || regnum == -1)
1354 regcache_raw_collect (regcache, i, regs + offset);
1355 offset += 8;
1356 }
1357 }
1358
1359 if ((regnum >= SPARC_L0_REGNUM && regnum <= SPARC_I7_REGNUM) || regnum == -1)
1360 {
1361 /* Not all of the register set variants include Locals and
1362 Inputs. For those that don't, we read them off the stack. */
1363 if (gregset->r_l0_offset != -1)
1364 {
1365 int offset = gregset->r_l0_offset;
1366
1367 if (sparc32)
1368 offset += 4;
1369
1370 for (i = SPARC_L0_REGNUM; i <= SPARC_I7_REGNUM; i++)
3567a8ea 1371 {
386c036b
MK
1372 if (regnum == i || regnum == -1)
1373 regcache_raw_collect (regcache, i, regs + offset);
1374 offset += 8;
3567a8ea
MK
1375 }
1376 }
8b39fe56
MK
1377 }
1378}
8b39fe56 1379
386c036b
MK
1380void
1381sparc64_supply_fpregset (struct regcache *regcache,
1382 int regnum, const void *fpregs)
1383{
1384 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1385 const char *regs = fpregs;
1386 int i;
1387
1388 for (i = 0; i < 32; i++)
1389 {
1390 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1391 regcache_raw_supply (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1392 }
1393
1394 if (sparc32)
1395 {
1396 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1397 regcache_raw_supply (regcache, SPARC32_FSR_REGNUM,
1398 regs + (32 * 4) + (16 * 8) + 4);
1399 }
1400 else
1401 {
1402 for (i = 0; i < 16; i++)
1403 {
1404 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1405 regcache_raw_supply (regcache, SPARC64_F32_REGNUM + i,
1406 regs + (32 * 4) + (i * 8));
1407 }
1408
1409 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1410 regcache_raw_supply (regcache, SPARC64_FSR_REGNUM,
1411 regs + (32 * 4) + (16 * 8));
1412 }
1413}
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MK
1414
1415void
386c036b
MK
1416sparc64_collect_fpregset (const struct regcache *regcache,
1417 int regnum, void *fpregs)
8b39fe56 1418{
386c036b
MK
1419 int sparc32 = (gdbarch_ptr_bit (current_gdbarch) == 32);
1420 char *regs = fpregs;
1421 int i;
1422
1423 for (i = 0; i < 32; i++)
1424 {
1425 if (regnum == (SPARC_F0_REGNUM + i) || regnum == -1)
1426 regcache_raw_collect (regcache, SPARC_F0_REGNUM + i, regs + (i * 4));
1427 }
1428
1429 if (sparc32)
1430 {
1431 if (regnum == SPARC32_FSR_REGNUM || regnum == -1)
1432 regcache_raw_collect (regcache, SPARC32_FSR_REGNUM,
1433 regs + (32 * 4) + (16 * 8) + 4);
1434 }
1435 else
1436 {
1437 for (i = 0; i < 16; i++)
1438 {
1439 if (regnum == (SPARC64_F32_REGNUM + i) || regnum == -1)
1440 regcache_raw_collect (regcache, SPARC64_F32_REGNUM + i,
1441 regs + (32 * 4) + (i * 8));
1442 }
1443
1444 if (regnum == SPARC64_FSR_REGNUM || regnum == -1)
1445 regcache_raw_collect (regcache, SPARC64_FSR_REGNUM,
1446 regs + (32 * 4) + (16 * 8));
1447 }
8b39fe56 1448}
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