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9b254dd1 | 1 | # Copyright (C) 2002, 2003, 2005, 2007, 2008 Free Software Foundation, Inc. |
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2 | # |
3 | # This program is free software; you can redistribute it and/or modify | |
4 | # it under the terms of the GNU General Public License as published by | |
e22f8b7c | 5 | # the Free Software Foundation; either version 3 of the License, or |
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6 | # (at your option) any later version. |
7 | # | |
e22f8b7c | 8 | # This program is distributed in the hope that it will be useful, |
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9 | # but WITHOUT ANY WARRANTY; without even the implied warranty of |
10 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
11 | # GNU General Public License for more details. | |
e22f8b7c | 12 | # |
57680a24 | 13 | # You should have received a copy of the GNU General Public License |
e22f8b7c | 14 | # along with this program. If not, see <http://www.gnu.org/licenses/>. |
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15 | # |
16 | # Please email any bugs, comments, and/or additions to this file to: | |
17 | # bug-gdb@prep.ai.mit.edu | |
18 | # | |
19 | ||
20 | # Tests for Powerpc AltiVec register setting and fetching | |
21 | ||
22 | if $tracelevel then { | |
23 | strace $tracelevel | |
24 | } | |
25 | ||
26 | # | |
27 | # Test the use of registers, especially AltiVec registers, for Powerpc. | |
28 | # This file uses altivec-regs.c for input. | |
29 | # | |
30 | ||
31 | set prms_id 0 | |
32 | set bug_id 0 | |
33 | ||
3c95e6af | 34 | if {![istarget "powerpc*"] || [skip_altivec_tests]} then { |
57680a24 | 35 | verbose "Skipping altivec register tests." |
3c95e6af | 36 | verbose -log "Skipping altivec register tests." |
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37 | return |
38 | } | |
39 | ||
40 | set testfile "altivec-regs" | |
41 | set binfile ${objdir}/${subdir}/${testfile} | |
f2dd3617 | 42 | set srcfile ${testfile}.c |
57680a24 | 43 | |
fc91c6c2 | 44 | set compile_flags {debug nowarnings} |
d1779be4 PG |
45 | if [get_compiler_info $binfile] { |
46 | warning "get_compiler failed" | |
47 | return -1 | |
48 | } | |
49 | ||
50 | if [test_compiler_info gcc*] { | |
e7b1eae6 | 51 | set compile_flags "$compile_flags additional_flags=-maltivec additional_flags=-mabi=altivec" |
d1779be4 PG |
52 | } elseif [test_compiler_info xlc*] { |
53 | set compile_flags "$compile_flags additional_flags=-qaltivec" | |
54 | } else { | |
55 | warning "unknown compiler" | |
56 | return -1 | |
57 | } | |
58 | ||
59 | if { [gdb_compile ${srcdir}/${subdir}/${srcfile} ${binfile} executable $compile_flags] != "" } { | |
b60f0898 JB |
60 | untested altivec-regs.exp |
61 | return -1 | |
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62 | } |
63 | ||
64 | gdb_start | |
65 | gdb_reinitialize_dir $srcdir/$subdir | |
66 | gdb_load ${binfile} | |
67 | ||
68 | # | |
69 | # Run to `main' where we begin our tests. | |
70 | # | |
71 | ||
72 | if ![runto_main] then { | |
73 | gdb_suppress_tests | |
74 | } | |
75 | ||
76 | # set all the registers integer portions to 1 | |
77 | for {set i 0} {$i < 32} {incr i 1} { | |
78 | for {set j 0} {$j < 4} {incr j 1} { | |
79 | gdb_test "set \$vr$i.v4_int32\[$j\] = 1" "" "set reg vr$i.v4si.f\[$j\]" | |
80 | } | |
81 | } | |
82 | ||
83 | gdb_test "set \$vscr = 1" "" "" | |
84 | gdb_test "set \$vrsave = 1" "" "" | |
85 | ||
86 | # Now execute some target code, so that GDB's register cache is flushed. | |
87 | ||
88 | gdb_test "next" "" "" | |
89 | ||
90 | send_gdb "show endian\n" | |
2429decf | 91 | set endianness "" |
57680a24 EZ |
92 | gdb_expect { |
93 | -re "(The target endianness is set automatically .currently )(big|little)( endian.*)$gdb_prompt $" { | |
94 | pass "endianness" | |
95 | set endianness $expect_out(2,string) | |
96 | } | |
97 | -re ".*$gdb_prompt $" { | |
98 | fail "couldn't get endianness" | |
99 | } | |
100 | timeout { fail "(timeout) endianness" } | |
101 | } | |
102 | ||
103 | # And then read the AltiVec registers back, to see that | |
104 | # a) the register write above worked, and | |
105 | # b) the register read (below) also works. | |
106 | ||
107 | if {$endianness == "big"} { | |
108 | set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1., v16_int8 = .0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1.." | |
109 | } else { | |
110 | set vector_register ".uint128 = 0x00000001000000010000000100000001, v4_float = .0x0, 0x0, 0x0, 0x0., v4_int32 = .0x1, 0x1, 0x1, 0x1., v8_int16 = .0x1, 0x0, 0x1, 0x0, 0x1, 0x0, 0x1, 0x0., v16_int8 = .0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0, 0x1, 0x0, 0x0, 0x0.." | |
111 | } | |
112 | ||
113 | for {set i 0} {$i < 32} {incr i 1} { | |
114 | gdb_test "info reg vr$i" "vr$i.*$vector_register" "info reg vr$i" | |
115 | } | |
116 | ||
f4711d79 PG |
117 | gdb_test "info reg vrsave" "vrsave.*0x1\t1" "info reg vrsave" |
118 | gdb_test "info reg vscr" "vscr.*0x1\t1" "info reg vscr" | |
57680a24 EZ |
119 | |
120 | # Now redo the same tests, but using the print command. | |
121 | # Note: in LE case, the char array is printed WITHOUT the last character. | |
122 | # Gdb treats the terminating null char in the array like the terminating | |
123 | # null char in a string and doesn't print it. This is not a failure, but | |
124 | # the way gdb works. | |
125 | ||
126 | if {$endianness == "big"} { | |
c641edcc | 127 | set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .0, 1, 0, 1, 0, 1, 0, 1., v16_int8 = .0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1.." |
57680a24 | 128 | } else { |
c641edcc | 129 | set decimal_vector ".uint128 = 0x00000001000000010000000100000001, v4_float = .1.*e-45, 1.*e-45, 1.*e-45, 1.*e-45., v4_int32 = .1, 1, 1, 1., v8_int16 = .1, 0, 1, 0, 1, 0, 1, 0., v16_int8 = .1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0.." |
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130 | } |
131 | ||
132 | for {set i 0} {$i < 32} {incr i 1} { | |
133 | gdb_test "print \$vr$i" ".* = $decimal_vector" "print vr$i" | |
134 | } | |
135 | ||
136 | gdb_test "print \$vrsave" ".* = 1" "print vrsave" | |
137 | gdb_test "print \$vscr" ".* = 1" "print vscr" | |
138 | ||
139 | for {set i 0} {$i < 32} {incr i 1} { | |
140 | set pattern$i ".*vr$i.*" | |
141 | append pattern$i $vector_register | |
142 | } | |
143 | ||
561d7a1d PG |
144 | send_gdb "info vector\n" |
145 | gdb_expect_list "info vector" ".*$gdb_prompt $" { | |
57680a24 EZ |
146 | [$pattern0] |
147 | [$pattern1] | |
148 | [$pattern2] | |
149 | [$pattern3] | |
150 | [$pattern4] | |
151 | [$pattern5] | |
152 | [$pattern6] | |
153 | [$pattern7] | |
154 | [$pattern8] | |
155 | [$pattern9] | |
156 | [$pattern10] | |
157 | [$pattern11] | |
158 | [$pattern12] | |
159 | [$pattern13] | |
160 | [$pattern14] | |
161 | [$pattern15] | |
162 | [$pattern16] | |
163 | [$pattern17] | |
164 | [$pattern18] | |
165 | [$pattern19] | |
166 | [$pattern20] | |
167 | [$pattern21] | |
168 | [$pattern22] | |
169 | [$pattern23] | |
170 | [$pattern24] | |
171 | [$pattern25] | |
172 | [$pattern26] | |
173 | [$pattern27] | |
174 | [$pattern28] | |
175 | [$pattern29] | |
176 | [$pattern30] | |
177 | [$pattern31] | |
178 | "\[ \t\n\r\]+vscr\[ \t\]+0x1" | |
179 | "\[ \t\n\r\]+vrsave\[ \t\]+0x1" | |
180 | } | |
181 | ||
182 | gdb_test "break vector_fun" \ | |
183 | "Breakpoint 2 at.*altivec-regs.c, line \[0-9\]+\\." \ | |
184 | "Set breakpoint at vector_fun" | |
185 | ||
186 | # Actually it is nuch easier to see these results printed in hex. | |
187 | gdb_test "set output-radix 16" \ | |
188 | "Output radix now set to decimal 16, hex 10, octal 20." \ | |
189 | "Set output radix to hex" | |
190 | ||
191 | gdb_test "continue" \ | |
192 | "Breakpoint 2, vector_fun .a=.0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe., b=.0x1010101, 0x1010101, 0x1010101, 0x1010101.*altivec-regs.c.*vec_splat_u8.2..;" \ | |
193 | "continue to vector_fun" | |
194 | ||
195 | # Do a next over the assignment to vector 'a'. | |
196 | gdb_test "next" ".*b = \\(\\(vector unsigned int\\) vec_splat_u8\\(3\\)\\);" \ | |
197 | "next (1)" | |
198 | ||
199 | # Do a next over the assignment to vector 'b'. | |
200 | gdb_test "next" "c = vec_add \\(a, b\\);" \ | |
201 | "next (2)" | |
202 | ||
203 | # Now 'a' should be '0x02020202...' and 'b' should be '0x03030303...' | |
204 | gdb_test "print/x a" \ | |
205 | ".*= .0x2020202, 0x2020202, 0x2020202, 0x2020202." \ | |
206 | "print vector parameter a" | |
207 | ||
208 | gdb_test "print/x b" \ | |
209 | ".*= .0x3030303, 0x3030303, 0x3030303, 0x3030303." \ | |
210 | "print vector parameter b" | |
211 | ||
212 | # If we do an 'up' now, and print 'x' and 'y' we should see the values they | |
213 | # have in main, not the values they have in vector_fun. | |
214 | gdb_test "up" ".1.*main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);" \ | |
215 | "up to main" | |
216 | ||
217 | gdb_test "print/x x" \ | |
218 | ".*= .0xfefefefe, 0xfefefefe, 0xfefefefe, 0xfefefefe." \ | |
219 | "print vector x" | |
220 | ||
221 | gdb_test "print/x y" \ | |
222 | ".*= .0x1010101, 0x1010101, 0x1010101, 0x1010101." \ | |
223 | "print vector y" | |
224 | ||
225 | # now go back to vector_func and do a finish, to see if we can print the return | |
226 | # value correctly. | |
227 | ||
228 | gdb_test "down" \ | |
229 | ".0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*c = vec_add \\(a, b\\);" \ | |
230 | "down to vector_fun" | |
231 | ||
232 | gdb_test "finish" \ | |
233 | "Run till exit from .0 vector_fun \\(a=.0x2020202, 0x2020202, 0x2020202, 0x2020202., b=.0x3030303, 0x3030303, 0x3030303, 0x3030303.\\) at.*altivec-regs.c.*in main \\(\\) at.*altivec-regs.c.*z = vector_fun \\(x, y\\);.*Value returned is.*= .0x5050505, 0x5050505, 0x5050505, 0x5050505." \ | |
234 | "finish returned correct value" | |
235 | ||
236 | ||
237 |