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3666a048 | 1 | /* Copyright 2010-2021 Free Software Foundation, Inc. |
2a20745c YQ |
2 | |
3 | This file is part of GDB. | |
4 | ||
5 | This program is free software; you can redistribute it and/or modify | |
6 | it under the terms of the GNU General Public License as published by | |
7 | the Free Software Foundation; either version 3 of the License, or | |
8 | (at your option) any later version. | |
9 | ||
10 | This program is distributed in the hope that it will be useful, | |
11 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | GNU General Public License for more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License | |
16 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
17 | ||
18 | .syntax unified | |
19 | .text | |
20 | .type main,%function | |
3eb2ef34 | 21 | #if defined (__thumb__) |
2a20745c YQ |
22 | .code 16 |
23 | .thumb_func | |
24 | #endif | |
25 | .globl main | |
26 | main: | |
27 | push {r7, lr} | |
28 | add sp, sp, #4 | |
29 | mov r7, sp | |
30 | ||
31 | ||
32 | /* Test call and return */ | |
33 | .global test_call | |
34 | test_call: | |
35 | bl test_call_subr | |
36 | .global test_ret_end | |
37 | test_ret_end: | |
38 | nop @ Location test_ret_end | |
39 | ||
40 | /* Test branch */ | |
41 | bl test_branch | |
42 | ||
43 | /* Test ldr from pc */ | |
44 | bl test_ldr_pc | |
45 | ||
46 | /* Test ldm/stm only in ARM mode */ | |
3eb2ef34 | 47 | #if !defined (__thumb__) |
2a20745c YQ |
48 | bl test_ldm_stm_pc |
49 | #endif | |
50 | ||
34518530 YQ |
51 | /* Test ldrX literal in ARM and Thumb-2 */ |
52 | #if !defined (__thumb__) || defined(__thumb2__) | |
0c51be18 YQ |
53 | bl test_ldr_literal |
54 | #endif | |
55 | ||
34518530 YQ |
56 | /* Test ldr literal in Thumb */ |
57 | #if defined(__thumb__) | |
58 | bl test_ldr_literal_16 | |
0c51be18 YQ |
59 | #endif |
60 | ||
34518530 YQ |
61 | /* Test cbnz/cbz in Thumb-2 */ |
62 | #if defined(__thumb2__) | |
63 | bl test_cbz_cbnz | |
0c51be18 YQ |
64 | #endif |
65 | ||
34518530 YQ |
66 | /* Test adr in Thumb and Thumb-2 */ |
67 | #if defined(__thumb__) | |
68 | bl test_adr | |
69 | #endif | |
70 | /* Test 32-bit adr in ARM and Thumb-2 */ | |
71 | #if defined(__thumb2__) || !defined(__thumb__) | |
72 | bl test_adr_32bit | |
73 | #endif | |
74 | ||
75 | bl test_pop_pc | |
76 | ||
494e194e YQ |
77 | /* Test str in ARM mode and Thumb-2 */ |
78 | #if !defined(__thumb__) | |
79 | bl test_str_pc | |
80 | #endif | |
ef713951 YQ |
81 | |
82 | /* Test add with pc in Thumb and Thumb-2 */ | |
83 | #if defined(__thumb__) | |
84 | bl test_add_rn_pc | |
85 | #endif | |
2a20745c YQ |
86 | /* Return */ |
87 | mov sp, r7 | |
88 | sub sp, sp, #4 | |
89 | movs r0, #0 | |
90 | pop {r7, pc} | |
91 | .size main, .-main | |
92 | ||
93 | .global test_call_subr | |
3eb2ef34 | 94 | #if defined (__thumb__) |
2a20745c YQ |
95 | .code 16 |
96 | .thumb_func | |
97 | #endif | |
98 | .type test_call_subr, %function | |
99 | test_call_subr: | |
100 | nop | |
101 | .global test_call_end | |
102 | test_call_end: | |
103 | nop @ Location test_call_end | |
104 | .global test_ret | |
105 | test_ret: | |
106 | bx lr | |
107 | .size test_call_subr, .-test_call_subr | |
108 | ||
109 | ||
110 | .global test_branch | |
3eb2ef34 | 111 | #if defined (__thumb__) |
2a20745c YQ |
112 | .code 16 |
113 | .thumb_func | |
114 | #endif | |
115 | .type test_branch, %function | |
116 | test_branch: | |
117 | b L_branch | |
944a9061 | 118 | .global L_branch |
2a20745c YQ |
119 | L_branch: |
120 | bx lr | |
121 | .size test_branch, .-test_branch | |
122 | ||
123 | .global test_ldr_pc | |
3eb2ef34 | 124 | #if defined (__thumb__) |
2a20745c YQ |
125 | .code 16 |
126 | .thumb_func | |
127 | #endif | |
128 | .type test_ldr_pc, %function | |
129 | test_ldr_pc: | |
130 | ldr r1, [pc, #0] | |
131 | ||
944a9061 | 132 | .global test_ldr_pc_ret |
2a20745c YQ |
133 | test_ldr_pc_ret: |
134 | bx lr | |
135 | .size test_ldr_pc, .-test_ldr_pc | |
136 | ||
3eb2ef34 | 137 | #if !defined (__thumb__) |
2a20745c YQ |
138 | .global test_ldm_stm_pc |
139 | .type test_ldm_stm_pc, %function | |
140 | test_ldm_stm_pc: | |
141 | stmdb sp!, {lr, pc} | |
142 | ldmia sp!, {r0, r1} | |
143 | ldr r0, .L1 | |
144 | stmdb sp!, {r0} | |
944a9061 | 145 | .global test_ldm_pc |
2a20745c YQ |
146 | test_ldm_pc: |
147 | ldmia sp!, {pc} | |
944a9061 | 148 | .global test_ldm_stm_pc_ret |
2a20745c YQ |
149 | test_ldm_stm_pc_ret: |
150 | bx lr | |
151 | .align 2 | |
152 | .L1: | |
153 | .word test_ldm_stm_pc_ret | |
154 | .size test_ldm_stm_pc, .-test_ldm_stm_pc | |
155 | #endif | |
34518530 YQ |
156 | |
157 | #if !defined (__thumb__) || defined(__thumb2__) | |
0c51be18 YQ |
158 | .global test_ldr_literal |
159 | .type test_ldr_literal, %function | |
160 | test_ldr_literal: | |
161 | ldrh r0, [pc] | |
162 | .global test_ldrsb_literal | |
163 | test_ldrsb_literal: | |
164 | ldrsb r0, [pc] | |
165 | .global test_ldrsh_literal | |
166 | test_ldrsh_literal: | |
167 | ldrsh r0, [pc] | |
168 | .global test_ldr_literal_end | |
169 | test_ldr_literal_end: | |
170 | bx lr | |
171 | .size test_ldr_literal, .-test_ldr_literal | |
172 | #endif | |
173 | ||
34518530 YQ |
174 | #if defined(__thumb__) |
175 | .global test_ldr_literal_16 | |
176 | .code 16 | |
177 | .thumb_func | |
178 | test_ldr_literal_16: | |
179 | ldr r0, .L2 | |
180 | .global test_ldr_literal_16_end | |
181 | test_ldr_literal_16_end: | |
182 | bx lr | |
183 | .align 2 | |
184 | .L2: | |
185 | .word test_ldr_literal_16 | |
186 | .size test_ldr_literal_16, .-test_ldr_literal_16 | |
187 | #endif | |
0c51be18 | 188 | |
34518530 YQ |
189 | #if defined(__thumb2__) |
190 | .global test_cbz_cbnz | |
191 | .code 16 | |
192 | .thumb_func | |
193 | test_cbz_cbnz: | |
194 | movs r0, #0 | |
195 | .global test_zero_cbnz | |
196 | test_zero_cbnz: | |
197 | cbnz r0, .L3 | |
198 | .global test_zero_cbz | |
199 | test_zero_cbz: | |
200 | cbz r0, .L3 | |
201 | .L3: | |
202 | movs r0, #1 | |
203 | .global test_non_zero_cbz | |
204 | test_non_zero_cbz: | |
205 | cbz r0, .L4 | |
206 | .global test_non_zero_cbnz | |
207 | test_non_zero_cbnz: | |
208 | cbnz r0, .L4 | |
209 | nop | |
210 | .L4: | |
211 | .global test_cbz_cbnz_end | |
212 | test_cbz_cbnz_end: | |
213 | bx lr | |
214 | .size test_cbz_cbnz, .-test_cbz_cbnz | |
215 | #endif | |
216 | ||
217 | #if defined(__thumb__) | |
218 | .global test_adr | |
219 | .code 16 | |
220 | .thumb_func | |
221 | test_adr: | |
222 | adr r0, .L8 | |
223 | nop | |
224 | nop | |
225 | nop | |
226 | .L8: | |
227 | .global test_adr_end | |
228 | test_adr_end: | |
229 | bx lr | |
230 | .size test_adr, .-test_adr | |
231 | #endif | |
232 | ||
233 | #if defined(__thumb2__) || !defined(__thumb__) | |
0c51be18 YQ |
234 | .global test_adr_32bit |
235 | #if defined(__thumb2__) | |
236 | .code 16 | |
237 | .thumb_func | |
238 | #endif | |
239 | test_adr_32bit: | |
240 | adr r0, .L6 | |
241 | nop | |
242 | .L6: | |
243 | nop | |
244 | .global test_adr_32bit_after | |
245 | test_adr_32bit_after: | |
246 | adr r0, .L6 | |
247 | ||
248 | .global test_adr_32bit_end | |
249 | test_adr_32bit_end: | |
250 | bx lr | |
251 | .size test_adr_32bit, .-test_adr_32bit | |
252 | #endif | |
253 | ||
254 | .global test_pop_pc | |
255 | .type test_pop_pc, %function | |
256 | #if defined(__thumb__) | |
257 | .code 16 | |
258 | .thumb_func | |
259 | #endif | |
260 | ||
261 | test_pop_pc: | |
34518530 YQ |
262 | ldr r1, .L1_right |
263 | ldr r2, .L1_wrong | |
0c51be18 YQ |
264 | #if defined(__thumb__) |
265 | movs r0, #1 | |
266 | orrs r1, r0 | |
34518530 | 267 | orrs r2, r0 |
0c51be18 YQ |
268 | #endif |
269 | push {r1} | |
34518530 | 270 | push {r2} |
0c51be18 YQ |
271 | .global test_pop_pc_1 |
272 | test_pop_pc_1: | |
273 | pop {r1, pc} | |
34518530 YQ |
274 | |
275 | test_pop_pc_2_start: | |
276 | ldr r1, .L2_right | |
277 | #if defined(__thumb__) | |
278 | movs r0, #1 | |
279 | orrs r1, r0 | |
280 | #endif | |
281 | push {r1} | |
282 | .global test_pop_pc_2 | |
283 | test_pop_pc_2: | |
284 | pop {pc} | |
285 | ||
286 | /* Test pop instruction with full register list. */ | |
287 | test_pop_pc_3_start: | |
288 | ldr r1, .L3_right | |
289 | ldr r2, .L3_wrong | |
290 | #if defined(__thumb__) | |
291 | movs r0, #1 | |
292 | orrs r1, r0 | |
293 | orrs r2, r0 | |
294 | #endif | |
295 | push {r7} | |
296 | push {r1} /* Push the right address so that PC will get it. */ | |
297 | /* Push the wrong address so r0-r7 will get the wrong a ddress. If PC | |
298 | is set from any of them, we can get a FAIL. */ | |
299 | push {r2} | |
300 | push {r2} | |
301 | push {r2} | |
302 | push {r2} | |
303 | push {r2} | |
304 | push {r2} | |
305 | push {r2} | |
306 | push {r2} | |
307 | test_pop_pc_3: | |
308 | pop {r0,r1,r2,r3,r4,r5,r6,r7,pc} | |
0c51be18 YQ |
309 | .global test_pop_pc_ret |
310 | test_pop_pc_ret: | |
34518530 | 311 | pop {r7} |
0c51be18 | 312 | bx lr |
34518530 YQ |
313 | |
314 | .global test_pop_pc_1_right | |
315 | test_pop_pc_1_right: | |
316 | b test_pop_pc_2_start /* right */ | |
317 | .global test_pop_pc_1_wrong | |
318 | test_pop_pc_1_wrong: | |
319 | b test_pop_pc_2_start /* wrong */ | |
320 | .global test_pop_pc_2_right | |
321 | test_pop_pc_2_right: | |
322 | b test_pop_pc_3_start /* right */ | |
323 | .global test_pop_pc_2_wrong | |
324 | test_pop_pc_2_wrong: | |
325 | b test_pop_pc_3_start /* wrong */ | |
326 | .global test_pop_pc_3_right | |
327 | test_pop_pc_3_right: | |
328 | b test_pop_pc_ret /* right */ | |
329 | .global test_pop_pc_3_wrong | |
330 | test_pop_pc_3_wrong: | |
331 | b test_pop_pc_ret /* wrong */ | |
332 | ||
0c51be18 | 333 | .align 2 |
34518530 YQ |
334 | .L1_right: |
335 | .word test_pop_pc_1_right | |
336 | .L1_wrong: | |
337 | .word test_pop_pc_1_wrong | |
338 | .L2_right: | |
339 | .word test_pop_pc_2_right | |
340 | .L2_wrong: | |
341 | .word test_pop_pc_2_wrong | |
342 | .L3_right: | |
343 | .word test_pop_pc_3_right | |
344 | .L3_wrong: | |
345 | .word test_pop_pc_3_wrong | |
0c51be18 YQ |
346 | .size test_pop_pc, .-test_pop_pc |
347 | ||
494e194e YQ |
348 | #if !defined(__thumb__) |
349 | #if defined (__thumb2__) | |
350 | .code 16 | |
351 | .thumb_func | |
352 | #endif | |
353 | .global test_str_pc | |
354 | .type test_str_pc, %function | |
355 | test_str_pc: | |
356 | str pc, [sp, #-4] | |
357 | ldr r0, [sp, #-4] | |
358 | sub r0, r0, pc | |
359 | /* compute offset again without displaced stepping. */ | |
360 | str pc, [sp, #-4] | |
361 | ldr r1, [sp, #-4] | |
362 | sub r1, r1, pc | |
363 | ||
364 | /* r0 should be equal to r1. */ | |
365 | cmp r0, r1 | |
366 | bne pc_offset_wrong | |
367 | ||
368 | .global pc_offset_right | |
369 | pc_offset_right: | |
370 | b test_str_pc_end | |
371 | ||
372 | .global pc_offset_wrong | |
373 | pc_offset_wrong: | |
374 | nop | |
375 | ||
376 | .global test_str_pc_end | |
377 | test_str_pc_end: | |
378 | bx lr | |
379 | #endif | |
ef713951 YQ |
380 | |
381 | #if defined(__thumb__) | |
382 | .global test_add_rn_pc | |
383 | .code 16 | |
384 | .thumb_func | |
385 | test_add_rn_pc: | |
386 | mov r3, 4 | |
387 | test_add_rn_pc_start: | |
388 | add r3, pc | |
389 | .global test_add_rn_pc_end | |
390 | test_add_rn_pc_end: | |
391 | bx lr | |
392 | .size test_add_rn_pc, .-test_add_rn_pc | |
393 | #endif |