Commit | Line | Data |
---|---|---|
c2d11a7d JM |
1 | |
2 | .globl _main | |
3 | .globl call_tests | |
4 | .globl movm_tests | |
5 | .globl misc_tests | |
6 | .globl mov_tests | |
7 | .globl ext_tests | |
8 | .globl add_tests | |
9 | .globl sub_tests | |
10 | .globl cmp_tests | |
11 | .globl logical_tests | |
12 | .globl shift_tests | |
13 | .globl muldiv_tests | |
14 | .globl movbu_tests | |
15 | .globl movhu_tests | |
16 | .globl mac_tests | |
17 | .globl bit_tests | |
18 | .globl dsp_add_tests | |
19 | .globl dsp_cmp_tests | |
20 | .globl dsp_sub_tests | |
21 | .globl dsp_mov_tests | |
22 | .globl dsp_logical_tests | |
23 | .globl dsp_misc_tests | |
24 | .globl autoincrement_tests | |
25 | .globl dsp_autoincrement_tests | |
26 | ||
27 | .text | |
28 | .am33 | |
29 | _main: | |
30 | call_tests: | |
31 | call 256,[a2,a3,exreg0],9 | |
32 | call 256,[a2,a3,exreg1],9 | |
33 | call 256,[a2,a3,exother],9 | |
34 | call 256,[a2,a3,all],9 | |
35 | call 131071,[a2,a3,exreg0],9 | |
36 | call 131071,[a2,a3,exreg1],9 | |
37 | call 131071,[a2,a3,exother],9 | |
38 | call 131071,[a2,a3,all],9 | |
39 | ||
40 | movm_tests: | |
41 | movm (sp),[a2,a3,exreg0] | |
42 | movm (sp),[a2,a3,exreg1] | |
43 | movm (sp),[a2,a3,exother] | |
44 | movm (sp),[a2,a3,all] | |
45 | movm [a2,a3,exreg0],(sp) | |
46 | movm [a2,a3,exreg1],(sp) | |
47 | movm [a2,a3,exother],(sp) | |
48 | movm [a2,a3,all],(sp) | |
49 | movm (usp),[a2,a3,exreg0] | |
50 | movm (usp),[a2,a3,exreg1] | |
51 | movm (usp),[a2,a3,exother] | |
52 | movm (usp),[a2,a3,all] | |
53 | movm [a2,a3,exreg0],(usp) | |
54 | movm [a2,a3,exreg1],(usp) | |
55 | movm [a2,a3,exother],(usp) | |
56 | movm [a2,a3,all],(usp) | |
57 | ||
58 | misc_tests: | |
59 | syscall 0x4 | |
60 | mcst9 d0 | |
61 | mcst48 d1 | |
62 | getchx d0 | |
63 | getclx d1 | |
64 | clr r9 | |
65 | sat16 r9,r8 | |
66 | mcste r7,r6 | |
67 | swap r5,r4 | |
68 | swaph r3,r2 | |
69 | swhw r1,r0 | |
70 | ||
71 | ||
72 | mov_tests: | |
73 | mov r0,r1 | |
74 | mov xr0, r1 | |
75 | mov r1, xr2 | |
76 | mov (r1),r2 | |
77 | mov r3,(r4) | |
78 | mov (sp),r5 | |
79 | mov r6,(sp) | |
80 | mov 16,r1 | |
81 | mov 16,xr1 | |
82 | mov (16,r1),r2 | |
83 | mov r2,(16,r1) | |
84 | mov (16,sp),r2 | |
85 | mov r2,(16,sp) | |
86 | mov 0x1ffeff,r2 | |
87 | mov 0x1ffeff,xr2 | |
88 | mov (0x1ffeff,r1),r2 | |
89 | mov r2,(0x1ffeff,r1) | |
90 | mov (0x1ffeff,sp),r2 | |
91 | mov r2,(0x1ffeff,sp) | |
92 | mov (0x1ffeff),r2 | |
93 | mov r2,(0x1ffeff) | |
94 | mov 0x7ffefdfc,r2 | |
95 | mov 0x7ffefdfc,xr2 | |
96 | mov (0x7ffefdfc,r1),r2 | |
97 | mov r2,(0x7ffefdfc,r1) | |
98 | mov (0x7ffefdfc,sp),r2 | |
99 | mov r2,(0x7ffefdfc,sp) | |
100 | mov (0x7ffefdfc),r2 | |
101 | mov r2,(0x7ffefdfc) | |
102 | movu 16,r1 | |
103 | movu 0x1ffeff,r2 | |
104 | movu 0x7ffefdfc,r2 | |
105 | mov usp,a0 | |
106 | mov ssp,a1 | |
107 | mov msp,a2 | |
108 | mov pc,a3 | |
109 | mov a0,usp | |
110 | mov a1,ssp | |
111 | mov a2,msp | |
112 | mov epsw,d0 | |
113 | mov d1,epsw | |
114 | mov a0,r1 | |
115 | mov d2,r3 | |
116 | mov r5,a1 | |
117 | mov r7,d3 | |
118 | ||
119 | ext_tests: | |
120 | ext r2 | |
121 | extb r3,r4 | |
122 | extbu r4,r5 | |
123 | exth r6,r7 | |
124 | exthu r7,r8 | |
125 | ||
126 | add_tests: | |
127 | add r10,r11 | |
128 | add 16,r1 | |
129 | add 0x1ffeff,r2 | |
130 | add 0x7ffefdfc,r2 | |
131 | add r1,r2,r3 | |
132 | addc r12,r13 | |
133 | addc 16,r1 | |
134 | addc 0x1ffeff,r2 | |
135 | addc 0x7ffefdfc,r2 | |
136 | inc r13 | |
137 | inc4 r12 | |
138 | ||
139 | ||
140 | sub_tests: | |
141 | sub r14,r15 | |
142 | sub 16,r1 | |
143 | sub 0x1ffeff,r2 | |
144 | sub 0x7ffefdfc,r2 | |
145 | subc r15,r14 | |
146 | subc 16,r1 | |
147 | subc 0x1ffeff,r2 | |
148 | subc 0x7ffefdfc,r2 | |
149 | ||
150 | cmp_tests: | |
151 | cmp r11,r10 | |
152 | cmp 16,r1 | |
153 | cmp 0x1ffeff,r2 | |
154 | cmp 0x7ffefdfc,r2 | |
155 | ||
156 | logical_tests: | |
157 | and r0,r1 | |
158 | or r2,r3 | |
159 | xor r4,r5 | |
160 | not r6 | |
161 | and 16,r1 | |
162 | or 16,r1 | |
163 | xor 16,r1 | |
164 | and 0x1ffeff,r2 | |
165 | or 0x1ffeff,r2 | |
166 | xor 0x1ffeff,r2 | |
167 | and 0x7ffefdfc,r2 | |
168 | or 0x7ffefdfc,r2 | |
169 | xor 0x7ffefdfc,r2 | |
170 | and 131072,epsw | |
171 | or 65535,epsw | |
172 | ||
173 | shift_tests: | |
174 | asr r7,r8 | |
175 | lsr r9,r10 | |
176 | asl r11,r12 | |
177 | asl2 r13 | |
178 | ror r14 | |
179 | rol r15 | |
180 | asr 16,r1 | |
181 | lsr 16,r1 | |
182 | asl 16,r1 | |
183 | asr 0x1ffeff,r2 | |
184 | lsr 0x1ffeff,r2 | |
185 | asl 0x1ffeff,r2 | |
186 | asr 0x7ffefdfc,r2 | |
187 | lsr 0x7ffefdfc,r2 | |
188 | asl 0x7ffefdfc,r2 | |
189 | ||
190 | muldiv_tests: | |
191 | mul r1,r2 | |
192 | mulu r3,r4 | |
193 | mul 16,r1 | |
194 | mulu 16,r1 | |
195 | mul 0x1ffeff,r2 | |
196 | mulu 0x1ffeff,r2 | |
197 | mul 0x7ffefdfc,r2 | |
198 | mulu 0x7ffefdfc,r2 | |
199 | div r5,r6 | |
200 | divu r7,r8 | |
201 | dmulh r13,r12 | |
202 | dmulhu r11,r10 | |
203 | dmulh 0x7ffefdfc,r2 | |
204 | dmulhu 0x7ffefdfc,r2 | |
205 | mul r1,r2,r3,r4 | |
206 | mulu r1,r2,r3,r4 | |
207 | ||
208 | movbu_tests: | |
209 | movbu (r5),r6 | |
210 | movbu r7,(r8) | |
211 | movbu (sp),r7 | |
212 | movbu r8,(sp) | |
213 | movbu (16,r1),r2 | |
214 | movbu r2,(16,r1) | |
215 | movbu (16,sp),r2 | |
216 | movbu r2,(16,sp) | |
217 | movbu (0x1ffeff,r1),r2 | |
218 | movbu r2,(0x1ffeff,r1) | |
219 | movbu (0x1ffeff,sp),r2 | |
220 | movbu r2,(0x1ffeff,sp) | |
221 | movbu (0x1ffeff),r2 | |
222 | movbu r2,(0x1ffeff) | |
223 | movbu (0x7ffefdfc,r1),r2 | |
224 | movbu r2,(0x7ffefdfc,r1) | |
225 | movbu (0x7ffefdfc,sp),r2 | |
226 | movbu r2,(0x7ffefdfc,sp) | |
227 | movbu (0x7ffefdfc),r2 | |
228 | movbu r2,(0x7ffefdfc) | |
229 | ||
230 | movhu_tests: | |
231 | movhu (r9),r10 | |
232 | movhu r11,(r12) | |
233 | movhu (sp),r9 | |
234 | movhu r10,(sp) | |
235 | movhu (16,r1),r2 | |
236 | movhu r2,(16,r1) | |
237 | movhu (16,sp),r2 | |
238 | movhu r2,(16,sp) | |
239 | movhu (0x1ffeff,r1),r2 | |
240 | movhu r2,(0x1ffeff,r1) | |
241 | movhu (0x1ffeff,sp),r2 | |
242 | movhu r2,(0x1ffeff,sp) | |
243 | movhu (0x1ffeff),r2 | |
244 | movhu r2,(0x1ffeff) | |
245 | movhu (0x7ffefdfc,r1),r2 | |
246 | movhu r2,(0x7ffefdfc,r1) | |
247 | movhu (0x7ffefdfc,sp),r2 | |
248 | movhu r2,(0x7ffefdfc,sp) | |
249 | movhu (0x7ffefdfc),r2 | |
250 | movhu r2,(0x7ffefdfc) | |
251 | ||
252 | ||
253 | mac_tests: | |
254 | mac r1,r2 | |
255 | macu r3,r4 | |
256 | macb r5,r6 | |
257 | macbu r7,r8 | |
258 | mach r9,r10 | |
259 | machu r11,r12 | |
260 | dmach r13,r14 | |
261 | dmachu r15,r14 | |
262 | mac 16,r1 | |
263 | macu 16,r1 | |
264 | macb 16,r1 | |
265 | macbu 16,r1 | |
266 | mach 16,r1 | |
267 | machu 16,r1 | |
268 | mac 0x1ffeff,r2 | |
269 | macu 0x1ffeff,r2 | |
270 | macb 0x1ffeff,r2 | |
271 | macbu 0x1ffeff,r2 | |
272 | mach 0x1ffeff,r2 | |
273 | machu 0x1ffeff,r2 | |
274 | mac 0x7ffefdfc,r2 | |
275 | macu 0x7ffefdfc,r2 | |
276 | macb 0x7ffefdfc,r2 | |
277 | macbu 0x7ffefdfc,r2 | |
278 | mach 0x7ffefdfc,r2 | |
279 | machu 0x7ffefdfc,r2 | |
280 | dmach 0x7ffefdfc,r2 | |
281 | dmachu 0x7ffefdfc,r2 | |
282 | ||
283 | bit_tests: | |
284 | bsch r1,r2 | |
285 | btst 16,r1 | |
286 | btst 0x1ffeff,r2 | |
287 | btst 0x7ffefdfc,r2 | |
288 | ||
289 | ||
290 | ||
291 | dsp_add_tests: | |
292 | add_add r4,r1,r2,r3 | |
293 | add_add r4,r1,2,r3 | |
294 | add_sub r4,r1,r2,r3 | |
295 | add_sub r4,r1,2,r3 | |
296 | add_cmp r4,r1,r2,r3 | |
297 | add_cmp r4,r1,2,r3 | |
298 | add_mov r4,r1,r2,r3 | |
299 | add_mov r4,r1,2,r3 | |
300 | add_asr r4,r1,r2,r3 | |
301 | add_asr r4,r1,2,r3 | |
302 | add_lsr r4,r1,r2,r3 | |
303 | add_lsr r4,r1,2,r3 | |
304 | add_asl r4,r1,r2,r3 | |
305 | add_asl r4,r1,2,r3 | |
306 | add_add 4,r1,r2,r3 | |
307 | add_add 4,r1,2,r3 | |
308 | add_sub 4,r1,r2,r3 | |
309 | add_sub 4,r1,2,r3 | |
310 | add_cmp 4,r1,r2,r3 | |
311 | add_cmp 4,r1,2,r3 | |
312 | add_mov 4,r1,r2,r3 | |
313 | add_mov 4,r1,2,r3 | |
314 | add_asr 4,r1,r2,r3 | |
315 | add_asr 4,r1,2,r3 | |
316 | add_lsr 4,r1,r2,r3 | |
317 | add_lsr 4,r1,2,r3 | |
318 | add_asl 4,r1,r2,r3 | |
319 | add_asl 4,r1,2,r3 | |
320 | ||
321 | dsp_cmp_tests: | |
322 | cmp_add r4,r1,r2,r3 | |
323 | cmp_add r4,r1,2,r3 | |
324 | cmp_sub r4,r1,r2,r3 | |
325 | cmp_sub r4,r1,2,r3 | |
326 | cmp_mov r4,r1,r2,r3 | |
327 | cmp_mov r4,r1,2,r3 | |
328 | cmp_asr r4,r1,r2,r3 | |
329 | cmp_asr r4,r1,2,r3 | |
330 | cmp_lsr r4,r1,r2,r3 | |
331 | cmp_lsr r4,r1,2,r3 | |
332 | cmp_asl r4,r1,r2,r3 | |
333 | cmp_asl r4,r1,2,r3 | |
334 | cmp_add 4,r1,r2,r3 | |
335 | cmp_add 4,r1,2,r3 | |
336 | cmp_sub 4,r1,r2,r3 | |
337 | cmp_sub 4,r1,2,r3 | |
338 | cmp_mov 4,r1,r2,r3 | |
339 | cmp_mov 4,r1,2,r3 | |
340 | cmp_asr 4,r1,r2,r3 | |
341 | cmp_asr 4,r1,2,r3 | |
342 | cmp_lsr 4,r1,r2,r3 | |
343 | cmp_lsr 4,r1,2,r3 | |
344 | cmp_asl 4,r1,r2,r3 | |
345 | cmp_asl 4,r1,2,r3 | |
346 | ||
347 | dsp_sub_tests: | |
348 | sub_add r4,r1,r2,r3 | |
349 | sub_add r4,r1,2,r3 | |
350 | sub_sub r4,r1,r2,r3 | |
351 | sub_sub r4,r1,2,r3 | |
352 | sub_cmp r4,r1,r2,r3 | |
353 | sub_cmp r4,r1,2,r3 | |
354 | sub_mov r4,r1,r2,r3 | |
355 | sub_mov r4,r1,2,r3 | |
356 | sub_asr r4,r1,r2,r3 | |
357 | sub_asr r4,r1,2,r3 | |
358 | sub_lsr r4,r1,r2,r3 | |
359 | sub_lsr r4,r1,2,r3 | |
360 | sub_asl r4,r1,r2,r3 | |
361 | sub_asl r4,r1,2,r3 | |
362 | sub_add 4,r1,r2,r3 | |
363 | sub_add 4,r1,2,r3 | |
364 | sub_sub 4,r1,r2,r3 | |
365 | sub_sub 4,r1,2,r3 | |
366 | sub_cmp 4,r1,r2,r3 | |
367 | sub_cmp 4,r1,2,r3 | |
368 | sub_mov 4,r1,r2,r3 | |
369 | sub_mov 4,r1,2,r3 | |
370 | sub_asr 4,r1,r2,r3 | |
371 | sub_asr 4,r1,2,r3 | |
372 | sub_lsr 4,r1,r2,r3 | |
373 | sub_lsr 4,r1,2,r3 | |
374 | sub_asl 4,r1,r2,r3 | |
375 | sub_asl 4,r1,2,r3 | |
376 | ||
377 | dsp_mov_tests: | |
378 | mov_add r4,r1,r2,r3 | |
379 | mov_add r4,r1,2,r3 | |
380 | mov_sub r4,r1,r2,r3 | |
381 | mov_sub r4,r1,2,r3 | |
382 | mov_cmp r4,r1,r2,r3 | |
383 | mov_cmp r4,r1,2,r3 | |
384 | mov_mov r4,r1,r2,r3 | |
385 | mov_mov r4,r1,2,r3 | |
386 | mov_asr r4,r1,r2,r3 | |
387 | mov_asr r4,r1,2,r3 | |
388 | mov_lsr r4,r1,r2,r3 | |
389 | mov_lsr r4,r1,2,r3 | |
390 | mov_asl r4,r1,r2,r3 | |
391 | mov_asl r4,r1,2,r3 | |
392 | mov_add 4,r1,r2,r3 | |
393 | mov_add 4,r1,2,r3 | |
394 | mov_sub 4,r1,r2,r3 | |
395 | mov_sub 4,r1,2,r3 | |
396 | mov_cmp 4,r1,r2,r3 | |
397 | mov_cmp 4,r1,2,r3 | |
398 | mov_mov 4,r1,r2,r3 | |
399 | mov_mov 4,r1,2,r3 | |
400 | mov_asr 4,r1,r2,r3 | |
401 | mov_asr 4,r1,2,r3 | |
402 | mov_lsr 4,r1,r2,r3 | |
403 | mov_lsr 4,r1,2,r3 | |
404 | mov_asl 4,r1,r2,r3 | |
405 | mov_asl 4,r1,2,r3 | |
406 | ||
407 | dsp_logical_tests: | |
408 | and_add r4,r1,r2,r3 | |
409 | and_add r4,r1,2,r3 | |
410 | and_sub r4,r1,r2,r3 | |
411 | and_sub r4,r1,2,r3 | |
412 | and_cmp r4,r1,r2,r3 | |
413 | and_cmp r4,r1,2,r3 | |
414 | and_mov r4,r1,r2,r3 | |
415 | and_mov r4,r1,2,r3 | |
416 | and_asr r4,r1,r2,r3 | |
417 | and_asr r4,r1,2,r3 | |
418 | and_lsr r4,r1,r2,r3 | |
419 | and_lsr r4,r1,2,r3 | |
420 | and_asl r4,r1,r2,r3 | |
421 | and_asl r4,r1,2,r3 | |
422 | xor_add r4,r1,r2,r3 | |
423 | xor_add r4,r1,2,r3 | |
424 | xor_sub r4,r1,r2,r3 | |
425 | xor_sub r4,r1,2,r3 | |
426 | xor_cmp r4,r1,r2,r3 | |
427 | xor_cmp r4,r1,2,r3 | |
428 | xor_mov r4,r1,r2,r3 | |
429 | xor_mov r4,r1,2,r3 | |
430 | xor_asr r4,r1,r2,r3 | |
431 | xor_asr r4,r1,2,r3 | |
432 | xor_lsr r4,r1,r2,r3 | |
433 | xor_lsr r4,r1,2,r3 | |
434 | xor_asl r4,r1,r2,r3 | |
435 | xor_asl r4,r1,2,r3 | |
436 | or_add r4,r1,r2,r3 | |
437 | or_add r4,r1,2,r3 | |
438 | or_sub r4,r1,r2,r3 | |
439 | or_sub r4,r1,2,r3 | |
440 | or_cmp r4,r1,r2,r3 | |
441 | or_cmp r4,r1,2,r3 | |
442 | or_mov r4,r1,r2,r3 | |
443 | or_mov r4,r1,2,r3 | |
444 | or_asr r4,r1,r2,r3 | |
445 | or_asr r4,r1,2,r3 | |
446 | or_lsr r4,r1,r2,r3 | |
447 | or_lsr r4,r1,2,r3 | |
448 | or_asl r4,r1,r2,r3 | |
449 | or_asl r4,r1,2,r3 | |
450 | ||
451 | dsp_misc_tests: | |
452 | dmach_add r4,r1,r2,r3 | |
453 | dmach_add r4,r1,2,r3 | |
454 | dmach_sub r4,r1,r2,r3 | |
455 | dmach_sub r4,r1,2,r3 | |
456 | dmach_cmp r4,r1,r2,r3 | |
457 | dmach_cmp r4,r1,2,r3 | |
458 | dmach_mov r4,r1,r2,r3 | |
459 | dmach_mov r4,r1,2,r3 | |
460 | dmach_asr r4,r1,r2,r3 | |
461 | dmach_asr r4,r1,2,r3 | |
462 | dmach_lsr r4,r1,r2,r3 | |
463 | dmach_lsr r4,r1,2,r3 | |
464 | dmach_asl r4,r1,r2,r3 | |
465 | dmach_asl r4,r1,2,r3 | |
466 | swhw_add r4,r1,r2,r3 | |
467 | swhw_add r4,r1,2,r3 | |
468 | swhw_sub r4,r1,r2,r3 | |
469 | swhw_sub r4,r1,2,r3 | |
470 | swhw_cmp r4,r1,r2,r3 | |
471 | swhw_cmp r4,r1,2,r3 | |
472 | swhw_mov r4,r1,r2,r3 | |
473 | swhw_mov r4,r1,2,r3 | |
474 | swhw_asr r4,r1,r2,r3 | |
475 | swhw_asr r4,r1,2,r3 | |
476 | swhw_lsr r4,r1,r2,r3 | |
477 | swhw_lsr r4,r1,2,r3 | |
478 | swhw_asl r4,r1,r2,r3 | |
479 | swhw_asl r4,r1,2,r3 | |
480 | sat16_add r4,r1,r2,r3 | |
481 | sat16_add r4,r1,2,r3 | |
482 | sat16_sub r4,r1,r2,r3 | |
483 | sat16_sub r4,r1,2,r3 | |
484 | sat16_cmp r4,r1,r2,r3 | |
485 | sat16_cmp r4,r1,2,r3 | |
486 | sat16_mov r4,r1,r2,r3 | |
487 | sat16_mov r4,r1,2,r3 | |
488 | sat16_asr r4,r1,r2,r3 | |
489 | sat16_asr r4,r1,2,r3 | |
490 | sat16_lsr r4,r1,r2,r3 | |
491 | sat16_lsr r4,r1,2,r3 | |
492 | sat16_asl r4,r1,r2,r3 | |
493 | sat16_asl r4,r1,2,r3 | |
494 | ||
495 | autoincrement_tests: | |
496 | mov (r1+),r2 | |
497 | mov r3,(r4+) | |
498 | movhu (r6+),r7 | |
499 | movhu r8,(r9+) | |
500 | mov (r1+,64),r2 | |
501 | mov r1,(r2+,64) | |
502 | movhu (r1+,64),r2 | |
503 | movhu r1,(r2+,64) | |
504 | mov (r1+,0x1ffef),r2 | |
505 | mov r1,(r2+,0x1ffef) | |
506 | movhu (r1+,0x1ffef),r2 | |
507 | movhu r1,(r2+,0x1ffef) | |
508 | mov (r1+,0x7ffefdfc),r2 | |
509 | mov r1,(r2+,0x7ffefdfc) | |
510 | movhu (r1+,0x7ffefdfc),r2 | |
511 | movhu r1,(r2+,0x7ffefdfc) | |
512 | ||
513 | dsp_autoincrement_tests: | |
514 | mov_llt (r1+,4),r2 | |
515 | mov_lgt (r1+,4),r2 | |
516 | mov_lge (r1+,4),r2 | |
517 | mov_lle (r1+,4),r2 | |
518 | mov_lcs (r1+,4),r2 | |
519 | mov_lhi (r1+,4),r2 | |
520 | mov_lcc (r1+,4),r2 | |
521 | mov_lls (r1+,4),r2 | |
522 | mov_leq (r1+,4),r2 | |
523 | mov_lne (r1+,4),r2 | |
524 | mov_lra (r1+,4),r2 |