Commit | Line | Data |
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e49d4fa6 SS |
1 | /* Target-dependent code for the TI TMS320C80 (MVP) for GDB, the GNU debugger. |
2 | Copyright 1996, Free Software Foundation, Inc. | |
3 | ||
c5aa993b | 4 | This file is part of GDB. |
e49d4fa6 | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
e49d4fa6 | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
e49d4fa6 | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
e49d4fa6 SS |
20 | |
21 | #include "defs.h" | |
22 | #include "value.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "obstack.h" | |
26 | #include "target.h" | |
27 | #include "bfd.h" | |
28 | #include "gdb_string.h" | |
29 | #include "gdbcore.h" | |
30 | #include "symfile.h" | |
31 | ||
32 | /* Function: frame_find_saved_regs | |
33 | Return the frame_saved_regs structure for the frame. | |
34 | Doesn't really work for dummy frames, but it does pass back | |
35 | an empty frame_saved_regs, so I guess that's better than total failure */ | |
36 | ||
c5aa993b | 37 | void |
fba45db2 KB |
38 | tic80_frame_find_saved_regs (struct frame_info *fi, |
39 | struct frame_saved_regs *regaddr) | |
e49d4fa6 SS |
40 | { |
41 | memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs)); | |
42 | } | |
43 | ||
44 | /* Function: skip_prologue | |
45 | Find end of function prologue. */ | |
46 | ||
47 | CORE_ADDR | |
fba45db2 | 48 | tic80_skip_prologue (CORE_ADDR pc) |
e49d4fa6 SS |
49 | { |
50 | CORE_ADDR func_addr, func_end; | |
51 | struct symtab_and_line sal; | |
52 | ||
53 | /* See what the symbol table says */ | |
54 | ||
55 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
56 | { | |
57 | sal = find_pc_line (func_addr, 0); | |
58 | ||
59 | if (sal.line != 0 && sal.end < func_end) | |
60 | return sal.end; | |
61 | else | |
62 | /* Either there's no line info, or the line after the prologue is after | |
63 | the end of the function. In this case, there probably isn't a | |
64 | prologue. */ | |
65 | return pc; | |
66 | } | |
67 | ||
68 | /* We can't find the start of this function, so there's nothing we can do. */ | |
69 | return pc; | |
70 | } | |
71 | ||
72 | /* Function: tic80_scan_prologue | |
73 | This function decodes the target function prologue to determine: | |
c5aa993b JM |
74 | 1) the size of the stack frame |
75 | 2) which registers are saved on it | |
76 | 3) the offsets of saved regs | |
77 | 4) the frame size | |
e49d4fa6 SS |
78 | This information is stored in the "extra" fields of the frame_info. */ |
79 | ||
80 | static void | |
fba45db2 | 81 | tic80_scan_prologue (struct frame_info *fi) |
e49d4fa6 SS |
82 | { |
83 | struct symtab_and_line sal; | |
84 | CORE_ADDR prologue_start, prologue_end, current_pc; | |
85 | ||
86 | /* Assume there is no frame until proven otherwise. */ | |
87 | fi->framereg = SP_REGNUM; | |
88 | fi->framesize = 0; | |
89 | fi->frameoffset = 0; | |
90 | ||
91 | /* this code essentially duplicates skip_prologue, | |
92 | but we need the start address below. */ | |
93 | ||
94 | if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end)) | |
95 | { | |
96 | sal = find_pc_line (prologue_start, 0); | |
97 | ||
c5aa993b | 98 | if (sal.line == 0) /* no line info, use current PC */ |
e49d4fa6 SS |
99 | if (prologue_start != entry_point_address ()) |
100 | prologue_end = fi->pc; | |
101 | else | |
c5aa993b | 102 | return; /* _start has no frame or prologue */ |
e49d4fa6 | 103 | else if (sal.end < prologue_end) /* next line begins after fn end */ |
c5aa993b | 104 | prologue_end = sal.end; /* (probably means no prologue) */ |
e49d4fa6 SS |
105 | } |
106 | else | |
107 | /* FIXME */ | |
c5aa993b JM |
108 | prologue_end = prologue_start + 40; /* We're in the boondocks: allow for */ |
109 | /* 16 pushes, an add, and "mv fp,sp" */ | |
e49d4fa6 SS |
110 | |
111 | prologue_end = min (prologue_end, fi->pc); | |
112 | ||
113 | /* Now search the prologue looking for instructions that set up the | |
114 | frame pointer, adjust the stack pointer, and save registers. */ | |
115 | ||
116 | for (current_pc = prologue_start; current_pc < prologue_end; current_pc += 4) | |
117 | { | |
118 | unsigned int insn; | |
119 | int regno; | |
120 | int offset = 0; | |
121 | ||
122 | insn = read_memory_unsigned_integer (current_pc, 4); | |
123 | ||
124 | if ((insn & 0x301000) == 0x301000) /* Long immediate? */ | |
125 | /* FIXME - set offset for long immediate instructions */ | |
126 | current_pc += 4; | |
127 | else | |
128 | { | |
c5aa993b JM |
129 | offset = insn & 0x7fff; /* extract 15-bit offset */ |
130 | if (offset & 0x4000) /* if negative, sign-extend */ | |
e49d4fa6 SS |
131 | offset = -(0x8000 - offset); |
132 | } | |
133 | ||
134 | if ((insn & 0x7fd0000) == 0x590000) /* st.{w,d} reg, xx(r1) */ | |
135 | { | |
136 | regno = ((insn >> 27) & 0x1f); | |
137 | fi->fsr.regs[regno] = offset; | |
c5aa993b JM |
138 | if (insn & 0x8000) /* 64-bit store (st.d)? */ |
139 | fi->fsr.regs[regno + 1] = offset + 4; | |
e49d4fa6 | 140 | } |
c5aa993b | 141 | else if ((insn & 0xffff8000) == 0x086c8000) /* addu xx, r1, r1 */ |
e49d4fa6 | 142 | fi->framesize = -offset; |
c5aa993b | 143 | else if ((insn & 0xffff8000) == 0xf06c8000) /* addu xx, r1, r30 */ |
e49d4fa6 | 144 | { |
c5aa993b | 145 | fi->framereg = FP_REGNUM; /* fp is now valid */ |
e49d4fa6 | 146 | fi->frameoffset = offset; |
c5aa993b | 147 | break; /* end of stack adjustments */ |
e49d4fa6 | 148 | } |
c5aa993b | 149 | else if (insn == 0xf03b2001) /* addu r1, r0, r30 */ |
e49d4fa6 | 150 | { |
c5aa993b | 151 | fi->framereg = FP_REGNUM; /* fp is now valid */ |
e49d4fa6 | 152 | fi->frameoffset = 0; |
c5aa993b | 153 | break; /* end of stack adjustments */ |
e49d4fa6 SS |
154 | } |
155 | else | |
156 | /* FIXME - handle long immediate instructions */ | |
c5aa993b | 157 | break; /* anything else isn't prologue */ |
e49d4fa6 SS |
158 | } |
159 | } | |
160 | ||
161 | /* Function: init_extra_frame_info | |
162 | This function actually figures out the frame address for a given pc and | |
163 | sp. This is tricky on the c80 because we sometimes don't use an explicit | |
164 | frame pointer, and the previous stack pointer isn't necessarily recorded | |
165 | on the stack. The only reliable way to get this info is to | |
166 | examine the prologue. */ | |
167 | ||
168 | void | |
fba45db2 | 169 | tic80_init_extra_frame_info (struct frame_info *fi) |
e49d4fa6 SS |
170 | { |
171 | int reg; | |
172 | ||
173 | if (fi->next) | |
174 | fi->pc = FRAME_SAVED_PC (fi->next); | |
175 | ||
176 | /* Because zero is a valid register offset relative to SP, we initialize | |
177 | the offsets to -1 to indicate unused entries. */ | |
178 | for (reg = 0; reg < NUM_REGS; reg++) | |
179 | fi->fsr.regs[reg] = -1; | |
180 | ||
181 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
182 | { | |
183 | /* We need to setup fi->frame here because run_stack_dummy gets it wrong | |
c5aa993b | 184 | by assuming it's always FP. */ |
e49d4fa6 SS |
185 | fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM); |
186 | fi->framesize = 0; | |
187 | fi->frameoffset = 0; | |
188 | return; | |
189 | } | |
c5aa993b | 190 | else |
e49d4fa6 SS |
191 | { |
192 | tic80_scan_prologue (fi); | |
193 | ||
c5aa993b | 194 | if (!fi->next) /* this is the innermost frame? */ |
e49d4fa6 | 195 | fi->frame = read_register (fi->framereg); |
c5aa993b JM |
196 | else |
197 | /* not the innermost frame */ | |
e49d4fa6 | 198 | /* If this function uses FP as the frame register, and the function |
c5aa993b JM |
199 | it called saved the FP, get the saved FP. */ if (fi->framereg == FP_REGNUM && |
200 | fi->next->fsr.regs[FP_REGNUM] != (unsigned) -1) | |
201 | fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4); | |
e49d4fa6 SS |
202 | |
203 | /* Convert SP-relative offsets of saved registers to real addresses. */ | |
204 | for (reg = 0; reg < NUM_REGS; reg++) | |
205 | if (fi->fsr.regs[reg] == (unsigned) -1) | |
c5aa993b JM |
206 | fi->fsr.regs[reg] = 0; /* unused entry */ |
207 | else | |
208 | fi->fsr.regs[reg] += fi->frame - fi->frameoffset; | |
e49d4fa6 SS |
209 | } |
210 | } | |
211 | ||
212 | /* Function: find_callers_reg | |
213 | Find REGNUM on the stack. Otherwise, it's in an active register. One thing | |
214 | we might want to do here is to check REGNUM against the clobber mask, and | |
215 | somehow flag it as invalid if it isn't saved on the stack somewhere. This | |
216 | would provide a graceful failure mode when trying to get the value of | |
217 | caller-saves registers for an inner frame. */ | |
218 | ||
219 | CORE_ADDR | |
fba45db2 | 220 | tic80_find_callers_reg (struct frame_info *fi, int regnum) |
e49d4fa6 SS |
221 | { |
222 | for (; fi; fi = fi->next) | |
223 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
224 | return generic_read_register_dummy (fi->pc, fi->frame, regnum); | |
225 | else if (fi->fsr.regs[regnum] != 0) | |
c5aa993b JM |
226 | return read_memory_integer (fi->fsr.regs[regnum], |
227 | REGISTER_RAW_SIZE (regnum)); | |
e49d4fa6 SS |
228 | return read_register (regnum); |
229 | } | |
230 | ||
231 | /* Function: frame_chain | |
232 | Given a GDB frame, determine the address of the calling function's frame. | |
233 | This will be used to create a new GDB frame struct, and then | |
234 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
235 | For c80, we save the frame size when we initialize the frame_info. */ | |
236 | ||
237 | CORE_ADDR | |
fba45db2 | 238 | tic80_frame_chain (struct frame_info *fi) |
e49d4fa6 SS |
239 | { |
240 | CORE_ADDR fn_start, callers_pc, fp; | |
241 | ||
242 | /* is this a dummy frame? */ | |
c5aa993b JM |
243 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
244 | return fi->frame; /* dummy frame same as caller's frame */ | |
e49d4fa6 SS |
245 | |
246 | /* is caller-of-this a dummy frame? */ | |
c5aa993b | 247 | callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */ |
e49d4fa6 | 248 | fp = tic80_find_callers_reg (fi, FP_REGNUM); |
c5aa993b JM |
249 | if (PC_IN_CALL_DUMMY (callers_pc, fp, fp)) |
250 | return fp; /* dummy frame's frame may bear no relation to ours */ | |
e49d4fa6 SS |
251 | |
252 | if (find_pc_partial_function (fi->pc, 0, &fn_start, 0)) | |
253 | if (fn_start == entry_point_address ()) | |
c5aa993b | 254 | return 0; /* in _start fn, don't chain further */ |
e49d4fa6 SS |
255 | |
256 | if (fi->framereg == FP_REGNUM) | |
257 | return tic80_find_callers_reg (fi, FP_REGNUM); | |
258 | else | |
259 | return fi->frame + fi->framesize; | |
260 | } | |
261 | ||
262 | /* Function: pop_frame | |
263 | Discard from the stack the innermost frame, | |
264 | restoring all saved registers. */ | |
265 | ||
266 | struct frame_info * | |
fba45db2 | 267 | tic80_pop_frame (struct frame_info *frame) |
e49d4fa6 SS |
268 | { |
269 | int regnum; | |
270 | ||
271 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) | |
272 | generic_pop_dummy_frame (); | |
273 | else | |
274 | { | |
275 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
276 | if (frame->fsr.regs[regnum] != 0) | |
c5aa993b | 277 | write_register (regnum, |
e49d4fa6 SS |
278 | read_memory_integer (frame->fsr.regs[regnum], 4)); |
279 | ||
280 | write_register (PC_REGNUM, FRAME_SAVED_PC (frame)); | |
281 | write_register (SP_REGNUM, read_register (FP_REGNUM)); | |
282 | #if 0 | |
283 | if (read_register (PSW_REGNUM) & 0x80) | |
284 | write_register (SPU_REGNUM, read_register (SP_REGNUM)); | |
285 | else | |
286 | write_register (SPI_REGNUM, read_register (SP_REGNUM)); | |
287 | #endif | |
288 | } | |
289 | flush_cached_frames (); | |
290 | return NULL; | |
291 | } | |
292 | ||
293 | /* Function: frame_saved_pc | |
294 | Find the caller of this frame. We do this by seeing if LR_REGNUM is saved | |
295 | in the stack anywhere, otherwise we get it from the registers. */ | |
296 | ||
297 | CORE_ADDR | |
fba45db2 | 298 | tic80_frame_saved_pc (struct frame_info *fi) |
e49d4fa6 | 299 | { |
c5aa993b | 300 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
e49d4fa6 SS |
301 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); |
302 | else | |
303 | return tic80_find_callers_reg (fi, LR_REGNUM); | |
304 | } | |
305 | ||
306 | /* Function: tic80_push_return_address (pc, sp) | |
307 | Set up the return address for the inferior function call. | |
308 | Necessary for targets that don't actually execute a JSR/BSR instruction | |
309 | (ie. when using an empty CALL_DUMMY) */ | |
310 | ||
311 | CORE_ADDR | |
fba45db2 | 312 | tic80_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
e49d4fa6 SS |
313 | { |
314 | write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ()); | |
315 | return sp; | |
316 | } | |
317 | ||
318 | ||
319 | /* Function: push_arguments | |
320 | Setup the function arguments for calling a function in the inferior. | |
321 | ||
322 | On the TI C80 architecture, there are six register pairs (R2/R3 to R12/13) | |
323 | which are dedicated for passing function arguments. Up to the first six | |
324 | arguments (depending on size) may go into these registers. | |
325 | The rest go on the stack. | |
326 | ||
327 | Arguments that are smaller than 4 bytes will still take up a whole | |
328 | register or a whole 32-bit word on the stack, and will be | |
329 | right-justified in the register or the stack word. This includes | |
330 | chars, shorts, and small aggregate types. | |
c5aa993b | 331 | |
e49d4fa6 SS |
332 | Arguments that are four bytes or less in size are placed in the |
333 | even-numbered register of a register pair, and the odd-numbered | |
334 | register is not used. | |
335 | ||
336 | Arguments of 8 bytes size (such as floating point doubles) are placed | |
337 | in a register pair. The least significant 32-bit word is placed in | |
338 | the even-numbered register, and the most significant word in the | |
339 | odd-numbered register. | |
340 | ||
341 | Aggregate types with sizes between 4 and 8 bytes are passed | |
342 | entirely on the stack, and are left-justified within the | |
343 | double-word (as opposed to aggregates smaller than 4 bytes | |
344 | which are right-justified). | |
345 | ||
346 | Aggregates of greater than 8 bytes are first copied onto the stack, | |
347 | and then a pointer to the copy is passed in the place of the normal | |
348 | argument (either in a register if available, or on the stack). | |
349 | ||
350 | Functions that must return an aggregate type can return it in the | |
351 | normal return value registers (R2 and R3) if its size is 8 bytes or | |
352 | less. For larger return values, the caller must allocate space for | |
353 | the callee to copy the return value to. A pointer to this space is | |
354 | passed as an implicit first argument, always in R0. */ | |
355 | ||
356 | CORE_ADDR | |
fba45db2 KB |
357 | tic80_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp, |
358 | unsigned char struct_return, CORE_ADDR struct_addr) | |
e49d4fa6 SS |
359 | { |
360 | int stack_offset, stack_alloc; | |
361 | int argreg; | |
362 | int argnum; | |
363 | struct type *type; | |
364 | CORE_ADDR regval; | |
365 | char *val; | |
366 | char valbuf[4]; | |
367 | int len; | |
368 | int odd_sized_struct; | |
369 | int is_struct; | |
370 | ||
371 | /* first force sp to a 4-byte alignment */ | |
372 | sp = sp & ~3; | |
373 | ||
c5aa993b | 374 | argreg = ARG0_REGNUM; |
e49d4fa6 SS |
375 | /* The "struct return pointer" pseudo-argument goes in R0 */ |
376 | if (struct_return) | |
c5aa993b JM |
377 | write_register (argreg++, struct_addr); |
378 | ||
e49d4fa6 SS |
379 | /* Now make sure there's space on the stack */ |
380 | for (argnum = 0, stack_alloc = 0; | |
381 | argnum < nargs; argnum++) | |
c5aa993b JM |
382 | stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3); |
383 | sp -= stack_alloc; /* make room on stack for args */ | |
384 | ||
385 | ||
e49d4fa6 SS |
386 | /* Now load as many as possible of the first arguments into |
387 | registers, and push the rest onto the stack. There are 16 bytes | |
388 | in four registers available. Loop thru args from first to last. */ | |
c5aa993b | 389 | |
e49d4fa6 SS |
390 | argreg = ARG0_REGNUM; |
391 | for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++) | |
392 | { | |
393 | type = VALUE_TYPE (args[argnum]); | |
c5aa993b | 394 | len = TYPE_LENGTH (type); |
e49d4fa6 SS |
395 | memset (valbuf, 0, sizeof (valbuf)); |
396 | val = (char *) VALUE_CONTENTS (args[argnum]); | |
c5aa993b | 397 | |
e49d4fa6 SS |
398 | /* FIXME -- tic80 can take doubleword arguments in register pairs */ |
399 | is_struct = (type->code == TYPE_CODE_STRUCT); | |
400 | odd_sized_struct = 0; | |
401 | ||
c5aa993b | 402 | if (!is_struct) |
e49d4fa6 SS |
403 | { |
404 | if (len < 4) | |
c5aa993b | 405 | { /* value gets right-justified in the register or stack word */ |
e49d4fa6 SS |
406 | memcpy (valbuf + (4 - len), val, len); |
407 | val = valbuf; | |
408 | } | |
409 | if (len > 4 && (len & 3) != 0) | |
c5aa993b | 410 | odd_sized_struct = 1; /* such structs go entirely on stack */ |
e49d4fa6 SS |
411 | } |
412 | else | |
413 | { | |
414 | /* Structs are always passed by reference. */ | |
415 | write_register (argreg, sp + stack_offset); | |
c5aa993b | 416 | argreg++; |
e49d4fa6 SS |
417 | } |
418 | ||
419 | while (len > 0) | |
c5aa993b JM |
420 | { |
421 | if (is_struct || argreg > ARGLAST_REGNUM || odd_sized_struct) | |
422 | { /* must go on the stack */ | |
423 | write_memory (sp + stack_offset, val, 4); | |
424 | stack_offset += 4; | |
425 | } | |
426 | /* NOTE WELL!!!!! This is not an "else if" clause!!! | |
427 | That's because some things get passed on the stack | |
428 | AND in the registers! */ | |
429 | if (!is_struct && argreg <= ARGLAST_REGNUM) | |
430 | { /* there's room in a register */ | |
431 | regval = extract_address (val, REGISTER_RAW_SIZE (argreg)); | |
432 | write_register (argreg, regval); | |
e49d4fa6 | 433 | argreg += 2; /* FIXME -- what about doubleword args? */ |
c5aa993b JM |
434 | } |
435 | /* Store the value 4 bytes at a time. This means that things | |
436 | larger than 4 bytes may go partly in registers and partly | |
437 | on the stack. */ | |
438 | len -= REGISTER_RAW_SIZE (argreg); | |
439 | val += REGISTER_RAW_SIZE (argreg); | |
440 | } | |
e49d4fa6 SS |
441 | } |
442 | return sp; | |
443 | } | |
444 | ||
445 | /* Function: tic80_write_sp | |
446 | Because SP is really a read-only register that mirrors either SPU or SPI, | |
447 | we must actually write one of those two as well, depending on PSW. */ | |
448 | ||
449 | void | |
fba45db2 | 450 | tic80_write_sp (CORE_ADDR val) |
e49d4fa6 SS |
451 | { |
452 | #if 0 | |
453 | unsigned long psw = read_register (PSW_REGNUM); | |
454 | ||
c5aa993b | 455 | if (psw & 0x80) /* stack mode: user or interrupt */ |
e49d4fa6 SS |
456 | write_register (SPU_REGNUM, val); |
457 | else | |
458 | write_register (SPI_REGNUM, val); | |
459 | #endif | |
460 | write_register (SP_REGNUM, val); | |
461 | } | |
462 | ||
463 | void | |
fba45db2 | 464 | _initialize_tic80_tdep (void) |
e49d4fa6 SS |
465 | { |
466 | tm_print_insn = print_insn_tic80; | |
467 | } |