Commit | Line | Data |
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e49d4fa6 | 1 | /* Target-dependent code for the TI TMS320C80 (MVP) for GDB, the GNU debugger. |
b6ba6518 | 2 | Copyright 1996, 1997, 1999, 2000, 2001 Free Software Foundation, Inc. |
e49d4fa6 | 3 | |
c5aa993b | 4 | This file is part of GDB. |
e49d4fa6 | 5 | |
c5aa993b JM |
6 | This program is free software; you can redistribute it and/or modify |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
e49d4fa6 | 10 | |
c5aa993b JM |
11 | This program is distributed in the hope that it will be useful, |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
e49d4fa6 | 15 | |
c5aa993b JM |
16 | You should have received a copy of the GNU General Public License |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 59 Temple Place - Suite 330, | |
19 | Boston, MA 02111-1307, USA. */ | |
e49d4fa6 SS |
20 | |
21 | #include "defs.h" | |
22 | #include "value.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "obstack.h" | |
26 | #include "target.h" | |
27 | #include "bfd.h" | |
28 | #include "gdb_string.h" | |
29 | #include "gdbcore.h" | |
30 | #include "symfile.h" | |
4e052eda | 31 | #include "regcache.h" |
e49d4fa6 SS |
32 | |
33 | /* Function: frame_find_saved_regs | |
34 | Return the frame_saved_regs structure for the frame. | |
35 | Doesn't really work for dummy frames, but it does pass back | |
36 | an empty frame_saved_regs, so I guess that's better than total failure */ | |
37 | ||
c5aa993b | 38 | void |
fba45db2 KB |
39 | tic80_frame_find_saved_regs (struct frame_info *fi, |
40 | struct frame_saved_regs *regaddr) | |
e49d4fa6 SS |
41 | { |
42 | memcpy (regaddr, &fi->fsr, sizeof (struct frame_saved_regs)); | |
43 | } | |
44 | ||
45 | /* Function: skip_prologue | |
46 | Find end of function prologue. */ | |
47 | ||
48 | CORE_ADDR | |
fba45db2 | 49 | tic80_skip_prologue (CORE_ADDR pc) |
e49d4fa6 SS |
50 | { |
51 | CORE_ADDR func_addr, func_end; | |
52 | struct symtab_and_line sal; | |
53 | ||
54 | /* See what the symbol table says */ | |
55 | ||
56 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
57 | { | |
58 | sal = find_pc_line (func_addr, 0); | |
59 | ||
60 | if (sal.line != 0 && sal.end < func_end) | |
61 | return sal.end; | |
62 | else | |
63 | /* Either there's no line info, or the line after the prologue is after | |
64 | the end of the function. In this case, there probably isn't a | |
65 | prologue. */ | |
66 | return pc; | |
67 | } | |
68 | ||
69 | /* We can't find the start of this function, so there's nothing we can do. */ | |
70 | return pc; | |
71 | } | |
72 | ||
73 | /* Function: tic80_scan_prologue | |
74 | This function decodes the target function prologue to determine: | |
c5aa993b JM |
75 | 1) the size of the stack frame |
76 | 2) which registers are saved on it | |
77 | 3) the offsets of saved regs | |
78 | 4) the frame size | |
e49d4fa6 SS |
79 | This information is stored in the "extra" fields of the frame_info. */ |
80 | ||
81 | static void | |
fba45db2 | 82 | tic80_scan_prologue (struct frame_info *fi) |
e49d4fa6 SS |
83 | { |
84 | struct symtab_and_line sal; | |
85 | CORE_ADDR prologue_start, prologue_end, current_pc; | |
86 | ||
87 | /* Assume there is no frame until proven otherwise. */ | |
88 | fi->framereg = SP_REGNUM; | |
89 | fi->framesize = 0; | |
90 | fi->frameoffset = 0; | |
91 | ||
92 | /* this code essentially duplicates skip_prologue, | |
93 | but we need the start address below. */ | |
94 | ||
95 | if (find_pc_partial_function (fi->pc, NULL, &prologue_start, &prologue_end)) | |
96 | { | |
97 | sal = find_pc_line (prologue_start, 0); | |
98 | ||
c5aa993b | 99 | if (sal.line == 0) /* no line info, use current PC */ |
e49d4fa6 SS |
100 | if (prologue_start != entry_point_address ()) |
101 | prologue_end = fi->pc; | |
102 | else | |
c5aa993b | 103 | return; /* _start has no frame or prologue */ |
e49d4fa6 | 104 | else if (sal.end < prologue_end) /* next line begins after fn end */ |
c5aa993b | 105 | prologue_end = sal.end; /* (probably means no prologue) */ |
e49d4fa6 SS |
106 | } |
107 | else | |
108 | /* FIXME */ | |
c5aa993b JM |
109 | prologue_end = prologue_start + 40; /* We're in the boondocks: allow for */ |
110 | /* 16 pushes, an add, and "mv fp,sp" */ | |
e49d4fa6 SS |
111 | |
112 | prologue_end = min (prologue_end, fi->pc); | |
113 | ||
114 | /* Now search the prologue looking for instructions that set up the | |
115 | frame pointer, adjust the stack pointer, and save registers. */ | |
116 | ||
117 | for (current_pc = prologue_start; current_pc < prologue_end; current_pc += 4) | |
118 | { | |
119 | unsigned int insn; | |
120 | int regno; | |
121 | int offset = 0; | |
122 | ||
123 | insn = read_memory_unsigned_integer (current_pc, 4); | |
124 | ||
125 | if ((insn & 0x301000) == 0x301000) /* Long immediate? */ | |
126 | /* FIXME - set offset for long immediate instructions */ | |
127 | current_pc += 4; | |
128 | else | |
129 | { | |
c5aa993b JM |
130 | offset = insn & 0x7fff; /* extract 15-bit offset */ |
131 | if (offset & 0x4000) /* if negative, sign-extend */ | |
e49d4fa6 SS |
132 | offset = -(0x8000 - offset); |
133 | } | |
134 | ||
135 | if ((insn & 0x7fd0000) == 0x590000) /* st.{w,d} reg, xx(r1) */ | |
136 | { | |
137 | regno = ((insn >> 27) & 0x1f); | |
138 | fi->fsr.regs[regno] = offset; | |
c5aa993b JM |
139 | if (insn & 0x8000) /* 64-bit store (st.d)? */ |
140 | fi->fsr.regs[regno + 1] = offset + 4; | |
e49d4fa6 | 141 | } |
c5aa993b | 142 | else if ((insn & 0xffff8000) == 0x086c8000) /* addu xx, r1, r1 */ |
e49d4fa6 | 143 | fi->framesize = -offset; |
c5aa993b | 144 | else if ((insn & 0xffff8000) == 0xf06c8000) /* addu xx, r1, r30 */ |
e49d4fa6 | 145 | { |
c5aa993b | 146 | fi->framereg = FP_REGNUM; /* fp is now valid */ |
e49d4fa6 | 147 | fi->frameoffset = offset; |
c5aa993b | 148 | break; /* end of stack adjustments */ |
e49d4fa6 | 149 | } |
c5aa993b | 150 | else if (insn == 0xf03b2001) /* addu r1, r0, r30 */ |
e49d4fa6 | 151 | { |
c5aa993b | 152 | fi->framereg = FP_REGNUM; /* fp is now valid */ |
e49d4fa6 | 153 | fi->frameoffset = 0; |
c5aa993b | 154 | break; /* end of stack adjustments */ |
e49d4fa6 SS |
155 | } |
156 | else | |
157 | /* FIXME - handle long immediate instructions */ | |
c5aa993b | 158 | break; /* anything else isn't prologue */ |
e49d4fa6 SS |
159 | } |
160 | } | |
161 | ||
162 | /* Function: init_extra_frame_info | |
163 | This function actually figures out the frame address for a given pc and | |
164 | sp. This is tricky on the c80 because we sometimes don't use an explicit | |
165 | frame pointer, and the previous stack pointer isn't necessarily recorded | |
166 | on the stack. The only reliable way to get this info is to | |
167 | examine the prologue. */ | |
168 | ||
169 | void | |
fba45db2 | 170 | tic80_init_extra_frame_info (struct frame_info *fi) |
e49d4fa6 SS |
171 | { |
172 | int reg; | |
173 | ||
174 | if (fi->next) | |
175 | fi->pc = FRAME_SAVED_PC (fi->next); | |
176 | ||
177 | /* Because zero is a valid register offset relative to SP, we initialize | |
178 | the offsets to -1 to indicate unused entries. */ | |
179 | for (reg = 0; reg < NUM_REGS; reg++) | |
180 | fi->fsr.regs[reg] = -1; | |
181 | ||
182 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
183 | { | |
184 | /* We need to setup fi->frame here because run_stack_dummy gets it wrong | |
c5aa993b | 185 | by assuming it's always FP. */ |
e49d4fa6 SS |
186 | fi->frame = generic_read_register_dummy (fi->pc, fi->frame, SP_REGNUM); |
187 | fi->framesize = 0; | |
188 | fi->frameoffset = 0; | |
189 | return; | |
190 | } | |
c5aa993b | 191 | else |
e49d4fa6 SS |
192 | { |
193 | tic80_scan_prologue (fi); | |
194 | ||
c5aa993b | 195 | if (!fi->next) /* this is the innermost frame? */ |
e49d4fa6 | 196 | fi->frame = read_register (fi->framereg); |
c5aa993b JM |
197 | else |
198 | /* not the innermost frame */ | |
e49d4fa6 | 199 | /* If this function uses FP as the frame register, and the function |
c5aa993b JM |
200 | it called saved the FP, get the saved FP. */ if (fi->framereg == FP_REGNUM && |
201 | fi->next->fsr.regs[FP_REGNUM] != (unsigned) -1) | |
202 | fi->frame = read_memory_integer (fi->next->fsr.regs[FP_REGNUM], 4); | |
e49d4fa6 SS |
203 | |
204 | /* Convert SP-relative offsets of saved registers to real addresses. */ | |
205 | for (reg = 0; reg < NUM_REGS; reg++) | |
206 | if (fi->fsr.regs[reg] == (unsigned) -1) | |
c5aa993b JM |
207 | fi->fsr.regs[reg] = 0; /* unused entry */ |
208 | else | |
209 | fi->fsr.regs[reg] += fi->frame - fi->frameoffset; | |
e49d4fa6 SS |
210 | } |
211 | } | |
212 | ||
213 | /* Function: find_callers_reg | |
214 | Find REGNUM on the stack. Otherwise, it's in an active register. One thing | |
215 | we might want to do here is to check REGNUM against the clobber mask, and | |
216 | somehow flag it as invalid if it isn't saved on the stack somewhere. This | |
217 | would provide a graceful failure mode when trying to get the value of | |
218 | caller-saves registers for an inner frame. */ | |
219 | ||
220 | CORE_ADDR | |
fba45db2 | 221 | tic80_find_callers_reg (struct frame_info *fi, int regnum) |
e49d4fa6 SS |
222 | { |
223 | for (; fi; fi = fi->next) | |
224 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) | |
225 | return generic_read_register_dummy (fi->pc, fi->frame, regnum); | |
226 | else if (fi->fsr.regs[regnum] != 0) | |
c5aa993b JM |
227 | return read_memory_integer (fi->fsr.regs[regnum], |
228 | REGISTER_RAW_SIZE (regnum)); | |
e49d4fa6 SS |
229 | return read_register (regnum); |
230 | } | |
231 | ||
232 | /* Function: frame_chain | |
233 | Given a GDB frame, determine the address of the calling function's frame. | |
234 | This will be used to create a new GDB frame struct, and then | |
235 | INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame. | |
236 | For c80, we save the frame size when we initialize the frame_info. */ | |
237 | ||
238 | CORE_ADDR | |
fba45db2 | 239 | tic80_frame_chain (struct frame_info *fi) |
e49d4fa6 SS |
240 | { |
241 | CORE_ADDR fn_start, callers_pc, fp; | |
242 | ||
243 | /* is this a dummy frame? */ | |
c5aa993b JM |
244 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
245 | return fi->frame; /* dummy frame same as caller's frame */ | |
e49d4fa6 SS |
246 | |
247 | /* is caller-of-this a dummy frame? */ | |
c5aa993b | 248 | callers_pc = FRAME_SAVED_PC (fi); /* find out who called us: */ |
e49d4fa6 | 249 | fp = tic80_find_callers_reg (fi, FP_REGNUM); |
c5aa993b JM |
250 | if (PC_IN_CALL_DUMMY (callers_pc, fp, fp)) |
251 | return fp; /* dummy frame's frame may bear no relation to ours */ | |
e49d4fa6 SS |
252 | |
253 | if (find_pc_partial_function (fi->pc, 0, &fn_start, 0)) | |
254 | if (fn_start == entry_point_address ()) | |
c5aa993b | 255 | return 0; /* in _start fn, don't chain further */ |
e49d4fa6 SS |
256 | |
257 | if (fi->framereg == FP_REGNUM) | |
258 | return tic80_find_callers_reg (fi, FP_REGNUM); | |
259 | else | |
260 | return fi->frame + fi->framesize; | |
261 | } | |
262 | ||
263 | /* Function: pop_frame | |
264 | Discard from the stack the innermost frame, | |
265 | restoring all saved registers. */ | |
266 | ||
267 | struct frame_info * | |
fba45db2 | 268 | tic80_pop_frame (struct frame_info *frame) |
e49d4fa6 SS |
269 | { |
270 | int regnum; | |
271 | ||
272 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) | |
273 | generic_pop_dummy_frame (); | |
274 | else | |
275 | { | |
276 | for (regnum = 0; regnum < NUM_REGS; regnum++) | |
277 | if (frame->fsr.regs[regnum] != 0) | |
c5aa993b | 278 | write_register (regnum, |
e49d4fa6 SS |
279 | read_memory_integer (frame->fsr.regs[regnum], 4)); |
280 | ||
281 | write_register (PC_REGNUM, FRAME_SAVED_PC (frame)); | |
282 | write_register (SP_REGNUM, read_register (FP_REGNUM)); | |
283 | #if 0 | |
284 | if (read_register (PSW_REGNUM) & 0x80) | |
285 | write_register (SPU_REGNUM, read_register (SP_REGNUM)); | |
286 | else | |
287 | write_register (SPI_REGNUM, read_register (SP_REGNUM)); | |
288 | #endif | |
289 | } | |
290 | flush_cached_frames (); | |
291 | return NULL; | |
292 | } | |
293 | ||
294 | /* Function: frame_saved_pc | |
295 | Find the caller of this frame. We do this by seeing if LR_REGNUM is saved | |
296 | in the stack anywhere, otherwise we get it from the registers. */ | |
297 | ||
298 | CORE_ADDR | |
fba45db2 | 299 | tic80_frame_saved_pc (struct frame_info *fi) |
e49d4fa6 | 300 | { |
c5aa993b | 301 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
e49d4fa6 SS |
302 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); |
303 | else | |
304 | return tic80_find_callers_reg (fi, LR_REGNUM); | |
305 | } | |
306 | ||
307 | /* Function: tic80_push_return_address (pc, sp) | |
308 | Set up the return address for the inferior function call. | |
309 | Necessary for targets that don't actually execute a JSR/BSR instruction | |
310 | (ie. when using an empty CALL_DUMMY) */ | |
311 | ||
312 | CORE_ADDR | |
fba45db2 | 313 | tic80_push_return_address (CORE_ADDR pc, CORE_ADDR sp) |
e49d4fa6 SS |
314 | { |
315 | write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ()); | |
316 | return sp; | |
317 | } | |
318 | ||
319 | ||
320 | /* Function: push_arguments | |
321 | Setup the function arguments for calling a function in the inferior. | |
322 | ||
323 | On the TI C80 architecture, there are six register pairs (R2/R3 to R12/13) | |
324 | which are dedicated for passing function arguments. Up to the first six | |
325 | arguments (depending on size) may go into these registers. | |
326 | The rest go on the stack. | |
327 | ||
328 | Arguments that are smaller than 4 bytes will still take up a whole | |
329 | register or a whole 32-bit word on the stack, and will be | |
330 | right-justified in the register or the stack word. This includes | |
331 | chars, shorts, and small aggregate types. | |
c5aa993b | 332 | |
e49d4fa6 SS |
333 | Arguments that are four bytes or less in size are placed in the |
334 | even-numbered register of a register pair, and the odd-numbered | |
335 | register is not used. | |
336 | ||
337 | Arguments of 8 bytes size (such as floating point doubles) are placed | |
338 | in a register pair. The least significant 32-bit word is placed in | |
339 | the even-numbered register, and the most significant word in the | |
340 | odd-numbered register. | |
341 | ||
342 | Aggregate types with sizes between 4 and 8 bytes are passed | |
343 | entirely on the stack, and are left-justified within the | |
344 | double-word (as opposed to aggregates smaller than 4 bytes | |
345 | which are right-justified). | |
346 | ||
347 | Aggregates of greater than 8 bytes are first copied onto the stack, | |
348 | and then a pointer to the copy is passed in the place of the normal | |
349 | argument (either in a register if available, or on the stack). | |
350 | ||
351 | Functions that must return an aggregate type can return it in the | |
352 | normal return value registers (R2 and R3) if its size is 8 bytes or | |
353 | less. For larger return values, the caller must allocate space for | |
354 | the callee to copy the return value to. A pointer to this space is | |
355 | passed as an implicit first argument, always in R0. */ | |
356 | ||
357 | CORE_ADDR | |
fba45db2 KB |
358 | tic80_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp, |
359 | unsigned char struct_return, CORE_ADDR struct_addr) | |
e49d4fa6 SS |
360 | { |
361 | int stack_offset, stack_alloc; | |
362 | int argreg; | |
363 | int argnum; | |
364 | struct type *type; | |
365 | CORE_ADDR regval; | |
366 | char *val; | |
367 | char valbuf[4]; | |
368 | int len; | |
369 | int odd_sized_struct; | |
370 | int is_struct; | |
371 | ||
372 | /* first force sp to a 4-byte alignment */ | |
373 | sp = sp & ~3; | |
374 | ||
c5aa993b | 375 | argreg = ARG0_REGNUM; |
e49d4fa6 SS |
376 | /* The "struct return pointer" pseudo-argument goes in R0 */ |
377 | if (struct_return) | |
c5aa993b JM |
378 | write_register (argreg++, struct_addr); |
379 | ||
e49d4fa6 SS |
380 | /* Now make sure there's space on the stack */ |
381 | for (argnum = 0, stack_alloc = 0; | |
382 | argnum < nargs; argnum++) | |
c5aa993b JM |
383 | stack_alloc += ((TYPE_LENGTH (VALUE_TYPE (args[argnum])) + 3) & ~3); |
384 | sp -= stack_alloc; /* make room on stack for args */ | |
385 | ||
386 | ||
e49d4fa6 SS |
387 | /* Now load as many as possible of the first arguments into |
388 | registers, and push the rest onto the stack. There are 16 bytes | |
389 | in four registers available. Loop thru args from first to last. */ | |
c5aa993b | 390 | |
e49d4fa6 SS |
391 | argreg = ARG0_REGNUM; |
392 | for (argnum = 0, stack_offset = 0; argnum < nargs; argnum++) | |
393 | { | |
394 | type = VALUE_TYPE (args[argnum]); | |
c5aa993b | 395 | len = TYPE_LENGTH (type); |
e49d4fa6 SS |
396 | memset (valbuf, 0, sizeof (valbuf)); |
397 | val = (char *) VALUE_CONTENTS (args[argnum]); | |
c5aa993b | 398 | |
e49d4fa6 SS |
399 | /* FIXME -- tic80 can take doubleword arguments in register pairs */ |
400 | is_struct = (type->code == TYPE_CODE_STRUCT); | |
401 | odd_sized_struct = 0; | |
402 | ||
c5aa993b | 403 | if (!is_struct) |
e49d4fa6 SS |
404 | { |
405 | if (len < 4) | |
c5aa993b | 406 | { /* value gets right-justified in the register or stack word */ |
e49d4fa6 SS |
407 | memcpy (valbuf + (4 - len), val, len); |
408 | val = valbuf; | |
409 | } | |
410 | if (len > 4 && (len & 3) != 0) | |
c5aa993b | 411 | odd_sized_struct = 1; /* such structs go entirely on stack */ |
e49d4fa6 SS |
412 | } |
413 | else | |
414 | { | |
415 | /* Structs are always passed by reference. */ | |
416 | write_register (argreg, sp + stack_offset); | |
c5aa993b | 417 | argreg++; |
e49d4fa6 SS |
418 | } |
419 | ||
420 | while (len > 0) | |
c5aa993b JM |
421 | { |
422 | if (is_struct || argreg > ARGLAST_REGNUM || odd_sized_struct) | |
423 | { /* must go on the stack */ | |
424 | write_memory (sp + stack_offset, val, 4); | |
425 | stack_offset += 4; | |
426 | } | |
427 | /* NOTE WELL!!!!! This is not an "else if" clause!!! | |
428 | That's because some things get passed on the stack | |
429 | AND in the registers! */ | |
430 | if (!is_struct && argreg <= ARGLAST_REGNUM) | |
431 | { /* there's room in a register */ | |
432 | regval = extract_address (val, REGISTER_RAW_SIZE (argreg)); | |
433 | write_register (argreg, regval); | |
e49d4fa6 | 434 | argreg += 2; /* FIXME -- what about doubleword args? */ |
c5aa993b JM |
435 | } |
436 | /* Store the value 4 bytes at a time. This means that things | |
437 | larger than 4 bytes may go partly in registers and partly | |
438 | on the stack. */ | |
439 | len -= REGISTER_RAW_SIZE (argreg); | |
440 | val += REGISTER_RAW_SIZE (argreg); | |
441 | } | |
e49d4fa6 SS |
442 | } |
443 | return sp; | |
444 | } | |
445 | ||
446 | /* Function: tic80_write_sp | |
447 | Because SP is really a read-only register that mirrors either SPU or SPI, | |
448 | we must actually write one of those two as well, depending on PSW. */ | |
449 | ||
450 | void | |
fba45db2 | 451 | tic80_write_sp (CORE_ADDR val) |
e49d4fa6 SS |
452 | { |
453 | #if 0 | |
454 | unsigned long psw = read_register (PSW_REGNUM); | |
455 | ||
c5aa993b | 456 | if (psw & 0x80) /* stack mode: user or interrupt */ |
e49d4fa6 SS |
457 | write_register (SPU_REGNUM, val); |
458 | else | |
459 | write_register (SPI_REGNUM, val); | |
460 | #endif | |
461 | write_register (SP_REGNUM, val); | |
462 | } | |
463 | ||
464 | void | |
fba45db2 | 465 | _initialize_tic80_tdep (void) |
e49d4fa6 SS |
466 | { |
467 | tm_print_insn = print_insn_tic80; | |
468 | } |