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1 | /* Target-dependent code for the Tilera TILE-Gx processor. |
2 | ||
3 | Copyright (C) 2012 Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "frame-base.h" | |
23 | #include "frame-unwind.h" | |
24 | #include "dwarf2-frame.h" | |
25 | #include "trad-frame.h" | |
26 | #include "symtab.h" | |
27 | #include "gdbtypes.h" | |
28 | #include "gdbcmd.h" | |
29 | #include "gdbcore.h" | |
30 | #include "value.h" | |
31 | #include "dis-asm.h" | |
32 | #include "inferior.h" | |
33 | #include "gdb_string.h" | |
34 | #include "gdb_assert.h" | |
35 | #include "arch-utils.h" | |
36 | #include "floatformat.h" | |
37 | #include "regcache.h" | |
38 | #include "regset.h" | |
39 | #include "doublest.h" | |
40 | #include "osabi.h" | |
41 | #include "linux-tdep.h" | |
42 | #include "objfiles.h" | |
43 | #include "solib-svr4.h" | |
44 | #include "symtab.h" | |
45 | #include "tilegx-tdep.h" | |
46 | #include "opcode/tilegx.h" | |
47 | ||
48 | struct tilegx_frame_cache | |
49 | { | |
50 | /* Base address. */ | |
51 | CORE_ADDR base; | |
52 | /* Function start. */ | |
53 | CORE_ADDR start_pc; | |
54 | ||
55 | /* Table of saved registers. */ | |
56 | struct trad_frame_saved_reg *saved_regs; | |
57 | }; | |
58 | ||
59 | /* Register state values used by analyze_prologue. */ | |
60 | enum reverse_state | |
61 | { | |
62 | REVERSE_STATE_REGISTER, | |
63 | REVERSE_STATE_VALUE, | |
64 | REVERSE_STATE_UNKNOWN | |
65 | }; | |
66 | ||
67 | /* Register state used by analyze_prologue(). */ | |
68 | struct tilegx_reverse_regs | |
69 | { | |
70 | LONGEST value; | |
71 | enum reverse_state state; | |
72 | }; | |
73 | ||
74 | static const struct tilegx_reverse_regs | |
75 | template_reverse_regs[TILEGX_NUM_PHYS_REGS] = | |
76 | { | |
77 | { TILEGX_R0_REGNUM, REVERSE_STATE_REGISTER }, | |
78 | { TILEGX_R1_REGNUM, REVERSE_STATE_REGISTER }, | |
79 | { TILEGX_R2_REGNUM, REVERSE_STATE_REGISTER }, | |
80 | { TILEGX_R3_REGNUM, REVERSE_STATE_REGISTER }, | |
81 | { TILEGX_R4_REGNUM, REVERSE_STATE_REGISTER }, | |
82 | { TILEGX_R5_REGNUM, REVERSE_STATE_REGISTER }, | |
83 | { TILEGX_R6_REGNUM, REVERSE_STATE_REGISTER }, | |
84 | { TILEGX_R7_REGNUM, REVERSE_STATE_REGISTER }, | |
85 | { TILEGX_R8_REGNUM, REVERSE_STATE_REGISTER }, | |
86 | { TILEGX_R9_REGNUM, REVERSE_STATE_REGISTER }, | |
87 | { TILEGX_R10_REGNUM, REVERSE_STATE_REGISTER }, | |
88 | { TILEGX_R11_REGNUM, REVERSE_STATE_REGISTER }, | |
89 | { TILEGX_R12_REGNUM, REVERSE_STATE_REGISTER }, | |
90 | { TILEGX_R13_REGNUM, REVERSE_STATE_REGISTER }, | |
91 | { TILEGX_R14_REGNUM, REVERSE_STATE_REGISTER }, | |
92 | { TILEGX_R15_REGNUM, REVERSE_STATE_REGISTER }, | |
93 | { TILEGX_R16_REGNUM, REVERSE_STATE_REGISTER }, | |
94 | { TILEGX_R17_REGNUM, REVERSE_STATE_REGISTER }, | |
95 | { TILEGX_R18_REGNUM, REVERSE_STATE_REGISTER }, | |
96 | { TILEGX_R19_REGNUM, REVERSE_STATE_REGISTER }, | |
97 | { TILEGX_R20_REGNUM, REVERSE_STATE_REGISTER }, | |
98 | { TILEGX_R21_REGNUM, REVERSE_STATE_REGISTER }, | |
99 | { TILEGX_R22_REGNUM, REVERSE_STATE_REGISTER }, | |
100 | { TILEGX_R23_REGNUM, REVERSE_STATE_REGISTER }, | |
101 | { TILEGX_R24_REGNUM, REVERSE_STATE_REGISTER }, | |
102 | { TILEGX_R25_REGNUM, REVERSE_STATE_REGISTER }, | |
103 | { TILEGX_R26_REGNUM, REVERSE_STATE_REGISTER }, | |
104 | { TILEGX_R27_REGNUM, REVERSE_STATE_REGISTER }, | |
105 | { TILEGX_R28_REGNUM, REVERSE_STATE_REGISTER }, | |
106 | { TILEGX_R29_REGNUM, REVERSE_STATE_REGISTER }, | |
107 | { TILEGX_R30_REGNUM, REVERSE_STATE_REGISTER }, | |
108 | { TILEGX_R31_REGNUM, REVERSE_STATE_REGISTER }, | |
109 | { TILEGX_R32_REGNUM, REVERSE_STATE_REGISTER }, | |
110 | { TILEGX_R33_REGNUM, REVERSE_STATE_REGISTER }, | |
111 | { TILEGX_R34_REGNUM, REVERSE_STATE_REGISTER }, | |
112 | { TILEGX_R35_REGNUM, REVERSE_STATE_REGISTER }, | |
113 | { TILEGX_R36_REGNUM, REVERSE_STATE_REGISTER }, | |
114 | { TILEGX_R37_REGNUM, REVERSE_STATE_REGISTER }, | |
115 | { TILEGX_R38_REGNUM, REVERSE_STATE_REGISTER }, | |
116 | { TILEGX_R39_REGNUM, REVERSE_STATE_REGISTER }, | |
117 | { TILEGX_R40_REGNUM, REVERSE_STATE_REGISTER }, | |
118 | { TILEGX_R41_REGNUM, REVERSE_STATE_REGISTER }, | |
119 | { TILEGX_R42_REGNUM, REVERSE_STATE_REGISTER }, | |
120 | { TILEGX_R43_REGNUM, REVERSE_STATE_REGISTER }, | |
121 | { TILEGX_R44_REGNUM, REVERSE_STATE_REGISTER }, | |
122 | { TILEGX_R45_REGNUM, REVERSE_STATE_REGISTER }, | |
123 | { TILEGX_R46_REGNUM, REVERSE_STATE_REGISTER }, | |
124 | { TILEGX_R47_REGNUM, REVERSE_STATE_REGISTER }, | |
125 | { TILEGX_R48_REGNUM, REVERSE_STATE_REGISTER }, | |
126 | { TILEGX_R49_REGNUM, REVERSE_STATE_REGISTER }, | |
127 | { TILEGX_R50_REGNUM, REVERSE_STATE_REGISTER }, | |
128 | { TILEGX_R51_REGNUM, REVERSE_STATE_REGISTER }, | |
129 | { TILEGX_R52_REGNUM, REVERSE_STATE_REGISTER }, | |
130 | { TILEGX_TP_REGNUM, REVERSE_STATE_REGISTER }, | |
131 | { TILEGX_SP_REGNUM, REVERSE_STATE_REGISTER }, | |
132 | { TILEGX_LR_REGNUM, REVERSE_STATE_REGISTER }, | |
133 | { 0, REVERSE_STATE_UNKNOWN }, | |
134 | { 0, REVERSE_STATE_UNKNOWN }, | |
135 | { 0, REVERSE_STATE_UNKNOWN }, | |
136 | { 0, REVERSE_STATE_UNKNOWN }, | |
137 | { 0, REVERSE_STATE_UNKNOWN }, | |
138 | { 0, REVERSE_STATE_UNKNOWN }, | |
139 | { 0, REVERSE_STATE_UNKNOWN }, | |
140 | { TILEGX_ZERO_REGNUM, REVERSE_STATE_VALUE } | |
141 | }; | |
142 | ||
143 | /* Implement the "register_name" gdbarch method. */ | |
144 | ||
145 | static const char * | |
146 | tilegx_register_name (struct gdbarch *gdbarch, int regnum) | |
147 | { | |
148 | static const char *const register_names[TILEGX_NUM_REGS] = | |
149 | { | |
150 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
151 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
152 | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", | |
153 | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", | |
154 | "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", | |
155 | "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", | |
156 | "r48", "r49", "r50", "r51", "r52", "tp", "sp", "lr", | |
157 | "sn", "idn0", "idn1", "udn0", "udn1", "udn2", "udn3", "zero", | |
158 | "pc" | |
159 | }; | |
160 | ||
161 | if (regnum < 0 || regnum >= TILEGX_NUM_REGS) | |
162 | internal_error (__FILE__, __LINE__, | |
163 | "tilegx_register_name: invalid register number %d", | |
164 | regnum); | |
165 | ||
166 | return register_names[regnum]; | |
167 | } | |
168 | ||
169 | /* This is the implementation of gdbarch method register_type. */ | |
170 | ||
171 | static struct type * | |
172 | tilegx_register_type (struct gdbarch *gdbarch, int regnum) | |
173 | { | |
174 | if (regnum == TILEGX_PC_REGNUM) | |
175 | return builtin_type (gdbarch)->builtin_func_ptr; | |
176 | else | |
177 | return builtin_type (gdbarch)->builtin_uint64; | |
178 | } | |
179 | ||
180 | /* This is the implementation of gdbarch method dwarf2_reg_to_regnum. */ | |
181 | ||
182 | static int | |
183 | tilegx_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int num) | |
184 | { | |
185 | return num; | |
186 | } | |
187 | ||
188 | /* Makes the decision of whether a given type is a scalar type. | |
189 | Scalar types are returned in the registers r2-r11 as they fit. */ | |
190 | ||
191 | static int | |
192 | tilegx_type_is_scalar (struct type *t) | |
193 | { | |
194 | return (TYPE_CODE(t) != TYPE_CODE_STRUCT | |
195 | && TYPE_CODE(t) != TYPE_CODE_UNION | |
196 | && TYPE_CODE(t) != TYPE_CODE_ARRAY); | |
197 | } | |
198 | ||
199 | /* Returns non-zero if the given struct type will be returned using | |
200 | a special convention, rather than the normal function return method. | |
201 | Used in the context of the "return" command, and target function | |
202 | calls from the debugger. */ | |
203 | ||
204 | static int | |
205 | tilegx_use_struct_convention (struct type *type) | |
206 | { | |
207 | /* Only scalars which fit in R0 - R9 can be returned in registers. | |
208 | Otherwise, they are returned via a pointer passed in R0. */ | |
209 | return (!tilegx_type_is_scalar (type) | |
210 | && (TYPE_LENGTH (type) > (1 + TILEGX_R9_REGNUM - TILEGX_R0_REGNUM) | |
211 | * tilegx_reg_size)); | |
212 | } | |
213 | ||
214 | /* Find a function's return value in the appropriate registers (in | |
215 | REGCACHE), and copy it into VALBUF. */ | |
216 | ||
217 | static void | |
218 | tilegx_extract_return_value (struct type *type, struct regcache *regcache, | |
219 | gdb_byte *valbuf) | |
220 | { | |
221 | int len = TYPE_LENGTH (type); | |
222 | int i, regnum = TILEGX_R0_REGNUM; | |
223 | ||
224 | for (i = 0; i < len; i += tilegx_reg_size) | |
225 | regcache_raw_read (regcache, regnum++, valbuf + i); | |
226 | } | |
227 | ||
228 | /* Copy the function return value from VALBUF into the proper | |
229 | location for a function return. | |
230 | Called only in the context of the "return" command. */ | |
231 | ||
232 | static void | |
233 | tilegx_store_return_value (struct type *type, struct regcache *regcache, | |
234 | const void *valbuf) | |
235 | { | |
236 | if (TYPE_LENGTH (type) < tilegx_reg_size) | |
237 | { | |
238 | /* Add leading zeros to the (little-endian) value. */ | |
239 | gdb_byte buf[tilegx_reg_size] = { 0 }; | |
240 | ||
241 | memcpy (buf, valbuf, TYPE_LENGTH (type)); | |
242 | regcache_raw_write (regcache, TILEGX_R0_REGNUM, buf); | |
243 | } | |
244 | else | |
245 | { | |
246 | int len = TYPE_LENGTH (type); | |
247 | int i, regnum = TILEGX_R0_REGNUM; | |
248 | ||
249 | for (i = 0; i < len; i += tilegx_reg_size) | |
250 | regcache_raw_write (regcache, regnum++, (gdb_byte *) valbuf + i); | |
251 | } | |
252 | } | |
253 | ||
254 | /* This is the implementation of gdbarch method return_value. */ | |
255 | ||
256 | static enum return_value_convention | |
257 | tilegx_return_value (struct gdbarch *gdbarch, struct value *function, | |
258 | struct type *type, struct regcache *regcache, | |
259 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
260 | { | |
261 | if (tilegx_use_struct_convention (type)) | |
262 | return RETURN_VALUE_STRUCT_CONVENTION; | |
263 | if (writebuf) | |
264 | tilegx_store_return_value (type, regcache, writebuf); | |
265 | else if (readbuf) | |
266 | tilegx_extract_return_value (type, regcache, readbuf); | |
267 | return RETURN_VALUE_REGISTER_CONVENTION; | |
268 | } | |
269 | ||
270 | /* This is the implementation of gdbarch method frame_align. */ | |
271 | ||
272 | static CORE_ADDR | |
273 | tilegx_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
274 | { | |
275 | return addr & -8; | |
276 | } | |
277 | ||
278 | ||
279 | /* Implement the "push_dummy_call" gdbarch method. */ | |
280 | ||
281 | static CORE_ADDR | |
282 | tilegx_push_dummy_call (struct gdbarch *gdbarch, | |
283 | struct value *function, | |
284 | struct regcache *regcache, | |
285 | CORE_ADDR bp_addr, int nargs, | |
286 | struct value **args, | |
287 | CORE_ADDR sp, int struct_return, | |
288 | CORE_ADDR struct_addr) | |
289 | { | |
290 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
291 | CORE_ADDR stack_dest = sp; | |
292 | int argreg = TILEGX_R0_REGNUM; | |
293 | int i, j; | |
294 | int typelen, slacklen, alignlen; | |
295 | static const gdb_byte two_zero_words[8] = { 0 }; | |
296 | ||
297 | /* If struct_return is 1, then the struct return address will | |
298 | consume one argument-passing register. */ | |
299 | if (struct_return) | |
300 | regcache_cooked_write_unsigned (regcache, argreg++, struct_addr); | |
301 | ||
302 | /* Arguments are passed in R0 - R9, and as soon as an argument | |
303 | will not fit completely in the remaining registers, then it, | |
304 | and all remaining arguments, are put on the stack. */ | |
305 | for (i = 0; i < nargs && argreg <= TILEGX_R9_REGNUM; i++) | |
306 | { | |
307 | const gdb_byte *val; | |
308 | typelen = TYPE_LENGTH (value_enclosing_type (args[i])); | |
309 | ||
310 | if (typelen > (TILEGX_R9_REGNUM - argreg + 1) * tilegx_reg_size) | |
311 | break; | |
312 | ||
313 | /* Put argument into registers wordwise. */ | |
314 | val = value_contents (args[i]); | |
315 | for (j = 0; j < typelen; j += tilegx_reg_size) | |
316 | { | |
317 | /* ISSUE: Why special handling for "typelen = 4x + 1"? | |
318 | I don't ever see "typelen" values except 4 and 8. */ | |
319 | int n = (typelen - j == 1) ? 1 : tilegx_reg_size; | |
320 | ULONGEST w = extract_unsigned_integer (val + j, n, byte_order); | |
321 | ||
322 | regcache_cooked_write_unsigned (regcache, argreg++, w); | |
323 | } | |
324 | } | |
325 | ||
326 | /* Align SP. */ | |
327 | stack_dest = tilegx_frame_align (gdbarch, stack_dest); | |
328 | ||
329 | /* Loop backwards through arguments to determine stack alignment. */ | |
330 | alignlen = 0; | |
331 | ||
332 | for (j = nargs - 1; j >= i; j--) | |
333 | { | |
334 | typelen = TYPE_LENGTH (value_enclosing_type (args[j])); | |
335 | alignlen += (typelen + 3) & (~3); | |
336 | } | |
337 | ||
338 | if (alignlen & 0x4) | |
339 | stack_dest -= 4; | |
340 | ||
341 | /* Loop backwards through remaining arguments and push them on | |
342 | the stack, word aligned. */ | |
343 | for (j = nargs - 1; j >= i; j--) | |
344 | { | |
345 | gdb_byte *val; | |
346 | ||
347 | typelen = TYPE_LENGTH (value_enclosing_type (args[j])); | |
348 | slacklen = ((typelen + 3) & (~3)) - typelen; | |
349 | val = alloca (typelen + slacklen); | |
350 | memcpy (val, value_contents (args[j]), typelen); | |
351 | memset (val + typelen, 0, slacklen); | |
352 | ||
353 | /* Now write data to the stack. The stack grows downwards. */ | |
354 | stack_dest -= typelen + slacklen; | |
355 | write_memory (stack_dest, val, typelen + slacklen); | |
356 | } | |
357 | ||
358 | /* Add 2 words for linkage space to the stack. */ | |
359 | stack_dest = stack_dest - 8; | |
360 | write_memory (stack_dest, two_zero_words, 8); | |
361 | ||
362 | /* Update stack pointer. */ | |
363 | regcache_cooked_write_unsigned (regcache, TILEGX_SP_REGNUM, stack_dest); | |
364 | ||
365 | /* Set the return address register to point to the entry point of | |
366 | the program, where a breakpoint lies in wait. */ | |
367 | regcache_cooked_write_unsigned (regcache, TILEGX_LR_REGNUM, bp_addr); | |
368 | ||
369 | return stack_dest; | |
370 | } | |
371 | ||
372 | ||
373 | /* Decode the instructions within the given address range. | |
374 | Decide when we must have reached the end of the function prologue. | |
375 | If a frame_info pointer is provided, fill in its saved_regs etc. | |
376 | Returns the address of the first instruction after the prologue. | |
377 | NOTE: This is often called with start_addr being the start of some | |
378 | function, and end_addr being the current PC. */ | |
379 | ||
380 | static CORE_ADDR | |
381 | tilegx_analyze_prologue (struct gdbarch* gdbarch, | |
382 | CORE_ADDR start_addr, CORE_ADDR end_addr, | |
383 | struct tilegx_frame_cache *cache, | |
384 | struct frame_info *next_frame) | |
385 | { | |
386 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
387 | CORE_ADDR next_addr; | |
388 | CORE_ADDR prolog_end = end_addr; | |
389 | ULONGEST inst, inst2; | |
390 | LONGEST offset; | |
391 | int regnum; | |
392 | gdb_byte instbuf[32 * TILEGX_BUNDLE_SIZE_IN_BYTES]; | |
393 | CORE_ADDR instbuf_start; | |
394 | unsigned int instbuf_size; | |
395 | int status; | |
396 | bfd_uint64_t bundle; | |
397 | struct tilegx_decoded_instruction | |
398 | decoded[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]; | |
399 | int num_insns; | |
400 | struct tilegx_reverse_regs reverse_frame[TILEGX_NUM_PHYS_REGS]; | |
401 | struct tilegx_reverse_regs | |
402 | new_reverse_frame[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]; | |
403 | int dest_regs[TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE]; | |
404 | int reverse_frame_valid, prolog_done, branch_seen; | |
405 | LONGEST prev_sp_value; | |
406 | int i, j; | |
407 | ||
408 | if (start_addr >= end_addr | |
409 | || (start_addr % TILEGX_BUNDLE_ALIGNMENT_IN_BYTES) != 0) | |
410 | return end_addr; | |
411 | ||
412 | /* Initialize the reverse frame. This maps the CURRENT frame's | |
413 | registers to the outer frame's registers (the frame on the | |
414 | stack goes the other way). */ | |
415 | memcpy (&reverse_frame, &template_reverse_regs, sizeof (reverse_frame)); | |
416 | ||
417 | prolog_done = 0; | |
418 | branch_seen = 0; | |
419 | prev_sp_value = 0; | |
420 | ||
421 | /* To cut down on round-trip overhead, we fetch multiple bundles | |
422 | at once. These variables describe the range of memory we have | |
423 | prefetched. */ | |
424 | instbuf_start = 0; | |
425 | instbuf_size = 0; | |
426 | ||
427 | for (next_addr = start_addr; | |
428 | next_addr < end_addr; | |
429 | next_addr += TILEGX_BUNDLE_SIZE_IN_BYTES) | |
430 | { | |
431 | /* Retrieve the next instruction. */ | |
432 | if (next_addr - instbuf_start >= instbuf_size) | |
433 | { | |
434 | /* Figure out how many bytes to fetch. Don't span a page | |
435 | boundary since that might cause an unnecessary memory | |
436 | error. */ | |
437 | unsigned int size_on_same_page = 4096 - (next_addr & 4095); | |
438 | ||
439 | instbuf_size = sizeof instbuf; | |
440 | ||
441 | if (instbuf_size > size_on_same_page) | |
442 | instbuf_size = size_on_same_page; | |
443 | instbuf_start = next_addr; | |
444 | ||
445 | status = safe_frame_unwind_memory (next_frame, instbuf_start, | |
446 | instbuf, instbuf_size); | |
447 | if (status == 0) | |
448 | memory_error (status, next_addr); | |
449 | } | |
450 | ||
451 | reverse_frame_valid = 0; | |
452 | ||
453 | bundle = extract_unsigned_integer (&instbuf[next_addr - instbuf_start], | |
454 | 8, byte_order); | |
455 | ||
456 | num_insns = parse_insn_tilegx (bundle, next_addr, decoded); | |
457 | ||
458 | for (i = 0; i < num_insns; i++) | |
459 | { | |
460 | struct tilegx_decoded_instruction *this_insn = &decoded[i]; | |
461 | int64_t *operands = (int64_t *) this_insn->operand_values; | |
462 | const struct tilegx_opcode *opcode = this_insn->opcode; | |
463 | ||
464 | switch (opcode->mnemonic) | |
465 | { | |
466 | case TILEGX_OPC_ST: | |
467 | if (cache | |
468 | && reverse_frame[operands[0]].state == REVERSE_STATE_VALUE | |
469 | && reverse_frame[operands[1]].state | |
470 | == REVERSE_STATE_REGISTER) | |
471 | { | |
472 | LONGEST saved_address = reverse_frame[operands[0]].value; | |
473 | unsigned saved_register | |
474 | = (unsigned) reverse_frame[operands[1]].value; | |
475 | ||
476 | /* realreg >= 0 and addr != -1 indicates that the | |
477 | value of saved_register is in memory location | |
478 | saved_address. The value of realreg is not | |
479 | meaningful in this case but it must be >= 0. | |
480 | See trad-frame.h. */ | |
481 | cache->saved_regs[saved_register].realreg = saved_register; | |
482 | cache->saved_regs[saved_register].addr = saved_address; | |
483 | } | |
484 | break; | |
485 | case TILEGX_OPC_ADDI: | |
486 | case TILEGX_OPC_ADDLI: | |
487 | if (cache | |
488 | && operands[0] == TILEGX_SP_REGNUM | |
489 | && operands[1] == TILEGX_SP_REGNUM | |
490 | && reverse_frame[operands[1]].state == REVERSE_STATE_REGISTER) | |
491 | { | |
492 | /* Special case. We're fixing up the stack frame. */ | |
493 | uint64_t hopefully_sp | |
494 | = (unsigned) reverse_frame[operands[1]].value; | |
495 | short op2_as_short = (short) operands[2]; | |
496 | signed char op2_as_char = (signed char) operands[2]; | |
497 | ||
498 | /* Fix up the sign-extension. */ | |
499 | if (opcode->mnemonic == TILEGX_OPC_ADDI) | |
500 | op2_as_short = op2_as_char; | |
501 | prev_sp_value = (cache->saved_regs[hopefully_sp].addr | |
502 | - op2_as_short); | |
503 | ||
504 | new_reverse_frame[i].state = REVERSE_STATE_VALUE; | |
505 | new_reverse_frame[i].value | |
506 | = cache->saved_regs[hopefully_sp].addr; | |
507 | trad_frame_set_value (cache->saved_regs, | |
508 | hopefully_sp, prev_sp_value); | |
509 | } | |
510 | else | |
511 | { | |
512 | short op2_as_short = (short) operands[2]; | |
513 | signed char op2_as_char = (signed char) operands[2]; | |
514 | ||
515 | /* Fix up the sign-extension. */ | |
516 | if (opcode->mnemonic == TILEGX_OPC_ADDI) | |
517 | op2_as_short = op2_as_char; | |
518 | ||
519 | new_reverse_frame[i] = reverse_frame[operands[1]]; | |
520 | if (new_reverse_frame[i].state == REVERSE_STATE_VALUE) | |
521 | new_reverse_frame[i].value += op2_as_short; | |
522 | else | |
523 | new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN; | |
524 | } | |
525 | reverse_frame_valid |= 1 << i; | |
526 | dest_regs[i] = operands[0]; | |
527 | break; | |
528 | case TILEGX_OPC_ADD: | |
529 | if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE | |
530 | && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE) | |
531 | { | |
532 | /* We have values -- we can do this. */ | |
533 | new_reverse_frame[i] = reverse_frame[operands[2]]; | |
534 | new_reverse_frame[i].value | |
535 | += reverse_frame[operands[i]].value; | |
536 | } | |
537 | else | |
538 | { | |
539 | /* We don't know anything about the values. Punt. */ | |
540 | new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN; | |
541 | } | |
542 | reverse_frame_valid |= 1 << i; | |
543 | dest_regs[i] = operands[0]; | |
544 | break; | |
545 | case TILEGX_OPC_MOVE: | |
546 | new_reverse_frame[i] = reverse_frame[operands[1]]; | |
547 | reverse_frame_valid |= 1 << i; | |
548 | dest_regs[i] = operands[0]; | |
549 | break; | |
550 | case TILEGX_OPC_MOVEI: | |
551 | case TILEGX_OPC_MOVELI: | |
552 | new_reverse_frame[i].state = REVERSE_STATE_VALUE; | |
553 | new_reverse_frame[i].value = operands[1]; | |
554 | reverse_frame_valid |= 1 << i; | |
555 | dest_regs[i] = operands[0]; | |
556 | break; | |
557 | case TILEGX_OPC_ORI: | |
558 | if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE) | |
559 | { | |
560 | /* We have a value in A -- we can do this. */ | |
561 | new_reverse_frame[i] = reverse_frame[operands[1]]; | |
562 | new_reverse_frame[i].value | |
563 | = reverse_frame[operands[1]].value | operands[2]; | |
564 | } | |
565 | else if (operands[2] == 0) | |
566 | { | |
567 | /* This is a move. */ | |
568 | new_reverse_frame[i] = reverse_frame[operands[1]]; | |
569 | } | |
570 | else | |
571 | { | |
572 | /* We don't know anything about the values. Punt. */ | |
573 | new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN; | |
574 | } | |
575 | reverse_frame_valid |= 1 << i; | |
576 | dest_regs[i] = operands[0]; | |
577 | break; | |
578 | case TILEGX_OPC_OR: | |
579 | if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE | |
580 | && reverse_frame[operands[1]].value == 0) | |
581 | { | |
582 | /* This is a move. */ | |
583 | new_reverse_frame[i] = reverse_frame[operands[2]]; | |
584 | } | |
585 | else if (reverse_frame[operands[2]].state == REVERSE_STATE_VALUE | |
586 | && reverse_frame[operands[2]].value == 0) | |
587 | { | |
588 | /* This is a move. */ | |
589 | new_reverse_frame[i] = reverse_frame[operands[1]]; | |
590 | } | |
591 | else | |
592 | { | |
593 | /* We don't know anything about the values. Punt. */ | |
594 | new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN; | |
595 | } | |
596 | reverse_frame_valid |= 1 << i; | |
597 | dest_regs[i] = operands[0]; | |
598 | break; | |
599 | case TILEGX_OPC_SUB: | |
600 | if (reverse_frame[operands[1]].state == REVERSE_STATE_VALUE | |
601 | && reverse_frame[operands[2]].state == REVERSE_STATE_VALUE) | |
602 | { | |
603 | /* We have values -- we can do this. */ | |
604 | new_reverse_frame[i] = reverse_frame[operands[1]]; | |
605 | new_reverse_frame[i].value | |
606 | -= reverse_frame[operands[2]].value; | |
607 | } | |
608 | else | |
609 | { | |
610 | /* We don't know anything about the values. Punt. */ | |
611 | new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN; | |
612 | } | |
613 | reverse_frame_valid |= 1 << i; | |
614 | dest_regs[i] = operands[0]; | |
615 | break; | |
616 | ||
617 | case TILEGX_OPC_FNOP: | |
618 | case TILEGX_OPC_INFO: | |
619 | case TILEGX_OPC_INFOL: | |
620 | /* Nothing to see here, move on. | |
621 | Note that real NOP is treated as a 'real' instruction | |
622 | because someone must have intended that it be there. | |
623 | It therefore terminates the prolog. */ | |
624 | break; | |
625 | ||
626 | case TILEGX_OPC_J: | |
627 | case TILEGX_OPC_JAL: | |
628 | ||
629 | case TILEGX_OPC_BEQZ: | |
630 | case TILEGX_OPC_BEQZT: | |
631 | case TILEGX_OPC_BGEZ: | |
632 | case TILEGX_OPC_BGEZT: | |
633 | case TILEGX_OPC_BGTZ: | |
634 | case TILEGX_OPC_BGTZT: | |
635 | case TILEGX_OPC_BLBC: | |
636 | case TILEGX_OPC_BLBCT: | |
637 | case TILEGX_OPC_BLBS: | |
638 | case TILEGX_OPC_BLBST: | |
639 | case TILEGX_OPC_BLEZ: | |
640 | case TILEGX_OPC_BLEZT: | |
641 | case TILEGX_OPC_BLTZ: | |
642 | case TILEGX_OPC_BLTZT: | |
643 | case TILEGX_OPC_BNEZ: | |
644 | case TILEGX_OPC_BNEZT: | |
645 | ||
646 | case TILEGX_OPC_IRET: | |
647 | case TILEGX_OPC_JALR: | |
648 | case TILEGX_OPC_JALRP: | |
649 | case TILEGX_OPC_JR: | |
650 | case TILEGX_OPC_JRP: | |
651 | case TILEGX_OPC_SWINT0: | |
652 | case TILEGX_OPC_SWINT1: | |
653 | case TILEGX_OPC_SWINT2: | |
654 | case TILEGX_OPC_SWINT3: | |
655 | /* We're really done -- this is a branch. */ | |
656 | branch_seen = 1; | |
657 | prolog_done = 1; | |
658 | break; | |
659 | default: | |
660 | /* We don't know or care what this instruction is. | |
661 | All we know is that it isn't part of a prolog, and if | |
662 | there's a destination register, we're trashing it. */ | |
663 | prolog_done = 1; | |
664 | for (j = 0; j < opcode->num_operands; j++) | |
665 | { | |
666 | if (this_insn->operands[j]->is_dest_reg) | |
667 | { | |
668 | dest_regs[i] = operands[j]; | |
669 | new_reverse_frame[i].state = REVERSE_STATE_UNKNOWN; | |
670 | reverse_frame_valid |= 1 << i; | |
671 | break; | |
672 | } | |
673 | } | |
674 | break; | |
675 | } | |
676 | } | |
677 | ||
678 | /* Now update the reverse frames. */ | |
679 | for (i = 0; i < num_insns; i++) | |
680 | { | |
681 | /* ISSUE: Does this properly handle "network" registers? */ | |
682 | if ((reverse_frame_valid & (1 << i)) | |
683 | && dest_regs[i] != TILEGX_ZERO_REGNUM) | |
684 | reverse_frame[dest_regs[i]] = new_reverse_frame[i]; | |
685 | } | |
686 | ||
687 | if (prev_sp_value != 0) | |
688 | { | |
689 | /* GCC uses R52 as a frame pointer. Have we seen "move r52, sp"? */ | |
690 | if (reverse_frame[TILEGX_R52_REGNUM].state == REVERSE_STATE_REGISTER | |
691 | && reverse_frame[TILEGX_R52_REGNUM].value == TILEGX_SP_REGNUM) | |
692 | { | |
693 | reverse_frame[TILEGX_R52_REGNUM].state = REVERSE_STATE_VALUE; | |
694 | reverse_frame[TILEGX_R52_REGNUM].value = prev_sp_value; | |
695 | } | |
696 | ||
697 | prev_sp_value = 0; | |
698 | } | |
699 | ||
700 | if (prolog_done && prolog_end == end_addr) | |
701 | { | |
702 | /* We found non-prolog code. As such, _this_ instruction | |
703 | is the one after the prolog. We keep processing, because | |
704 | there may be more prolog code in there, but this is what | |
705 | we'll return. */ | |
706 | /* ISSUE: There may not have actually been a prologue, and | |
707 | we may have simply skipped some random instructions. */ | |
708 | prolog_end = next_addr; | |
709 | } | |
710 | if (branch_seen) | |
711 | { | |
712 | /* We saw a branch. The prolog absolutely must be over. */ | |
713 | break; | |
714 | } | |
715 | } | |
716 | ||
717 | if (prolog_end == end_addr && cache) | |
718 | { | |
719 | /* We may have terminated the prolog early, and we're certainly | |
720 | at THIS point right now. It's possible that the values of | |
721 | registers we need are currently actually in other registers | |
722 | (and haven't been written to memory yet). Go find them. */ | |
723 | for (i = 0; i < TILEGX_NUM_PHYS_REGS; i++) | |
724 | { | |
725 | if (reverse_frame[i].state == REVERSE_STATE_REGISTER | |
726 | && reverse_frame[i].value != i) | |
727 | { | |
728 | unsigned saved_register = (unsigned) reverse_frame[i].value; | |
729 | ||
730 | cache->saved_regs[saved_register].realreg = i; | |
731 | cache->saved_regs[saved_register].addr = (LONGEST) -1; | |
732 | } | |
733 | } | |
734 | } | |
735 | ||
736 | return prolog_end; | |
737 | } | |
738 | ||
739 | /* This is the implementation of gdbarch method skip_prologue. */ | |
740 | ||
741 | static CORE_ADDR | |
742 | tilegx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
743 | { | |
744 | struct symtab_and_line sal; | |
745 | CORE_ADDR func_start, func_end; | |
746 | ||
747 | /* This is the preferred method, find the end of the prologue by | |
748 | using the debugging information. */ | |
749 | if (find_pc_partial_function (pc, NULL, &func_start, &func_end)) | |
750 | { | |
751 | sal = find_pc_line (func_start, 0); | |
752 | ||
753 | if (sal.end < func_end && pc <= sal.end) | |
754 | return sal.end; | |
755 | } | |
756 | ||
757 | /* Otherwise, try to skip prologue the hard way. */ | |
758 | return tilegx_analyze_prologue (gdbarch, | |
759 | pc, pc + 8 * TILEGX_BUNDLE_SIZE_IN_BYTES, | |
760 | NULL, NULL); | |
761 | } | |
762 | ||
763 | /* This is the implementation of gdbarch method in_function_epilogue_p. */ | |
764 | ||
765 | static int | |
766 | tilegx_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
767 | { | |
768 | CORE_ADDR func_addr = 0, func_end = 0; | |
769 | ||
770 | if (find_pc_partial_function (pc, NULL, &func_addr, &func_end)) | |
771 | { | |
772 | ULONGEST inst, inst2; | |
773 | CORE_ADDR addr = func_end - TILEGX_BUNDLE_SIZE_IN_BYTES; | |
774 | ||
775 | /* FIXME: Find the actual epilogue. */ | |
776 | /* HACK: Just assume the final bundle is the "ret" instruction". */ | |
777 | if (pc > addr) | |
778 | return 1; | |
779 | } | |
780 | return 0; | |
781 | } | |
782 | ||
783 | /* This is the implementation of gdbarch method breakpoint_from_pc. */ | |
784 | ||
785 | static const unsigned char * | |
786 | tilegx_breakpoint_from_pc (struct gdbarch *gdbarch, | |
787 | CORE_ADDR *pcptr, int *lenptr) | |
788 | { | |
789 | /* 64-bit pattern for a { bpt ; nop } bundle. */ | |
790 | static const unsigned char breakpoint[] = | |
791 | { 0x00, 0x50, 0x48, 0x51, 0xae, 0x44, 0x6a, 0x28 }; | |
792 | ||
793 | *lenptr = sizeof (breakpoint); | |
794 | return breakpoint; | |
795 | } | |
796 | ||
797 | /* Normal frames. */ | |
798 | ||
799 | static struct tilegx_frame_cache * | |
800 | tilegx_frame_cache (struct frame_info *this_frame, void **this_cache) | |
801 | { | |
802 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
803 | struct tilegx_frame_cache *cache; | |
804 | CORE_ADDR current_pc; | |
805 | int i; | |
806 | ||
807 | if (*this_cache) | |
808 | return *this_cache; | |
809 | ||
810 | cache = FRAME_OBSTACK_ZALLOC (struct tilegx_frame_cache); | |
811 | *this_cache = cache; | |
812 | cache->saved_regs = trad_frame_alloc_saved_regs (this_frame); | |
813 | cache->base = 0; | |
814 | cache->start_pc = get_frame_func (this_frame); | |
815 | current_pc = get_frame_pc (this_frame); | |
816 | ||
817 | cache->base = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM); | |
818 | trad_frame_set_value (cache->saved_regs, TILEGX_SP_REGNUM, cache->base); | |
819 | ||
820 | cache->saved_regs[TILEGX_PC_REGNUM] = cache->saved_regs[TILEGX_LR_REGNUM]; | |
821 | if (cache->start_pc) | |
822 | tilegx_analyze_prologue (gdbarch, cache->start_pc, current_pc, | |
823 | cache, this_frame); | |
824 | ||
825 | return cache; | |
826 | } | |
827 | ||
828 | /* Retrieve the value of REGNUM in FRAME. */ | |
829 | ||
830 | static struct value* | |
831 | tilegx_frame_prev_register (struct frame_info *this_frame, | |
832 | void **this_cache, | |
833 | int regnum) | |
834 | { | |
835 | struct tilegx_frame_cache *info = | |
836 | tilegx_frame_cache (this_frame, this_cache); | |
837 | ||
838 | return trad_frame_get_prev_register (this_frame, info->saved_regs, | |
839 | regnum); | |
840 | } | |
841 | ||
842 | /* Build frame id. */ | |
843 | ||
844 | static void | |
845 | tilegx_frame_this_id (struct frame_info *this_frame, void **this_cache, | |
846 | struct frame_id *this_id) | |
847 | { | |
848 | struct tilegx_frame_cache *info = | |
849 | tilegx_frame_cache (this_frame, this_cache); | |
850 | ||
851 | /* This marks the outermost frame. */ | |
852 | if (info->base == 0) | |
853 | return; | |
854 | ||
855 | (*this_id) = frame_id_build (info->base, info->start_pc); | |
856 | } | |
857 | ||
858 | static CORE_ADDR | |
859 | tilegx_frame_base_address (struct frame_info *this_frame, void **this_cache) | |
860 | { | |
861 | struct tilegx_frame_cache *cache = | |
862 | tilegx_frame_cache (this_frame, this_cache); | |
863 | ||
864 | return cache->base; | |
865 | } | |
866 | ||
867 | static const struct frame_unwind tilegx_frame_unwind = { | |
868 | NORMAL_FRAME, | |
869 | default_frame_unwind_stop_reason, | |
870 | tilegx_frame_this_id, | |
871 | tilegx_frame_prev_register, | |
872 | NULL, /* const struct frame_data *unwind_data */ | |
873 | default_frame_sniffer, /* frame_sniffer_ftype *sniffer */ | |
874 | NULL /* frame_prev_pc_ftype *prev_pc */ | |
875 | }; | |
876 | ||
877 | static const struct frame_base tilegx_frame_base = { | |
878 | &tilegx_frame_unwind, | |
879 | tilegx_frame_base_address, | |
880 | tilegx_frame_base_address, | |
881 | tilegx_frame_base_address | |
882 | }; | |
883 | ||
884 | static CORE_ADDR | |
885 | tilegx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
886 | { | |
887 | return frame_unwind_register_unsigned (next_frame, TILEGX_SP_REGNUM); | |
888 | } | |
889 | ||
890 | static CORE_ADDR | |
891 | tilegx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
892 | { | |
893 | return frame_unwind_register_unsigned (next_frame, TILEGX_PC_REGNUM); | |
894 | } | |
895 | ||
896 | static struct frame_id | |
897 | tilegx_unwind_dummy_id (struct gdbarch *gdbarch, | |
898 | struct frame_info *this_frame) | |
899 | { | |
900 | CORE_ADDR sp; | |
901 | ||
902 | sp = get_frame_register_unsigned (this_frame, TILEGX_SP_REGNUM); | |
903 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
904 | } | |
905 | ||
906 | ||
907 | /* We cannot read/write the "special" registers. */ | |
908 | ||
909 | static int | |
910 | tilegx_cannot_reference_register (struct gdbarch *gdbarch, int regno) | |
911 | { | |
912 | if (regno >= 0 && regno < TILEGX_NUM_EASY_REGS) | |
913 | return 0; | |
914 | else if (regno == TILEGX_PC_REGNUM) | |
915 | return 0; | |
916 | else | |
917 | return 1; | |
918 | } | |
919 | ||
920 | static struct gdbarch * | |
921 | tilegx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
922 | { | |
923 | struct gdbarch *gdbarch; | |
924 | int arch_size = 64; | |
925 | ||
926 | /* Handle arch_size == 32 or 64. Default to 64. */ | |
927 | if (info.abfd) | |
928 | arch_size = bfd_get_arch_size (info.abfd); | |
929 | ||
930 | /* Try to find a pre-existing architecture. */ | |
931 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
932 | arches != NULL; | |
933 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
934 | { | |
935 | /* We only have two flavors -- just make sure arch_size matches. */ | |
936 | if (gdbarch_ptr_bit (arches->gdbarch) == arch_size) | |
937 | return (arches->gdbarch); | |
938 | } | |
939 | ||
940 | gdbarch = gdbarch_alloc (&info, NULL); | |
941 | ||
942 | /* Basic register fields and methods, datatype sizes and stuff. */ | |
943 | ||
944 | /* There are 64 physical registers which can be referenced by | |
945 | instructions (although only 56 of them can actually be | |
946 | debugged) and 1 magic register (the PC). The other three | |
947 | magic registers (ex1, syscall, orig_r0) which are known to | |
948 | "ptrace" are ignored by "gdb". Note that we simply pretend | |
949 | that there are 65 registers, and no "pseudo registers". */ | |
950 | set_gdbarch_num_regs (gdbarch, TILEGX_NUM_REGS); | |
951 | set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
952 | ||
953 | set_gdbarch_sp_regnum (gdbarch, TILEGX_SP_REGNUM); | |
954 | set_gdbarch_pc_regnum (gdbarch, TILEGX_PC_REGNUM); | |
955 | ||
956 | set_gdbarch_register_name (gdbarch, tilegx_register_name); | |
957 | set_gdbarch_register_type (gdbarch, tilegx_register_type); | |
958 | ||
959 | set_gdbarch_char_signed (gdbarch, 0); | |
960 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
961 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
962 | set_gdbarch_long_bit (gdbarch, arch_size); | |
963 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
964 | ||
965 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
966 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
967 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
968 | ||
969 | set_gdbarch_ptr_bit (gdbarch, arch_size); | |
970 | set_gdbarch_addr_bit (gdbarch, arch_size); | |
971 | ||
972 | set_gdbarch_cannot_fetch_register (gdbarch, | |
973 | tilegx_cannot_reference_register); | |
974 | set_gdbarch_cannot_store_register (gdbarch, | |
975 | tilegx_cannot_reference_register); | |
976 | ||
977 | /* Stack grows down. */ | |
978 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
979 | ||
980 | /* Frame Info. */ | |
981 | set_gdbarch_unwind_sp (gdbarch, tilegx_unwind_sp); | |
982 | set_gdbarch_unwind_pc (gdbarch, tilegx_unwind_pc); | |
983 | set_gdbarch_dummy_id (gdbarch, tilegx_unwind_dummy_id); | |
984 | set_gdbarch_frame_align (gdbarch, tilegx_frame_align); | |
985 | frame_base_set_default (gdbarch, &tilegx_frame_base); | |
986 | ||
987 | set_gdbarch_skip_prologue (gdbarch, tilegx_skip_prologue); | |
988 | ||
989 | set_gdbarch_in_function_epilogue_p (gdbarch, | |
990 | tilegx_in_function_epilogue_p); | |
991 | ||
992 | /* Map debug registers into internal register numbers. */ | |
993 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, tilegx_dwarf2_reg_to_regnum); | |
994 | ||
995 | /* These values and methods are used when gdb calls a target function. */ | |
996 | set_gdbarch_push_dummy_call (gdbarch, tilegx_push_dummy_call); | |
997 | set_gdbarch_breakpoint_from_pc (gdbarch, tilegx_breakpoint_from_pc); | |
998 | set_gdbarch_return_value (gdbarch, tilegx_return_value); | |
999 | ||
1000 | set_gdbarch_print_insn (gdbarch, print_insn_tilegx); | |
1001 | ||
1002 | gdbarch_init_osabi (info, gdbarch); | |
1003 | ||
1004 | dwarf2_append_unwinders (gdbarch); | |
1005 | frame_unwind_append_unwinder (gdbarch, &tilegx_frame_unwind); | |
1006 | ||
1007 | return gdbarch; | |
1008 | } | |
1009 | ||
1010 | /* Provide a prototype to silence -Wmissing-prototypes. */ | |
1011 | extern initialize_file_ftype _initialize_tilegx_tdep; | |
1012 | ||
1013 | void | |
1014 | _initialize_tilegx_tdep (void) | |
1015 | { | |
1016 | register_gdbarch_init (bfd_arch_tilegx, tilegx_gdbarch_init); | |
1017 | } |