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fbcb5095 | 1 | /* Target machine description for SGI Iris under Irix, for GDB. |
d1bb1d41 | 2 | Copyright 1990, 1991, 1992 Free Software Foundation, Inc. |
13887249 SG |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
e10a3052 JG |
20 | #include "coff/sym.h" /* Needed for PDR below. */ |
21 | #include "coff/symconst.h" | |
d1bb1d41 | 22 | |
13887249 SG |
23 | #define TARGET_BYTE_ORDER BIG_ENDIAN |
24 | ||
25 | /* Floating point is IEEE compliant */ | |
26 | #define IEEE_FLOAT | |
27 | ||
28 | /* Define this if the C compiler puts an underscore at the front | |
29 | of external names before giving them to the linker. */ | |
30 | ||
31 | /*#define NAMES_HAVE_UNDERSCORE*/ | |
32 | ||
13887249 SG |
33 | /* Offset from address of function to start of its code. |
34 | Zero on most machines. */ | |
35 | ||
36 | #define FUNCTION_START_OFFSET 0 | |
37 | ||
38 | /* Advance PC across any function entry prologue instructions | |
39 | to reach some "real" code. */ | |
40 | ||
41 | #define SKIP_PROLOGUE(pc) pc = mips_skip_prologue(pc) | |
42 | ||
43 | /* Immediately after a function call, return the saved pc. | |
44 | Can't always go through the frames for this because on some machines | |
45 | the new frame is not set up until the new function executes | |
46 | some instructions. */ | |
47 | ||
48 | #define SAVED_PC_AFTER_CALL(frame) read_register(RA_REGNUM) | |
49 | ||
50 | /* Are we currently handling a signal */ | |
51 | ||
52 | #define IN_SIGTRAMP(pc, name) in_sigtramp(pc, name) | |
53 | ||
54 | /* Address of end of stack space. */ | |
55 | ||
56 | #define STACK_END_ADDR (0x7ffff000) | |
57 | ||
58 | /* Stack grows downward. */ | |
59 | ||
60 | #define INNER_THAN < | |
61 | ||
62 | #define BREAKPOINT {0, 0x5, 0, 0xd} | |
63 | ||
64 | /* Amount PC must be decremented by after a breakpoint. | |
65 | This is often the number of bytes in BREAKPOINT | |
66 | but not always. */ | |
67 | ||
68 | #define DECR_PC_AFTER_BREAK 0 | |
69 | ||
70 | /* Nonzero if instruction at PC is a return instruction. "j ra" on mips. */ | |
71 | ||
72 | #define ABOUT_TO_RETURN(pc) (read_memory_integer (pc, 4) == 0x3e00008) | |
73 | ||
74 | /* Return 1 if P points to an invalid floating point value. */ | |
75 | ||
76 | #define INVALID_FLOAT(p,l) isa_NAN(p,l) | |
77 | ||
78 | /* Say how long (all) registers are. */ | |
79 | ||
80 | #define REGISTER_TYPE long | |
81 | ||
82 | /* Number of machine registers */ | |
83 | ||
84 | #define NUM_REGS 71 | |
85 | ||
86 | /* Initializer for an array of names of registers. | |
87 | There should be NUM_REGS strings in this initializer. */ | |
88 | ||
89 | #define REGISTER_NAMES \ | |
90 | { "zero", "at", "v0", "v1", "a0", "a1", "a2", "a3", \ | |
91 | "t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7", \ | |
92 | "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ | |
93 | "t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra", \ | |
94 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ | |
95 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ | |
96 | "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",\ | |
97 | "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",\ | |
98 | "pc", "cause", "bad", "hi", "lo", "fsr", "fir" \ | |
99 | } | |
100 | ||
101 | /* Register numbers of various important registers. | |
102 | Note that some of these values are "real" register numbers, | |
103 | and correspond to the general registers of the machine, | |
104 | and some are "phony" register numbers which are too large | |
105 | to be actual register numbers as far as the user is concerned | |
106 | but do serve to get the desired values when passed to read_register. */ | |
107 | ||
407a8389 | 108 | #define A0_REGNUM 4 /* Loc of first arg during a subr call */ |
13887249 SG |
109 | #define SP_REGNUM 29 /* Contains address of top of stack */ |
110 | #define FP_REGNUM 30 /* Pseudo register that contains true address of executing stack frame */ | |
111 | #define RA_REGNUM 31 /* Contains return address value */ | |
112 | #define FP0_REGNUM 32 /* Floating point register 0 (single float) */ | |
113 | #define PC_REGNUM 64 /* Contains program counter */ | |
114 | #define PS_REGNUM 65 /* Contains processor status */ | |
115 | #define HI_REGNUM 67 /* Multiple/divide temp */ | |
116 | #define LO_REGNUM 68 /* ... */ | |
117 | #define FCRCS_REGNUM 69 /* FP control/status */ | |
118 | #define FCRIR_REGNUM 70 /* FP implementation/revision */ | |
119 | ||
120 | /* Define DO_REGISTERS_INFO() to do machine-specific formatting | |
121 | of register dumps. */ | |
122 | ||
123 | #define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp) | |
124 | ||
13887249 SG |
125 | /* Total amount of space needed to store our copies of the machine's |
126 | register state, the array `registers'. */ | |
127 | #define REGISTER_BYTES (NUM_REGS*4) | |
128 | ||
129 | /* Index within `registers' of the first byte of the space for | |
130 | register N. */ | |
131 | ||
132 | #define REGISTER_BYTE(N) ((N) * 4) | |
133 | ||
134 | /* Number of bytes of storage in the actual machine representation | |
135 | for register N. On mips, all regs are 4 bytes. */ | |
136 | ||
137 | #define REGISTER_RAW_SIZE(N) 4 | |
138 | ||
139 | /* Number of bytes of storage in the program's representation | |
140 | for register N. On mips, all regs are 4 bytes. */ | |
141 | ||
142 | #define REGISTER_VIRTUAL_SIZE(N) 4 | |
143 | ||
144 | /* Largest value REGISTER_RAW_SIZE can have. */ | |
145 | ||
146 | #define MAX_REGISTER_RAW_SIZE 4 | |
147 | ||
148 | /* Largest value REGISTER_VIRTUAL_SIZE can have. */ | |
149 | ||
150 | #define MAX_REGISTER_VIRTUAL_SIZE 4 | |
151 | ||
152 | /* Nonzero if register N requires conversion | |
153 | from raw format to virtual format. */ | |
154 | ||
155 | #define REGISTER_CONVERTIBLE(N) 0 | |
156 | ||
157 | /* Convert data from raw format for register REGNUM | |
158 | to virtual format for register REGNUM. */ | |
159 | ||
160 | #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,FROM,TO) \ | |
161 | bcopy ((FROM), (TO), 4); | |
162 | ||
163 | /* Convert data from virtual format for register REGNUM | |
164 | to raw format for register REGNUM. */ | |
165 | ||
166 | #define REGISTER_CONVERT_TO_RAW(REGNUM,FROM,TO) \ | |
167 | bcopy ((FROM), (TO), 4); | |
168 | ||
169 | /* Return the GDB type object for the "standard" data type | |
170 | of data in register N. */ | |
171 | ||
172 | #define REGISTER_VIRTUAL_TYPE(N) builtin_type_int | |
173 | /* Store the address of the place in which to copy the structure the | |
174 | subroutine will return. This is called from call_function. */ | |
175 | ||
176 | #define STORE_STRUCT_RETURN(addr, sp) \ | |
177 | { sp = push_word(sp, addr);} | |
178 | ||
179 | /* Extract from an array REGBUF containing the (raw) register state | |
180 | a function return value of type TYPE, and copy that, in virtual format, | |
181 | into VALBUF. XXX floats */ | |
182 | ||
183 | #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \ | |
184 | bcopy (REGBUF+REGISTER_BYTE (TYPE_CODE (TYPE) == TYPE_CODE_FLT ? FP0_REGNUM : 2), VALBUF, TYPE_LENGTH (TYPE)) | |
185 | ||
186 | /* Write into appropriate registers a function return value | |
187 | of type TYPE, given in virtual format. */ | |
188 | ||
189 | #define STORE_RETURN_VALUE(TYPE,VALBUF) \ | |
190 | write_register_bytes (REGISTER_BYTE (TYPE_CODE (TYPE) == TYPE_CODE_FLT ? FP0_REGNUM : 2), VALBUF, TYPE_LENGTH (TYPE)) | |
191 | ||
192 | /* Extract from an array REGBUF containing the (raw) register state | |
193 | the address in which a function should return its structure value, | |
194 | as a CORE_ADDR (or an expression that can be used as one). */ | |
195 | ||
196 | #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF+16)) | |
197 | ||
198 | /* Structures are returned by ref in extra arg0 */ | |
199 | #define USE_STRUCT_CONVENTION(gcc_p, type) 1 | |
200 | ||
201 | \f | |
202 | /* Describe the pointer in each stack frame to the previous stack frame | |
203 | (its caller). */ | |
204 | ||
205 | /* FRAME_CHAIN takes a frame's nominal address | |
5e2e79f8 | 206 | and produces the frame's chain-pointer. */ |
13887249 SG |
207 | |
208 | #define FRAME_CHAIN(thisframe) (FRAME_ADDR)mips_frame_chain(thisframe) | |
209 | ||
13887249 SG |
210 | /* Define other aspects of the stack frame. */ |
211 | ||
212 | ||
213 | /* A macro that tells us whether the function invocation represented | |
214 | by FI does not have a frame on the stack associated with it. If it | |
215 | does not, FRAMELESS is set to 1, else 0. */ | |
216 | /* We handle this differently for mips, and maybe we should not */ | |
217 | ||
218 | #define FRAMELESS_FUNCTION_INVOCATION(FI, FRAMELESS) {(FRAMELESS) = 0;} | |
219 | ||
220 | /* Saved Pc. */ | |
221 | ||
222 | #define FRAME_SAVED_PC(FRAME) (mips_frame_saved_pc(FRAME)) | |
223 | ||
224 | #define FRAME_ARGS_ADDRESS(fi) (fi)->frame | |
225 | ||
226 | #define FRAME_LOCALS_ADDRESS(fi) (fi)->frame | |
227 | ||
228 | /* Return number of args passed to a frame. | |
229 | Can return -1, meaning no way to tell. */ | |
230 | ||
231 | #define FRAME_NUM_ARGS(num, fi) (num = mips_frame_num_args(fi)) | |
232 | ||
233 | /* Return number of bytes at start of arglist that are not really args. */ | |
234 | ||
235 | #define FRAME_ARGS_SKIP 0 | |
236 | ||
237 | /* Put here the code to store, into a struct frame_saved_regs, | |
238 | the addresses of the saved registers of frame described by FRAME_INFO. | |
239 | This includes special registers such as pc and fp saved in special | |
240 | ways in the stack frame. sp is even more special: | |
241 | the address we return for it IS the sp for the next frame. */ | |
242 | ||
243 | #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) ( \ | |
244 | (frame_saved_regs) = *(frame_info)->saved_regs, \ | |
245 | (frame_saved_regs).regs[SP_REGNUM] = (frame_info)->frame) | |
246 | ||
247 | \f | |
248 | /* Things needed for making the inferior call functions. */ | |
249 | ||
250 | /* Stack has strict alignment. However, use PUSH_ARGUMENTS | |
251 | to take care of it. */ | |
252 | /*#define STACK_ALIGN(addr) (((addr)+3)&~3)*/ | |
253 | ||
254 | #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \ | |
255 | sp = mips_push_arguments(nargs, args, sp, struct_return, struct_addr) | |
256 | ||
257 | /* Push an empty stack frame, to record the current PC, etc. */ | |
258 | ||
259 | #define PUSH_DUMMY_FRAME mips_push_dummy_frame() | |
260 | ||
261 | /* Discard from the stack the innermost frame, restoring all registers. */ | |
262 | ||
263 | #define POP_FRAME mips_pop_frame() | |
264 | ||
265 | #define MK_OP(op,rs,rt,offset) (((op)<<26)|((rs)<<21)|((rt)<<16)|(offset)) | |
266 | #define CALL_DUMMY_SIZE (16*4) | |
267 | #define Dest_Reg 2 | |
268 | #define CALL_DUMMY {\ | |
269 | MK_OP(0,RA_REGNUM,0,8), /* jr $ra # Fake ABOUT_TO_RETURN ...*/\ | |
270 | 0, /* nop # ... to stop raw backtrace*/\ | |
271 | 0x27bd0000, /* addu sp,?0 # Pseudo prologue */\ | |
272 | /* Start here: */\ | |
273 | MK_OP(061,SP_REGNUM,12,0), /* lwc1 $f12,0(sp) # Reload first 4 args*/\ | |
274 | MK_OP(061,SP_REGNUM,13,4), /* lwc1 $f13,4(sp) */\ | |
275 | MK_OP(061,SP_REGNUM,14,8), /* lwc1 $f14,8(sp) */\ | |
276 | MK_OP(061,SP_REGNUM,15,12), /* lwc1 $f15,12(sp) */\ | |
277 | MK_OP(043,SP_REGNUM,4,0), /* lw $r4,0(sp) # Re-load FP regs*/\ | |
278 | MK_OP(043,SP_REGNUM,5,4), /* lw $r5,4(sp) */\ | |
279 | MK_OP(043,SP_REGNUM,6,8), /* lw $r6,8(sp) */\ | |
280 | MK_OP(043,SP_REGNUM,7,12), /* lw $r7,12(sp) */\ | |
281 | (017<<26)| (Dest_Reg << 16), /* lui $r31,<target upper 16 bits>*/\ | |
282 | MK_OP(13,Dest_Reg,Dest_Reg,0), /* ori $r31,$r31,<lower 16 bits>*/ \ | |
283 | (Dest_Reg<<21) | (31<<11) | 9, /* jalr $r31 */\ | |
284 | MK_OP(043,SP_REGNUM,7,12), /* lw $r7,12(sp) */\ | |
285 | 0x5000d, /* bpt */\ | |
286 | } | |
287 | ||
288 | #define CALL_DUMMY_START_OFFSET 12 | |
289 | ||
290 | /* Insert the specified number of args and function address | |
291 | into a call sequence of the above form stored at DUMMYNAME. */ | |
292 | ||
293 | #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p)\ | |
294 | (((int*)dummyname)[11] |= (((unsigned long)(fun)) >> 16), \ | |
295 | ((int*)dummyname)[12] |= (unsigned short)(fun)) | |
296 | ||
297 | /* Specific information about a procedure. | |
298 | This overlays the MIPS's PDR records, | |
299 | mipsread.c (ab)uses this to save memory */ | |
300 | ||
301 | typedef struct mips_extra_func_info { | |
13887249 | 302 | long numargs; /* number of args to procedure (was iopt) */ |
d1bb1d41 | 303 | PDR pdr; /* Procedure descriptor record */ |
13887249 SG |
304 | } *mips_extra_func_info_t; |
305 | ||
306 | #define EXTRA_FRAME_INFO \ | |
4ad1963e | 307 | mips_extra_func_info_t proc_desc; \ |
13887249 SG |
308 | int num_args;\ |
309 | struct frame_saved_regs *saved_regs; | |
310 | ||
a23075bc | 311 | #define INIT_EXTRA_FRAME_INFO(fromleaf, fci) init_extra_frame_info(fci) |
407a8389 SG |
312 | |
313 | /* Size of elements in jmpbuf */ | |
314 | ||
315 | #define JB_ELEMENT_SIZE 4 | |
316 | ||
317 | /* Figure out where the longjmp will land. We expect that we have just entered | |
318 | longjmp and haven't yet setup the stack frame, so the args are still in the | |
319 | argument regs. a0 (CALL_ARG0) points at the jmp_buf structure from which we | |
320 | extract the pc (JB_PC) that we will land at. The pc is copied into ADDR. | |
321 | This routine returns true on success */ | |
322 | ||
323 | /* Note that caller must #include <setjmp.h> in order to get def of JB_* */ | |
324 | #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR) |