* v850-tdep.c (v850_generic_reg_names, v850e_reg_names,
[deliverable/binutils-gdb.git] / gdb / v850-tdep.c
CommitLineData
e2810631 1/* Target-dependent code for the NEC V850 for GDB, the GNU debugger.
ac954805 2 Copyright 1996, Free Software Foundation, Inc.
e2810631
SG
3
4This file is part of GDB.
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
19
e2810631
SG
20#include "defs.h"
21#include "frame.h"
22#include "inferior.h"
23#include "obstack.h"
24#include "target.h"
25#include "value.h"
26#include "bfd.h"
27#include "gdb_string.h"
e2810631 28#include "gdbcore.h"
23da411a
SG
29#include "symfile.h"
30
60288633
MA
31
32static char *v850_generic_reg_names[] = REGISTER_NAMES;
33
34static char *v850e_reg_names[] =
35{
36 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
37 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
38 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
39 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
40 "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
41 "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
42 "ctpc", "ctpsw", "dbpc", "dbpsw", "ctbp", "sr21", "sr22", "sr23",
43 "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31",
44 "pc", "fp"
45};
46
47char **v850_register_names = v850_generic_reg_names;
48
49struct
50{
51 char **regnames;
52 int mach;
53} v850_processor_type_table[] =
54{
55 { v850_generic_reg_names, bfd_mach_v850 },
56 { v850e_reg_names, bfd_mach_v850e },
57 { v850e_reg_names, bfd_mach_v850ea },
58 { NULL, 0 }
59};
60
23da411a
SG
61/* Info gleaned from scanning a function's prologue. */
62
a638512f
SG
63struct pifsr /* Info about one saved reg */
64{
65 int framereg; /* Frame reg (SP or FP) */
66 int offset; /* Offset from framereg */
a490f8c1 67 int cur_frameoffset; /* Current frameoffset */
a638512f
SG
68 int reg; /* Saved register number */
69};
70
23da411a 71struct prologue_info
e5a2ac8b 72{
e5a2ac8b 73 int framereg;
23da411a
SG
74 int frameoffset;
75 int start_function;
a638512f 76 struct pifsr *pifsrs;
23da411a 77};
e5a2ac8b 78
dc1b349d
MS
79static CORE_ADDR v850_scan_prologue PARAMS ((CORE_ADDR pc,
80 struct prologue_info *fs));
98760eab
AC
81
82
83/* Should call_function allocate stack space for a struct return? */
84int
85v850_use_struct_convention (gcc_p, type)
86 int gcc_p;
87 struct type *type;
88{
89 return (TYPE_NFIELDS (type) > 1 || TYPE_LENGTH (type) > 4);
90}
91
60288633
MA
92\f
93
94/* Structure for mapping bits in register lists to register numbers. */
95struct reg_list
96{
97 long mask;
98 int regno;
99};
100
101/* Helper function for v850_scan_prologue to handle prepare instruction. */
102
103static void
104handle_prepare (int insn, int insn2, CORE_ADDR *current_pc_ptr,
105 struct prologue_info *pi, struct pifsr **pifsr_ptr)
106
107{
108 CORE_ADDR current_pc = *current_pc_ptr;
109 struct pifsr *pifsr = *pifsr_ptr;
110 long next = insn2 & 0xffff;
111 long list12 = ((insn & 1) << 16) + (next & 0xffe0);
112 long offset = (insn & 0x3e) << 1;
113 static struct reg_list reg_table [] =
114 {
115 { 0x00800, 20 }, /* r20 */
116 { 0x00400, 21 }, /* r21 */
117 { 0x00200, 22 }, /* r22 */
118 { 0x00100, 23 }, /* r23 */
119 { 0x08000, 24 }, /* r24 */
120 { 0x04000, 25 }, /* r25 */
121 { 0x02000, 26 }, /* r26 */
122 { 0x01000, 27 }, /* r27 */
123 { 0x00080, 28 }, /* r28 */
124 { 0x00040, 29 }, /* r29 */
125 { 0x10000, 30 }, /* ep */
126 { 0x00020, 31 }, /* lp */
127 { 0, 0 } /* end of table */
128 };
129 int i;
130
131 if ((next & 0x1f) == 0x0b) /* skip imm16 argument */
132 current_pc += 2;
133 else if ((next & 0x1f) == 0x13) /* skip imm16 argument */
134 current_pc += 2;
135 else if ((next & 0x1f) == 0x1b) /* skip imm32 argument */
136 current_pc += 4;
137
138 /* Calculate the total size of the saved registers, and add it
139 it to the immediate value used to adjust SP. */
140 for (i = 0; reg_table[i].mask != 0; i++)
141 if (list12 & reg_table[i].mask)
142 offset += REGISTER_RAW_SIZE (regtable[i].regno);
143 pi->frameoffset -= offset;
144
145 /* Calculate the offsets of the registers relative to the value
146 the SP will have after the registers have been pushed and the
147 imm5 value has been subtracted from it. */
148 if (pifsr)
149 {
150 for (i = 0; reg_table[i].mask != 0; i++)
151 {
152 if (list12 & reg_table[i].mask)
153 {
154 int reg = reg_table[i].regno;
155 offset -= REGISTER_RAW_SIZE (reg);
156 pifsr->reg = reg;
157 pifsr->offset = offset;
158 pifsr->cur_frameoffset = pi->frameoffset;
159 #ifdef DEBUG
160 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
161 #endif
162 pifsr++;
163 }
164 }
165 }
166#ifdef DEBUG
167 printf_filtered ("\tfound ctret after regsave func");
168#endif
169
170 /* Set result parameters. */
171 *current_pc_ptr = current_pc;
172 *pifsr_ptr = pifsr;
173}
174
175
176/* Helper function for v850_scan_prologue to handle pushm/pushl instructions.
177 FIXME: the SR bit of the register list is not supported; must check
178 that the compiler does not ever generate this bit. */
179
180static void
181handle_pushm (int insn, int insn2, struct prologue_info *pi,
182 struct pifsr **pifsr_ptr)
183
184{
185 struct pifsr *pifsr = *pifsr_ptr;
186 long list12 = ((insn & 0x0f) << 16) + (insn2 & 0xfff0);
187 long offset = 0;
188 static struct reg_list pushml_reg_table [] =
189 {
190 { 0x80000, PS_REGNUM }, /* PSW */
191 { 0x40000, 1 }, /* r1 */
192 { 0x20000, 2 }, /* r2 */
193 { 0x10000, 3 }, /* r3 */
194 { 0x00800, 4 }, /* r4 */
195 { 0x00400, 5 }, /* r5 */
196 { 0x00200, 6 }, /* r6 */
197 { 0x00100, 7 }, /* r7 */
198 { 0x08000, 8 }, /* r8 */
199 { 0x04000, 9 }, /* r9 */
200 { 0x02000, 10 }, /* r10 */
201 { 0x01000, 11 }, /* r11 */
202 { 0x00080, 12 }, /* r12 */
203 { 0x00040, 13 }, /* r13 */
204 { 0x00020, 14 }, /* r14 */
205 { 0x00010, 15 }, /* r15 */
206 { 0, 0 } /* end of table */
207 };
208 static struct reg_list pushmh_reg_table [] =
209 {
210 { 0x80000, 16 }, /* r16 */
211 { 0x40000, 17 }, /* r17 */
212 { 0x20000, 18 }, /* r18 */
213 { 0x10000, 19 }, /* r19 */
214 { 0x00800, 20 }, /* r20 */
215 { 0x00400, 21 }, /* r21 */
216 { 0x00200, 22 }, /* r22 */
217 { 0x00100, 23 }, /* r23 */
218 { 0x08000, 24 }, /* r24 */
219 { 0x04000, 25 }, /* r25 */
220 { 0x02000, 26 }, /* r26 */
221 { 0x01000, 27 }, /* r27 */
222 { 0x00080, 28 }, /* r28 */
223 { 0x00040, 29 }, /* r29 */
224 { 0x00010, 30 }, /* r30 */
225 { 0x00020, 31 }, /* r31 */
226 { 0, 0 } /* end of table */
227 };
228 struct reg_list *reg_table;
229 int i;
230
231 /* Is this a pushml or a pushmh? */
232 if ((insn2 & 7) == 1)
233 reg_table = pushml_reg_table;
234 else
235 reg_table = pushmh_reg_table;
236
237 /* Calculate the total size of the saved registers, and add it
238 it to the immediate value used to adjust SP. */
239 for (i = 0; reg_table[i].mask != 0; i++)
240 if (list12 & reg_table[i].mask)
241 offset += REGISTER_RAW_SIZE (regtable[i].regno);
242 pi->frameoffset -= offset;
243
244 /* Calculate the offsets of the registers relative to the value
245 the SP will have after the registers have been pushed and the
246 imm5 value is subtracted from it. */
247 if (pifsr)
248 {
249 for (i = 0; reg_table[i].mask != 0; i++)
250 {
251 if (list12 & reg_table[i].mask)
252 {
253 int reg = reg_table[i].regno;
254 offset -= REGISTER_RAW_SIZE (reg);
255 pifsr->reg = reg;
256 pifsr->offset = offset;
257 pifsr->cur_frameoffset = pi->frameoffset;
258 #ifdef DEBUG
259 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
260 #endif
261 pifsr++;
262 }
263 }
264 }
265#ifdef DEBUG
266 printf_filtered ("\tfound ctret after regsave func");
267#endif
268
269 /* Set result parameters. */
270 *pifsr_ptr = pifsr;
271}
272
273
274
23da411a 275\f
dc1b349d
MS
276/* Function: scan_prologue
277 Scan the prologue of the function that contains PC, and record what
278 we find in PI. PI->fsr must be zeroed by the called. Returns the
279 pc after the prologue. Note that the addresses saved in pi->fsr
280 are actually just frame relative (negative offsets from the frame
281 pointer). This is because we don't know the actual value of the
282 frame pointer yet. In some circumstances, the frame pointer can't
283 be determined till after we have scanned the prologue. */
23da411a
SG
284
285static CORE_ADDR
dc1b349d 286v850_scan_prologue (pc, pi)
23da411a
SG
287 CORE_ADDR pc;
288 struct prologue_info *pi;
289{
290 CORE_ADDR func_addr, prologue_end, current_pc;
a490f8c1 291 struct pifsr *pifsr, *pifsr_tmp;
23da411a 292 int fp_used;
b71f8719 293 int ep_used;
a490f8c1
MM
294 int reg;
295 CORE_ADDR save_pc, save_end;
296 int regsave_func_p;
0b019fa1 297 int r12_tmp;
e5a2ac8b
SG
298
299 /* First, figure out the bounds of the prologue so that we can limit the
300 search to something reasonable. */
301
23da411a 302 if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
e5a2ac8b 303 {
23da411a
SG
304 struct symtab_and_line sal;
305
e5a2ac8b
SG
306 sal = find_pc_line (func_addr, 0);
307
23da411a
SG
308 if (func_addr == entry_point_address ())
309 pi->start_function = 1;
310 else
311 pi->start_function = 0;
312
a638512f 313#if 0
ac954805 314 if (sal.line == 0)
23da411a 315 prologue_end = pc;
ac954805
SG
316 else
317 prologue_end = sal.end;
a638512f
SG
318#else
319 prologue_end = pc;
320#endif
e5a2ac8b
SG
321 }
322 else
23da411a
SG
323 { /* We're in the boondocks */
324 func_addr = pc - 100;
325 prologue_end = pc;
326 }
e5a2ac8b 327
23da411a 328 prologue_end = min (prologue_end, pc);
e5a2ac8b
SG
329
330 /* Now, search the prologue looking for instructions that setup fp, save
23da411a
SG
331 rp, adjust sp and such. We also record the frame offset of any saved
332 registers. */
e5a2ac8b 333
23da411a
SG
334 pi->frameoffset = 0;
335 pi->framereg = SP_REGNUM;
336 fp_used = 0;
b71f8719 337 ep_used = 0;
a638512f 338 pifsr = pi->pifsrs;
a490f8c1
MM
339 regsave_func_p = 0;
340 save_pc = 0;
341 save_end = 0;
0b019fa1 342 r12_tmp = 0;
a490f8c1
MM
343
344#ifdef DEBUG
345 printf_filtered ("Current_pc = 0x%.8lx, prologue_end = 0x%.8lx\n",
346 (long)func_addr, (long)prologue_end);
347#endif
e5a2ac8b 348
60288633 349 for (current_pc = func_addr; current_pc < prologue_end; )
e5a2ac8b 350 {
60288633 351 int insn, insn2;
e5a2ac8b 352
a490f8c1
MM
353#ifdef DEBUG
354 printf_filtered ("0x%.8lx ", (long)current_pc);
355 (*tm_print_insn) (current_pc, &tm_print_insn_info);
356#endif
357
6420594b 358 insn = read_memory_unsigned_integer (current_pc, 2);
60288633
MA
359 current_pc += 2;
360 if ((insn & 0x0780) >= 0x0600) /* Four byte instruction? */
361 {
362 insn2 = read_memory_unsigned_integer (current_pc, 2);
363 current_pc += 2;
364 }
e5a2ac8b 365
a490f8c1
MM
366 if ((insn & 0xffc0) == ((10 << 11) | 0x0780) && !regsave_func_p)
367 { /* jarl <func>,10 */
60288633 368 long low_disp = insn2 & ~ (long) 1;
a490f8c1
MM
369 long disp = (((((insn & 0x3f) << 16) + low_disp)
370 & ~ (long) 1) ^ 0x00200000) - 0x00200000;
371
372 save_pc = current_pc;
373 save_end = prologue_end;
374 regsave_func_p = 1;
60288633 375 current_pc += disp - 4;
a490f8c1
MM
376 prologue_end = (current_pc
377 + (2 * 3) /* moves to/from ep */
378 + 4 /* addi <const>,sp,sp */
379 + 2 /* jmp [r10] */
380 + (2 * 12) /* sst.w to save r2, r20-r29, r31 */
381 + 20); /* slop area */
382
383#ifdef DEBUG
384 printf_filtered ("\tfound jarl <func>,r10, disp = %ld, low_disp = %ld, new pc = 0x%.8lx\n",
385 disp, low_disp, (long)current_pc + 2);
386#endif
387 continue;
388 }
60288633
MA
389 else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p)
390 { /* callt <imm6> */
391 long ctbp = read_register (CTBP_REGNUM);
392 long adr = ctbp + ((insn & 0x3f) << 1);
393
394 save_pc = current_pc;
395 save_end = prologue_end;
396 regsave_func_p = 1;
397 current_pc = ctbp + (read_memory_unsigned_integer (adr, 2) & 0xffff);
398 prologue_end = (current_pc
399 + (2 * 3) /* prepare list2,imm5,sp/imm */
400 + 4 /* ctret */
401 + 20); /* slop area */
402
403#ifdef DEBUG
404 printf_filtered ("\tfound callt, ctbp = 0x%.8lx, adr = %.8lx, new pc = 0x%.8lx\n",
405 ctbp, adr, (long)current_pc);
406#endif
407 continue;
408 }
409 else if ((insn & 0xffc0) == 0x0780) /* prepare list2,imm5 */
410 {
411 handle_prepare (insn, insn2, &current_pc, pi, &pifsr);
412 continue;
413 }
414 else if (insn == 0x07e0 && regsave_func_p && insn2 == 0x0144)
415 { /* ctret after processing register save function */
416 current_pc = save_pc;
417 prologue_end = save_end;
418 regsave_func_p = 0;
419#ifdef DEBUG
420 printf_filtered ("\tfound ctret after regsave func");
421#endif
422 continue;
423 }
424 else if ((insn & 0xfff0) == 0x07e0 && (insn2 & 5) == 1)
425 { /* pushml, pushmh */
426 handle_pushm (insn, insn2, pi, &pifsr);
427 continue;
428 }
a490f8c1
MM
429 else if ((insn & 0xffe0) == 0x0060 && regsave_func_p)
430 { /* jmp after processing register save function */
60288633 431 current_pc = save_pc;
a490f8c1
MM
432 prologue_end = save_end;
433 regsave_func_p = 0;
434#ifdef DEBUG
435 printf_filtered ("\tfound jmp after regsave func");
436#endif
60288633 437 continue;
a490f8c1
MM
438 }
439 else if ((insn & 0x07c0) == 0x0780 /* jarl or jr */
440 || (insn & 0xffe0) == 0x0060 /* jmp */
441 || (insn & 0x0780) == 0x0580) /* branch */
442 {
443#ifdef DEBUG
444 printf_filtered ("\n");
445#endif
446 break; /* Ran into end of prologue */
447 }
448
449 else if ((insn & 0xffe0) == ((SP_REGNUM << 11) | 0x0240)) /* add <imm>,sp */
450 pi->frameoffset += ((insn & 0x1f) ^ 0x10) - 0x10;
451 else if (insn == ((SP_REGNUM << 11) | 0x0600 | SP_REGNUM)) /* addi <imm>,sp,sp */
60288633 452 pi->frameoffset += insn2;
ea45efcf 453 else if (insn == ((FP_RAW_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,fp */
e5a2ac8b 454 {
23da411a 455 fp_used = 1;
ea45efcf 456 pi->framereg = FP_RAW_REGNUM;
23da411a 457 }
a490f8c1 458
0b019fa1 459 else if (insn == ((R12_REGNUM << 11) | 0x0640 | R0_REGNUM)) /* movhi hi(const),r0,r12 */
60288633 460 r12_tmp = insn2 << 16;
0b019fa1 461 else if (insn == ((R12_REGNUM << 11) | 0x0620 | R12_REGNUM)) /* movea lo(const),r12,r12 */
60288633 462 r12_tmp += insn2;
0b019fa1
MM
463 else if (insn == ((SP_REGNUM << 11) | 0x01c0 | R12_REGNUM) && r12_tmp) /* add r12,sp */
464 pi->frameoffset = r12_tmp;
a490f8c1 465 else if (insn == ((EP_REGNUM << 11) | 0x0000 | SP_REGNUM)) /* mov sp,ep */
b71f8719 466 ep_used = 1;
a490f8c1 467 else if (insn == ((EP_REGNUM << 11) | 0x0000 | R1_REGNUM)) /* mov r1,ep */
b71f8719 468 ep_used = 0;
0b019fa1 469 else if (((insn & 0x07ff) == (0x0760 | SP_REGNUM) /* st.w <reg>,<offset>[sp] */
b71f8719 470 || (fp_used
ea45efcf 471 && (insn & 0x07ff) == (0x0760 | FP_RAW_REGNUM))) /* st.w <reg>,<offset>[fp] */
a490f8c1
MM
472 && pifsr
473 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
474 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
475 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
b71f8719 476 {
a490f8c1 477 pifsr->reg = reg;
60288633 478 pifsr->offset = insn2 & ~1;
a490f8c1
MM
479 pifsr->cur_frameoffset = pi->frameoffset;
480#ifdef DEBUG
481 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
482#endif
b71f8719
MM
483 pifsr++;
484 }
485
a490f8c1 486 else if (ep_used /* sst.w <reg>,<offset>[ep] */
b71f8719 487 && ((insn & 0x0781) == 0x0501)
a490f8c1
MM
488 && pifsr
489 && (((reg = (insn >> 11) & 0x1f) >= SAVE1_START_REGNUM && reg <= SAVE1_END_REGNUM)
490 || (reg >= SAVE2_START_REGNUM && reg <= SAVE2_END_REGNUM)
491 || (reg >= SAVE3_START_REGNUM && reg <= SAVE3_END_REGNUM)))
b71f8719 492 {
a490f8c1
MM
493 pifsr->reg = reg;
494 pifsr->offset = (insn & 0x007e) << 1;
495 pifsr->cur_frameoffset = pi->frameoffset;
496#ifdef DEBUG
497 printf_filtered ("\tSaved register r%d, offset %d", reg, pifsr->offset);
498#endif
b71f8719
MM
499 pifsr++;
500 }
6420594b 501
a490f8c1
MM
502#ifdef DEBUG
503 printf_filtered ("\n");
504#endif
e5a2ac8b
SG
505 }
506
a638512f
SG
507 if (pifsr)
508 pifsr->framereg = 0; /* Tie off last entry */
509
a490f8c1
MM
510 /* Fix up any offsets to the final offset. If a frame pointer was created, use it
511 instead of the stack pointer. */
512 for (pifsr_tmp = pi->pifsrs; pifsr_tmp && pifsr_tmp != pifsr; pifsr_tmp++)
513 {
514 pifsr_tmp->offset -= pi->frameoffset - pifsr_tmp->cur_frameoffset;
515 pifsr_tmp->framereg = pi->framereg;
516
517#ifdef DEBUG
518 printf_filtered ("Saved register r%d, offset = %d, framereg = r%d\n",
519 pifsr_tmp->reg, pifsr_tmp->offset, pifsr_tmp->framereg);
520#endif
521 }
522
523#ifdef DEBUG
524 printf_filtered ("Framereg = r%d, frameoffset = %d\n", pi->framereg, pi->frameoffset);
525#endif
526
23da411a 527 return current_pc;
e5a2ac8b
SG
528}
529
dc1b349d
MS
530/* Function: init_extra_frame_info
531 Setup the frame's frame pointer, pc, and frame addresses for saved
532 registers. Most of the work is done in scan_prologue().
e5a2ac8b 533
23da411a
SG
534 Note that when we are called for the last frame (currently active frame),
535 that fi->pc and fi->frame will already be setup. However, fi->frame will
536 be valid only if this routine uses FP. For previous frames, fi-frame will
537 always be correct (since that is derived from v850_frame_chain ()).
538
539 We can be called with the PC in the call dummy under two circumstances.
540 First, during normal backtracing, second, while figuring out the frame
dc1b349d 541 pointer just prior to calling the target function (see run_stack_dummy). */
23da411a
SG
542
543void
544v850_init_extra_frame_info (fi)
e5a2ac8b 545 struct frame_info *fi;
e5a2ac8b 546{
23da411a 547 struct prologue_info pi;
a638512f 548 struct pifsr pifsrs[NUM_REGS + 1], *pifsr;
23da411a
SG
549
550 if (fi->next)
551 fi->pc = FRAME_SAVED_PC (fi->next);
552
553 memset (fi->fsr.regs, '\000', sizeof fi->fsr.regs);
554
555 /* The call dummy doesn't save any registers on the stack, so we can return
556 now. */
dc1b349d 557 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
23da411a 558 return;
ac954805 559
a638512f 560 pi.pifsrs = pifsrs;
e5a2ac8b 561
dc1b349d 562 v850_scan_prologue (fi->pc, &pi);
23da411a 563
a638512f
SG
564 if (!fi->next && pi.framereg == SP_REGNUM)
565 fi->frame = read_register (pi.framereg) - pi.frameoffset;
23da411a 566
a638512f
SG
567 for (pifsr = pifsrs; pifsr->framereg; pifsr++)
568 {
569 fi->fsr.regs[pifsr->reg] = pifsr->offset + fi->frame;
570
571 if (pifsr->framereg == SP_REGNUM)
572 fi->fsr.regs[pifsr->reg] += pi.frameoffset;
573 }
e5a2ac8b
SG
574}
575
dc1b349d
MS
576/* Function: frame_chain
577 Figure out the frame prior to FI. Unfortunately, this involves
578 scanning the prologue of the caller, which will also be done
579 shortly by v850_init_extra_frame_info. For the dummy frame, we
580 just return the stack pointer that was in use at the time the
581 function call was made. */
23da411a 582
e5a2ac8b
SG
583CORE_ADDR
584v850_frame_chain (fi)
585 struct frame_info *fi;
586{
23da411a 587 struct prologue_info pi;
dc1b349d 588 CORE_ADDR callers_pc, fp;
e5a2ac8b
SG
589
590 /* First, find out who called us */
ac954805 591 callers_pc = FRAME_SAVED_PC (fi);
dc1b349d 592 /* If caller is a call-dummy, then our FP bears no relation to his FP! */
ea45efcf 593 fp = v850_find_callers_reg (fi, FP_RAW_REGNUM);
dc1b349d
MS
594 if (PC_IN_CALL_DUMMY(callers_pc, fp, fp))
595 return fp; /* caller is call-dummy: return oldest value of FP */
ac954805 596
dc1b349d
MS
597 /* Caller is NOT a call-dummy, so everything else should just work.
598 Even if THIS frame is a call-dummy! */
a638512f 599 pi.pifsrs = NULL;
e5a2ac8b 600
dc1b349d 601 v850_scan_prologue (callers_pc, &pi);
e5a2ac8b 602
23da411a
SG
603 if (pi.start_function)
604 return 0; /* Don't chain beyond the start function */
ac954805 605
ea45efcf 606 if (pi.framereg == FP_RAW_REGNUM)
23da411a 607 return v850_find_callers_reg (fi, pi.framereg);
e5a2ac8b 608
23da411a
SG
609 return fi->frame - pi.frameoffset;
610}
e5a2ac8b 611
dc1b349d
MS
612/* Function: find_callers_reg
613 Find REGNUM on the stack. Otherwise, it's in an active register.
614 One thing we might want to do here is to check REGNUM against the
615 clobber mask, and somehow flag it as invalid if it isn't saved on
616 the stack somewhere. This would provide a graceful failure mode
617 when trying to get the value of caller-saves registers for an inner
618 frame. */
e5a2ac8b 619
23da411a
SG
620CORE_ADDR
621v850_find_callers_reg (fi, regnum)
622 struct frame_info *fi;
623 int regnum;
624{
23da411a 625 for (; fi; fi = fi->next)
dc1b349d
MS
626 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
627 return generic_read_register_dummy (fi->pc, fi->frame, regnum);
23da411a 628 else if (fi->fsr.regs[regnum] != 0)
dc1b349d
MS
629 return read_memory_unsigned_integer (fi->fsr.regs[regnum],
630 REGISTER_RAW_SIZE(regnum));
e5a2ac8b 631
23da411a 632 return read_register (regnum);
e5a2ac8b
SG
633}
634
dc1b349d
MS
635/* Function: skip_prologue
636 Return the address of the first code past the prologue of the function. */
637
e5a2ac8b
SG
638CORE_ADDR
639v850_skip_prologue (pc)
640 CORE_ADDR pc;
641{
642 CORE_ADDR func_addr, func_end;
643
644 /* See what the symbol table says */
645
646 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
647 {
648 struct symtab_and_line sal;
649
650 sal = find_pc_line (func_addr, 0);
651
ac954805 652 if (sal.line != 0 && sal.end < func_end)
e5a2ac8b
SG
653 return sal.end;
654 else
ac954805
SG
655 /* Either there's no line info, or the line after the prologue is after
656 the end of the function. In this case, there probably isn't a
657 prologue. */
e5a2ac8b
SG
658 return pc;
659 }
660
661/* We can't find the start of this function, so there's nothing we can do. */
662 return pc;
663}
664
dc1b349d
MS
665/* Function: pop_frame
666 This routine gets called when either the user uses the `return'
667 command, or the call dummy breakpoint gets hit. */
ac954805
SG
668
669void
e5a2ac8b
SG
670v850_pop_frame (frame)
671 struct frame_info *frame;
672{
673 int regnum;
674
dc1b349d
MS
675 if (PC_IN_CALL_DUMMY(frame->pc, frame->frame, frame->frame))
676 generic_pop_dummy_frame ();
23da411a
SG
677 else
678 {
679 write_register (PC_REGNUM, FRAME_SAVED_PC (frame));
ac954805 680
23da411a
SG
681 for (regnum = 0; regnum < NUM_REGS; regnum++)
682 if (frame->fsr.regs[regnum] != 0)
683 write_register (regnum,
dc1b349d
MS
684 read_memory_unsigned_integer (frame->fsr.regs[regnum],
685 REGISTER_RAW_SIZE(regnum)));
e5a2ac8b 686
23da411a
SG
687 write_register (SP_REGNUM, FRAME_FP (frame));
688 }
e5a2ac8b 689
e5a2ac8b 690 flush_cached_frames ();
e5a2ac8b 691}
ac954805 692
dc1b349d
MS
693/* Function: push_arguments
694 Setup arguments and RP for a call to the target. First four args
695 go in R6->R9, subsequent args go into sp + 16 -> sp + ... Structs
696 are passed by reference. 64 bit quantities (doubles and long
697 longs) may be split between the regs and the stack. When calling a
698 function that returns a struct, a pointer to the struct is passed
699 in as a secret first argument (always in R6).
ac954805 700
dc1b349d
MS
701 Stack space for the args has NOT been allocated: that job is up to us.
702 */
ac954805
SG
703
704CORE_ADDR
705v850_push_arguments (nargs, args, sp, struct_return, struct_addr)
706 int nargs;
707 value_ptr *args;
708 CORE_ADDR sp;
709 unsigned char struct_return;
710 CORE_ADDR struct_addr;
711{
712 int argreg;
713 int argnum;
dc1b349d
MS
714 int len = 0;
715 int stack_offset;
ac954805 716
dc1b349d
MS
717 /* First, just for safety, make sure stack is aligned */
718 sp &= ~3;
719
720 /* Now make space on the stack for the args. */
721 for (argnum = 0; argnum < nargs; argnum++)
722 len += ((TYPE_LENGTH(VALUE_TYPE(args[argnum])) + 3) & ~3);
723 sp -= len; /* possibly over-allocating, but it works... */
724 /* (you might think we could allocate 16 bytes */
725 /* less, but the ABI seems to use it all! ) */
687f4e23 726 argreg = ARG0_REGNUM;
ac954805 727
dc1b349d 728 /* the struct_return pointer occupies the first parameter-passing reg */
ac954805 729 if (struct_return)
ac954805 730 write_register (argreg++, struct_addr);
ac954805 731
dc1b349d
MS
732 stack_offset = 16;
733 /* The offset onto the stack at which we will start copying parameters
734 (after the registers are used up) begins at 16 rather than at zero.
735 I don't really know why, that's just the way it seems to work. */
736
737 /* Now load as many as possible of the first arguments into
738 registers, and push the rest onto the stack. There are 16 bytes
739 in four registers available. Loop thru args from first to last. */
ac954805
SG
740 for (argnum = 0; argnum < nargs; argnum++)
741 {
742 int len;
743 char *val;
dc1b349d 744 char valbuf[REGISTER_RAW_SIZE(ARG0_REGNUM)];
ac954805
SG
745
746 if (TYPE_CODE (VALUE_TYPE (*args)) == TYPE_CODE_STRUCT
747 && TYPE_LENGTH (VALUE_TYPE (*args)) > 8)
748 {
749 store_address (valbuf, 4, VALUE_ADDRESS (*args));
750 len = 4;
751 val = valbuf;
752 }
753 else
754 {
755 len = TYPE_LENGTH (VALUE_TYPE (*args));
756 val = (char *)VALUE_CONTENTS (*args);
757 }
758
759 while (len > 0)
687f4e23 760 if (argreg <= ARGLAST_REGNUM)
ac954805
SG
761 {
762 CORE_ADDR regval;
763
764 regval = extract_address (val, REGISTER_RAW_SIZE (argreg));
765 write_register (argreg, regval);
766
767 len -= REGISTER_RAW_SIZE (argreg);
768 val += REGISTER_RAW_SIZE (argreg);
769 argreg++;
770 }
771 else
772 {
dc1b349d 773 write_memory (sp + stack_offset, val, 4);
ac954805
SG
774
775 len -= 4;
776 val += 4;
dc1b349d 777 stack_offset += 4;
ac954805
SG
778 }
779 args++;
780 }
dc1b349d
MS
781 return sp;
782}
ac954805 783
dc1b349d
MS
784/* Function: push_return_address (pc)
785 Set up the return address for the inferior function call.
786 Needed for targets where we don't actually execute a JSR/BSR instruction */
787
dc1b349d
MS
788CORE_ADDR
789v850_push_return_address (pc, sp)
790 CORE_ADDR pc;
791 CORE_ADDR sp;
792{
409f64ae 793 write_register (RP_REGNUM, CALL_DUMMY_ADDRESS ());
ac954805
SG
794 return sp;
795}
dc1b349d
MS
796
797/* Function: frame_saved_pc
798 Find the caller of this frame. We do this by seeing if RP_REGNUM
799 is saved in the stack anywhere, otherwise we get it from the
800 registers. If the inner frame is a dummy frame, return its PC
801 instead of RP, because that's where "caller" of the dummy-frame
802 will be found. */
803
804CORE_ADDR
805v850_frame_saved_pc (fi)
806 struct frame_info *fi;
807{
808 if (PC_IN_CALL_DUMMY(fi->pc, fi->frame, fi->frame))
809 return generic_read_register_dummy(fi->pc, fi->frame, PC_REGNUM);
810 else
811 return v850_find_callers_reg (fi, RP_REGNUM);
812}
813
814void
815get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
816 char *raw_buffer;
817 int *optimized;
818 CORE_ADDR *addrp;
819 struct frame_info *frame;
820 int regnum;
821 enum lval_type *lval;
822{
823 generic_get_saved_register (raw_buffer, optimized, addrp,
824 frame, regnum, lval);
825}
826
827
828/* Function: fix_call_dummy
829 Pokes the callee function's address into the CALL_DUMMY assembly stub.
830 Assumes that the CALL_DUMMY looks like this:
831 jarl <offset24>, r31
832 trap
833 */
834
835int
836v850_fix_call_dummy (dummy, sp, fun, nargs, args, type, gcc_p)
837 char *dummy;
838 CORE_ADDR sp;
839 CORE_ADDR fun;
840 int nargs;
841 value_ptr *args;
842 struct type *type;
843 int gcc_p;
844{
845 long offset24;
dc1b349d 846
409f64ae 847 offset24 = (long) fun - (long) entry_point_address ();
dc1b349d
MS
848 offset24 &= 0x3fffff;
849 offset24 |= 0xff800000; /* jarl <offset24>, r31 */
850
851 store_unsigned_integer ((unsigned int *)&dummy[2], 2, offset24 & 0xffff);
852 store_unsigned_integer ((unsigned int *)&dummy[0], 2, offset24 >> 16);
853 return 0;
854}
855
60288633
MA
856/* Change the register names based on the current machine type. */
857
858static int
859v850_target_architecture_hook (ap)
860 const bfd_arch_info_type *ap;
861{
862 int i, j;
863
864 if (ap->arch != bfd_arch_v850)
865 return 0;
866
867 for (i = 0; v850_processor_type_table[i].regnames != NULL; i++)
868 {
869 if (v850_processor_type_table[i].mach == ap->mach)
870 {
871 v850_register_names = v850_processor_type_table[i].regnames;
872 return 1;
873 }
874 }
875
876 fatal ("Architecture `%s' unreconized", ap->printable_name);
877}
878
e2810631 879void
dc1b349d 880_initialize_v850_tdep ()
e2810631
SG
881{
882 tm_print_insn = print_insn_v850;
60288633 883 target_architecture_hook = v850_target_architecture_hook;
e2810631 884}
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