* i386nbsd-tdep.c (fetch_elfcore_registers): Wrap long line.
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
CommitLineData
53e95fcf 1/* Target-dependent code for the x86-64 for GDB, the GNU debugger.
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2
3 Copyright 2001, 2002 Free Software Foundation, Inc.
4
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5 Contributed by Jiri Smid, SuSE Labs.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24#include "defs.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "gdbcmd.h"
28#include "arch-utils.h"
29#include "regcache.h"
30#include "symfile.h"
31#include "x86-64-tdep.h"
32#include "dwarf2cfi.h"
82dbc5f7 33#include "gdb_assert.h"
53e95fcf 34
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35/* Register numbers of various important registers. */
36#define RAX_REGNUM 0
de220d0f 37#define RDX_REGNUM 3
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38#define RDI_REGNUM 5
39#define EFLAGS_REGNUM 17
0e04a514 40#define ST0_REGNUM 22
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41#define XMM1_REGNUM 39
42
43struct register_info
44{
45 int size;
46 char *name;
47 struct type **type;
48};
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49
50/* x86_64_register_raw_size_table[i] is the number of bytes of storage in
51 GDB's register array occupied by register i. */
de220d0f 52static struct register_info x86_64_register_info_table[] = {
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53 /* 0 */ {8, "rax", &builtin_type_int64},
54 /* 1 */ {8, "rbx", &builtin_type_int64},
55 /* 2 */ {8, "rcx", &builtin_type_int64},
56 /* 3 */ {8, "rdx", &builtin_type_int64},
57 /* 4 */ {8, "rsi", &builtin_type_int64},
58 /* 5 */ {8, "rdi", &builtin_type_int64},
59 /* 6 */ {8, "rbp", &builtin_type_void_func_ptr},
60 /* 7 */ {8, "rsp", &builtin_type_void_func_ptr},
61 /* 8 */ {8, "r8", &builtin_type_int64},
62 /* 9 */ {8, "r9", &builtin_type_int64},
63 /* 10 */ {8, "r10", &builtin_type_int64},
64 /* 11 */ {8, "r11", &builtin_type_int64},
65 /* 12 */ {8, "r12", &builtin_type_int64},
66 /* 13 */ {8, "r13", &builtin_type_int64},
67 /* 14 */ {8, "r14", &builtin_type_int64},
68 /* 15 */ {8, "r15", &builtin_type_int64},
69 /* 16 */ {8, "rip", &builtin_type_void_func_ptr},
70 /* 17 */ {4, "eflags", &builtin_type_int32},
71 /* 18 */ {4, "ds", &builtin_type_int32},
72 /* 19 */ {4, "es", &builtin_type_int32},
73 /* 20 */ {4, "fs", &builtin_type_int32},
74 /* 21 */ {4, "gs", &builtin_type_int32},
75 /* 22 */ {10, "st0", &builtin_type_i387_ext},
76 /* 23 */ {10, "st1", &builtin_type_i387_ext},
77 /* 24 */ {10, "st2", &builtin_type_i387_ext},
78 /* 25 */ {10, "st3", &builtin_type_i387_ext},
79 /* 26 */ {10, "st4", &builtin_type_i387_ext},
80 /* 27 */ {10, "st5", &builtin_type_i387_ext},
81 /* 28 */ {10, "st6", &builtin_type_i387_ext},
82 /* 29 */ {10, "st7", &builtin_type_i387_ext},
83 /* 30 */ {4, "fctrl", &builtin_type_int32},
84 /* 31 */ {4, "fstat", &builtin_type_int32},
85 /* 32 */ {4, "ftag", &builtin_type_int32},
86 /* 33 */ {4, "fiseg", &builtin_type_int32},
87 /* 34 */ {4, "fioff", &builtin_type_int32},
88 /* 35 */ {4, "foseg", &builtin_type_int32},
89 /* 36 */ {4, "fooff", &builtin_type_int32},
90 /* 37 */ {4, "fop", &builtin_type_int32},
91 /* 38 */ {16, "xmm0", &builtin_type_v4sf},
92 /* 39 */ {16, "xmm1", &builtin_type_v4sf},
93 /* 40 */ {16, "xmm2", &builtin_type_v4sf},
94 /* 41 */ {16, "xmm3", &builtin_type_v4sf},
95 /* 42 */ {16, "xmm4", &builtin_type_v4sf},
96 /* 43 */ {16, "xmm5", &builtin_type_v4sf},
97 /* 44 */ {16, "xmm6", &builtin_type_v4sf},
98 /* 45 */ {16, "xmm7", &builtin_type_v4sf},
99 /* 46 */ {16, "xmm8", &builtin_type_v4sf},
100 /* 47 */ {16, "xmm9", &builtin_type_v4sf},
101 /* 48 */ {16, "xmm10", &builtin_type_v4sf},
102 /* 49 */ {16, "xmm11", &builtin_type_v4sf},
103 /* 50 */ {16, "xmm12", &builtin_type_v4sf},
104 /* 51 */ {16, "xmm13", &builtin_type_v4sf},
105 /* 52 */ {16, "xmm14", &builtin_type_v4sf},
106 /* 53 */ {16, "xmm15", &builtin_type_v4sf},
107 /* 54 */ {4, "mxcsr", &builtin_type_int32}
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108};
109
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110/* This array is a mapping from Dwarf-2 register
111 numbering to GDB's one. Dwarf-2 numbering is
112 defined in x86-64 ABI, section 3.6. */
113static int x86_64_dwarf2gdb_regno_map[] = {
114 0, 1, 2, 3, /* RAX - RDX */
115 4, 5, 6, 7, /* RSI, RDI, RBP, RSP */
116 8, 9, 10, 11, /* R8 - R11 */
117 12, 13, 14, 15, /* R12 - R15 */
118 -1, /* RA - not mapped */
119 XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */
120 XMM1_REGNUM + 1, XMM1_REGNUM + 2,
121 XMM1_REGNUM + 3, XMM1_REGNUM + 4,
122 XMM1_REGNUM + 5, XMM1_REGNUM + 6,
123 XMM1_REGNUM + 7, XMM1_REGNUM + 8,
124 XMM1_REGNUM + 9, XMM1_REGNUM + 10,
125 XMM1_REGNUM + 11, XMM1_REGNUM + 12,
126 XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */
127 ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */
128 ST0_REGNUM + 2, ST0_REGNUM + 3,
129 ST0_REGNUM + 4, ST0_REGNUM + 5,
130 ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */
131};
132
133static int x86_64_dwarf2gdb_regno_map_length =
134 sizeof (x86_64_dwarf2gdb_regno_map) /
135 sizeof (x86_64_dwarf2gdb_regno_map[0]);
136
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137/* Number of all registers */
138#define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
139 sizeof (x86_64_register_info_table[0]))
140
141/* Number of general registers. */
142#define X86_64_NUM_GREGS (22)
143
144int x86_64_num_regs = X86_64_NUM_REGS;
145int x86_64_num_gregs = X86_64_NUM_GREGS;
146
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147/* Did we already print a note about frame pointer? */
148int omit_fp_note_printed = 0;
149
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150/* Number of bytes of storage in the actual machine representation for
151 register REGNO. */
152int
153x86_64_register_raw_size (int regno)
154{
de220d0f 155 return x86_64_register_info_table[regno].size;
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156}
157
158/* x86_64_register_byte_table[i] is the offset into the register file of the
159 start of register number i. We initialize this from
de220d0f 160 x86_64_register_info_table. */
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161int x86_64_register_byte_table[X86_64_NUM_REGS];
162
163/* Index within `registers' of the first byte of the space for register REGNO. */
164int
165x86_64_register_byte (int regno)
166{
167 return x86_64_register_byte_table[regno];
168}
169
170/* Return the GDB type object for the "standard" data type of data in
171 register N. */
172static struct type *
173x86_64_register_virtual_type (int regno)
174{
de220d0f 175 return *x86_64_register_info_table[regno].type;
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176}
177
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178/* x86_64_register_convertible is true if register N's virtual format is
179 different from its raw format. Note that this definition assumes
180 that the host supports IEEE 32-bit floats, since it doesn't say
181 that SSE registers need conversion. Even if we can't find a
182 counterexample, this is still sloppy. */
183int
184x86_64_register_convertible (int regno)
185{
186 return IS_FP_REGNUM (regno);
187}
188
189/* Convert data from raw format for register REGNUM in buffer FROM to
190 virtual format with type TYPE in buffer TO. In principle both
191 formats are identical except that the virtual format has two extra
192 bytes appended that aren't used. We set these to zero. */
193void
194x86_64_register_convert_to_virtual (int regnum, struct type *type,
195 char *from, char *to)
196{
82dbc5f7 197 char buf[12];
4657573b 198
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199 /* We only support floating-point values. */
200 if (TYPE_CODE (type) != TYPE_CODE_FLT)
201 {
202 warning ("Cannot convert floating-point register value "
203 "to non-floating-point type.");
204 memset (to, 0, TYPE_LENGTH (type));
205 return;
206 }
207 /* First add the necessary padding. */
208 memcpy (buf, from, FPU_REG_RAW_SIZE);
209 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
210 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
211 to the extended floating-point format used by the FPU. */
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212 convert_typed_floating (to, type, buf,
213 x86_64_register_virtual_type (regnum));
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214}
215
216/* Convert data from virtual format with type TYPE in buffer FROM to
217 raw format for register REGNUM in buffer TO. Simply omit the two
218 unused bytes. */
219
220void
221x86_64_register_convert_to_raw (struct type *type, int regnum,
222 char *from, char *to)
223{
ce0eebec 224 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
82dbc5f7 225 /* Simply omit the two unused bytes. */
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226 memcpy (to, from, FPU_REG_RAW_SIZE);
227}
53e95fcf 228
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229/* Dwarf-2 <-> GDB register numbers mapping. */
230int
231x86_64_dwarf2_reg_to_regnum (int dw_reg)
232{
233 if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length)
234 {
235 warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg);
236 return dw_reg;
237 }
238
239 return x86_64_dwarf2gdb_regno_map[dw_reg];
240}
241
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242/* This is the variable that is set with "set disassembly-flavour", and
243 its legitimate values. */
244static const char att_flavour[] = "att";
245static const char intel_flavour[] = "intel";
246static const char *valid_flavours[] = {
247 att_flavour,
248 intel_flavour,
249 NULL
250};
251static const char *disassembly_flavour = att_flavour;
252
253static CORE_ADDR
254x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
255{
256 char buf[8];
257
258 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
259
260 write_memory (sp - 8, buf, 8);
261 return sp - 8;
262}
263
264void
265x86_64_pop_frame (void)
266{
267 generic_pop_current_frame (cfi_pop_frame);
268}
269\f
270
271/* The returning of values is done according to the special algorithm.
272 Some types are returned in registers an some (big structures) in memory.
273 See ABI for details.
274 */
275
276#define MAX_CLASSES 4
277
278enum x86_64_reg_class
279{
280 X86_64_NO_CLASS,
281 X86_64_INTEGER_CLASS,
282 X86_64_INTEGERSI_CLASS,
283 X86_64_SSE_CLASS,
284 X86_64_SSESF_CLASS,
285 X86_64_SSEDF_CLASS,
286 X86_64_SSEUP_CLASS,
287 X86_64_X87_CLASS,
288 X86_64_X87UP_CLASS,
289 X86_64_MEMORY_CLASS
290};
291
292/* Return the union class of CLASS1 and CLASS2.
293 See the x86-64 ABI for details. */
294
295static enum x86_64_reg_class
296merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
297{
298 /* Rule #1: If both classes are equal, this is the resulting class. */
299 if (class1 == class2)
300 return class1;
301
302 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
303 the other class. */
304 if (class1 == X86_64_NO_CLASS)
305 return class2;
306 if (class2 == X86_64_NO_CLASS)
307 return class1;
308
309 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
310 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
311 return X86_64_MEMORY_CLASS;
312
313 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
314 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
315 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
316 return X86_64_INTEGERSI_CLASS;
317 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
318 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
319 return X86_64_INTEGER_CLASS;
320
321 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
322 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
323 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
324 return X86_64_MEMORY_CLASS;
325
326 /* Rule #6: Otherwise class SSE is used. */
327 return X86_64_SSE_CLASS;
328}
329
330
331/* Classify the argument type.
332 CLASSES will be filled by the register class used to pass each word
333 of the operand. The number of words is returned. In case the parameter
334 should be passed in memory, 0 is returned. As a special case for zero
335 sized containers, classes[0] will be NO_CLASS and 1 is returned.
336
337 See the x86-64 PS ABI for details.
338*/
339
340static int
341classify_argument (struct type *type,
342 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
343{
344 int bytes = TYPE_LENGTH (type);
345 int words = (bytes + 8 - 1) / 8;
346
347 switch (TYPE_CODE (type))
348 {
349 case TYPE_CODE_ARRAY:
350 case TYPE_CODE_STRUCT:
351 case TYPE_CODE_UNION:
352 {
353 int i;
354 enum x86_64_reg_class subclasses[MAX_CLASSES];
355
356 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
357 if (bytes > 16)
358 return 0;
359
360 for (i = 0; i < words; i++)
361 classes[i] = X86_64_NO_CLASS;
362
363 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
364 signalize memory class, so handle it as special case. */
365 if (!words)
366 {
367 classes[0] = X86_64_NO_CLASS;
368 return 1;
369 }
370 switch (TYPE_CODE (type))
371 {
372 case TYPE_CODE_STRUCT:
373 {
374 int j;
0004e5a2 375 for (j = 0; j < TYPE_NFIELDS (type); ++j)
53e95fcf 376 {
0004e5a2 377 int num = classify_argument (TYPE_FIELDS (type)[j].type,
53e95fcf 378 subclasses,
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379 (TYPE_FIELDS (type)[j].loc.
380 bitpos + bit_offset) % 256);
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381 if (!num)
382 return 0;
383 for (i = 0; i < num; i++)
384 {
385 int pos =
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386 (TYPE_FIELDS (type)[j].loc.bitpos +
387 bit_offset) / 8 / 8;
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388 classes[i + pos] =
389 merge_classes (subclasses[i], classes[i + pos]);
390 }
391 }
392 }
393 break;
394 case TYPE_CODE_ARRAY:
395 {
396 int num;
397
0004e5a2 398 num = classify_argument (TYPE_TARGET_TYPE (type),
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399 subclasses, bit_offset);
400 if (!num)
401 return 0;
402
403 /* The partial classes are now full classes. */
404 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
405 subclasses[0] = X86_64_SSE_CLASS;
406 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
407 subclasses[0] = X86_64_INTEGER_CLASS;
408
409 for (i = 0; i < words; i++)
410 classes[i] = subclasses[i % num];
411 }
412 break;
413 case TYPE_CODE_UNION:
414 {
415 int j;
416 {
0004e5a2 417 for (j = 0; j < TYPE_NFIELDS (type); ++j)
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418 {
419 int num;
0004e5a2 420 num = classify_argument (TYPE_FIELDS (type)[j].type,
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421 subclasses, bit_offset);
422 if (!num)
423 return 0;
424 for (i = 0; i < num; i++)
425 classes[i] = merge_classes (subclasses[i], classes[i]);
426 }
427 }
428 }
429 break;
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430 default:
431 break;
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432 }
433 /* Final merger cleanup. */
434 for (i = 0; i < words; i++)
435 {
436 /* If one class is MEMORY, everything should be passed in
437 memory. */
438 if (classes[i] == X86_64_MEMORY_CLASS)
439 return 0;
440
441 /* The X86_64_SSEUP_CLASS should be always preceeded by
442 X86_64_SSE_CLASS. */
443 if (classes[i] == X86_64_SSEUP_CLASS
444 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
445 classes[i] = X86_64_SSE_CLASS;
446
447 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
448 if (classes[i] == X86_64_X87UP_CLASS
449 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
450 classes[i] = X86_64_SSE_CLASS;
451 }
452 return words;
453 }
454 break;
455 case TYPE_CODE_FLT:
456 switch (bytes)
457 {
458 case 4:
459 if (!(bit_offset % 64))
460 classes[0] = X86_64_SSESF_CLASS;
461 else
462 classes[0] = X86_64_SSE_CLASS;
463 return 1;
464 case 8:
465 classes[0] = X86_64_SSEDF_CLASS;
466 return 1;
467 case 16:
468 classes[0] = X86_64_X87_CLASS;
469 classes[1] = X86_64_X87UP_CLASS;
470 return 2;
471 }
472 break;
473 case TYPE_CODE_INT:
474 case TYPE_CODE_PTR:
475 switch (bytes)
476 {
477 case 1:
478 case 2:
479 case 4:
480 case 8:
481 if (bytes * 8 + bit_offset <= 32)
482 classes[0] = X86_64_INTEGERSI_CLASS;
483 else
484 classes[0] = X86_64_INTEGER_CLASS;
485 return 1;
486 case 16:
487 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
488 return 2;
489 default:
490 break;
491 }
492 case TYPE_CODE_VOID:
493 return 0;
8dda9770 494 default: /* Avoid warning. */
4657573b 495 break;
53e95fcf 496 }
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497 internal_error (__FILE__, __LINE__,
498 "classify_argument: unknown argument type");
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499}
500
501/* Examine the argument and return set number of register required in each
502 class. Return 0 ifif parameter should be passed in memory. */
503
504static int
505examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
506 int n, int *int_nregs, int *sse_nregs)
507{
508 *int_nregs = 0;
509 *sse_nregs = 0;
510 if (!n)
511 return 0;
512 for (n--; n >= 0; n--)
513 switch (classes[n])
514 {
515 case X86_64_INTEGER_CLASS:
516 case X86_64_INTEGERSI_CLASS:
517 (*int_nregs)++;
518 break;
519 case X86_64_SSE_CLASS:
520 case X86_64_SSESF_CLASS:
521 case X86_64_SSEDF_CLASS:
522 (*sse_nregs)++;
523 break;
524 case X86_64_NO_CLASS:
525 case X86_64_SSEUP_CLASS:
526 case X86_64_X87_CLASS:
527 case X86_64_X87UP_CLASS:
528 break;
529 case X86_64_MEMORY_CLASS:
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530 internal_error (__FILE__, __LINE__,
531 "examine_argument: unexpected memory class");
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532 }
533 return 1;
534}
535
536#define RET_INT_REGS 2
537#define RET_SSE_REGS 2
538
539/* Check if the structure in value_type is returned in registers or in
540 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
541 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
542 will be used. */
543int
544x86_64_use_struct_convention (int gcc_p, struct type *value_type)
545{
546 enum x86_64_reg_class class[MAX_CLASSES];
547 int n = classify_argument (value_type, class, 0);
548 int needed_intregs;
549 int needed_sseregs;
550
551 return (!n ||
552 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
553 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
554}
555
556
557/* Extract from an array REGBUF containing the (raw) register state, a
558 function return value of TYPE, and copy that, in virtual format,
559 into VALBUF. */
560
561void
562x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
563{
564 enum x86_64_reg_class class[MAX_CLASSES];
565 int n = classify_argument (type, class, 0);
566 int needed_intregs;
567 int needed_sseregs;
568 int intreg = 0;
569 int ssereg = 0;
570 int offset = 0;
571 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
572 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
573
574 if (!n ||
575 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
576 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
577 { /* memory class */
578 CORE_ADDR addr;
579 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
580 read_memory (addr, valbuf, TYPE_LENGTH (type));
581 return;
582 }
583 else
584 {
585 int i;
586 for (i = 0; i < n; i++)
587 {
588 switch (class[i])
589 {
590 case X86_64_NO_CLASS:
591 break;
592 case X86_64_INTEGER_CLASS:
593 memcpy (valbuf + offset,
594 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
595 8);
596 offset += 8;
597 intreg += 2;
598 break;
599 case X86_64_INTEGERSI_CLASS:
600 memcpy (valbuf + offset,
601 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
602 offset += 8;
603 intreg++;
604 break;
605 case X86_64_SSEDF_CLASS:
606 case X86_64_SSESF_CLASS:
607 case X86_64_SSE_CLASS:
608 memcpy (valbuf + offset,
609 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
610 8);
611 offset += 8;
612 ssereg += 2;
613 break;
614 case X86_64_SSEUP_CLASS:
615 memcpy (valbuf + offset + 8,
616 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
617 offset += 8;
618 ssereg++;
619 break;
620 case X86_64_X87_CLASS:
621 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
622 8);
623 offset += 8;
624 break;
625 case X86_64_X87UP_CLASS:
626 memcpy (valbuf + offset,
627 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
628 offset += 8;
629 break;
630 case X86_64_MEMORY_CLASS:
631 default:
632 internal_error (__FILE__, __LINE__,
633 "Unexpected argument class");
634 }
635 }
636 }
637}
638
639/* Handled by unwind informations. */
640static void
641x86_64_frame_init_saved_regs (struct frame_info *fi)
642{
643}
644
645#define INT_REGS 6
646#define SSE_REGS 16
647
53e95fcf 648CORE_ADDR
d45fc520 649x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
53e95fcf
JS
650 int struct_return, CORE_ADDR struct_addr)
651{
652 int intreg = 0;
653 int ssereg = 0;
654 int i;
ce0eebec 655 static int int_parameter_registers[INT_REGS] = {
de220d0f
ML
656 5 /* RDI */ , 4 /* RSI */ ,
657 3 /* RDX */ , 2 /* RCX */ ,
91fd20f7 658 8 /* R8 */ , 9 /* R9 */
ce0eebec 659 };
53e95fcf 660 /* XMM0 - XMM15 */
ce0eebec 661 static int sse_parameter_registers[SSE_REGS] = {
de220d0f
ML
662 XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
663 XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
664 XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
665 XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
ce0eebec
AC
666 };
667 int stack_values_count = 0;
82dbc5f7 668 int *stack_values;
e9f30c21 669 stack_values = alloca (nargs * sizeof (int));
53e95fcf
JS
670 for (i = 0; i < nargs; i++)
671 {
672 enum x86_64_reg_class class[MAX_CLASSES];
673 int n = classify_argument (args[i]->type, class, 0);
674 int needed_intregs;
675 int needed_sseregs;
676
677 if (!n ||
678 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
82dbc5f7
AC
679 || intreg / 2 + needed_intregs > INT_REGS
680 || ssereg / 2 + needed_sseregs > SSE_REGS)
ce0eebec
AC
681 { /* memory class */
682 stack_values[stack_values_count++] = i;
53e95fcf
JS
683 }
684 else
685 {
686 int j;
687 for (j = 0; j < n; j++)
688 {
689 int offset = 0;
690 switch (class[j])
691 {
692 case X86_64_NO_CLASS:
693 break;
694 case X86_64_INTEGER_CLASS:
ce0eebec
AC
695 write_register_gen (int_parameter_registers
696 [(intreg + 1) / 2],
53e95fcf
JS
697 VALUE_CONTENTS_ALL (args[i]) + offset);
698 offset += 8;
699 intreg += 2;
700 break;
701 case X86_64_INTEGERSI_CLASS:
702 write_register_gen (int_parameter_registers[intreg / 2],
703 VALUE_CONTENTS_ALL (args[i]) + offset);
704 offset += 8;
705 intreg++;
706 break;
707 case X86_64_SSEDF_CLASS:
708 case X86_64_SSESF_CLASS:
709 case X86_64_SSE_CLASS:
ce0eebec
AC
710 write_register_gen (sse_parameter_registers
711 [(ssereg + 1) / 2],
53e95fcf
JS
712 VALUE_CONTENTS_ALL (args[i]) + offset);
713 offset += 8;
714 ssereg += 2;
715 break;
716 case X86_64_SSEUP_CLASS:
717 write_register_gen (sse_parameter_registers[ssereg / 2],
718 VALUE_CONTENTS_ALL (args[i]) + offset);
719 offset += 8;
720 ssereg++;
721 break;
722 case X86_64_X87_CLASS:
53e95fcf 723 case X86_64_MEMORY_CLASS:
ce0eebec 724 stack_values[stack_values_count++] = i;
82dbc5f7
AC
725 break;
726 case X86_64_X87UP_CLASS:
53e95fcf
JS
727 break;
728 default:
729 internal_error (__FILE__, __LINE__,
730 "Unexpected argument class");
731 }
732 intreg += intreg % 2;
733 ssereg += ssereg % 2;
734 }
735 }
736 }
82dbc5f7
AC
737 while (--stack_values_count >= 0)
738 {
e9f30c21 739 struct value *arg = args[stack_values[stack_values_count]];
82dbc5f7
AC
740 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
741 len += 7;
742 len -= len % 8;
743 sp -= len;
744 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
745 }
53e95fcf
JS
746 return sp;
747}
748
749/* Write into the appropriate registers a function return value stored
750 in VALBUF of type TYPE, given in virtual format. */
751void
752x86_64_store_return_value (struct type *type, char *valbuf)
753{
754 int len = TYPE_LENGTH (type);
755
756 if (TYPE_CODE_FLT == TYPE_CODE (type))
757 {
758 /* Floating-point return values can be found in %st(0). */
759 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
760 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
761 {
762 /* Copy straight over. */
763 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
764 FPU_REG_RAW_SIZE);
765 }
766 else
767 {
768 char buf[FPU_REG_RAW_SIZE];
769 DOUBLEST val;
770
771 /* Convert the value found in VALBUF to the extended
772 floating point format used by the FPU. This is probably
773 not exactly how it would happen on the target itself, but
774 it is the best we can do. */
775 val = extract_floating (valbuf, TYPE_LENGTH (type));
776 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
777 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
778 FPU_REG_RAW_SIZE);
779 }
780 }
781 else
782 {
783 int low_size = REGISTER_RAW_SIZE (0);
784 int high_size = REGISTER_RAW_SIZE (1);
785
786 if (len <= low_size)
787 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
788 else if (len <= (low_size + high_size))
789 {
790 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
791 write_register_bytes (REGISTER_BYTE (1),
792 valbuf + low_size, len - low_size);
793 }
794 else
795 internal_error (__FILE__, __LINE__,
796 "Cannot store return value of %d bytes long.", len);
797 }
798}
799\f
800
1cf877ad
ML
801const char *
802x86_64_register_name (int reg_nr)
53e95fcf 803{
de220d0f 804 if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
53e95fcf 805 return NULL;
de220d0f 806 return x86_64_register_info_table[reg_nr].name;
53e95fcf 807}
8dda9770
ML
808
809int
1cf877ad 810x86_64_register_number (const char *name)
8dda9770
ML
811{
812 int reg_nr;
813
814 for (reg_nr = 0; reg_nr < X86_64_NUM_REGS; reg_nr++)
815 if (strcmp (name, x86_64_register_info_table[reg_nr].name) == 0)
816 return reg_nr;
817 return -1;
818}
53e95fcf
JS
819\f
820
821
822/* We have two flavours of disassembly. The machinery on this page
823 deals with switching between those. */
824
825static int
826gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
827{
828 if (disassembly_flavour == att_flavour)
829 return print_insn_i386_att (memaddr, info);
830 else if (disassembly_flavour == intel_flavour)
831 return print_insn_i386_intel (memaddr, info);
832 /* Never reached -- disassembly_flavour is always either att_flavour
833 or intel_flavour. */
834 internal_error (__FILE__, __LINE__, "failed internal consistency check");
835}
836\f
837
838/* Store the address of the place in which to copy the structure the
839 subroutine will return. This is called from call_function. */
840void
841x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
842{
843 write_register (RDI_REGNUM, addr);
844}
845
846int
847x86_64_frameless_function_invocation (struct frame_info *frame)
848{
849 return 0;
850}
851
e76e1718
ML
852/* If a function with debugging information and known beginning
853 is detected, we will return pc of the next line in the source
854 code. With this approach we effectively skip the prolog. */
855
856#define PROLOG_BUFSIZE 4
53e95fcf
JS
857CORE_ADDR
858x86_64_skip_prologue (CORE_ADDR pc)
859{
482a4d06 860 int i;
e76e1718
ML
861 struct symtab_and_line v_sal;
862 struct symbol *v_function;
482a4d06 863 CORE_ADDR endaddr;
e76e1718
ML
864
865 /* We will handle only functions beginning with:
866 55 pushq %rbp
867 48 89 e5 movq %rsp,%rbp
868 */
869 unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
870 prolog_buf[PROLOG_BUFSIZE];
871
872 read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
873
b1ab997b
ML
874 /* First check, whether pc points to pushq %rbp, movq %rsp,%rbp. */
875 for (i = 0; i < PROLOG_BUFSIZE; i++)
b6779aa2 876 if (prolog_expect[i] != prolog_buf[i])
8dda9770 877 return pc; /* ... no, it doesn't. Nothing to skip. */
b1ab997b
ML
878
879 /* OK, we have found the prologue and want PC of the first
880 non-prologue instruction. */
881 pc += PROLOG_BUFSIZE;
e76e1718
ML
882
883 v_function = find_pc_function (pc);
884 v_sal = find_pc_line (pc, 0);
885
886 /* If pc doesn't point to a function with debuginfo,
887 some of the following may be NULL. */
888 if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
889 return pc;
890
e76e1718
ML
891 endaddr = v_function->ginfo.value.block->endaddr;
892
893 for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
482a4d06 894 if (v_sal.symtab->linetable->item[i].pc >= pc
e76e1718
ML
895 && v_sal.symtab->linetable->item[i].pc < endaddr)
896 {
897 pc = v_sal.symtab->linetable->item[i].pc;
e76e1718
ML
898 break;
899 }
900
53e95fcf
JS
901 return pc;
902}
903
904/* Sequence of bytes for breakpoint instruction. */
905static unsigned char *
de220d0f 906x86_64_breakpoint_from_pc (CORE_ADDR * pc, int *lenptr)
53e95fcf
JS
907{
908 static unsigned char breakpoint[] = { 0xcc };
909 *lenptr = 1;
910 return breakpoint;
911}
912
913static struct gdbarch *
0e04a514 914x86_64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
53e95fcf
JS
915{
916 struct gdbarch *gdbarch;
917 struct gdbarch_tdep *tdep;
de220d0f 918 int i, sum;
53e95fcf
JS
919
920 /* Find a candidate among the list of pre-declared architectures. */
921 for (arches = gdbarch_list_lookup_by_info (arches, &info);
922 arches != NULL;
923 arches = gdbarch_list_lookup_by_info (arches->next, &info))
924 {
925 switch (info.bfd_arch_info->mach)
926 {
927 case bfd_mach_x86_64:
928 case bfd_mach_x86_64_intel_syntax:
929 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
930 {
931 case bfd_mach_x86_64:
932 case bfd_mach_x86_64_intel_syntax:
933 return arches->gdbarch;
934 case bfd_mach_i386_i386:
935 case bfd_mach_i386_i8086:
936 case bfd_mach_i386_i386_intel_syntax:
937 break;
938 default:
939 internal_error (__FILE__, __LINE__,
0e04a514 940 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS
941 }
942 break;
943 case bfd_mach_i386_i386:
944 case bfd_mach_i386_i8086:
945 case bfd_mach_i386_i386_intel_syntax:
946 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
947 {
948 case bfd_mach_x86_64:
949 case bfd_mach_x86_64_intel_syntax:
950 break;
951 case bfd_mach_i386_i386:
952 case bfd_mach_i386_i8086:
953 case bfd_mach_i386_i386_intel_syntax:
954 return arches->gdbarch;
955 default:
956 internal_error (__FILE__, __LINE__,
0e04a514 957 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS
958 }
959 break;
960 default:
961 internal_error (__FILE__, __LINE__,
0e04a514 962 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS
963 }
964 }
965
966 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
967 gdbarch = gdbarch_alloc (&info, tdep);
968
969 switch (info.bfd_arch_info->mach)
970 {
971 case bfd_mach_x86_64:
972 case bfd_mach_x86_64_intel_syntax:
96297dab 973 tdep->num_xmm_regs = 16;
53e95fcf
JS
974 break;
975 case bfd_mach_i386_i386:
976 case bfd_mach_i386_i8086:
977 case bfd_mach_i386_i386_intel_syntax:
978 /* This is place for definition of i386 target vector. */
979 break;
980 default:
981 internal_error (__FILE__, __LINE__,
0e04a514 982 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS
983 }
984
985 set_gdbarch_long_bit (gdbarch, 64);
986 set_gdbarch_long_long_bit (gdbarch, 64);
987 set_gdbarch_ptr_bit (gdbarch, 64);
988
989 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
53e95fcf
JS
990
991 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
1cf877ad 992 set_gdbarch_register_name (gdbarch, x86_64_register_name);
53e95fcf
JS
993 set_gdbarch_register_size (gdbarch, 8);
994 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
995 set_gdbarch_max_register_raw_size (gdbarch, 16);
996 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
de220d0f 997
53e95fcf
JS
998 /* Total amount of space needed to store our copies of the machine's register
999 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
de220d0f
ML
1000 for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
1001 sum += x86_64_register_info_table[i].size;
1002 set_gdbarch_register_bytes (gdbarch, sum);
b2e75d78 1003 set_gdbarch_register_virtual_size (gdbarch, generic_register_size);
53e95fcf
JS
1004 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1005
1006 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
1007
1008 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
1009 set_gdbarch_register_convert_to_virtual (gdbarch,
1010 x86_64_register_convert_to_virtual);
1011 set_gdbarch_register_convert_to_raw (gdbarch,
1012 x86_64_register_convert_to_raw);
1013
1014/* Register numbers of various important registers. */
1015 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
1016 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
1017 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
1018
de220d0f 1019 set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */
53e95fcf
JS
1020
1021 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
53e95fcf
JS
1022
1023/* Discard from the stack the innermost frame, restoring all registers. */
1024 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
1025
1026 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
1027 chain-pointer. */
1028 set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
1029
1030 set_gdbarch_frameless_function_invocation (gdbarch,
1031 x86_64_frameless_function_invocation);
1032 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
1033
1034 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
1035 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
1036
1037/* Return number of bytes at start of arglist that are not really args. */
1038 set_gdbarch_frame_args_skip (gdbarch, 8);
1039
1040 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1041
1042/* Frame pc initialization is handled by unwind informations. */
1043 set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
1044
1045/* Initialization of unwind informations. */
1046 set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
1047
1048/* Getting saved registers is handled by unwind informations. */
1049 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
1050
1051 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1052
1053/* Cons up virtual frame pointer for trace */
1054 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
1055
1056
1057 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1058
1059 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1060 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1061 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1062 set_gdbarch_call_dummy_length (gdbarch, 0);
1063 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1064 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1065 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
1066 set_gdbarch_call_dummy_words (gdbarch, 0);
1067 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1068 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1069 set_gdbarch_call_dummy_p (gdbarch, 1);
1070 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1071 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1072 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1073 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
1074 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
1075
1076/* Return number of args passed to a frame, no way to tell. */
1077 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1078/* Don't use default structure extract routine */
26e9b323 1079 set_gdbarch_deprecated_extract_struct_value_address (gdbarch, 0);
53e95fcf
JS
1080
1081/* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
1082 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
1083 the case when structure is returned in registers. */
1084 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
1085
1086/* Store the address of the place in which to copy the structure the
1087 subroutine will return. This is called from call_function. */
1088 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
1089
1090/* Extract from an array REGBUF containing the (raw) register state
1091 a function return value of type TYPE, and copy that, in virtual format,
1092 into VALBUF. */
26e9b323 1093 set_gdbarch_deprecated_extract_return_value (gdbarch, x86_64_extract_return_value);
53e95fcf
JS
1094
1095
1096/* Write into the appropriate registers a function return value stored
1097 in VALBUF of type TYPE, given in virtual format. */
1098 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
1099\f
1100
1101/* Offset from address of function to start of its code. */
1102 set_gdbarch_function_start_offset (gdbarch, 0);
1103
1104 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
1105
1106 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
1107
1108 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1109
91fd20f7
ML
1110 set_gdbarch_breakpoint_from_pc (gdbarch,
1111 (gdbarch_breakpoint_from_pc_ftype *)
1112 x86_64_breakpoint_from_pc);
53e95fcf
JS
1113
1114
1115/* Amount PC must be decremented by after a breakpoint. This is often the
1116 number of bytes in BREAKPOINT but not always. */
1117 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1118
b6af0555
JS
1119/* Use dwarf2 debug frame informations. */
1120 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
0e04a514
ML
1121 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
1122
53e95fcf
JS
1123 return gdbarch;
1124}
1125
1126void
1127_initialize_x86_64_tdep (void)
1128{
0e04a514 1129 register_gdbarch_init (bfd_arch_i386, x86_64_gdbarch_init);
53e95fcf
JS
1130
1131 /* Initialize the table saying where each register starts in the
1132 register file. */
1133 {
1134 int i, offset;
1135
1136 offset = 0;
1137 for (i = 0; i < X86_64_NUM_REGS; i++)
1138 {
1139 x86_64_register_byte_table[i] = offset;
de220d0f 1140 offset += x86_64_register_info_table[i].size;
53e95fcf
JS
1141 }
1142 }
1143
1144 tm_print_insn = gdb_print_insn_x86_64;
1145 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
1146
1147 /* Add the variable that controls the disassembly flavour. */
1148 {
1149 struct cmd_list_element *new_cmd;
1150
1151 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1152 valid_flavours, &disassembly_flavour, "\
1153Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1154and the default value is \"att\".", &setlist);
1155 add_show_from_set (new_cmd, &showlist);
1156 }
1157}
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