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53e95fcf | 1 | /* Target-dependent code for the x86-64 for GDB, the GNU debugger. |
ce0eebec AC |
2 | |
3 | Copyright 2001, 2002 Free Software Foundation, Inc. | |
4 | ||
53e95fcf JS |
5 | Contributed by Jiri Smid, SuSE Labs. |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 59 Temple Place - Suite 330, | |
22 | Boston, MA 02111-1307, USA. */ | |
23 | ||
24 | #include "defs.h" | |
25 | #include "inferior.h" | |
26 | #include "gdbcore.h" | |
27 | #include "gdbcmd.h" | |
28 | #include "arch-utils.h" | |
29 | #include "regcache.h" | |
30 | #include "symfile.h" | |
31 | #include "x86-64-tdep.h" | |
32 | #include "dwarf2cfi.h" | |
82dbc5f7 | 33 | #include "gdb_assert.h" |
53e95fcf JS |
34 | |
35 | ||
36 | /* Register numbers of various important registers. */ | |
37 | #define RAX_REGNUM 0 | |
38 | #define RDX_REGNUM 1 | |
39 | #define RDI_REGNUM 5 | |
40 | #define EFLAGS_REGNUM 17 | |
41 | #define XMM1_REGNUM 35 | |
42 | ||
43 | /* x86_64_register_raw_size_table[i] is the number of bytes of storage in | |
44 | GDB's register array occupied by register i. */ | |
45 | int x86_64_register_raw_size_table[X86_64_NUM_REGS] = { | |
46 | 8, 8, 8, 8, | |
47 | 8, 8, 8, 8, | |
48 | 8, 8, 8, 8, | |
49 | 8, 8, 8, 8, | |
50 | 8, 4, | |
51 | 10, 10, 10, 10, | |
52 | 10, 10, 10, 10, | |
53 | 4, 4, 4, 4, | |
54 | 4, 4, 4, 4, | |
55 | 16, 16, 16, 16, | |
56 | 16, 16, 16, 16, | |
57 | 16, 16, 16, 16, | |
58 | 16, 16, 16, 16, | |
59 | 4 | |
60 | }; | |
61 | ||
62 | /* Number of bytes of storage in the actual machine representation for | |
63 | register REGNO. */ | |
64 | int | |
65 | x86_64_register_raw_size (int regno) | |
66 | { | |
67 | return x86_64_register_raw_size_table[regno]; | |
68 | } | |
69 | ||
70 | /* x86_64_register_byte_table[i] is the offset into the register file of the | |
71 | start of register number i. We initialize this from | |
72 | x86_64_register_raw_size_table. */ | |
73 | int x86_64_register_byte_table[X86_64_NUM_REGS]; | |
74 | ||
75 | /* Index within `registers' of the first byte of the space for register REGNO. */ | |
76 | int | |
77 | x86_64_register_byte (int regno) | |
78 | { | |
79 | return x86_64_register_byte_table[regno]; | |
80 | } | |
81 | ||
82 | /* Return the GDB type object for the "standard" data type of data in | |
83 | register N. */ | |
84 | static struct type * | |
85 | x86_64_register_virtual_type (int regno) | |
86 | { | |
87 | if (regno == PC_REGNUM || regno == SP_REGNUM) | |
82dbc5f7 | 88 | return builtin_type_void_func_ptr; |
53e95fcf | 89 | if (IS_FP_REGNUM (regno)) |
82dbc5f7 | 90 | return builtin_type_i387_ext; |
53e95fcf JS |
91 | if (IS_SSE_REGNUM (regno)) |
92 | return builtin_type_v4sf; | |
93 | if (IS_FPU_CTRL_REGNUM (regno) || regno == MXCSR_REGNUM | |
94 | || regno == EFLAGS_REGNUM) | |
82dbc5f7 AC |
95 | return builtin_type_int32; |
96 | return builtin_type_int64; | |
53e95fcf JS |
97 | } |
98 | ||
53e95fcf JS |
99 | /* x86_64_register_convertible is true if register N's virtual format is |
100 | different from its raw format. Note that this definition assumes | |
101 | that the host supports IEEE 32-bit floats, since it doesn't say | |
102 | that SSE registers need conversion. Even if we can't find a | |
103 | counterexample, this is still sloppy. */ | |
104 | int | |
105 | x86_64_register_convertible (int regno) | |
106 | { | |
107 | return IS_FP_REGNUM (regno); | |
108 | } | |
109 | ||
110 | /* Convert data from raw format for register REGNUM in buffer FROM to | |
111 | virtual format with type TYPE in buffer TO. In principle both | |
112 | formats are identical except that the virtual format has two extra | |
113 | bytes appended that aren't used. We set these to zero. */ | |
114 | void | |
115 | x86_64_register_convert_to_virtual (int regnum, struct type *type, | |
116 | char *from, char *to) | |
117 | { | |
82dbc5f7 AC |
118 | char buf[12]; |
119 | DOUBLEST d; | |
120 | /* We only support floating-point values. */ | |
121 | if (TYPE_CODE (type) != TYPE_CODE_FLT) | |
122 | { | |
123 | warning ("Cannot convert floating-point register value " | |
124 | "to non-floating-point type."); | |
125 | memset (to, 0, TYPE_LENGTH (type)); | |
126 | return; | |
127 | } | |
128 | /* First add the necessary padding. */ | |
129 | memcpy (buf, from, FPU_REG_RAW_SIZE); | |
130 | memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE); | |
131 | /* Convert to TYPE. This should be a no-op, if TYPE is equivalent | |
132 | to the extended floating-point format used by the FPU. */ | |
ce0eebec AC |
133 | convert_typed_floating (to, type, buf, |
134 | x86_64_register_virtual_type (regnum)); | |
53e95fcf JS |
135 | } |
136 | ||
137 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
138 | raw format for register REGNUM in buffer TO. Simply omit the two | |
139 | unused bytes. */ | |
140 | ||
141 | void | |
142 | x86_64_register_convert_to_raw (struct type *type, int regnum, | |
143 | char *from, char *to) | |
144 | { | |
ce0eebec | 145 | gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12); |
82dbc5f7 | 146 | /* Simply omit the two unused bytes. */ |
53e95fcf JS |
147 | memcpy (to, from, FPU_REG_RAW_SIZE); |
148 | } | |
53e95fcf JS |
149 | |
150 | /* This is the variable that is set with "set disassembly-flavour", and | |
151 | its legitimate values. */ | |
152 | static const char att_flavour[] = "att"; | |
153 | static const char intel_flavour[] = "intel"; | |
154 | static const char *valid_flavours[] = { | |
155 | att_flavour, | |
156 | intel_flavour, | |
157 | NULL | |
158 | }; | |
159 | static const char *disassembly_flavour = att_flavour; | |
160 | ||
161 | static CORE_ADDR | |
162 | x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
163 | { | |
164 | char buf[8]; | |
165 | ||
166 | store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ()); | |
167 | ||
168 | write_memory (sp - 8, buf, 8); | |
169 | return sp - 8; | |
170 | } | |
171 | ||
172 | void | |
173 | x86_64_pop_frame (void) | |
174 | { | |
175 | generic_pop_current_frame (cfi_pop_frame); | |
176 | } | |
177 | \f | |
178 | ||
179 | /* The returning of values is done according to the special algorithm. | |
180 | Some types are returned in registers an some (big structures) in memory. | |
181 | See ABI for details. | |
182 | */ | |
183 | ||
184 | #define MAX_CLASSES 4 | |
185 | ||
186 | enum x86_64_reg_class | |
187 | { | |
188 | X86_64_NO_CLASS, | |
189 | X86_64_INTEGER_CLASS, | |
190 | X86_64_INTEGERSI_CLASS, | |
191 | X86_64_SSE_CLASS, | |
192 | X86_64_SSESF_CLASS, | |
193 | X86_64_SSEDF_CLASS, | |
194 | X86_64_SSEUP_CLASS, | |
195 | X86_64_X87_CLASS, | |
196 | X86_64_X87UP_CLASS, | |
197 | X86_64_MEMORY_CLASS | |
198 | }; | |
199 | ||
200 | /* Return the union class of CLASS1 and CLASS2. | |
201 | See the x86-64 ABI for details. */ | |
202 | ||
203 | static enum x86_64_reg_class | |
204 | merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2) | |
205 | { | |
206 | /* Rule #1: If both classes are equal, this is the resulting class. */ | |
207 | if (class1 == class2) | |
208 | return class1; | |
209 | ||
210 | /* Rule #2: If one of the classes is NO_CLASS, the resulting class is | |
211 | the other class. */ | |
212 | if (class1 == X86_64_NO_CLASS) | |
213 | return class2; | |
214 | if (class2 == X86_64_NO_CLASS) | |
215 | return class1; | |
216 | ||
217 | /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */ | |
218 | if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS) | |
219 | return X86_64_MEMORY_CLASS; | |
220 | ||
221 | /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */ | |
222 | if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS) | |
223 | || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS)) | |
224 | return X86_64_INTEGERSI_CLASS; | |
225 | if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS | |
226 | || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS) | |
227 | return X86_64_INTEGER_CLASS; | |
228 | ||
229 | /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */ | |
230 | if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS | |
231 | || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS) | |
232 | return X86_64_MEMORY_CLASS; | |
233 | ||
234 | /* Rule #6: Otherwise class SSE is used. */ | |
235 | return X86_64_SSE_CLASS; | |
236 | } | |
237 | ||
238 | ||
239 | /* Classify the argument type. | |
240 | CLASSES will be filled by the register class used to pass each word | |
241 | of the operand. The number of words is returned. In case the parameter | |
242 | should be passed in memory, 0 is returned. As a special case for zero | |
243 | sized containers, classes[0] will be NO_CLASS and 1 is returned. | |
244 | ||
245 | See the x86-64 PS ABI for details. | |
246 | */ | |
247 | ||
248 | static int | |
249 | classify_argument (struct type *type, | |
250 | enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset) | |
251 | { | |
252 | int bytes = TYPE_LENGTH (type); | |
253 | int words = (bytes + 8 - 1) / 8; | |
254 | ||
255 | switch (TYPE_CODE (type)) | |
256 | { | |
257 | case TYPE_CODE_ARRAY: | |
258 | case TYPE_CODE_STRUCT: | |
259 | case TYPE_CODE_UNION: | |
260 | { | |
261 | int i; | |
262 | enum x86_64_reg_class subclasses[MAX_CLASSES]; | |
263 | ||
264 | /* On x86-64 we pass structures larger than 16 bytes on the stack. */ | |
265 | if (bytes > 16) | |
266 | return 0; | |
267 | ||
268 | for (i = 0; i < words; i++) | |
269 | classes[i] = X86_64_NO_CLASS; | |
270 | ||
271 | /* Zero sized arrays or structures are NO_CLASS. We return 0 to | |
272 | signalize memory class, so handle it as special case. */ | |
273 | if (!words) | |
274 | { | |
275 | classes[0] = X86_64_NO_CLASS; | |
276 | return 1; | |
277 | } | |
278 | switch (TYPE_CODE (type)) | |
279 | { | |
280 | case TYPE_CODE_STRUCT: | |
281 | { | |
282 | int j; | |
283 | for (j = 0; j < type->nfields; ++j) | |
284 | { | |
285 | int num = classify_argument (type->fields[j].type, | |
286 | subclasses, | |
287 | (type->fields[j].loc.bitpos | |
288 | + bit_offset) % 256); | |
289 | if (!num) | |
290 | return 0; | |
291 | for (i = 0; i < num; i++) | |
292 | { | |
293 | int pos = | |
294 | (type->fields[j].loc.bitpos + bit_offset) / 8 / 8; | |
295 | classes[i + pos] = | |
296 | merge_classes (subclasses[i], classes[i + pos]); | |
297 | } | |
298 | } | |
299 | } | |
300 | break; | |
301 | case TYPE_CODE_ARRAY: | |
302 | { | |
303 | int num; | |
304 | ||
305 | num = classify_argument (type->target_type, | |
306 | subclasses, bit_offset); | |
307 | if (!num) | |
308 | return 0; | |
309 | ||
310 | /* The partial classes are now full classes. */ | |
311 | if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4) | |
312 | subclasses[0] = X86_64_SSE_CLASS; | |
313 | if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4) | |
314 | subclasses[0] = X86_64_INTEGER_CLASS; | |
315 | ||
316 | for (i = 0; i < words; i++) | |
317 | classes[i] = subclasses[i % num]; | |
318 | } | |
319 | break; | |
320 | case TYPE_CODE_UNION: | |
321 | { | |
322 | int j; | |
323 | { | |
324 | for (j = 0; j < type->nfields; ++j) | |
325 | { | |
326 | int num; | |
327 | num = classify_argument (type->fields[j].type, | |
328 | subclasses, bit_offset); | |
329 | if (!num) | |
330 | return 0; | |
331 | for (i = 0; i < num; i++) | |
332 | classes[i] = merge_classes (subclasses[i], classes[i]); | |
333 | } | |
334 | } | |
335 | } | |
336 | break; | |
337 | } | |
338 | /* Final merger cleanup. */ | |
339 | for (i = 0; i < words; i++) | |
340 | { | |
341 | /* If one class is MEMORY, everything should be passed in | |
342 | memory. */ | |
343 | if (classes[i] == X86_64_MEMORY_CLASS) | |
344 | return 0; | |
345 | ||
346 | /* The X86_64_SSEUP_CLASS should be always preceeded by | |
347 | X86_64_SSE_CLASS. */ | |
348 | if (classes[i] == X86_64_SSEUP_CLASS | |
349 | && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS)) | |
350 | classes[i] = X86_64_SSE_CLASS; | |
351 | ||
352 | /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */ | |
353 | if (classes[i] == X86_64_X87UP_CLASS | |
354 | && (i == 0 || classes[i - 1] != X86_64_X87_CLASS)) | |
355 | classes[i] = X86_64_SSE_CLASS; | |
356 | } | |
357 | return words; | |
358 | } | |
359 | break; | |
360 | case TYPE_CODE_FLT: | |
361 | switch (bytes) | |
362 | { | |
363 | case 4: | |
364 | if (!(bit_offset % 64)) | |
365 | classes[0] = X86_64_SSESF_CLASS; | |
366 | else | |
367 | classes[0] = X86_64_SSE_CLASS; | |
368 | return 1; | |
369 | case 8: | |
370 | classes[0] = X86_64_SSEDF_CLASS; | |
371 | return 1; | |
372 | case 16: | |
373 | classes[0] = X86_64_X87_CLASS; | |
374 | classes[1] = X86_64_X87UP_CLASS; | |
375 | return 2; | |
376 | } | |
377 | break; | |
378 | case TYPE_CODE_INT: | |
379 | case TYPE_CODE_PTR: | |
380 | switch (bytes) | |
381 | { | |
382 | case 1: | |
383 | case 2: | |
384 | case 4: | |
385 | case 8: | |
386 | if (bytes * 8 + bit_offset <= 32) | |
387 | classes[0] = X86_64_INTEGERSI_CLASS; | |
388 | else | |
389 | classes[0] = X86_64_INTEGER_CLASS; | |
390 | return 1; | |
391 | case 16: | |
392 | classes[0] = classes[1] = X86_64_INTEGER_CLASS; | |
393 | return 2; | |
394 | default: | |
395 | break; | |
396 | } | |
397 | case TYPE_CODE_VOID: | |
398 | return 0; | |
399 | } | |
ce0eebec AC |
400 | internal_error (__FILE__, __LINE__, |
401 | "classify_argument: unknown argument type"); | |
53e95fcf JS |
402 | } |
403 | ||
404 | /* Examine the argument and return set number of register required in each | |
405 | class. Return 0 ifif parameter should be passed in memory. */ | |
406 | ||
407 | static int | |
408 | examine_argument (enum x86_64_reg_class classes[MAX_CLASSES], | |
409 | int n, int *int_nregs, int *sse_nregs) | |
410 | { | |
411 | *int_nregs = 0; | |
412 | *sse_nregs = 0; | |
413 | if (!n) | |
414 | return 0; | |
415 | for (n--; n >= 0; n--) | |
416 | switch (classes[n]) | |
417 | { | |
418 | case X86_64_INTEGER_CLASS: | |
419 | case X86_64_INTEGERSI_CLASS: | |
420 | (*int_nregs)++; | |
421 | break; | |
422 | case X86_64_SSE_CLASS: | |
423 | case X86_64_SSESF_CLASS: | |
424 | case X86_64_SSEDF_CLASS: | |
425 | (*sse_nregs)++; | |
426 | break; | |
427 | case X86_64_NO_CLASS: | |
428 | case X86_64_SSEUP_CLASS: | |
429 | case X86_64_X87_CLASS: | |
430 | case X86_64_X87UP_CLASS: | |
431 | break; | |
432 | case X86_64_MEMORY_CLASS: | |
ce0eebec AC |
433 | internal_error (__FILE__, __LINE__, |
434 | "examine_argument: unexpected memory class"); | |
53e95fcf JS |
435 | } |
436 | return 1; | |
437 | } | |
438 | ||
439 | #define RET_INT_REGS 2 | |
440 | #define RET_SSE_REGS 2 | |
441 | ||
442 | /* Check if the structure in value_type is returned in registers or in | |
443 | memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and | |
444 | EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE | |
445 | will be used. */ | |
446 | int | |
447 | x86_64_use_struct_convention (int gcc_p, struct type *value_type) | |
448 | { | |
449 | enum x86_64_reg_class class[MAX_CLASSES]; | |
450 | int n = classify_argument (value_type, class, 0); | |
451 | int needed_intregs; | |
452 | int needed_sseregs; | |
453 | ||
454 | return (!n || | |
455 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || | |
456 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS); | |
457 | } | |
458 | ||
459 | ||
460 | /* Extract from an array REGBUF containing the (raw) register state, a | |
461 | function return value of TYPE, and copy that, in virtual format, | |
462 | into VALBUF. */ | |
463 | ||
464 | void | |
465 | x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf) | |
466 | { | |
467 | enum x86_64_reg_class class[MAX_CLASSES]; | |
468 | int n = classify_argument (type, class, 0); | |
469 | int needed_intregs; | |
470 | int needed_sseregs; | |
471 | int intreg = 0; | |
472 | int ssereg = 0; | |
473 | int offset = 0; | |
474 | int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM }; | |
475 | int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM }; | |
476 | ||
477 | if (!n || | |
478 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || | |
479 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS) | |
480 | { /* memory class */ | |
481 | CORE_ADDR addr; | |
482 | memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM)); | |
483 | read_memory (addr, valbuf, TYPE_LENGTH (type)); | |
484 | return; | |
485 | } | |
486 | else | |
487 | { | |
488 | int i; | |
489 | for (i = 0; i < n; i++) | |
490 | { | |
491 | switch (class[i]) | |
492 | { | |
493 | case X86_64_NO_CLASS: | |
494 | break; | |
495 | case X86_64_INTEGER_CLASS: | |
496 | memcpy (valbuf + offset, | |
497 | regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]), | |
498 | 8); | |
499 | offset += 8; | |
500 | intreg += 2; | |
501 | break; | |
502 | case X86_64_INTEGERSI_CLASS: | |
503 | memcpy (valbuf + offset, | |
504 | regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4); | |
505 | offset += 8; | |
506 | intreg++; | |
507 | break; | |
508 | case X86_64_SSEDF_CLASS: | |
509 | case X86_64_SSESF_CLASS: | |
510 | case X86_64_SSE_CLASS: | |
511 | memcpy (valbuf + offset, | |
512 | regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]), | |
513 | 8); | |
514 | offset += 8; | |
515 | ssereg += 2; | |
516 | break; | |
517 | case X86_64_SSEUP_CLASS: | |
518 | memcpy (valbuf + offset + 8, | |
519 | regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8); | |
520 | offset += 8; | |
521 | ssereg++; | |
522 | break; | |
523 | case X86_64_X87_CLASS: | |
524 | memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM), | |
525 | 8); | |
526 | offset += 8; | |
527 | break; | |
528 | case X86_64_X87UP_CLASS: | |
529 | memcpy (valbuf + offset, | |
530 | regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8); | |
531 | offset += 8; | |
532 | break; | |
533 | case X86_64_MEMORY_CLASS: | |
534 | default: | |
535 | internal_error (__FILE__, __LINE__, | |
536 | "Unexpected argument class"); | |
537 | } | |
538 | } | |
539 | } | |
540 | } | |
541 | ||
542 | /* Handled by unwind informations. */ | |
543 | static void | |
544 | x86_64_frame_init_saved_regs (struct frame_info *fi) | |
545 | { | |
546 | } | |
547 | ||
548 | #define INT_REGS 6 | |
549 | #define SSE_REGS 16 | |
550 | ||
53e95fcf | 551 | CORE_ADDR |
d45fc520 | 552 | x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
53e95fcf JS |
553 | int struct_return, CORE_ADDR struct_addr) |
554 | { | |
555 | int intreg = 0; | |
556 | int ssereg = 0; | |
557 | int i; | |
ce0eebec AC |
558 | static int int_parameter_registers[INT_REGS] = { |
559 | 5 /*RDI*/, 4 /*RSI*/, | |
560 | 1 /*RDX*/, 2 /*RCX*/, | |
561 | 8 /*R8 */ , 9 /*R9 */ | |
562 | }; | |
53e95fcf | 563 | /* XMM0 - XMM15 */ |
ce0eebec AC |
564 | static int sse_parameter_registers[SSE_REGS] = { |
565 | 34, 35, 36, 37, | |
566 | 38, 39, 40, 41, | |
567 | 42, 43, 44, 45, | |
568 | 46, 47, 48, 49 | |
569 | }; | |
570 | int stack_values_count = 0; | |
82dbc5f7 | 571 | int *stack_values; |
e9f30c21 | 572 | stack_values = alloca (nargs * sizeof (int)); |
53e95fcf JS |
573 | for (i = 0; i < nargs; i++) |
574 | { | |
575 | enum x86_64_reg_class class[MAX_CLASSES]; | |
576 | int n = classify_argument (args[i]->type, class, 0); | |
577 | int needed_intregs; | |
578 | int needed_sseregs; | |
579 | ||
580 | if (!n || | |
581 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) | |
82dbc5f7 AC |
582 | || intreg / 2 + needed_intregs > INT_REGS |
583 | || ssereg / 2 + needed_sseregs > SSE_REGS) | |
ce0eebec AC |
584 | { /* memory class */ |
585 | stack_values[stack_values_count++] = i; | |
53e95fcf JS |
586 | } |
587 | else | |
588 | { | |
589 | int j; | |
590 | for (j = 0; j < n; j++) | |
591 | { | |
592 | int offset = 0; | |
593 | switch (class[j]) | |
594 | { | |
595 | case X86_64_NO_CLASS: | |
596 | break; | |
597 | case X86_64_INTEGER_CLASS: | |
ce0eebec AC |
598 | write_register_gen (int_parameter_registers |
599 | [(intreg + 1) / 2], | |
53e95fcf JS |
600 | VALUE_CONTENTS_ALL (args[i]) + offset); |
601 | offset += 8; | |
602 | intreg += 2; | |
603 | break; | |
604 | case X86_64_INTEGERSI_CLASS: | |
605 | write_register_gen (int_parameter_registers[intreg / 2], | |
606 | VALUE_CONTENTS_ALL (args[i]) + offset); | |
607 | offset += 8; | |
608 | intreg++; | |
609 | break; | |
610 | case X86_64_SSEDF_CLASS: | |
611 | case X86_64_SSESF_CLASS: | |
612 | case X86_64_SSE_CLASS: | |
ce0eebec AC |
613 | write_register_gen (sse_parameter_registers |
614 | [(ssereg + 1) / 2], | |
53e95fcf JS |
615 | VALUE_CONTENTS_ALL (args[i]) + offset); |
616 | offset += 8; | |
617 | ssereg += 2; | |
618 | break; | |
619 | case X86_64_SSEUP_CLASS: | |
620 | write_register_gen (sse_parameter_registers[ssereg / 2], | |
621 | VALUE_CONTENTS_ALL (args[i]) + offset); | |
622 | offset += 8; | |
623 | ssereg++; | |
624 | break; | |
625 | case X86_64_X87_CLASS: | |
53e95fcf | 626 | case X86_64_MEMORY_CLASS: |
ce0eebec | 627 | stack_values[stack_values_count++] = i; |
82dbc5f7 AC |
628 | break; |
629 | case X86_64_X87UP_CLASS: | |
53e95fcf JS |
630 | break; |
631 | default: | |
632 | internal_error (__FILE__, __LINE__, | |
633 | "Unexpected argument class"); | |
634 | } | |
635 | intreg += intreg % 2; | |
636 | ssereg += ssereg % 2; | |
637 | } | |
638 | } | |
639 | } | |
82dbc5f7 AC |
640 | while (--stack_values_count >= 0) |
641 | { | |
e9f30c21 | 642 | struct value *arg = args[stack_values[stack_values_count]]; |
82dbc5f7 AC |
643 | int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg)); |
644 | len += 7; | |
645 | len -= len % 8; | |
646 | sp -= len; | |
647 | write_memory (sp, VALUE_CONTENTS_ALL (arg), len); | |
648 | } | |
53e95fcf JS |
649 | return sp; |
650 | } | |
651 | ||
652 | /* Write into the appropriate registers a function return value stored | |
653 | in VALBUF of type TYPE, given in virtual format. */ | |
654 | void | |
655 | x86_64_store_return_value (struct type *type, char *valbuf) | |
656 | { | |
657 | int len = TYPE_LENGTH (type); | |
658 | ||
659 | if (TYPE_CODE_FLT == TYPE_CODE (type)) | |
660 | { | |
661 | /* Floating-point return values can be found in %st(0). */ | |
662 | if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT | |
663 | && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext) | |
664 | { | |
665 | /* Copy straight over. */ | |
666 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf, | |
667 | FPU_REG_RAW_SIZE); | |
668 | } | |
669 | else | |
670 | { | |
671 | char buf[FPU_REG_RAW_SIZE]; | |
672 | DOUBLEST val; | |
673 | ||
674 | /* Convert the value found in VALBUF to the extended | |
675 | floating point format used by the FPU. This is probably | |
676 | not exactly how it would happen on the target itself, but | |
677 | it is the best we can do. */ | |
678 | val = extract_floating (valbuf, TYPE_LENGTH (type)); | |
679 | floatformat_from_doublest (&floatformat_i387_ext, &val, buf); | |
680 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf, | |
681 | FPU_REG_RAW_SIZE); | |
682 | } | |
683 | } | |
684 | else | |
685 | { | |
686 | int low_size = REGISTER_RAW_SIZE (0); | |
687 | int high_size = REGISTER_RAW_SIZE (1); | |
688 | ||
689 | if (len <= low_size) | |
690 | write_register_bytes (REGISTER_BYTE (0), valbuf, len); | |
691 | else if (len <= (low_size + high_size)) | |
692 | { | |
693 | write_register_bytes (REGISTER_BYTE (0), valbuf, low_size); | |
694 | write_register_bytes (REGISTER_BYTE (1), | |
695 | valbuf + low_size, len - low_size); | |
696 | } | |
697 | else | |
698 | internal_error (__FILE__, __LINE__, | |
699 | "Cannot store return value of %d bytes long.", len); | |
700 | } | |
701 | } | |
702 | \f | |
703 | ||
704 | static char * | |
705 | x86_64_register_name (int reg_nr) | |
706 | { | |
707 | static char *register_names[] = { | |
708 | "rax", "rdx", "rcx", "rbx", | |
709 | "rsi", "rdi", "rbp", "rsp", | |
710 | "r8", "r9", "r10", "r11", | |
711 | "r12", "r13", "r14", "r15", | |
712 | "rip", "eflags", | |
713 | "st0", "st1", "st2", "st3", | |
714 | "st4", "st5", "st6", "st7", | |
715 | "fctrl", "fstat", "ftag", "fiseg", | |
716 | "fioff", "foseg", "fooff", "fop", | |
717 | "xmm0", "xmm1", "xmm2", "xmm3", | |
718 | "xmm4", "xmm5", "xmm6", "xmm7", | |
719 | "xmm8", "xmm9", "xmm10", "xmm11", | |
720 | "xmm12", "xmm13", "xmm14", "xmm15", | |
721 | "mxcsr" | |
722 | }; | |
723 | if (reg_nr < 0) | |
724 | return NULL; | |
725 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
726 | return NULL; | |
727 | return register_names[reg_nr]; | |
728 | } | |
729 | \f | |
730 | ||
731 | ||
732 | /* We have two flavours of disassembly. The machinery on this page | |
733 | deals with switching between those. */ | |
734 | ||
735 | static int | |
736 | gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info) | |
737 | { | |
738 | if (disassembly_flavour == att_flavour) | |
739 | return print_insn_i386_att (memaddr, info); | |
740 | else if (disassembly_flavour == intel_flavour) | |
741 | return print_insn_i386_intel (memaddr, info); | |
742 | /* Never reached -- disassembly_flavour is always either att_flavour | |
743 | or intel_flavour. */ | |
744 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); | |
745 | } | |
746 | \f | |
747 | ||
748 | /* Store the address of the place in which to copy the structure the | |
749 | subroutine will return. This is called from call_function. */ | |
750 | void | |
751 | x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
752 | { | |
753 | write_register (RDI_REGNUM, addr); | |
754 | } | |
755 | ||
756 | int | |
757 | x86_64_frameless_function_invocation (struct frame_info *frame) | |
758 | { | |
759 | return 0; | |
760 | } | |
761 | ||
762 | /* On x86_64 there are no reasonable prologs. */ | |
763 | CORE_ADDR | |
764 | x86_64_skip_prologue (CORE_ADDR pc) | |
765 | { | |
766 | return pc; | |
767 | } | |
768 | ||
769 | /* Sequence of bytes for breakpoint instruction. */ | |
770 | static unsigned char * | |
771 | x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr) | |
772 | { | |
773 | static unsigned char breakpoint[] = { 0xcc }; | |
774 | *lenptr = 1; | |
775 | return breakpoint; | |
776 | } | |
777 | ||
778 | static struct gdbarch * | |
779 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
780 | { | |
781 | struct gdbarch *gdbarch; | |
782 | struct gdbarch_tdep *tdep; | |
783 | ||
784 | /* Find a candidate among the list of pre-declared architectures. */ | |
785 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
786 | arches != NULL; | |
787 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
788 | { | |
789 | switch (info.bfd_arch_info->mach) | |
790 | { | |
791 | case bfd_mach_x86_64: | |
792 | case bfd_mach_x86_64_intel_syntax: | |
793 | switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach) | |
794 | { | |
795 | case bfd_mach_x86_64: | |
796 | case bfd_mach_x86_64_intel_syntax: | |
797 | return arches->gdbarch; | |
798 | case bfd_mach_i386_i386: | |
799 | case bfd_mach_i386_i8086: | |
800 | case bfd_mach_i386_i386_intel_syntax: | |
801 | break; | |
802 | default: | |
803 | internal_error (__FILE__, __LINE__, | |
804 | "i386_gdbarch_init: unknown machine type"); | |
805 | } | |
806 | break; | |
807 | case bfd_mach_i386_i386: | |
808 | case bfd_mach_i386_i8086: | |
809 | case bfd_mach_i386_i386_intel_syntax: | |
810 | switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach) | |
811 | { | |
812 | case bfd_mach_x86_64: | |
813 | case bfd_mach_x86_64_intel_syntax: | |
814 | break; | |
815 | case bfd_mach_i386_i386: | |
816 | case bfd_mach_i386_i8086: | |
817 | case bfd_mach_i386_i386_intel_syntax: | |
818 | return arches->gdbarch; | |
819 | default: | |
820 | internal_error (__FILE__, __LINE__, | |
821 | "i386_gdbarch_init: unknown machine type"); | |
822 | } | |
823 | break; | |
824 | default: | |
825 | internal_error (__FILE__, __LINE__, | |
826 | "i386_gdbarch_init: unknown machine type"); | |
827 | } | |
828 | } | |
829 | ||
830 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
831 | gdbarch = gdbarch_alloc (&info, tdep); | |
832 | ||
833 | switch (info.bfd_arch_info->mach) | |
834 | { | |
835 | case bfd_mach_x86_64: | |
836 | case bfd_mach_x86_64_intel_syntax: | |
96297dab | 837 | tdep->num_xmm_regs = 16; |
53e95fcf JS |
838 | break; |
839 | case bfd_mach_i386_i386: | |
840 | case bfd_mach_i386_i8086: | |
841 | case bfd_mach_i386_i386_intel_syntax: | |
842 | /* This is place for definition of i386 target vector. */ | |
843 | break; | |
844 | default: | |
845 | internal_error (__FILE__, __LINE__, | |
846 | "i386_gdbarch_init: unknown machine type"); | |
847 | } | |
848 | ||
849 | set_gdbarch_long_bit (gdbarch, 64); | |
850 | set_gdbarch_long_long_bit (gdbarch, 64); | |
851 | set_gdbarch_ptr_bit (gdbarch, 64); | |
852 | ||
853 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
53e95fcf JS |
854 | |
855 | set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS); | |
856 | set_gdbarch_register_name (gdbarch, x86_64_register_name); | |
857 | set_gdbarch_register_size (gdbarch, 8); | |
858 | set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size); | |
859 | set_gdbarch_max_register_raw_size (gdbarch, 16); | |
860 | set_gdbarch_register_byte (gdbarch, x86_64_register_byte); | |
861 | /* Total amount of space needed to store our copies of the machine's register | |
862 | (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */ | |
863 | set_gdbarch_register_bytes (gdbarch, | |
82dbc5f7 | 864 | (18 * 8) + (8 * 10) + (8 * 4) + (16 * 16 + 4)); |
0e7c5946 | 865 | set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size); |
53e95fcf JS |
866 | set_gdbarch_max_register_virtual_size (gdbarch, 16); |
867 | ||
868 | set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type); | |
869 | ||
870 | set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible); | |
871 | set_gdbarch_register_convert_to_virtual (gdbarch, | |
872 | x86_64_register_convert_to_virtual); | |
873 | set_gdbarch_register_convert_to_raw (gdbarch, | |
874 | x86_64_register_convert_to_raw); | |
875 | ||
876 | /* Register numbers of various important registers. */ | |
877 | set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */ | |
878 | set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */ | |
879 | set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */ | |
880 | ||
881 | set_gdbarch_fp0_regnum (gdbarch, 18); /* First FPU floating-point register. */ | |
882 | ||
883 | set_gdbarch_read_fp (gdbarch, cfi_read_fp); | |
884 | set_gdbarch_write_fp (gdbarch, cfi_write_fp); | |
885 | ||
886 | /* Discard from the stack the innermost frame, restoring all registers. */ | |
887 | set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame); | |
888 | ||
889 | /* FRAME_CHAIN takes a frame's nominal address and produces the frame's | |
890 | chain-pointer. */ | |
891 | set_gdbarch_frame_chain (gdbarch, cfi_frame_chain); | |
892 | ||
893 | set_gdbarch_frameless_function_invocation (gdbarch, | |
894 | x86_64_frameless_function_invocation); | |
895 | set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc); | |
896 | ||
897 | set_gdbarch_frame_args_address (gdbarch, default_frame_address); | |
898 | set_gdbarch_frame_locals_address (gdbarch, default_frame_address); | |
899 | ||
900 | /* Return number of bytes at start of arglist that are not really args. */ | |
901 | set_gdbarch_frame_args_skip (gdbarch, 8); | |
902 | ||
903 | set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); | |
904 | ||
905 | /* Frame pc initialization is handled by unwind informations. */ | |
906 | set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc); | |
907 | ||
908 | /* Initialization of unwind informations. */ | |
909 | set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info); | |
910 | ||
911 | /* Getting saved registers is handled by unwind informations. */ | |
912 | set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register); | |
913 | ||
914 | set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); | |
915 | ||
916 | /* Cons up virtual frame pointer for trace */ | |
917 | set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer); | |
918 | ||
919 | ||
920 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); | |
921 | ||
922 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
923 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
924 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
925 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
926 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
927 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
928 | set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point); | |
929 | set_gdbarch_call_dummy_words (gdbarch, 0); | |
930 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); | |
931 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
932 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
933 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
934 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
935 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
936 | set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address); | |
937 | set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments); | |
938 | ||
939 | /* Return number of args passed to a frame, no way to tell. */ | |
940 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
941 | /* Don't use default structure extract routine */ | |
942 | set_gdbarch_extract_struct_value_address (gdbarch, 0); | |
943 | ||
944 | /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE | |
945 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is | |
946 | the case when structure is returned in registers. */ | |
947 | set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention); | |
948 | ||
949 | /* Store the address of the place in which to copy the structure the | |
950 | subroutine will return. This is called from call_function. */ | |
951 | set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return); | |
952 | ||
953 | /* Extract from an array REGBUF containing the (raw) register state | |
954 | a function return value of type TYPE, and copy that, in virtual format, | |
955 | into VALBUF. */ | |
956 | set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value); | |
957 | ||
958 | ||
959 | /* Write into the appropriate registers a function return value stored | |
960 | in VALBUF of type TYPE, given in virtual format. */ | |
961 | set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value); | |
962 | \f | |
963 | ||
964 | /* Offset from address of function to start of its code. */ | |
965 | set_gdbarch_function_start_offset (gdbarch, 0); | |
966 | ||
967 | set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue); | |
968 | ||
969 | set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call); | |
970 | ||
971 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
972 | ||
973 | set_gdbarch_breakpoint_from_pc (gdbarch, x86_64_breakpoint_from_pc); | |
974 | ||
975 | ||
976 | /* Amount PC must be decremented by after a breakpoint. This is often the | |
977 | number of bytes in BREAKPOINT but not always. */ | |
978 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
979 | ||
b6af0555 JS |
980 | /* Use dwarf2 debug frame informations. */ |
981 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); | |
53e95fcf JS |
982 | return gdbarch; |
983 | } | |
984 | ||
985 | void | |
986 | _initialize_x86_64_tdep (void) | |
987 | { | |
988 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); | |
989 | ||
990 | /* Initialize the table saying where each register starts in the | |
991 | register file. */ | |
992 | { | |
993 | int i, offset; | |
994 | ||
995 | offset = 0; | |
996 | for (i = 0; i < X86_64_NUM_REGS; i++) | |
997 | { | |
998 | x86_64_register_byte_table[i] = offset; | |
999 | offset += x86_64_register_raw_size_table[i]; | |
1000 | } | |
1001 | } | |
1002 | ||
1003 | tm_print_insn = gdb_print_insn_x86_64; | |
1004 | tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach; | |
1005 | ||
1006 | /* Add the variable that controls the disassembly flavour. */ | |
1007 | { | |
1008 | struct cmd_list_element *new_cmd; | |
1009 | ||
1010 | new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class, | |
1011 | valid_flavours, &disassembly_flavour, "\ | |
1012 | Set the disassembly flavour, the valid values are \"att\" and \"intel\", \ | |
1013 | and the default value is \"att\".", &setlist); | |
1014 | add_show_from_set (new_cmd, &showlist); | |
1015 | } | |
1016 | } |