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53e95fcf JS |
1 | /* Target-dependent code for the x86-64 for GDB, the GNU debugger. |
2 | Copyright 2001 | |
3 | Free Software Foundation, Inc. | |
4 | Contributed by Jiri Smid, SuSE Labs. | |
5 | ||
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
24 | #include "inferior.h" | |
25 | #include "gdbcore.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "arch-utils.h" | |
28 | #include "regcache.h" | |
29 | #include "symfile.h" | |
30 | #include "x86-64-tdep.h" | |
31 | #include "dwarf2cfi.h" | |
fd0407d6 | 32 | #include "value.h" |
53e95fcf JS |
33 | |
34 | ||
35 | /* Register numbers of various important registers. */ | |
36 | #define RAX_REGNUM 0 | |
37 | #define RDX_REGNUM 1 | |
38 | #define RDI_REGNUM 5 | |
39 | #define EFLAGS_REGNUM 17 | |
40 | #define XMM1_REGNUM 35 | |
41 | ||
42 | /* x86_64_register_raw_size_table[i] is the number of bytes of storage in | |
43 | GDB's register array occupied by register i. */ | |
44 | int x86_64_register_raw_size_table[X86_64_NUM_REGS] = { | |
45 | 8, 8, 8, 8, | |
46 | 8, 8, 8, 8, | |
47 | 8, 8, 8, 8, | |
48 | 8, 8, 8, 8, | |
49 | 8, 4, | |
50 | 10, 10, 10, 10, | |
51 | 10, 10, 10, 10, | |
52 | 4, 4, 4, 4, | |
53 | 4, 4, 4, 4, | |
54 | 16, 16, 16, 16, | |
55 | 16, 16, 16, 16, | |
56 | 16, 16, 16, 16, | |
57 | 16, 16, 16, 16, | |
58 | 4 | |
59 | }; | |
60 | ||
61 | /* Number of bytes of storage in the actual machine representation for | |
62 | register REGNO. */ | |
63 | int | |
64 | x86_64_register_raw_size (int regno) | |
65 | { | |
66 | return x86_64_register_raw_size_table[regno]; | |
67 | } | |
68 | ||
69 | /* x86_64_register_byte_table[i] is the offset into the register file of the | |
70 | start of register number i. We initialize this from | |
71 | x86_64_register_raw_size_table. */ | |
72 | int x86_64_register_byte_table[X86_64_NUM_REGS]; | |
73 | ||
74 | /* Index within `registers' of the first byte of the space for register REGNO. */ | |
75 | int | |
76 | x86_64_register_byte (int regno) | |
77 | { | |
78 | return x86_64_register_byte_table[regno]; | |
79 | } | |
80 | ||
81 | /* Return the GDB type object for the "standard" data type of data in | |
82 | register N. */ | |
83 | static struct type * | |
84 | x86_64_register_virtual_type (int regno) | |
85 | { | |
86 | if (regno == PC_REGNUM || regno == SP_REGNUM) | |
87 | return lookup_pointer_type (builtin_type_void); | |
88 | if (IS_FP_REGNUM (regno)) | |
89 | return builtin_type_long_double; | |
90 | if (IS_SSE_REGNUM (regno)) | |
91 | return builtin_type_v4sf; | |
92 | if (IS_FPU_CTRL_REGNUM (regno) || regno == MXCSR_REGNUM | |
93 | || regno == EFLAGS_REGNUM) | |
94 | return builtin_type_int; | |
95 | return builtin_type_long; | |
96 | } | |
97 | ||
53e95fcf JS |
98 | /* x86_64_register_convertible is true if register N's virtual format is |
99 | different from its raw format. Note that this definition assumes | |
100 | that the host supports IEEE 32-bit floats, since it doesn't say | |
101 | that SSE registers need conversion. Even if we can't find a | |
102 | counterexample, this is still sloppy. */ | |
103 | int | |
104 | x86_64_register_convertible (int regno) | |
105 | { | |
106 | return IS_FP_REGNUM (regno); | |
107 | } | |
108 | ||
109 | /* Convert data from raw format for register REGNUM in buffer FROM to | |
110 | virtual format with type TYPE in buffer TO. In principle both | |
111 | formats are identical except that the virtual format has two extra | |
112 | bytes appended that aren't used. We set these to zero. */ | |
113 | void | |
114 | x86_64_register_convert_to_virtual (int regnum, struct type *type, | |
115 | char *from, char *to) | |
116 | { | |
117 | /* Copy straight over, but take care of the padding. */ | |
118 | memcpy (to, from, FPU_REG_RAW_SIZE); | |
119 | memset (to + FPU_REG_RAW_SIZE, 0, TYPE_LENGTH (type) - FPU_REG_RAW_SIZE); | |
120 | } | |
121 | ||
122 | /* Convert data from virtual format with type TYPE in buffer FROM to | |
123 | raw format for register REGNUM in buffer TO. Simply omit the two | |
124 | unused bytes. */ | |
125 | ||
126 | void | |
127 | x86_64_register_convert_to_raw (struct type *type, int regnum, | |
128 | char *from, char *to) | |
129 | { | |
130 | memcpy (to, from, FPU_REG_RAW_SIZE); | |
131 | } | |
132 | \f | |
133 | ||
134 | /* This is the variable that is set with "set disassembly-flavour", and | |
135 | its legitimate values. */ | |
136 | static const char att_flavour[] = "att"; | |
137 | static const char intel_flavour[] = "intel"; | |
138 | static const char *valid_flavours[] = { | |
139 | att_flavour, | |
140 | intel_flavour, | |
141 | NULL | |
142 | }; | |
143 | static const char *disassembly_flavour = att_flavour; | |
144 | ||
145 | static CORE_ADDR | |
146 | x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
147 | { | |
148 | char buf[8]; | |
149 | ||
150 | store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ()); | |
151 | ||
152 | write_memory (sp - 8, buf, 8); | |
153 | return sp - 8; | |
154 | } | |
155 | ||
156 | void | |
157 | x86_64_pop_frame (void) | |
158 | { | |
159 | generic_pop_current_frame (cfi_pop_frame); | |
160 | } | |
161 | \f | |
162 | ||
163 | /* The returning of values is done according to the special algorithm. | |
164 | Some types are returned in registers an some (big structures) in memory. | |
165 | See ABI for details. | |
166 | */ | |
167 | ||
168 | #define MAX_CLASSES 4 | |
169 | ||
170 | enum x86_64_reg_class | |
171 | { | |
172 | X86_64_NO_CLASS, | |
173 | X86_64_INTEGER_CLASS, | |
174 | X86_64_INTEGERSI_CLASS, | |
175 | X86_64_SSE_CLASS, | |
176 | X86_64_SSESF_CLASS, | |
177 | X86_64_SSEDF_CLASS, | |
178 | X86_64_SSEUP_CLASS, | |
179 | X86_64_X87_CLASS, | |
180 | X86_64_X87UP_CLASS, | |
181 | X86_64_MEMORY_CLASS | |
182 | }; | |
183 | ||
184 | /* Return the union class of CLASS1 and CLASS2. | |
185 | See the x86-64 ABI for details. */ | |
186 | ||
187 | static enum x86_64_reg_class | |
188 | merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2) | |
189 | { | |
190 | /* Rule #1: If both classes are equal, this is the resulting class. */ | |
191 | if (class1 == class2) | |
192 | return class1; | |
193 | ||
194 | /* Rule #2: If one of the classes is NO_CLASS, the resulting class is | |
195 | the other class. */ | |
196 | if (class1 == X86_64_NO_CLASS) | |
197 | return class2; | |
198 | if (class2 == X86_64_NO_CLASS) | |
199 | return class1; | |
200 | ||
201 | /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */ | |
202 | if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS) | |
203 | return X86_64_MEMORY_CLASS; | |
204 | ||
205 | /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */ | |
206 | if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS) | |
207 | || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS)) | |
208 | return X86_64_INTEGERSI_CLASS; | |
209 | if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS | |
210 | || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS) | |
211 | return X86_64_INTEGER_CLASS; | |
212 | ||
213 | /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */ | |
214 | if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS | |
215 | || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS) | |
216 | return X86_64_MEMORY_CLASS; | |
217 | ||
218 | /* Rule #6: Otherwise class SSE is used. */ | |
219 | return X86_64_SSE_CLASS; | |
220 | } | |
221 | ||
222 | ||
223 | /* Classify the argument type. | |
224 | CLASSES will be filled by the register class used to pass each word | |
225 | of the operand. The number of words is returned. In case the parameter | |
226 | should be passed in memory, 0 is returned. As a special case for zero | |
227 | sized containers, classes[0] will be NO_CLASS and 1 is returned. | |
228 | ||
229 | See the x86-64 PS ABI for details. | |
230 | */ | |
231 | ||
232 | static int | |
233 | classify_argument (struct type *type, | |
234 | enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset) | |
235 | { | |
236 | int bytes = TYPE_LENGTH (type); | |
237 | int words = (bytes + 8 - 1) / 8; | |
238 | ||
239 | switch (TYPE_CODE (type)) | |
240 | { | |
241 | case TYPE_CODE_ARRAY: | |
242 | case TYPE_CODE_STRUCT: | |
243 | case TYPE_CODE_UNION: | |
244 | { | |
245 | int i; | |
246 | enum x86_64_reg_class subclasses[MAX_CLASSES]; | |
247 | ||
248 | /* On x86-64 we pass structures larger than 16 bytes on the stack. */ | |
249 | if (bytes > 16) | |
250 | return 0; | |
251 | ||
252 | for (i = 0; i < words; i++) | |
253 | classes[i] = X86_64_NO_CLASS; | |
254 | ||
255 | /* Zero sized arrays or structures are NO_CLASS. We return 0 to | |
256 | signalize memory class, so handle it as special case. */ | |
257 | if (!words) | |
258 | { | |
259 | classes[0] = X86_64_NO_CLASS; | |
260 | return 1; | |
261 | } | |
262 | switch (TYPE_CODE (type)) | |
263 | { | |
264 | case TYPE_CODE_STRUCT: | |
265 | { | |
266 | int j; | |
267 | for (j = 0; j < type->nfields; ++j) | |
268 | { | |
269 | int num = classify_argument (type->fields[j].type, | |
270 | subclasses, | |
271 | (type->fields[j].loc.bitpos | |
272 | + bit_offset) % 256); | |
273 | if (!num) | |
274 | return 0; | |
275 | for (i = 0; i < num; i++) | |
276 | { | |
277 | int pos = | |
278 | (type->fields[j].loc.bitpos + bit_offset) / 8 / 8; | |
279 | classes[i + pos] = | |
280 | merge_classes (subclasses[i], classes[i + pos]); | |
281 | } | |
282 | } | |
283 | } | |
284 | break; | |
285 | case TYPE_CODE_ARRAY: | |
286 | { | |
287 | int num; | |
288 | ||
289 | num = classify_argument (type->target_type, | |
290 | subclasses, bit_offset); | |
291 | if (!num) | |
292 | return 0; | |
293 | ||
294 | /* The partial classes are now full classes. */ | |
295 | if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4) | |
296 | subclasses[0] = X86_64_SSE_CLASS; | |
297 | if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4) | |
298 | subclasses[0] = X86_64_INTEGER_CLASS; | |
299 | ||
300 | for (i = 0; i < words; i++) | |
301 | classes[i] = subclasses[i % num]; | |
302 | } | |
303 | break; | |
304 | case TYPE_CODE_UNION: | |
305 | { | |
306 | int j; | |
307 | { | |
308 | for (j = 0; j < type->nfields; ++j) | |
309 | { | |
310 | int num; | |
311 | num = classify_argument (type->fields[j].type, | |
312 | subclasses, bit_offset); | |
313 | if (!num) | |
314 | return 0; | |
315 | for (i = 0; i < num; i++) | |
316 | classes[i] = merge_classes (subclasses[i], classes[i]); | |
317 | } | |
318 | } | |
319 | } | |
320 | break; | |
321 | } | |
322 | /* Final merger cleanup. */ | |
323 | for (i = 0; i < words; i++) | |
324 | { | |
325 | /* If one class is MEMORY, everything should be passed in | |
326 | memory. */ | |
327 | if (classes[i] == X86_64_MEMORY_CLASS) | |
328 | return 0; | |
329 | ||
330 | /* The X86_64_SSEUP_CLASS should be always preceeded by | |
331 | X86_64_SSE_CLASS. */ | |
332 | if (classes[i] == X86_64_SSEUP_CLASS | |
333 | && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS)) | |
334 | classes[i] = X86_64_SSE_CLASS; | |
335 | ||
336 | /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */ | |
337 | if (classes[i] == X86_64_X87UP_CLASS | |
338 | && (i == 0 || classes[i - 1] != X86_64_X87_CLASS)) | |
339 | classes[i] = X86_64_SSE_CLASS; | |
340 | } | |
341 | return words; | |
342 | } | |
343 | break; | |
344 | case TYPE_CODE_FLT: | |
345 | switch (bytes) | |
346 | { | |
347 | case 4: | |
348 | if (!(bit_offset % 64)) | |
349 | classes[0] = X86_64_SSESF_CLASS; | |
350 | else | |
351 | classes[0] = X86_64_SSE_CLASS; | |
352 | return 1; | |
353 | case 8: | |
354 | classes[0] = X86_64_SSEDF_CLASS; | |
355 | return 1; | |
356 | case 16: | |
357 | classes[0] = X86_64_X87_CLASS; | |
358 | classes[1] = X86_64_X87UP_CLASS; | |
359 | return 2; | |
360 | } | |
361 | break; | |
362 | case TYPE_CODE_INT: | |
363 | case TYPE_CODE_PTR: | |
364 | switch (bytes) | |
365 | { | |
366 | case 1: | |
367 | case 2: | |
368 | case 4: | |
369 | case 8: | |
370 | if (bytes * 8 + bit_offset <= 32) | |
371 | classes[0] = X86_64_INTEGERSI_CLASS; | |
372 | else | |
373 | classes[0] = X86_64_INTEGER_CLASS; | |
374 | return 1; | |
375 | case 16: | |
376 | classes[0] = classes[1] = X86_64_INTEGER_CLASS; | |
377 | return 2; | |
378 | default: | |
379 | break; | |
380 | } | |
381 | case TYPE_CODE_VOID: | |
382 | return 0; | |
383 | } | |
384 | internal_error (__FILE__, __LINE__, "classify_argument: unknown argument type"); | |
385 | } | |
386 | ||
387 | /* Examine the argument and return set number of register required in each | |
388 | class. Return 0 ifif parameter should be passed in memory. */ | |
389 | ||
390 | static int | |
391 | examine_argument (enum x86_64_reg_class classes[MAX_CLASSES], | |
392 | int n, int *int_nregs, int *sse_nregs) | |
393 | { | |
394 | *int_nregs = 0; | |
395 | *sse_nregs = 0; | |
396 | if (!n) | |
397 | return 0; | |
398 | for (n--; n >= 0; n--) | |
399 | switch (classes[n]) | |
400 | { | |
401 | case X86_64_INTEGER_CLASS: | |
402 | case X86_64_INTEGERSI_CLASS: | |
403 | (*int_nregs)++; | |
404 | break; | |
405 | case X86_64_SSE_CLASS: | |
406 | case X86_64_SSESF_CLASS: | |
407 | case X86_64_SSEDF_CLASS: | |
408 | (*sse_nregs)++; | |
409 | break; | |
410 | case X86_64_NO_CLASS: | |
411 | case X86_64_SSEUP_CLASS: | |
412 | case X86_64_X87_CLASS: | |
413 | case X86_64_X87UP_CLASS: | |
414 | break; | |
415 | case X86_64_MEMORY_CLASS: | |
416 | internal_error (__FILE__, __LINE__, "examine_argument: unexpected memory class"); | |
417 | } | |
418 | return 1; | |
419 | } | |
420 | ||
421 | #define RET_INT_REGS 2 | |
422 | #define RET_SSE_REGS 2 | |
423 | ||
424 | /* Check if the structure in value_type is returned in registers or in | |
425 | memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and | |
426 | EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE | |
427 | will be used. */ | |
428 | int | |
429 | x86_64_use_struct_convention (int gcc_p, struct type *value_type) | |
430 | { | |
431 | enum x86_64_reg_class class[MAX_CLASSES]; | |
432 | int n = classify_argument (value_type, class, 0); | |
433 | int needed_intregs; | |
434 | int needed_sseregs; | |
435 | ||
436 | return (!n || | |
437 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || | |
438 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS); | |
439 | } | |
440 | ||
441 | ||
442 | /* Extract from an array REGBUF containing the (raw) register state, a | |
443 | function return value of TYPE, and copy that, in virtual format, | |
444 | into VALBUF. */ | |
445 | ||
446 | void | |
447 | x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf) | |
448 | { | |
449 | enum x86_64_reg_class class[MAX_CLASSES]; | |
450 | int n = classify_argument (type, class, 0); | |
451 | int needed_intregs; | |
452 | int needed_sseregs; | |
453 | int intreg = 0; | |
454 | int ssereg = 0; | |
455 | int offset = 0; | |
456 | int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM }; | |
457 | int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM }; | |
458 | ||
459 | if (!n || | |
460 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) || | |
461 | needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS) | |
462 | { /* memory class */ | |
463 | CORE_ADDR addr; | |
464 | memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM)); | |
465 | read_memory (addr, valbuf, TYPE_LENGTH (type)); | |
466 | return; | |
467 | } | |
468 | else | |
469 | { | |
470 | int i; | |
471 | for (i = 0; i < n; i++) | |
472 | { | |
473 | switch (class[i]) | |
474 | { | |
475 | case X86_64_NO_CLASS: | |
476 | break; | |
477 | case X86_64_INTEGER_CLASS: | |
478 | memcpy (valbuf + offset, | |
479 | regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]), | |
480 | 8); | |
481 | offset += 8; | |
482 | intreg += 2; | |
483 | break; | |
484 | case X86_64_INTEGERSI_CLASS: | |
485 | memcpy (valbuf + offset, | |
486 | regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4); | |
487 | offset += 8; | |
488 | intreg++; | |
489 | break; | |
490 | case X86_64_SSEDF_CLASS: | |
491 | case X86_64_SSESF_CLASS: | |
492 | case X86_64_SSE_CLASS: | |
493 | memcpy (valbuf + offset, | |
494 | regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]), | |
495 | 8); | |
496 | offset += 8; | |
497 | ssereg += 2; | |
498 | break; | |
499 | case X86_64_SSEUP_CLASS: | |
500 | memcpy (valbuf + offset + 8, | |
501 | regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8); | |
502 | offset += 8; | |
503 | ssereg++; | |
504 | break; | |
505 | case X86_64_X87_CLASS: | |
506 | memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM), | |
507 | 8); | |
508 | offset += 8; | |
509 | break; | |
510 | case X86_64_X87UP_CLASS: | |
511 | memcpy (valbuf + offset, | |
512 | regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8); | |
513 | offset += 8; | |
514 | break; | |
515 | case X86_64_MEMORY_CLASS: | |
516 | default: | |
517 | internal_error (__FILE__, __LINE__, | |
518 | "Unexpected argument class"); | |
519 | } | |
520 | } | |
521 | } | |
522 | } | |
523 | ||
524 | /* Handled by unwind informations. */ | |
525 | static void | |
526 | x86_64_frame_init_saved_regs (struct frame_info *fi) | |
527 | { | |
528 | } | |
529 | ||
530 | #define INT_REGS 6 | |
531 | #define SSE_REGS 16 | |
532 | ||
533 | /* Push onto the stack the specified value VALUE. Pad it correctly for | |
534 | it to be an argument to a function. */ | |
535 | ||
536 | static CORE_ADDR | |
d45fc520 | 537 | value_push (register CORE_ADDR sp, struct value *arg) |
53e95fcf JS |
538 | { |
539 | register int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg)); | |
540 | register int container_len = len; | |
541 | ||
542 | /* How big is the container we're going to put this value in? */ | |
543 | if (PARM_BOUNDARY) | |
544 | container_len = ((len + PARM_BOUNDARY / TARGET_CHAR_BIT - 1) | |
545 | & ~(PARM_BOUNDARY / TARGET_CHAR_BIT - 1)); | |
546 | ||
547 | sp -= container_len; | |
548 | write_memory (sp, VALUE_CONTENTS_ALL (arg), len); | |
549 | ||
550 | return sp; | |
551 | } | |
552 | ||
553 | CORE_ADDR | |
d45fc520 | 554 | x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
53e95fcf JS |
555 | int struct_return, CORE_ADDR struct_addr) |
556 | { | |
557 | int intreg = 0; | |
558 | int ssereg = 0; | |
559 | int i; | |
560 | static int int_parameter_registers[INT_REGS] = {5 /*RDI*/, 4 /*RSI*/, | |
561 | 1 /*RDX*/, 2 /*RCX*/, | |
562 | 8 /*R8 */, 9 /*R9 */}; | |
563 | /* XMM0 - XMM15 */ | |
564 | static int sse_parameter_registers[SSE_REGS] = {34, 35, 36, 37, | |
565 | 38, 39, 40, 41, | |
566 | 42, 43, 44, 45, | |
567 | 46, 47, 48, 49}; | |
568 | for (i = 0; i < nargs; i++) | |
569 | { | |
570 | enum x86_64_reg_class class[MAX_CLASSES]; | |
571 | int n = classify_argument (args[i]->type, class, 0); | |
572 | int needed_intregs; | |
573 | int needed_sseregs; | |
574 | ||
575 | if (!n || | |
576 | !examine_argument (class, n, &needed_intregs, &needed_sseregs) | |
577 | || intreg + needed_intregs > INT_REGS | |
578 | || ssereg + needed_sseregs > SSE_REGS) | |
579 | { /* memory class */ | |
580 | sp = value_push (sp, args[i]); | |
581 | } | |
582 | else | |
583 | { | |
584 | int j; | |
585 | for (j = 0; j < n; j++) | |
586 | { | |
587 | int offset = 0; | |
588 | switch (class[j]) | |
589 | { | |
590 | case X86_64_NO_CLASS: | |
591 | break; | |
592 | case X86_64_INTEGER_CLASS: | |
593 | write_register_gen (int_parameter_registers[(intreg + 1) / 2], | |
594 | VALUE_CONTENTS_ALL (args[i]) + offset); | |
595 | offset += 8; | |
596 | intreg += 2; | |
597 | break; | |
598 | case X86_64_INTEGERSI_CLASS: | |
599 | write_register_gen (int_parameter_registers[intreg / 2], | |
600 | VALUE_CONTENTS_ALL (args[i]) + offset); | |
601 | offset += 8; | |
602 | intreg++; | |
603 | break; | |
604 | case X86_64_SSEDF_CLASS: | |
605 | case X86_64_SSESF_CLASS: | |
606 | case X86_64_SSE_CLASS: | |
607 | write_register_gen (sse_parameter_registers[(ssereg + 1) / 2], | |
608 | VALUE_CONTENTS_ALL (args[i]) + offset); | |
609 | offset += 8; | |
610 | ssereg += 2; | |
611 | break; | |
612 | case X86_64_SSEUP_CLASS: | |
613 | write_register_gen (sse_parameter_registers[ssereg / 2], | |
614 | VALUE_CONTENTS_ALL (args[i]) + offset); | |
615 | offset += 8; | |
616 | ssereg++; | |
617 | break; | |
618 | case X86_64_X87_CLASS: | |
619 | case X86_64_X87UP_CLASS: | |
620 | case X86_64_MEMORY_CLASS: | |
621 | sp = value_push (sp, args[i]); | |
622 | break; | |
623 | default: | |
624 | internal_error (__FILE__, __LINE__, | |
625 | "Unexpected argument class"); | |
626 | } | |
627 | intreg += intreg % 2; | |
628 | ssereg += ssereg % 2; | |
629 | } | |
630 | } | |
631 | } | |
632 | return sp; | |
633 | } | |
634 | ||
635 | /* Write into the appropriate registers a function return value stored | |
636 | in VALBUF of type TYPE, given in virtual format. */ | |
637 | void | |
638 | x86_64_store_return_value (struct type *type, char *valbuf) | |
639 | { | |
640 | int len = TYPE_LENGTH (type); | |
641 | ||
642 | if (TYPE_CODE_FLT == TYPE_CODE (type)) | |
643 | { | |
644 | /* Floating-point return values can be found in %st(0). */ | |
645 | if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT | |
646 | && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext) | |
647 | { | |
648 | /* Copy straight over. */ | |
649 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf, | |
650 | FPU_REG_RAW_SIZE); | |
651 | } | |
652 | else | |
653 | { | |
654 | char buf[FPU_REG_RAW_SIZE]; | |
655 | DOUBLEST val; | |
656 | ||
657 | /* Convert the value found in VALBUF to the extended | |
658 | floating point format used by the FPU. This is probably | |
659 | not exactly how it would happen on the target itself, but | |
660 | it is the best we can do. */ | |
661 | val = extract_floating (valbuf, TYPE_LENGTH (type)); | |
662 | floatformat_from_doublest (&floatformat_i387_ext, &val, buf); | |
663 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf, | |
664 | FPU_REG_RAW_SIZE); | |
665 | } | |
666 | } | |
667 | else | |
668 | { | |
669 | int low_size = REGISTER_RAW_SIZE (0); | |
670 | int high_size = REGISTER_RAW_SIZE (1); | |
671 | ||
672 | if (len <= low_size) | |
673 | write_register_bytes (REGISTER_BYTE (0), valbuf, len); | |
674 | else if (len <= (low_size + high_size)) | |
675 | { | |
676 | write_register_bytes (REGISTER_BYTE (0), valbuf, low_size); | |
677 | write_register_bytes (REGISTER_BYTE (1), | |
678 | valbuf + low_size, len - low_size); | |
679 | } | |
680 | else | |
681 | internal_error (__FILE__, __LINE__, | |
682 | "Cannot store return value of %d bytes long.", len); | |
683 | } | |
684 | } | |
685 | \f | |
686 | ||
687 | static char * | |
688 | x86_64_register_name (int reg_nr) | |
689 | { | |
690 | static char *register_names[] = { | |
691 | "rax", "rdx", "rcx", "rbx", | |
692 | "rsi", "rdi", "rbp", "rsp", | |
693 | "r8", "r9", "r10", "r11", | |
694 | "r12", "r13", "r14", "r15", | |
695 | "rip", "eflags", | |
696 | "st0", "st1", "st2", "st3", | |
697 | "st4", "st5", "st6", "st7", | |
698 | "fctrl", "fstat", "ftag", "fiseg", | |
699 | "fioff", "foseg", "fooff", "fop", | |
700 | "xmm0", "xmm1", "xmm2", "xmm3", | |
701 | "xmm4", "xmm5", "xmm6", "xmm7", | |
702 | "xmm8", "xmm9", "xmm10", "xmm11", | |
703 | "xmm12", "xmm13", "xmm14", "xmm15", | |
704 | "mxcsr" | |
705 | }; | |
706 | if (reg_nr < 0) | |
707 | return NULL; | |
708 | if (reg_nr >= (sizeof (register_names) / sizeof (*register_names))) | |
709 | return NULL; | |
710 | return register_names[reg_nr]; | |
711 | } | |
712 | \f | |
713 | ||
714 | ||
715 | /* We have two flavours of disassembly. The machinery on this page | |
716 | deals with switching between those. */ | |
717 | ||
718 | static int | |
719 | gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info) | |
720 | { | |
721 | if (disassembly_flavour == att_flavour) | |
722 | return print_insn_i386_att (memaddr, info); | |
723 | else if (disassembly_flavour == intel_flavour) | |
724 | return print_insn_i386_intel (memaddr, info); | |
725 | /* Never reached -- disassembly_flavour is always either att_flavour | |
726 | or intel_flavour. */ | |
727 | internal_error (__FILE__, __LINE__, "failed internal consistency check"); | |
728 | } | |
729 | \f | |
730 | ||
731 | /* Store the address of the place in which to copy the structure the | |
732 | subroutine will return. This is called from call_function. */ | |
733 | void | |
734 | x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
735 | { | |
736 | write_register (RDI_REGNUM, addr); | |
737 | } | |
738 | ||
739 | int | |
740 | x86_64_frameless_function_invocation (struct frame_info *frame) | |
741 | { | |
742 | return 0; | |
743 | } | |
744 | ||
745 | /* On x86_64 there are no reasonable prologs. */ | |
746 | CORE_ADDR | |
747 | x86_64_skip_prologue (CORE_ADDR pc) | |
748 | { | |
749 | return pc; | |
750 | } | |
751 | ||
752 | /* Sequence of bytes for breakpoint instruction. */ | |
753 | static unsigned char * | |
754 | x86_64_breakpoint_from_pc (CORE_ADDR *pc, int *lenptr) | |
755 | { | |
756 | static unsigned char breakpoint[] = { 0xcc }; | |
757 | *lenptr = 1; | |
758 | return breakpoint; | |
759 | } | |
760 | ||
761 | static struct gdbarch * | |
762 | i386_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
763 | { | |
764 | struct gdbarch *gdbarch; | |
765 | struct gdbarch_tdep *tdep; | |
766 | ||
767 | /* Find a candidate among the list of pre-declared architectures. */ | |
768 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
769 | arches != NULL; | |
770 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
771 | { | |
772 | switch (info.bfd_arch_info->mach) | |
773 | { | |
774 | case bfd_mach_x86_64: | |
775 | case bfd_mach_x86_64_intel_syntax: | |
776 | switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach) | |
777 | { | |
778 | case bfd_mach_x86_64: | |
779 | case bfd_mach_x86_64_intel_syntax: | |
780 | return arches->gdbarch; | |
781 | case bfd_mach_i386_i386: | |
782 | case bfd_mach_i386_i8086: | |
783 | case bfd_mach_i386_i386_intel_syntax: | |
784 | break; | |
785 | default: | |
786 | internal_error (__FILE__, __LINE__, | |
787 | "i386_gdbarch_init: unknown machine type"); | |
788 | } | |
789 | break; | |
790 | case bfd_mach_i386_i386: | |
791 | case bfd_mach_i386_i8086: | |
792 | case bfd_mach_i386_i386_intel_syntax: | |
793 | switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach) | |
794 | { | |
795 | case bfd_mach_x86_64: | |
796 | case bfd_mach_x86_64_intel_syntax: | |
797 | break; | |
798 | case bfd_mach_i386_i386: | |
799 | case bfd_mach_i386_i8086: | |
800 | case bfd_mach_i386_i386_intel_syntax: | |
801 | return arches->gdbarch; | |
802 | default: | |
803 | internal_error (__FILE__, __LINE__, | |
804 | "i386_gdbarch_init: unknown machine type"); | |
805 | } | |
806 | break; | |
807 | default: | |
808 | internal_error (__FILE__, __LINE__, | |
809 | "i386_gdbarch_init: unknown machine type"); | |
810 | } | |
811 | } | |
812 | ||
813 | tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep)); | |
814 | gdbarch = gdbarch_alloc (&info, tdep); | |
815 | ||
816 | switch (info.bfd_arch_info->mach) | |
817 | { | |
818 | case bfd_mach_x86_64: | |
819 | case bfd_mach_x86_64_intel_syntax: | |
96297dab | 820 | tdep->num_xmm_regs = 16; |
53e95fcf JS |
821 | break; |
822 | case bfd_mach_i386_i386: | |
823 | case bfd_mach_i386_i8086: | |
824 | case bfd_mach_i386_i386_intel_syntax: | |
825 | /* This is place for definition of i386 target vector. */ | |
826 | break; | |
827 | default: | |
828 | internal_error (__FILE__, __LINE__, | |
829 | "i386_gdbarch_init: unknown machine type"); | |
830 | } | |
831 | ||
832 | set_gdbarch_long_bit (gdbarch, 64); | |
833 | set_gdbarch_long_long_bit (gdbarch, 64); | |
834 | set_gdbarch_ptr_bit (gdbarch, 64); | |
835 | ||
836 | set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext); | |
53e95fcf JS |
837 | |
838 | set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS); | |
839 | set_gdbarch_register_name (gdbarch, x86_64_register_name); | |
840 | set_gdbarch_register_size (gdbarch, 8); | |
841 | set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size); | |
842 | set_gdbarch_max_register_raw_size (gdbarch, 16); | |
843 | set_gdbarch_register_byte (gdbarch, x86_64_register_byte); | |
844 | /* Total amount of space needed to store our copies of the machine's register | |
845 | (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */ | |
846 | set_gdbarch_register_bytes (gdbarch, | |
847 | (18 * 8) + (8 * 10) + (8 * 4) + (8 * 16 + 4)); | |
0e7c5946 | 848 | set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size); |
53e95fcf JS |
849 | set_gdbarch_max_register_virtual_size (gdbarch, 16); |
850 | ||
851 | set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type); | |
852 | ||
853 | set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible); | |
854 | set_gdbarch_register_convert_to_virtual (gdbarch, | |
855 | x86_64_register_convert_to_virtual); | |
856 | set_gdbarch_register_convert_to_raw (gdbarch, | |
857 | x86_64_register_convert_to_raw); | |
858 | ||
859 | /* Register numbers of various important registers. */ | |
860 | set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */ | |
861 | set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */ | |
862 | set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */ | |
863 | ||
864 | set_gdbarch_fp0_regnum (gdbarch, 18); /* First FPU floating-point register. */ | |
865 | ||
866 | set_gdbarch_read_fp (gdbarch, cfi_read_fp); | |
867 | set_gdbarch_write_fp (gdbarch, cfi_write_fp); | |
868 | ||
869 | /* Discard from the stack the innermost frame, restoring all registers. */ | |
870 | set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame); | |
871 | ||
872 | /* FRAME_CHAIN takes a frame's nominal address and produces the frame's | |
873 | chain-pointer. */ | |
874 | set_gdbarch_frame_chain (gdbarch, cfi_frame_chain); | |
875 | ||
876 | set_gdbarch_frameless_function_invocation (gdbarch, | |
877 | x86_64_frameless_function_invocation); | |
878 | set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc); | |
879 | ||
880 | set_gdbarch_frame_args_address (gdbarch, default_frame_address); | |
881 | set_gdbarch_frame_locals_address (gdbarch, default_frame_address); | |
882 | ||
883 | /* Return number of bytes at start of arglist that are not really args. */ | |
884 | set_gdbarch_frame_args_skip (gdbarch, 8); | |
885 | ||
886 | set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); | |
887 | ||
888 | /* Frame pc initialization is handled by unwind informations. */ | |
889 | set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc); | |
890 | ||
891 | /* Initialization of unwind informations. */ | |
892 | set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info); | |
893 | ||
894 | /* Getting saved registers is handled by unwind informations. */ | |
895 | set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register); | |
896 | ||
897 | set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs); | |
898 | ||
899 | /* Cons up virtual frame pointer for trace */ | |
900 | set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer); | |
901 | ||
902 | ||
903 | set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid); | |
904 | ||
905 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
906 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
907 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
908 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
909 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
910 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
911 | set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point); | |
912 | set_gdbarch_call_dummy_words (gdbarch, 0); | |
913 | set_gdbarch_sizeof_call_dummy_words (gdbarch, 0); | |
914 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
915 | set_gdbarch_call_dummy_p (gdbarch, 1); | |
916 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
917 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
918 | set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy); | |
919 | set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address); | |
920 | set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments); | |
921 | ||
922 | /* Return number of args passed to a frame, no way to tell. */ | |
923 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
924 | /* Don't use default structure extract routine */ | |
925 | set_gdbarch_extract_struct_value_address (gdbarch, 0); | |
926 | ||
927 | /* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE | |
928 | and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is | |
929 | the case when structure is returned in registers. */ | |
930 | set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention); | |
931 | ||
932 | /* Store the address of the place in which to copy the structure the | |
933 | subroutine will return. This is called from call_function. */ | |
934 | set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return); | |
935 | ||
936 | /* Extract from an array REGBUF containing the (raw) register state | |
937 | a function return value of type TYPE, and copy that, in virtual format, | |
938 | into VALBUF. */ | |
939 | set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value); | |
940 | ||
941 | ||
942 | /* Write into the appropriate registers a function return value stored | |
943 | in VALBUF of type TYPE, given in virtual format. */ | |
944 | set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value); | |
945 | \f | |
946 | ||
947 | /* Offset from address of function to start of its code. */ | |
948 | set_gdbarch_function_start_offset (gdbarch, 0); | |
949 | ||
950 | set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue); | |
951 | ||
952 | set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call); | |
953 | ||
954 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
955 | ||
956 | set_gdbarch_breakpoint_from_pc (gdbarch, x86_64_breakpoint_from_pc); | |
957 | ||
958 | ||
959 | /* Amount PC must be decremented by after a breakpoint. This is often the | |
960 | number of bytes in BREAKPOINT but not always. */ | |
961 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
962 | ||
b6af0555 JS |
963 | /* Use dwarf2 debug frame informations. */ |
964 | set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info); | |
53e95fcf JS |
965 | return gdbarch; |
966 | } | |
967 | ||
968 | void | |
969 | _initialize_x86_64_tdep (void) | |
970 | { | |
971 | register_gdbarch_init (bfd_arch_i386, i386_gdbarch_init); | |
972 | ||
973 | /* Initialize the table saying where each register starts in the | |
974 | register file. */ | |
975 | { | |
976 | int i, offset; | |
977 | ||
978 | offset = 0; | |
979 | for (i = 0; i < X86_64_NUM_REGS; i++) | |
980 | { | |
981 | x86_64_register_byte_table[i] = offset; | |
982 | offset += x86_64_register_raw_size_table[i]; | |
983 | } | |
984 | } | |
985 | ||
986 | tm_print_insn = gdb_print_insn_x86_64; | |
987 | tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach; | |
988 | ||
989 | /* Add the variable that controls the disassembly flavour. */ | |
990 | { | |
991 | struct cmd_list_element *new_cmd; | |
992 | ||
993 | new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class, | |
994 | valid_flavours, &disassembly_flavour, "\ | |
995 | Set the disassembly flavour, the valid values are \"att\" and \"intel\", \ | |
996 | and the default value is \"att\".", &setlist); | |
997 | add_show_from_set (new_cmd, &showlist); | |
998 | } | |
999 | } |