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* lib/ld-lib.exp (run_dump_test): Add -L$srcdir/$subdir.
[deliverable/binutils-gdb.git] / gdb / x86-64-tdep.c
CommitLineData
53e95fcf 1/* Target-dependent code for the x86-64 for GDB, the GNU debugger.
ce0eebec
AC		 2
3 Copyright 2001, 2002 Free Software Foundation, Inc.
4
53e95fcf
JS		 5 Contributed by Jiri Smid, SuSE Labs.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
23
24#include "defs.h"
25#include "inferior.h"
26#include "gdbcore.h"
27#include "gdbcmd.h"
28#include "arch-utils.h"
29#include "regcache.h"
30#include "symfile.h"
31#include "x86-64-tdep.h"
32#include "dwarf2cfi.h"
82dbc5f7 33#include "gdb_assert.h"
53e95fcf 34
53e95fcf
JS		 35/* Register numbers of various important registers. */
36#define RAX_REGNUM 0
de220d0f 37#define RDX_REGNUM 3
53e95fcf
JS		 38#define RDI_REGNUM 5
39#define EFLAGS_REGNUM 17
0e04a514 40#define ST0_REGNUM 22
de220d0f
ML		 41#define XMM1_REGNUM 39
42
43struct register_info
44{
45 int size;
46 char *name;
47 struct type **type;
48};
53e95fcf
JS		 49
50/* x86_64_register_raw_size_table[i] is the number of bytes of storage in
51 GDB's register array occupied by register i. */
de220d0f 52static struct register_info x86_64_register_info_table[] = {
91fd20f7
ML		 53 /* 0 */ {8, "rax", &builtin_type_int64},
54 /* 1 */ {8, "rbx", &builtin_type_int64},
55 /* 2 */ {8, "rcx", &builtin_type_int64},
56 /* 3 */ {8, "rdx", &builtin_type_int64},
57 /* 4 */ {8, "rsi", &builtin_type_int64},
58 /* 5 */ {8, "rdi", &builtin_type_int64},
59 /* 6 */ {8, "rbp", &builtin_type_void_func_ptr},
60 /* 7 */ {8, "rsp", &builtin_type_void_func_ptr},
61 /* 8 */ {8, "r8", &builtin_type_int64},
62 /* 9 */ {8, "r9", &builtin_type_int64},
63 /* 10 */ {8, "r10", &builtin_type_int64},
64 /* 11 */ {8, "r11", &builtin_type_int64},
65 /* 12 */ {8, "r12", &builtin_type_int64},
66 /* 13 */ {8, "r13", &builtin_type_int64},
67 /* 14 */ {8, "r14", &builtin_type_int64},
68 /* 15 */ {8, "r15", &builtin_type_int64},
69 /* 16 */ {8, "rip", &builtin_type_void_func_ptr},
70 /* 17 */ {4, "eflags", &builtin_type_int32},
71 /* 18 */ {4, "ds", &builtin_type_int32},
72 /* 19 */ {4, "es", &builtin_type_int32},
73 /* 20 */ {4, "fs", &builtin_type_int32},
74 /* 21 */ {4, "gs", &builtin_type_int32},
75 /* 22 */ {10, "st0", &builtin_type_i387_ext},
76 /* 23 */ {10, "st1", &builtin_type_i387_ext},
77 /* 24 */ {10, "st2", &builtin_type_i387_ext},
78 /* 25 */ {10, "st3", &builtin_type_i387_ext},
79 /* 26 */ {10, "st4", &builtin_type_i387_ext},
80 /* 27 */ {10, "st5", &builtin_type_i387_ext},
81 /* 28 */ {10, "st6", &builtin_type_i387_ext},
82 /* 29 */ {10, "st7", &builtin_type_i387_ext},
83 /* 30 */ {4, "fctrl", &builtin_type_int32},
84 /* 31 */ {4, "fstat", &builtin_type_int32},
85 /* 32 */ {4, "ftag", &builtin_type_int32},
86 /* 33 */ {4, "fiseg", &builtin_type_int32},
87 /* 34 */ {4, "fioff", &builtin_type_int32},
88 /* 35 */ {4, "foseg", &builtin_type_int32},
89 /* 36 */ {4, "fooff", &builtin_type_int32},
90 /* 37 */ {4, "fop", &builtin_type_int32},
91 /* 38 */ {16, "xmm0", &builtin_type_v4sf},
92 /* 39 */ {16, "xmm1", &builtin_type_v4sf},
93 /* 40 */ {16, "xmm2", &builtin_type_v4sf},
94 /* 41 */ {16, "xmm3", &builtin_type_v4sf},
95 /* 42 */ {16, "xmm4", &builtin_type_v4sf},
96 /* 43 */ {16, "xmm5", &builtin_type_v4sf},
97 /* 44 */ {16, "xmm6", &builtin_type_v4sf},
98 /* 45 */ {16, "xmm7", &builtin_type_v4sf},
99 /* 46 */ {16, "xmm8", &builtin_type_v4sf},
100 /* 47 */ {16, "xmm9", &builtin_type_v4sf},
101 /* 48 */ {16, "xmm10", &builtin_type_v4sf},
102 /* 49 */ {16, "xmm11", &builtin_type_v4sf},
103 /* 50 */ {16, "xmm12", &builtin_type_v4sf},
104 /* 51 */ {16, "xmm13", &builtin_type_v4sf},
105 /* 52 */ {16, "xmm14", &builtin_type_v4sf},
106 /* 53 */ {16, "xmm15", &builtin_type_v4sf},
107 /* 54 */ {4, "mxcsr", &builtin_type_int32}
53e95fcf
JS		 108};
109
0e04a514
ML		 110/* This array is a mapping from Dwarf-2 register
111 numbering to GDB's one. Dwarf-2 numbering is
112 defined in x86-64 ABI, section 3.6. */
113static int x86_64_dwarf2gdb_regno_map[] = {
114 0, 1, 2, 3, /* RAX - RDX */
115 4, 5, 6, 7, /* RSI, RDI, RBP, RSP */
116 8, 9, 10, 11, /* R8 - R11 */
117 12, 13, 14, 15, /* R12 - R15 */
118 -1, /* RA - not mapped */
119 XMM1_REGNUM - 1, XMM1_REGNUM, /* XMM0 ... */
120 XMM1_REGNUM + 1, XMM1_REGNUM + 2,
121 XMM1_REGNUM + 3, XMM1_REGNUM + 4,
122 XMM1_REGNUM + 5, XMM1_REGNUM + 6,
123 XMM1_REGNUM + 7, XMM1_REGNUM + 8,
124 XMM1_REGNUM + 9, XMM1_REGNUM + 10,
125 XMM1_REGNUM + 11, XMM1_REGNUM + 12,
126 XMM1_REGNUM + 13, XMM1_REGNUM + 14, /* ... XMM15 */
127 ST0_REGNUM + 0, ST0_REGNUM + 1, /* ST0 ... */
128 ST0_REGNUM + 2, ST0_REGNUM + 3,
129 ST0_REGNUM + 4, ST0_REGNUM + 5,
130 ST0_REGNUM + 6, ST0_REGNUM + 7 /* ... ST7 */
131};
132
133static int x86_64_dwarf2gdb_regno_map_length =
134 sizeof (x86_64_dwarf2gdb_regno_map) /
135 sizeof (x86_64_dwarf2gdb_regno_map[0]);
136
de220d0f
ML		 137/* Number of all registers */
138#define X86_64_NUM_REGS (sizeof (x86_64_register_info_table) / \
139 sizeof (x86_64_register_info_table[0]))
140
141/* Number of general registers. */
142#define X86_64_NUM_GREGS (22)
143
144int x86_64_num_regs = X86_64_NUM_REGS;
145int x86_64_num_gregs = X86_64_NUM_GREGS;
146
b6779aa2
AC		 147/* Did we already print a note about frame pointer? */
148int omit_fp_note_printed = 0;
149
53e95fcf
JS		 150/* Number of bytes of storage in the actual machine representation for
151 register REGNO. */
152int
153x86_64_register_raw_size (int regno)
154{
de220d0f 155 return x86_64_register_info_table[regno].size;
53e95fcf
JS		 156}
157
158/* x86_64_register_byte_table[i] is the offset into the register file of the
159 start of register number i. We initialize this from
de220d0f 160 x86_64_register_info_table. */
53e95fcf
JS		 161int x86_64_register_byte_table[X86_64_NUM_REGS];
162
163/* Index within `registers' of the first byte of the space for register REGNO. */
164int
165x86_64_register_byte (int regno)
166{
167 return x86_64_register_byte_table[regno];
168}
169
170/* Return the GDB type object for the "standard" data type of data in
171 register N. */
172static struct type *
173x86_64_register_virtual_type (int regno)
174{
de220d0f 175 return *x86_64_register_info_table[regno].type;
53e95fcf
JS		 176}
177
53e95fcf
JS		 178/* x86_64_register_convertible is true if register N's virtual format is
179 different from its raw format. Note that this definition assumes
180 that the host supports IEEE 32-bit floats, since it doesn't say
181 that SSE registers need conversion. Even if we can't find a
182 counterexample, this is still sloppy. */
183int
184x86_64_register_convertible (int regno)
185{
186 return IS_FP_REGNUM (regno);
187}
188
189/* Convert data from raw format for register REGNUM in buffer FROM to
190 virtual format with type TYPE in buffer TO. In principle both
191 formats are identical except that the virtual format has two extra
192 bytes appended that aren't used. We set these to zero. */
193void
194x86_64_register_convert_to_virtual (int regnum, struct type *type,
195 char *from, char *to)
196{
82dbc5f7
AC		 197 char buf[12];
198 DOUBLEST d;
199 /* We only support floating-point values. */
200 if (TYPE_CODE (type) != TYPE_CODE_FLT)
201 {
202 warning ("Cannot convert floating-point register value "
203 "to non-floating-point type.");
204 memset (to, 0, TYPE_LENGTH (type));
205 return;
206 }
207 /* First add the necessary padding. */
208 memcpy (buf, from, FPU_REG_RAW_SIZE);
209 memset (buf + FPU_REG_RAW_SIZE, 0, sizeof buf - FPU_REG_RAW_SIZE);
210 /* Convert to TYPE. This should be a no-op, if TYPE is equivalent
211 to the extended floating-point format used by the FPU. */
ce0eebec
AC		 212 convert_typed_floating (to, type, buf,
213 x86_64_register_virtual_type (regnum));
53e95fcf
JS		 214}
215
216/* Convert data from virtual format with type TYPE in buffer FROM to
217 raw format for register REGNUM in buffer TO. Simply omit the two
218 unused bytes. */
219
220void
221x86_64_register_convert_to_raw (struct type *type, int regnum,
222 char *from, char *to)
223{
ce0eebec 224 gdb_assert (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 12);
82dbc5f7 225 /* Simply omit the two unused bytes. */
53e95fcf
JS		 226 memcpy (to, from, FPU_REG_RAW_SIZE);
227}
53e95fcf 228
0e04a514
ML		 229/* Dwarf-2 <-> GDB register numbers mapping. */
230int
231x86_64_dwarf2_reg_to_regnum (int dw_reg)
232{
233 if (dw_reg < 0 || dw_reg > x86_64_dwarf2gdb_regno_map_length)
234 {
235 warning ("Dwarf-2 uses unmapped register #%d\n", dw_reg);
236 return dw_reg;
237 }
238
239 return x86_64_dwarf2gdb_regno_map[dw_reg];
240}
241
53e95fcf
JS		 242/* This is the variable that is set with "set disassembly-flavour", and
243 its legitimate values. */
244static const char att_flavour[] = "att";
245static const char intel_flavour[] = "intel";
246static const char *valid_flavours[] = {
247 att_flavour,
248 intel_flavour,
249 NULL
250};
251static const char *disassembly_flavour = att_flavour;
252
253static CORE_ADDR
254x86_64_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
255{
256 char buf[8];
257
258 store_unsigned_integer (buf, 8, CALL_DUMMY_ADDRESS ());
259
260 write_memory (sp - 8, buf, 8);
261 return sp - 8;
262}
263
264void
265x86_64_pop_frame (void)
266{
267 generic_pop_current_frame (cfi_pop_frame);
268}
269\f
270
271/* The returning of values is done according to the special algorithm.
272 Some types are returned in registers an some (big structures) in memory.
273 See ABI for details.
274 */
275
276#define MAX_CLASSES 4
277
278enum x86_64_reg_class
279{
280 X86_64_NO_CLASS,
281 X86_64_INTEGER_CLASS,
282 X86_64_INTEGERSI_CLASS,
283 X86_64_SSE_CLASS,
284 X86_64_SSESF_CLASS,
285 X86_64_SSEDF_CLASS,
286 X86_64_SSEUP_CLASS,
287 X86_64_X87_CLASS,
288 X86_64_X87UP_CLASS,
289 X86_64_MEMORY_CLASS
290};
291
292/* Return the union class of CLASS1 and CLASS2.
293 See the x86-64 ABI for details. */
294
295static enum x86_64_reg_class
296merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2)
297{
298 /* Rule #1: If both classes are equal, this is the resulting class. */
299 if (class1 == class2)
300 return class1;
301
302 /* Rule #2: If one of the classes is NO_CLASS, the resulting class is
303 the other class. */
304 if (class1 == X86_64_NO_CLASS)
305 return class2;
306 if (class2 == X86_64_NO_CLASS)
307 return class1;
308
309 /* Rule #3: If one of the classes is MEMORY, the result is MEMORY. */
310 if (class1 == X86_64_MEMORY_CLASS || class2 == X86_64_MEMORY_CLASS)
311 return X86_64_MEMORY_CLASS;
312
313 /* Rule #4: If one of the classes is INTEGER, the result is INTEGER. */
314 if ((class1 == X86_64_INTEGERSI_CLASS && class2 == X86_64_SSESF_CLASS)
315 || (class2 == X86_64_INTEGERSI_CLASS && class1 == X86_64_SSESF_CLASS))
316 return X86_64_INTEGERSI_CLASS;
317 if (class1 == X86_64_INTEGER_CLASS || class1 == X86_64_INTEGERSI_CLASS
318 || class2 == X86_64_INTEGER_CLASS || class2 == X86_64_INTEGERSI_CLASS)
319 return X86_64_INTEGER_CLASS;
320
321 /* Rule #5: If one of the classes is X87 or X87UP class, MEMORY is used. */
322 if (class1 == X86_64_X87_CLASS || class1 == X86_64_X87UP_CLASS
323 || class2 == X86_64_X87_CLASS || class2 == X86_64_X87UP_CLASS)
324 return X86_64_MEMORY_CLASS;
325
326 /* Rule #6: Otherwise class SSE is used. */
327 return X86_64_SSE_CLASS;
328}
329
330
331/* Classify the argument type.
332 CLASSES will be filled by the register class used to pass each word
333 of the operand. The number of words is returned. In case the parameter
334 should be passed in memory, 0 is returned. As a special case for zero
335 sized containers, classes[0] will be NO_CLASS and 1 is returned.
336
337 See the x86-64 PS ABI for details.
338*/
339
340static int
341classify_argument (struct type *type,
342 enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset)
343{
344 int bytes = TYPE_LENGTH (type);
345 int words = (bytes + 8 - 1) / 8;
346
347 switch (TYPE_CODE (type))
348 {
349 case TYPE_CODE_ARRAY:
350 case TYPE_CODE_STRUCT:
351 case TYPE_CODE_UNION:
352 {
353 int i;
354 enum x86_64_reg_class subclasses[MAX_CLASSES];
355
356 /* On x86-64 we pass structures larger than 16 bytes on the stack. */
357 if (bytes > 16)
358 return 0;
359
360 for (i = 0; i < words; i++)
361 classes[i] = X86_64_NO_CLASS;
362
363 /* Zero sized arrays or structures are NO_CLASS. We return 0 to
364 signalize memory class, so handle it as special case. */
365 if (!words)
366 {
367 classes[0] = X86_64_NO_CLASS;
368 return 1;
369 }
370 switch (TYPE_CODE (type))
371 {
372 case TYPE_CODE_STRUCT:
373 {
374 int j;
375 for (j = 0; j < type->nfields; ++j)
376 {
377 int num = classify_argument (type->fields[j].type,
378 subclasses,
379 (type->fields[j].loc.bitpos
380 + bit_offset) % 256);
381 if (!num)
382 return 0;
383 for (i = 0; i < num; i++)
384 {
385 int pos =
386 (type->fields[j].loc.bitpos + bit_offset) / 8 / 8;
387 classes[i + pos] =
388 merge_classes (subclasses[i], classes[i + pos]);
389 }
390 }
391 }
392 break;
393 case TYPE_CODE_ARRAY:
394 {
395 int num;
396
397 num = classify_argument (type->target_type,
398 subclasses, bit_offset);
399 if (!num)
400 return 0;
401
402 /* The partial classes are now full classes. */
403 if (subclasses[0] == X86_64_SSESF_CLASS && bytes != 4)
404 subclasses[0] = X86_64_SSE_CLASS;
405 if (subclasses[0] == X86_64_INTEGERSI_CLASS && bytes != 4)
406 subclasses[0] = X86_64_INTEGER_CLASS;
407
408 for (i = 0; i < words; i++)
409 classes[i] = subclasses[i % num];
410 }
411 break;
412 case TYPE_CODE_UNION:
413 {
414 int j;
415 {
416 for (j = 0; j < type->nfields; ++j)
417 {
418 int num;
419 num = classify_argument (type->fields[j].type,
420 subclasses, bit_offset);
421 if (!num)
422 return 0;
423 for (i = 0; i < num; i++)
424 classes[i] = merge_classes (subclasses[i], classes[i]);
425 }
426 }
427 }
428 break;
429 }
430 /* Final merger cleanup. */
431 for (i = 0; i < words; i++)
432 {
433 /* If one class is MEMORY, everything should be passed in
434 memory. */
435 if (classes[i] == X86_64_MEMORY_CLASS)
436 return 0;
437
438 /* The X86_64_SSEUP_CLASS should be always preceeded by
439 X86_64_SSE_CLASS. */
440 if (classes[i] == X86_64_SSEUP_CLASS
441 && (i == 0 || classes[i - 1] != X86_64_SSE_CLASS))
442 classes[i] = X86_64_SSE_CLASS;
443
444 /* X86_64_X87UP_CLASS should be preceeded by X86_64_X87_CLASS. */
445 if (classes[i] == X86_64_X87UP_CLASS
446 && (i == 0 || classes[i - 1] != X86_64_X87_CLASS))
447 classes[i] = X86_64_SSE_CLASS;
448 }
449 return words;
450 }
451 break;
452 case TYPE_CODE_FLT:
453 switch (bytes)
454 {
455 case 4:
456 if (!(bit_offset % 64))
457 classes[0] = X86_64_SSESF_CLASS;
458 else
459 classes[0] = X86_64_SSE_CLASS;
460 return 1;
461 case 8:
462 classes[0] = X86_64_SSEDF_CLASS;
463 return 1;
464 case 16:
465 classes[0] = X86_64_X87_CLASS;
466 classes[1] = X86_64_X87UP_CLASS;
467 return 2;
468 }
469 break;
470 case TYPE_CODE_INT:
471 case TYPE_CODE_PTR:
472 switch (bytes)
473 {
474 case 1:
475 case 2:
476 case 4:
477 case 8:
478 if (bytes * 8 + bit_offset <= 32)
479 classes[0] = X86_64_INTEGERSI_CLASS;
480 else
481 classes[0] = X86_64_INTEGER_CLASS;
482 return 1;
483 case 16:
484 classes[0] = classes[1] = X86_64_INTEGER_CLASS;
485 return 2;
486 default:
487 break;
488 }
489 case TYPE_CODE_VOID:
490 return 0;
491 }
ce0eebec
AC		 492 internal_error (__FILE__, __LINE__,
493 "classify_argument: unknown argument type");
53e95fcf
JS		 494}
495
496/* Examine the argument and return set number of register required in each
497 class. Return 0 ifif parameter should be passed in memory. */
498
499static int
500examine_argument (enum x86_64_reg_class classes[MAX_CLASSES],
501 int n, int *int_nregs, int *sse_nregs)
502{
503 *int_nregs = 0;
504 *sse_nregs = 0;
505 if (!n)
506 return 0;
507 for (n--; n >= 0; n--)
508 switch (classes[n])
509 {
510 case X86_64_INTEGER_CLASS:
511 case X86_64_INTEGERSI_CLASS:
512 (*int_nregs)++;
513 break;
514 case X86_64_SSE_CLASS:
515 case X86_64_SSESF_CLASS:
516 case X86_64_SSEDF_CLASS:
517 (*sse_nregs)++;
518 break;
519 case X86_64_NO_CLASS:
520 case X86_64_SSEUP_CLASS:
521 case X86_64_X87_CLASS:
522 case X86_64_X87UP_CLASS:
523 break;
524 case X86_64_MEMORY_CLASS:
ce0eebec
AC		 525 internal_error (__FILE__, __LINE__,
526 "examine_argument: unexpected memory class");
53e95fcf
JS		 527 }
528 return 1;
529}
530
531#define RET_INT_REGS 2
532#define RET_SSE_REGS 2
533
534/* Check if the structure in value_type is returned in registers or in
535 memory. If this function returns 1, gdb will call STORE_STRUCT_RETURN and
536 EXTRACT_STRUCT_VALUE_ADDRESS else STORE_RETURN_VALUE and EXTRACT_RETURN_VALUE
537 will be used. */
538int
539x86_64_use_struct_convention (int gcc_p, struct type *value_type)
540{
541 enum x86_64_reg_class class[MAX_CLASSES];
542 int n = classify_argument (value_type, class, 0);
543 int needed_intregs;
544 int needed_sseregs;
545
546 return (!n ||
547 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
548 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS);
549}
550
551
552/* Extract from an array REGBUF containing the (raw) register state, a
553 function return value of TYPE, and copy that, in virtual format,
554 into VALBUF. */
555
556void
557x86_64_extract_return_value (struct type *type, char *regbuf, char *valbuf)
558{
559 enum x86_64_reg_class class[MAX_CLASSES];
560 int n = classify_argument (type, class, 0);
561 int needed_intregs;
562 int needed_sseregs;
563 int intreg = 0;
564 int ssereg = 0;
565 int offset = 0;
566 int ret_int_r[RET_INT_REGS] = { RAX_REGNUM, RDX_REGNUM };
567 int ret_sse_r[RET_SSE_REGS] = { XMM0_REGNUM, XMM1_REGNUM };
568
569 if (!n ||
570 !examine_argument (class, n, &needed_intregs, &needed_sseregs) ||
571 needed_intregs > RET_INT_REGS || needed_sseregs > RET_SSE_REGS)
572 { /* memory class */
573 CORE_ADDR addr;
574 memcpy (&addr, regbuf, REGISTER_RAW_SIZE (RAX_REGNUM));
575 read_memory (addr, valbuf, TYPE_LENGTH (type));
576 return;
577 }
578 else
579 {
580 int i;
581 for (i = 0; i < n; i++)
582 {
583 switch (class[i])
584 {
585 case X86_64_NO_CLASS:
586 break;
587 case X86_64_INTEGER_CLASS:
588 memcpy (valbuf + offset,
589 regbuf + REGISTER_BYTE (ret_int_r[(intreg + 1) / 2]),
590 8);
591 offset += 8;
592 intreg += 2;
593 break;
594 case X86_64_INTEGERSI_CLASS:
595 memcpy (valbuf + offset,
596 regbuf + REGISTER_BYTE (ret_int_r[intreg / 2]), 4);
597 offset += 8;
598 intreg++;
599 break;
600 case X86_64_SSEDF_CLASS:
601 case X86_64_SSESF_CLASS:
602 case X86_64_SSE_CLASS:
603 memcpy (valbuf + offset,
604 regbuf + REGISTER_BYTE (ret_sse_r[(ssereg + 1) / 2]),
605 8);
606 offset += 8;
607 ssereg += 2;
608 break;
609 case X86_64_SSEUP_CLASS:
610 memcpy (valbuf + offset + 8,
611 regbuf + REGISTER_BYTE (ret_sse_r[ssereg / 2]), 8);
612 offset += 8;
613 ssereg++;
614 break;
615 case X86_64_X87_CLASS:
616 memcpy (valbuf + offset, regbuf + REGISTER_BYTE (FP0_REGNUM),
617 8);
618 offset += 8;
619 break;
620 case X86_64_X87UP_CLASS:
621 memcpy (valbuf + offset,
622 regbuf + REGISTER_BYTE (FP0_REGNUM) + 8, 8);
623 offset += 8;
624 break;
625 case X86_64_MEMORY_CLASS:
626 default:
627 internal_error (__FILE__, __LINE__,
628 "Unexpected argument class");
629 }
630 }
631 }
632}
633
634/* Handled by unwind informations. */
635static void
636x86_64_frame_init_saved_regs (struct frame_info *fi)
637{
638}
639
640#define INT_REGS 6
641#define SSE_REGS 16
642
53e95fcf 643CORE_ADDR
d45fc520 644x86_64_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
53e95fcf
JS		 645 int struct_return, CORE_ADDR struct_addr)
646{
647 int intreg = 0;
648 int ssereg = 0;
649 int i;
ce0eebec 650 static int int_parameter_registers[INT_REGS] = {
de220d0f
ML		 651 5 /* RDI */ , 4 /* RSI */ ,
652 3 /* RDX */ , 2 /* RCX */ ,
91fd20f7 653 8 /* R8 */ , 9 /* R9 */
ce0eebec 654 };
53e95fcf 655 /* XMM0 - XMM15 */
ce0eebec 656 static int sse_parameter_registers[SSE_REGS] = {
de220d0f
ML		 657 XMM1_REGNUM - 1, XMM1_REGNUM, XMM1_REGNUM + 1, XMM1_REGNUM + 2,
658 XMM1_REGNUM + 3, XMM1_REGNUM + 4, XMM1_REGNUM + 5, XMM1_REGNUM + 6,
659 XMM1_REGNUM + 7, XMM1_REGNUM + 8, XMM1_REGNUM + 9, XMM1_REGNUM + 10,
660 XMM1_REGNUM + 11, XMM1_REGNUM + 12, XMM1_REGNUM + 13, XMM1_REGNUM + 14
ce0eebec
AC		 661 };
662 int stack_values_count = 0;
82dbc5f7 663 int *stack_values;
e9f30c21 664 stack_values = alloca (nargs * sizeof (int));
53e95fcf
JS		 665 for (i = 0; i < nargs; i++)
666 {
667 enum x86_64_reg_class class[MAX_CLASSES];
668 int n = classify_argument (args[i]->type, class, 0);
669 int needed_intregs;
670 int needed_sseregs;
671
672 if (!n ||
673 !examine_argument (class, n, &needed_intregs, &needed_sseregs)
82dbc5f7
AC		 674 || intreg / 2 + needed_intregs > INT_REGS
675 || ssereg / 2 + needed_sseregs > SSE_REGS)
ce0eebec
AC		 676 { /* memory class */
677 stack_values[stack_values_count++] = i;
53e95fcf
JS		 678 }
679 else
680 {
681 int j;
682 for (j = 0; j < n; j++)
683 {
684 int offset = 0;
685 switch (class[j])
686 {
687 case X86_64_NO_CLASS:
688 break;
689 case X86_64_INTEGER_CLASS:
ce0eebec
AC		 690 write_register_gen (int_parameter_registers
691 [(intreg + 1) / 2],
53e95fcf
JS		 692 VALUE_CONTENTS_ALL (args[i]) + offset);
693 offset += 8;
694 intreg += 2;
695 break;
696 case X86_64_INTEGERSI_CLASS:
697 write_register_gen (int_parameter_registers[intreg / 2],
698 VALUE_CONTENTS_ALL (args[i]) + offset);
699 offset += 8;
700 intreg++;
701 break;
702 case X86_64_SSEDF_CLASS:
703 case X86_64_SSESF_CLASS:
704 case X86_64_SSE_CLASS:
ce0eebec
AC		 705 write_register_gen (sse_parameter_registers
706 [(ssereg + 1) / 2],
53e95fcf
JS		 707 VALUE_CONTENTS_ALL (args[i]) + offset);
708 offset += 8;
709 ssereg += 2;
710 break;
711 case X86_64_SSEUP_CLASS:
712 write_register_gen (sse_parameter_registers[ssereg / 2],
713 VALUE_CONTENTS_ALL (args[i]) + offset);
714 offset += 8;
715 ssereg++;
716 break;
717 case X86_64_X87_CLASS:
53e95fcf 718 case X86_64_MEMORY_CLASS:
ce0eebec 719 stack_values[stack_values_count++] = i;
82dbc5f7
AC		 720 break;
721 case X86_64_X87UP_CLASS:
53e95fcf
JS		 722 break;
723 default:
724 internal_error (__FILE__, __LINE__,
725 "Unexpected argument class");
726 }
727 intreg += intreg % 2;
728 ssereg += ssereg % 2;
729 }
730 }
731 }
82dbc5f7
AC		 732 while (--stack_values_count >= 0)
733 {
e9f30c21 734 struct value *arg = args[stack_values[stack_values_count]];
82dbc5f7
AC		 735 int len = TYPE_LENGTH (VALUE_ENCLOSING_TYPE (arg));
736 len += 7;
737 len -= len % 8;
738 sp -= len;
739 write_memory (sp, VALUE_CONTENTS_ALL (arg), len);
740 }
53e95fcf
JS		 741 return sp;
742}
743
744/* Write into the appropriate registers a function return value stored
745 in VALBUF of type TYPE, given in virtual format. */
746void
747x86_64_store_return_value (struct type *type, char *valbuf)
748{
749 int len = TYPE_LENGTH (type);
750
751 if (TYPE_CODE_FLT == TYPE_CODE (type))
752 {
753 /* Floating-point return values can be found in %st(0). */
754 if (len == TARGET_LONG_DOUBLE_BIT / TARGET_CHAR_BIT
755 && TARGET_LONG_DOUBLE_FORMAT == &floatformat_i387_ext)
756 {
757 /* Copy straight over. */
758 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), valbuf,
759 FPU_REG_RAW_SIZE);
760 }
761 else
762 {
763 char buf[FPU_REG_RAW_SIZE];
764 DOUBLEST val;
765
766 /* Convert the value found in VALBUF to the extended
767 floating point format used by the FPU. This is probably
768 not exactly how it would happen on the target itself, but
769 it is the best we can do. */
770 val = extract_floating (valbuf, TYPE_LENGTH (type));
771 floatformat_from_doublest (&floatformat_i387_ext, &val, buf);
772 write_register_bytes (REGISTER_BYTE (FP0_REGNUM), buf,
773 FPU_REG_RAW_SIZE);
774 }
775 }
776 else
777 {
778 int low_size = REGISTER_RAW_SIZE (0);
779 int high_size = REGISTER_RAW_SIZE (1);
780
781 if (len <= low_size)
782 write_register_bytes (REGISTER_BYTE (0), valbuf, len);
783 else if (len <= (low_size + high_size))
784 {
785 write_register_bytes (REGISTER_BYTE (0), valbuf, low_size);
786 write_register_bytes (REGISTER_BYTE (1),
787 valbuf + low_size, len - low_size);
788 }
789 else
790 internal_error (__FILE__, __LINE__,
791 "Cannot store return value of %d bytes long.", len);
792 }
793}
794\f
795
796static char *
797x86_64_register_name (int reg_nr)
798{
de220d0f 799 if (reg_nr < 0 || reg_nr >= X86_64_NUM_REGS)
53e95fcf 800 return NULL;
de220d0f 801 return x86_64_register_info_table[reg_nr].name;
53e95fcf
JS		 802}
803\f
804
805
806/* We have two flavours of disassembly. The machinery on this page
807 deals with switching between those. */
808
809static int
810gdb_print_insn_x86_64 (bfd_vma memaddr, disassemble_info * info)
811{
812 if (disassembly_flavour == att_flavour)
813 return print_insn_i386_att (memaddr, info);
814 else if (disassembly_flavour == intel_flavour)
815 return print_insn_i386_intel (memaddr, info);
816 /* Never reached -- disassembly_flavour is always either att_flavour
817 or intel_flavour. */
818 internal_error (__FILE__, __LINE__, "failed internal consistency check");
819}
820\f
821
822/* Store the address of the place in which to copy the structure the
823 subroutine will return. This is called from call_function. */
824void
825x86_64_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
826{
827 write_register (RDI_REGNUM, addr);
828}
829
830int
831x86_64_frameless_function_invocation (struct frame_info *frame)
832{
833 return 0;
834}
835
e76e1718
ML		 836/* If a function with debugging information and known beginning
837 is detected, we will return pc of the next line in the source
838 code. With this approach we effectively skip the prolog. */
839
840#define PROLOG_BUFSIZE 4
53e95fcf
JS		 841CORE_ADDR
842x86_64_skip_prologue (CORE_ADDR pc)
843{
e76e1718
ML		 844 int i, firstline, currline;
845 struct symtab_and_line v_sal;
846 struct symbol *v_function;
847 CORE_ADDR salendaddr = 0, endaddr = 0;
848
849 /* We will handle only functions beginning with:
850 55 pushq %rbp
851 48 89 e5 movq %rsp,%rbp
852 */
853 unsigned char prolog_expect[PROLOG_BUFSIZE] = { 0x55, 0x48, 0x89, 0xe5 },
854 prolog_buf[PROLOG_BUFSIZE];
855
856 read_memory (pc, (char *) prolog_buf, PROLOG_BUFSIZE);
857
b6779aa2
AC		 858 /* First check, whether pc points to pushq %rbp. If not,
859 * print a recommendation to enable frame pointer. */
860 if (prolog_expect[0] != prolog_buf[0])
861 {
862 if (!omit_fp_note_printed)
863 {
864 printf_filtered
865 ("NOTE: This function doesn't seem to have a valid prologue.\n"
0e04a514 866 " Consider adding -fno-omit-frame-pointer to your gcc's CFLAGS.\n");
b6779aa2
AC		 867 omit_fp_note_printed++;
868 }
e76e1718 869 return pc;
b6779aa2
AC		 870 }
871 /* Valid prolog continues with movq %rsp,%rbp. */
872 for (i = 1; i < PROLOG_BUFSIZE; i++)
873 if (prolog_expect[i] != prolog_buf[i])
874 return pc + 1; /* First instruction after pushq %rbp. */
e76e1718
ML		 875
876 v_function = find_pc_function (pc);
877 v_sal = find_pc_line (pc, 0);
878
879 /* If pc doesn't point to a function with debuginfo,
880 some of the following may be NULL. */
881 if (!v_function || !v_function->ginfo.value.block || !v_sal.symtab)
882 return pc;
883
884 firstline = v_sal.line;
885 currline = firstline;
886 salendaddr = v_sal.end;
887 endaddr = v_function->ginfo.value.block->endaddr;
888
889 for (i = 0; i < v_sal.symtab->linetable->nitems; i++)
890 if (v_sal.symtab->linetable->item[i].line > firstline
891 && v_sal.symtab->linetable->item[i].pc >= salendaddr
892 && v_sal.symtab->linetable->item[i].pc < endaddr)
893 {
894 pc = v_sal.symtab->linetable->item[i].pc;
895 currline = v_sal.symtab->linetable->item[i].line;
896 break;
897 }
898
53e95fcf
JS		 899 return pc;
900}
901
902/* Sequence of bytes for breakpoint instruction. */
903static unsigned char *
de220d0f 904x86_64_breakpoint_from_pc (CORE_ADDR * pc, int *lenptr)
53e95fcf
JS		 905{
906 static unsigned char breakpoint[] = { 0xcc };
907 *lenptr = 1;
908 return breakpoint;
909}
910
911static struct gdbarch *
0e04a514 912x86_64_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
53e95fcf
JS		 913{
914 struct gdbarch *gdbarch;
915 struct gdbarch_tdep *tdep;
de220d0f 916 int i, sum;
53e95fcf
JS		 917
918 /* Find a candidate among the list of pre-declared architectures. */
919 for (arches = gdbarch_list_lookup_by_info (arches, &info);
920 arches != NULL;
921 arches = gdbarch_list_lookup_by_info (arches->next, &info))
922 {
923 switch (info.bfd_arch_info->mach)
924 {
925 case bfd_mach_x86_64:
926 case bfd_mach_x86_64_intel_syntax:
927 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
928 {
929 case bfd_mach_x86_64:
930 case bfd_mach_x86_64_intel_syntax:
931 return arches->gdbarch;
932 case bfd_mach_i386_i386:
933 case bfd_mach_i386_i8086:
934 case bfd_mach_i386_i386_intel_syntax:
935 break;
936 default:
937 internal_error (__FILE__, __LINE__,
0e04a514 938 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 939 }
940 break;
941 case bfd_mach_i386_i386:
942 case bfd_mach_i386_i8086:
943 case bfd_mach_i386_i386_intel_syntax:
944 switch (gdbarch_bfd_arch_info (arches->gdbarch)->mach)
945 {
946 case bfd_mach_x86_64:
947 case bfd_mach_x86_64_intel_syntax:
948 break;
949 case bfd_mach_i386_i386:
950 case bfd_mach_i386_i8086:
951 case bfd_mach_i386_i386_intel_syntax:
952 return arches->gdbarch;
953 default:
954 internal_error (__FILE__, __LINE__,
0e04a514 955 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 956 }
957 break;
958 default:
959 internal_error (__FILE__, __LINE__,
0e04a514 960 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 961 }
962 }
963
964 tdep = (struct gdbarch_tdep *) xmalloc (sizeof (struct gdbarch_tdep));
965 gdbarch = gdbarch_alloc (&info, tdep);
966
967 switch (info.bfd_arch_info->mach)
968 {
969 case bfd_mach_x86_64:
970 case bfd_mach_x86_64_intel_syntax:
96297dab 971 tdep->num_xmm_regs = 16;
53e95fcf
JS		 972 break;
973 case bfd_mach_i386_i386:
974 case bfd_mach_i386_i8086:
975 case bfd_mach_i386_i386_intel_syntax:
976 /* This is place for definition of i386 target vector. */
977 break;
978 default:
979 internal_error (__FILE__, __LINE__,
0e04a514 980 "x86_64_gdbarch_init: unknown machine type");
53e95fcf
JS		 981 }
982
983 set_gdbarch_long_bit (gdbarch, 64);
984 set_gdbarch_long_long_bit (gdbarch, 64);
985 set_gdbarch_ptr_bit (gdbarch, 64);
986
987 set_gdbarch_long_double_format (gdbarch, &floatformat_i387_ext);
53e95fcf
JS		 988
989 set_gdbarch_num_regs (gdbarch, X86_64_NUM_REGS);
990 set_gdbarch_register_name (gdbarch, x86_64_register_name);
991 set_gdbarch_register_size (gdbarch, 8);
992 set_gdbarch_register_raw_size (gdbarch, x86_64_register_raw_size);
993 set_gdbarch_max_register_raw_size (gdbarch, 16);
994 set_gdbarch_register_byte (gdbarch, x86_64_register_byte);
de220d0f 995
53e95fcf
JS		 996 /* Total amount of space needed to store our copies of the machine's register
997 (SIZEOF_GREGS + SIZEOF_FPU_REGS + SIZEOF_FPU_CTRL_REGS + SIZEOF_SSE_REGS) */
de220d0f
ML		 998 for (i = 0, sum = 0; i < X86_64_NUM_REGS; i++)
999 sum += x86_64_register_info_table[i].size;
1000 set_gdbarch_register_bytes (gdbarch, sum);
0e7c5946 1001 set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size);
53e95fcf
JS		 1002 set_gdbarch_max_register_virtual_size (gdbarch, 16);
1003
1004 set_gdbarch_register_virtual_type (gdbarch, x86_64_register_virtual_type);
1005
1006 set_gdbarch_register_convertible (gdbarch, x86_64_register_convertible);
1007 set_gdbarch_register_convert_to_virtual (gdbarch,
1008 x86_64_register_convert_to_virtual);
1009 set_gdbarch_register_convert_to_raw (gdbarch,
1010 x86_64_register_convert_to_raw);
1011
1012/* Register numbers of various important registers. */
1013 set_gdbarch_sp_regnum (gdbarch, 7); /* (rsp) Contains address of top of stack. */
1014 set_gdbarch_fp_regnum (gdbarch, 6); /* (rbp) */
1015 set_gdbarch_pc_regnum (gdbarch, 16); /* (rip) Contains program counter. */
1016
de220d0f 1017 set_gdbarch_fp0_regnum (gdbarch, X86_64_NUM_GREGS); /* First FPU floating-point register. */
53e95fcf
JS		 1018
1019 set_gdbarch_read_fp (gdbarch, cfi_read_fp);
53e95fcf
JS		 1020
1021/* Discard from the stack the innermost frame, restoring all registers. */
1022 set_gdbarch_pop_frame (gdbarch, x86_64_pop_frame);
1023
1024 /* FRAME_CHAIN takes a frame's nominal address and produces the frame's
1025 chain-pointer. */
1026 set_gdbarch_frame_chain (gdbarch, cfi_frame_chain);
1027
1028 set_gdbarch_frameless_function_invocation (gdbarch,
1029 x86_64_frameless_function_invocation);
1030 set_gdbarch_frame_saved_pc (gdbarch, x86_64_linux_frame_saved_pc);
1031
1032 set_gdbarch_frame_args_address (gdbarch, default_frame_address);
1033 set_gdbarch_frame_locals_address (gdbarch, default_frame_address);
1034
1035/* Return number of bytes at start of arglist that are not really args. */
1036 set_gdbarch_frame_args_skip (gdbarch, 8);
1037
1038 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1039
1040/* Frame pc initialization is handled by unwind informations. */
1041 set_gdbarch_init_frame_pc (gdbarch, cfi_init_frame_pc);
1042
1043/* Initialization of unwind informations. */
1044 set_gdbarch_init_extra_frame_info (gdbarch, cfi_init_extra_frame_info);
1045
1046/* Getting saved registers is handled by unwind informations. */
1047 set_gdbarch_get_saved_register (gdbarch, cfi_get_saved_register);
1048
1049 set_gdbarch_frame_init_saved_regs (gdbarch, x86_64_frame_init_saved_regs);
1050
1051/* Cons up virtual frame pointer for trace */
1052 set_gdbarch_virtual_frame_pointer (gdbarch, cfi_virtual_frame_pointer);
1053
1054
1055 set_gdbarch_frame_chain_valid (gdbarch, generic_file_frame_chain_valid);
1056
1057 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
1058 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
1059 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
1060 set_gdbarch_call_dummy_length (gdbarch, 0);
1061 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
1062 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
1063 set_gdbarch_pc_in_call_dummy (gdbarch, pc_in_call_dummy_at_entry_point);
1064 set_gdbarch_call_dummy_words (gdbarch, 0);
1065 set_gdbarch_sizeof_call_dummy_words (gdbarch, 0);
1066 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
1067 set_gdbarch_call_dummy_p (gdbarch, 1);
1068 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
1069 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
1070 set_gdbarch_fix_call_dummy (gdbarch, generic_fix_call_dummy);
1071 set_gdbarch_push_return_address (gdbarch, x86_64_push_return_address);
1072 set_gdbarch_push_arguments (gdbarch, x86_64_push_arguments);
1073
1074/* Return number of args passed to a frame, no way to tell. */
1075 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
1076/* Don't use default structure extract routine */
1077 set_gdbarch_extract_struct_value_address (gdbarch, 0);
1078
1079/* If USE_STRUCT_CONVENTION retruns 0, then gdb uses STORE_RETURN_VALUE
1080 and EXTRACT_RETURN_VALUE to store/fetch the functions return value. It is
1081 the case when structure is returned in registers. */
1082 set_gdbarch_use_struct_convention (gdbarch, x86_64_use_struct_convention);
1083
1084/* Store the address of the place in which to copy the structure the
1085 subroutine will return. This is called from call_function. */
1086 set_gdbarch_store_struct_return (gdbarch, x86_64_store_struct_return);
1087
1088/* Extract from an array REGBUF containing the (raw) register state
1089 a function return value of type TYPE, and copy that, in virtual format,
1090 into VALBUF. */
1091 set_gdbarch_extract_return_value (gdbarch, x86_64_extract_return_value);
1092
1093
1094/* Write into the appropriate registers a function return value stored
1095 in VALBUF of type TYPE, given in virtual format. */
1096 set_gdbarch_store_return_value (gdbarch, x86_64_store_return_value);
1097\f
1098
1099/* Offset from address of function to start of its code. */
1100 set_gdbarch_function_start_offset (gdbarch, 0);
1101
1102 set_gdbarch_skip_prologue (gdbarch, x86_64_skip_prologue);
1103
1104 set_gdbarch_saved_pc_after_call (gdbarch, x86_64_linux_saved_pc_after_call);
1105
1106 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1107
91fd20f7
ML		 1108 set_gdbarch_breakpoint_from_pc (gdbarch,
1109 (gdbarch_breakpoint_from_pc_ftype *)
1110 x86_64_breakpoint_from_pc);
53e95fcf
JS		 1111
1112
1113/* Amount PC must be decremented by after a breakpoint. This is often the
1114 number of bytes in BREAKPOINT but not always. */
1115 set_gdbarch_decr_pc_after_break (gdbarch, 1);
1116
b6af0555
JS		 1117/* Use dwarf2 debug frame informations. */
1118 set_gdbarch_dwarf2_build_frame_info (gdbarch, dwarf2_build_frame_info);
0e04a514
ML		 1119 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, x86_64_dwarf2_reg_to_regnum);
1120
53e95fcf
JS		 1121 return gdbarch;
1122}
1123
1124void
1125_initialize_x86_64_tdep (void)
1126{
0e04a514 1127 register_gdbarch_init (bfd_arch_i386, x86_64_gdbarch_init);
53e95fcf
JS		 1128
1129 /* Initialize the table saying where each register starts in the
1130 register file. */
1131 {
1132 int i, offset;
1133
1134 offset = 0;
1135 for (i = 0; i < X86_64_NUM_REGS; i++)
1136 {
1137 x86_64_register_byte_table[i] = offset;
de220d0f 1138 offset += x86_64_register_info_table[i].size;
53e95fcf
JS		 1139 }
1140 }
1141
1142 tm_print_insn = gdb_print_insn_x86_64;
1143 tm_print_insn_info.mach = bfd_lookup_arch (bfd_arch_i386, 3)->mach;
1144
1145 /* Add the variable that controls the disassembly flavour. */
1146 {
1147 struct cmd_list_element *new_cmd;
1148
1149 new_cmd = add_set_enum_cmd ("disassembly-flavour", no_class,
1150 valid_flavours, &disassembly_flavour, "\
1151Set the disassembly flavour, the valid values are \"att\" and \"intel\", \
1152and the default value is \"att\".", &setlist);
1153 add_show_from_set (new_cmd, &showlist);
1154 }
1155}
GDB Binutils - Deliverables
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