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1525d545 | 1 | /* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB. |
b811d2c2 | 2 | Copyright (C) 2007-2020 Free Software Foundation, Inc. |
1525d545 MG |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 3 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
18 | ||
19 | ||
20 | #include "server.h" | |
21 | #include "linux-low.h" | |
22 | ||
ef0478f6 TBA |
23 | /* Linux target op definitions for the Xtensa architecture. */ |
24 | ||
25 | class xtensa_target : public linux_process_target | |
26 | { | |
27 | public: | |
28 | ||
aa8d21c9 TBA |
29 | const regs_info *get_regs_info () override; |
30 | ||
3ca4edb6 TBA |
31 | const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override; |
32 | ||
797bcff5 TBA |
33 | protected: |
34 | ||
35 | void low_arch_setup () override; | |
daca57a7 TBA |
36 | |
37 | bool low_cannot_fetch_register (int regno) override; | |
38 | ||
39 | bool low_cannot_store_register (int regno) override; | |
bf9ae9d8 TBA |
40 | |
41 | bool low_supports_breakpoints () override; | |
42 | ||
43 | CORE_ADDR low_get_pc (regcache *regcache) override; | |
44 | ||
45 | void low_set_pc (regcache *regcache, CORE_ADDR newpc) override; | |
d7146cda TBA |
46 | |
47 | bool low_breakpoint_at (CORE_ADDR pc) override; | |
ef0478f6 TBA |
48 | }; |
49 | ||
50 | /* The singleton target ops object. */ | |
51 | ||
52 | static xtensa_target the_xtensa_target; | |
53 | ||
daca57a7 TBA |
54 | bool |
55 | xtensa_target::low_cannot_fetch_register (int regno) | |
56 | { | |
57 | gdb_assert_not_reached ("linux target op low_cannot_fetch_register " | |
58 | "is not implemented by the target"); | |
59 | } | |
60 | ||
61 | bool | |
62 | xtensa_target::low_cannot_store_register (int regno) | |
63 | { | |
64 | gdb_assert_not_reached ("linux target op low_cannot_store_register " | |
65 | "is not implemented by the target"); | |
66 | } | |
67 | ||
bf9ae9d8 TBA |
68 | bool |
69 | xtensa_target::low_supports_breakpoints () | |
70 | { | |
71 | return true; | |
72 | } | |
73 | ||
74 | CORE_ADDR | |
75 | xtensa_target::low_get_pc (regcache *regcache) | |
76 | { | |
77 | return linux_get_pc_32bit (regcache); | |
78 | } | |
79 | ||
80 | void | |
81 | xtensa_target::low_set_pc (regcache *regcache, CORE_ADDR pc) | |
82 | { | |
83 | linux_set_pc_32bit (regcache, pc); | |
84 | } | |
85 | ||
d05b4ac3 UW |
86 | /* Defined in auto-generated file reg-xtensa.c. */ |
87 | void init_registers_xtensa (void); | |
3aee8918 | 88 | extern const struct target_desc *tdesc_xtensa; |
d05b4ac3 | 89 | |
e671835b | 90 | #include <asm/ptrace.h> |
1525d545 | 91 | #include <xtensa-config.h> |
40045d91 MF |
92 | #include "arch/xtensa.h" |
93 | #include "gdb_proc_service.h" | |
1525d545 MG |
94 | |
95 | #include "xtensa-xtregs.c" | |
96 | ||
97 | enum regnum { | |
98 | R_PC=0, R_PS, | |
99 | R_LBEG, R_LEND, R_LCOUNT, | |
100 | R_SAR, | |
101 | R_WS, R_WB, | |
a12e714b | 102 | R_THREADPTR, |
1b3f6016 | 103 | R_A0 = 64 |
1525d545 MG |
104 | }; |
105 | ||
106 | static void | |
442ea881 | 107 | xtensa_fill_gregset (struct regcache *regcache, void *buf) |
1525d545 MG |
108 | { |
109 | elf_greg_t* rset = (elf_greg_t*)buf; | |
3aee8918 | 110 | const struct target_desc *tdesc = regcache->tdesc; |
1525d545 MG |
111 | int ar0_regnum; |
112 | char *ptr; | |
113 | int i; | |
114 | ||
115 | /* Take care of AR registers. */ | |
116 | ||
3aee8918 | 117 | ar0_regnum = find_regno (tdesc, "ar0"); |
1525d545 MG |
118 | ptr = (char*)&rset[R_A0]; |
119 | ||
120 | for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++) | |
121 | { | |
442ea881 | 122 | collect_register (regcache, i, ptr); |
3aee8918 | 123 | ptr += register_size (tdesc, i); |
1525d545 MG |
124 | } |
125 | ||
1a09b50a MF |
126 | if (XSHAL_ABI == XTHAL_ABI_CALL0) |
127 | { | |
128 | int a0_regnum = find_regno (tdesc, "a0"); | |
129 | ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]]; | |
130 | ||
131 | for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++) | |
132 | { | |
133 | if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS) | |
134 | ptr = (char *) &rset[R_A0]; | |
135 | collect_register (regcache, i, ptr); | |
136 | ptr += register_size (tdesc, i); | |
137 | } | |
138 | } | |
139 | ||
1525d545 MG |
140 | /* Loop registers, if hardware has it. */ |
141 | ||
a2d5a9d7 | 142 | #if XCHAL_HAVE_LOOPS |
442ea881 PA |
143 | collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]); |
144 | collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]); | |
145 | collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]); | |
1525d545 MG |
146 | #endif |
147 | ||
442ea881 PA |
148 | collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]); |
149 | collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]); | |
150 | collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]); | |
151 | collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]); | |
152 | collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]); | |
a12e714b MF |
153 | |
154 | #if XCHAL_HAVE_THREADPTR | |
155 | collect_register_by_name (regcache, "threadptr", | |
156 | (char *) &rset[R_THREADPTR]); | |
157 | #endif | |
1525d545 MG |
158 | } |
159 | ||
160 | static void | |
442ea881 | 161 | xtensa_store_gregset (struct regcache *regcache, const void *buf) |
1525d545 MG |
162 | { |
163 | const elf_greg_t* rset = (const elf_greg_t*)buf; | |
3aee8918 | 164 | const struct target_desc *tdesc = regcache->tdesc; |
1525d545 MG |
165 | int ar0_regnum; |
166 | char *ptr; | |
167 | int i; | |
168 | ||
169 | /* Take care of AR registers. */ | |
170 | ||
3aee8918 | 171 | ar0_regnum = find_regno (tdesc, "ar0"); |
1525d545 MG |
172 | ptr = (char *)&rset[R_A0]; |
173 | ||
174 | for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++) | |
175 | { | |
442ea881 | 176 | supply_register (regcache, i, ptr); |
3aee8918 | 177 | ptr += register_size (tdesc, i); |
1525d545 MG |
178 | } |
179 | ||
1a09b50a MF |
180 | if (XSHAL_ABI == XTHAL_ABI_CALL0) |
181 | { | |
182 | int a0_regnum = find_regno (tdesc, "a0"); | |
183 | ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS]; | |
184 | ||
185 | for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++) | |
186 | { | |
187 | if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS) | |
188 | ptr = (char *) &rset[R_A0]; | |
189 | supply_register (regcache, i, ptr); | |
190 | ptr += register_size (tdesc, i); | |
191 | } | |
192 | } | |
193 | ||
1525d545 MG |
194 | /* Loop registers, if hardware has it. */ |
195 | ||
a2d5a9d7 | 196 | #if XCHAL_HAVE_LOOPS |
442ea881 PA |
197 | supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]); |
198 | supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]); | |
199 | supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]); | |
1525d545 MG |
200 | #endif |
201 | ||
442ea881 PA |
202 | supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]); |
203 | supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]); | |
204 | supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]); | |
205 | supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]); | |
206 | supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]); | |
a12e714b MF |
207 | |
208 | #if XCHAL_HAVE_THREADPTR | |
209 | supply_register_by_name (regcache, "threadptr", | |
210 | (char *) &rset[R_THREADPTR]); | |
211 | #endif | |
1525d545 MG |
212 | } |
213 | ||
214 | /* Xtensa GNU/Linux PTRACE interface includes extended register set. */ | |
215 | ||
216 | static void | |
442ea881 | 217 | xtensa_fill_xtregset (struct regcache *regcache, void *buf) |
1525d545 MG |
218 | { |
219 | const xtensa_regtable_t *ptr; | |
220 | ||
221 | for (ptr = xtensa_regmap_table; ptr->name; ptr++) | |
222 | { | |
442ea881 | 223 | collect_register_by_name (regcache, ptr->name, |
1525d545 MG |
224 | (char*)buf + ptr->ptrace_offset); |
225 | } | |
226 | } | |
227 | ||
228 | static void | |
442ea881 | 229 | xtensa_store_xtregset (struct regcache *regcache, const void *buf) |
1525d545 MG |
230 | { |
231 | const xtensa_regtable_t *ptr; | |
232 | ||
233 | for (ptr = xtensa_regmap_table; ptr->name; ptr++) | |
234 | { | |
442ea881 | 235 | supply_register_by_name (regcache, ptr->name, |
1525d545 MG |
236 | (char*)buf + ptr->ptrace_offset); |
237 | } | |
238 | } | |
239 | ||
3aee8918 | 240 | static struct regset_info xtensa_regsets[] = { |
1570b33e | 241 | { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t), |
1525d545 MG |
242 | GENERAL_REGS, |
243 | xtensa_fill_gregset, xtensa_store_gregset }, | |
1570b33e | 244 | { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE, |
1525d545 MG |
245 | EXTENDED_REGS, |
246 | xtensa_fill_xtregset, xtensa_store_xtregset }, | |
50bc912a | 247 | NULL_REGSET |
1525d545 MG |
248 | }; |
249 | ||
250 | #if XCHAL_HAVE_BE | |
251 | #define XTENSA_BREAKPOINT {0xd2,0x0f} | |
252 | #else | |
253 | #define XTENSA_BREAKPOINT {0x2d,0xf0} | |
254 | #endif | |
255 | ||
dd373349 | 256 | static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT; |
1525d545 MG |
257 | #define xtensa_breakpoint_len 2 |
258 | ||
3ca4edb6 | 259 | /* Implementation of target ops method "sw_breakpoint_from_kind". */ |
dd373349 | 260 | |
3ca4edb6 TBA |
261 | const gdb_byte * |
262 | xtensa_target::sw_breakpoint_from_kind (int kind, int *size) | |
dd373349 AT |
263 | { |
264 | *size = xtensa_breakpoint_len; | |
265 | return xtensa_breakpoint; | |
266 | } | |
267 | ||
d7146cda TBA |
268 | bool |
269 | xtensa_target::low_breakpoint_at (CORE_ADDR where) | |
1525d545 MG |
270 | { |
271 | unsigned long insn; | |
272 | ||
d7146cda | 273 | read_memory (where, (unsigned char *) &insn, xtensa_breakpoint_len); |
493e2a69 MS |
274 | return memcmp((char *) &insn, |
275 | xtensa_breakpoint, xtensa_breakpoint_len) == 0; | |
1525d545 MG |
276 | } |
277 | ||
40045d91 MF |
278 | /* Called by libthread_db. */ |
279 | ||
280 | ps_err_e | |
754653a7 | 281 | ps_get_thread_area (struct ps_prochandle *ph, |
dda83cd7 | 282 | lwpid_t lwpid, int idx, void **base) |
40045d91 MF |
283 | { |
284 | xtensa_elf_gregset_t regs; | |
285 | ||
286 | if (ptrace (PTRACE_GETREGS, lwpid, NULL, ®s) != 0) | |
287 | return PS_ERR; | |
288 | ||
289 | /* IDX is the bias from the thread pointer to the beginning of the | |
290 | thread descriptor. It has to be subtracted due to implementation | |
291 | quirks in libthread_db. */ | |
292 | *base = (void *) ((char *) regs.threadptr - idx); | |
293 | ||
294 | return PS_OK; | |
295 | } | |
296 | ||
3aee8918 PA |
297 | static struct regsets_info xtensa_regsets_info = |
298 | { | |
299 | xtensa_regsets, /* regsets */ | |
300 | 0, /* num_regsets */ | |
301 | NULL, /* disabled_regsets */ | |
302 | }; | |
303 | ||
aa8d21c9 | 304 | static struct regs_info myregs_info = |
3aee8918 PA |
305 | { |
306 | NULL, /* regset_bitmap */ | |
deb44829 | 307 | NULL, /* usrregs */ |
3aee8918 PA |
308 | &xtensa_regsets_info |
309 | }; | |
310 | ||
797bcff5 TBA |
311 | void |
312 | xtensa_target::low_arch_setup () | |
3aee8918 PA |
313 | { |
314 | current_process ()->tdesc = tdesc_xtensa; | |
315 | } | |
316 | ||
aa8d21c9 TBA |
317 | const regs_info * |
318 | xtensa_target::get_regs_info () | |
3aee8918 | 319 | { |
aa8d21c9 | 320 | return &myregs_info; |
3aee8918 PA |
321 | } |
322 | ||
ef0478f6 TBA |
323 | /* The linux target ops object. */ |
324 | ||
325 | linux_process_target *the_linux_target = &the_xtensa_target; | |
3aee8918 PA |
326 | |
327 | void | |
328 | initialize_low_arch (void) | |
329 | { | |
330 | /* Initialize the Linux target descriptions. */ | |
331 | init_registers_xtensa (); | |
332 | ||
333 | initialize_regsets_info (&xtensa_regsets_info); | |
334 | } |