gdbserver/linux-low: turn 'regs_info' into a method
[deliverable/binutils-gdb.git] / gdbserver / linux-xtensa-low.cc
CommitLineData
1525d545 1/* GNU/Linux/Xtensa specific low level interface, for the remote server for GDB.
b811d2c2 2 Copyright (C) 2007-2020 Free Software Foundation, Inc.
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3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19
20#include "server.h"
21#include "linux-low.h"
22
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23/* Linux target op definitions for the Xtensa architecture. */
24
25class xtensa_target : public linux_process_target
26{
27public:
28
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29 const regs_info *get_regs_info () override;
30
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31protected:
32
33 void low_arch_setup () override;
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34};
35
36/* The singleton target ops object. */
37
38static xtensa_target the_xtensa_target;
39
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40/* Defined in auto-generated file reg-xtensa.c. */
41void init_registers_xtensa (void);
3aee8918 42extern const struct target_desc *tdesc_xtensa;
d05b4ac3 43
e671835b 44#include <asm/ptrace.h>
1525d545 45#include <xtensa-config.h>
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46#include "arch/xtensa.h"
47#include "gdb_proc_service.h"
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48
49#include "xtensa-xtregs.c"
50
51enum regnum {
52 R_PC=0, R_PS,
53 R_LBEG, R_LEND, R_LCOUNT,
54 R_SAR,
55 R_WS, R_WB,
a12e714b 56 R_THREADPTR,
1b3f6016 57 R_A0 = 64
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58};
59
60static void
442ea881 61xtensa_fill_gregset (struct regcache *regcache, void *buf)
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62{
63 elf_greg_t* rset = (elf_greg_t*)buf;
3aee8918 64 const struct target_desc *tdesc = regcache->tdesc;
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65 int ar0_regnum;
66 char *ptr;
67 int i;
68
69 /* Take care of AR registers. */
70
3aee8918 71 ar0_regnum = find_regno (tdesc, "ar0");
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72 ptr = (char*)&rset[R_A0];
73
74 for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
75 {
442ea881 76 collect_register (regcache, i, ptr);
3aee8918 77 ptr += register_size (tdesc, i);
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78 }
79
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80 if (XSHAL_ABI == XTHAL_ABI_CALL0)
81 {
82 int a0_regnum = find_regno (tdesc, "a0");
83 ptr = (char *) &rset[R_A0 + 4 * rset[R_WB]];
84
85 for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
86 {
87 if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
88 ptr = (char *) &rset[R_A0];
89 collect_register (regcache, i, ptr);
90 ptr += register_size (tdesc, i);
91 }
92 }
93
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94 /* Loop registers, if hardware has it. */
95
a2d5a9d7 96#if XCHAL_HAVE_LOOPS
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97 collect_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
98 collect_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
99 collect_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
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100#endif
101
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102 collect_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
103 collect_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
104 collect_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
105 collect_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
106 collect_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
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107
108#if XCHAL_HAVE_THREADPTR
109 collect_register_by_name (regcache, "threadptr",
110 (char *) &rset[R_THREADPTR]);
111#endif
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112}
113
114static void
442ea881 115xtensa_store_gregset (struct regcache *regcache, const void *buf)
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116{
117 const elf_greg_t* rset = (const elf_greg_t*)buf;
3aee8918 118 const struct target_desc *tdesc = regcache->tdesc;
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119 int ar0_regnum;
120 char *ptr;
121 int i;
122
123 /* Take care of AR registers. */
124
3aee8918 125 ar0_regnum = find_regno (tdesc, "ar0");
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126 ptr = (char *)&rset[R_A0];
127
128 for (i = ar0_regnum; i < ar0_regnum + XCHAL_NUM_AREGS; i++)
129 {
442ea881 130 supply_register (regcache, i, ptr);
3aee8918 131 ptr += register_size (tdesc, i);
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132 }
133
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134 if (XSHAL_ABI == XTHAL_ABI_CALL0)
135 {
136 int a0_regnum = find_regno (tdesc, "a0");
137 ptr = (char *) &rset[R_A0 + (4 * rset[R_WB]) % XCHAL_NUM_AREGS];
138
139 for (i = a0_regnum; i < a0_regnum + C0_NREGS; i++)
140 {
141 if ((4 * rset[R_WB] + i - a0_regnum) == XCHAL_NUM_AREGS)
142 ptr = (char *) &rset[R_A0];
143 supply_register (regcache, i, ptr);
144 ptr += register_size (tdesc, i);
145 }
146 }
147
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148 /* Loop registers, if hardware has it. */
149
a2d5a9d7 150#if XCHAL_HAVE_LOOPS
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151 supply_register_by_name (regcache, "lbeg", (char*)&rset[R_LBEG]);
152 supply_register_by_name (regcache, "lend", (char*)&rset[R_LEND]);
153 supply_register_by_name (regcache, "lcount", (char*)&rset[R_LCOUNT]);
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154#endif
155
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156 supply_register_by_name (regcache, "sar", (char*)&rset[R_SAR]);
157 supply_register_by_name (regcache, "pc", (char*)&rset[R_PC]);
158 supply_register_by_name (regcache, "ps", (char*)&rset[R_PS]);
159 supply_register_by_name (regcache, "windowbase", (char*)&rset[R_WB]);
160 supply_register_by_name (regcache, "windowstart", (char*)&rset[R_WS]);
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161
162#if XCHAL_HAVE_THREADPTR
163 supply_register_by_name (regcache, "threadptr",
164 (char *) &rset[R_THREADPTR]);
165#endif
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166}
167
168/* Xtensa GNU/Linux PTRACE interface includes extended register set. */
169
170static void
442ea881 171xtensa_fill_xtregset (struct regcache *regcache, void *buf)
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172{
173 const xtensa_regtable_t *ptr;
174
175 for (ptr = xtensa_regmap_table; ptr->name; ptr++)
176 {
442ea881 177 collect_register_by_name (regcache, ptr->name,
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178 (char*)buf + ptr->ptrace_offset);
179 }
180}
181
182static void
442ea881 183xtensa_store_xtregset (struct regcache *regcache, const void *buf)
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184{
185 const xtensa_regtable_t *ptr;
186
187 for (ptr = xtensa_regmap_table; ptr->name; ptr++)
188 {
442ea881 189 supply_register_by_name (regcache, ptr->name,
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190 (char*)buf + ptr->ptrace_offset);
191 }
192}
193
3aee8918 194static struct regset_info xtensa_regsets[] = {
1570b33e 195 { PTRACE_GETREGS, PTRACE_SETREGS, 0, sizeof (elf_gregset_t),
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196 GENERAL_REGS,
197 xtensa_fill_gregset, xtensa_store_gregset },
1570b33e 198 { PTRACE_GETXTREGS, PTRACE_SETXTREGS, 0, XTENSA_ELF_XTREG_SIZE,
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199 EXTENDED_REGS,
200 xtensa_fill_xtregset, xtensa_store_xtregset },
50bc912a 201 NULL_REGSET
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202};
203
204#if XCHAL_HAVE_BE
205#define XTENSA_BREAKPOINT {0xd2,0x0f}
206#else
207#define XTENSA_BREAKPOINT {0x2d,0xf0}
208#endif
209
dd373349 210static const gdb_byte xtensa_breakpoint[] = XTENSA_BREAKPOINT;
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211#define xtensa_breakpoint_len 2
212
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213/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
214
215static const gdb_byte *
216xtensa_sw_breakpoint_from_kind (int kind, int *size)
217{
218 *size = xtensa_breakpoint_len;
219 return xtensa_breakpoint;
220}
221
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222static int
223xtensa_breakpoint_at (CORE_ADDR where)
224{
225 unsigned long insn;
226
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227 the_target->read_memory (where, (unsigned char *) &insn,
228 xtensa_breakpoint_len);
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229 return memcmp((char *) &insn,
230 xtensa_breakpoint, xtensa_breakpoint_len) == 0;
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231}
232
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233/* Called by libthread_db. */
234
235ps_err_e
754653a7 236ps_get_thread_area (struct ps_prochandle *ph,
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237 lwpid_t lwpid, int idx, void **base)
238{
239 xtensa_elf_gregset_t regs;
240
241 if (ptrace (PTRACE_GETREGS, lwpid, NULL, &regs) != 0)
242 return PS_ERR;
243
244 /* IDX is the bias from the thread pointer to the beginning of the
245 thread descriptor. It has to be subtracted due to implementation
246 quirks in libthread_db. */
247 *base = (void *) ((char *) regs.threadptr - idx);
248
249 return PS_OK;
250}
251
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252static struct regsets_info xtensa_regsets_info =
253 {
254 xtensa_regsets, /* regsets */
255 0, /* num_regsets */
256 NULL, /* disabled_regsets */
257 };
258
aa8d21c9 259static struct regs_info myregs_info =
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260 {
261 NULL, /* regset_bitmap */
deb44829 262 NULL, /* usrregs */
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263 &xtensa_regsets_info
264 };
265
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266void
267xtensa_target::low_arch_setup ()
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268{
269 current_process ()->tdesc = tdesc_xtensa;
270}
271
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272/* Support for hardware single step. */
273
274static int
275xtensa_supports_hardware_single_step (void)
276{
277 return 1;
278}
279
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280const regs_info *
281xtensa_target::get_regs_info ()
3aee8918 282{
aa8d21c9 283 return &myregs_info;
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284}
285
1525d545 286struct linux_target_ops the_low_target = {
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287 0,
288 0,
c14dfd32 289 NULL, /* fetch_register */
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290 linux_get_pc_32bit,
291 linux_set_pc_32bit,
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292 NULL, /* breakpoint_kind_from_pc */
293 xtensa_sw_breakpoint_from_kind,
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294 NULL,
295 0,
296 xtensa_breakpoint_at,
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297 NULL, /* supports_z_point_type */
298 NULL, /* insert_point */
299 NULL, /* remove_point */
300 NULL, /* stopped_by_watchpoint */
301 NULL, /* stopped_data_address */
302 NULL, /* collect_ptrace_register */
303 NULL, /* supply_ptrace_register */
304 NULL, /* siginfo_fixup */
305 NULL, /* new_process */
04ec7890 306 NULL, /* delete_process */
7d00775e 307 NULL, /* new_thread */
466eecee 308 NULL, /* delete_thread */
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309 NULL, /* new_fork */
310 NULL, /* prepare_to_resume */
311 NULL, /* process_qsupported */
312 NULL, /* supports_tracepoints */
313 NULL, /* get_thread_area */
314 NULL, /* install_fast_tracepoint_jump_pad */
315 NULL, /* emit_ops */
316 NULL, /* get_min_fast_tracepoint_insn_len */
317 NULL, /* supports_range_stepping */
318 NULL, /* breakpoint_kind_from_current_state */
319 xtensa_supports_hardware_single_step,
1525d545 320};
3aee8918 321
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322/* The linux target ops object. */
323
324linux_process_target *the_linux_target = &the_xtensa_target;
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325
326void
327initialize_low_arch (void)
328{
329 /* Initialize the Linux target descriptions. */
330 init_registers_xtensa ();
331
332 initialize_regsets_info (&xtensa_regsets_info);
333}
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