projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Automatic date update in version.in
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
bb7eff52
RS		 12016-09-21 Richard Sandiford <richard.sandiford@arm.com>
2
3 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
4
c0890d26
RS		 52016-09-21 Richard Sandiford <richard.sandiford@arm.com>
6
7 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
8 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
9 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
10 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
11
116b6019
RS		 122016-09-21 Richard Sandiford <richard.sandiford@arm.com>
13
14 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
15 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
16 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
17 aarch64_insn_classes.
18
047cd301
RS		 192016-09-21 Richard Sandiford <richard.sandiford@arm.com>
20
21 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
22 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
23 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
24
165d4950
RS		 252016-09-21 Richard Sandiford <richard.sandiford@arm.com>
26
27 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
28 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
29 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
30
e950b345
RS		 312016-09-21 Richard Sandiford <richard.sandiford@arm.com>
32
33 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
34 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
35 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
36 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
37 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
38 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
39 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
40 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
41 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
42 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
43 (aarch64_sve_dupm_mov_immediate_p): Declare.
44
98907a70
RS		 452016-09-21 Richard Sandiford <richard.sandiford@arm.com>
46
47 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
48 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
49 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
50 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
51 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
52
4df068de
RS		 532016-09-21 Richard Sandiford <richard.sandiford@arm.com>
54
55 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
56 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
57 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
58 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
59 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
60 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
61 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
62 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
63 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
64 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
65 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
66 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
67 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
68 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
69 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
70 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
71 Likewise.
72
2442d846
RS		 732016-09-21 Richard Sandiford <richard.sandiford@arm.com>
74
75 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
76 aarch64_opnd.
77 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
78 (aarch64_opnd_info): Make shifter.amount an int64_t and
79 rearrange the fields.
80
245d2e3f
RS		 812016-09-21 Richard Sandiford <richard.sandiford@arm.com>
82
83 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
84 (AARCH64_OPND_SVE_PRFOP): Likewise.
85 (aarch64_sve_pattern_array): Declare.
86 (aarch64_sve_prfop_array): Likewise.
87
d50c751e
RS		 882016-09-21 Richard Sandiford <richard.sandiford@arm.com>
89
90 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
91 (AARCH64_OPND_QLF_P_M): Likewise.
92
f11ad6bc
RS		 932016-09-21 Richard Sandiford <richard.sandiford@arm.com>
94
95 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
96 aarch64_operand_class.
97 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
98 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
99 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
100 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
101 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
102 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
103 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
104 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
105
0c608d6b
RS		 1062016-09-21 Richard Sandiford <richard.sandiford@arm.com>
107
108 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
109 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
110
4989adac
RS		 1112016-09-21 Richard Sandiford <richard.sandiford@arm.com>
112
113 * opcode/aarch64.h (F_STRICT): New flag.
114
27e5a270
RE		 1152016-09-07 Richard Earnshaw <rearnsha@arm.com>
116
117 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
118
a87aa054
CM		 1192016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
120 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
121 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
122 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
123 relocation.
124
4ba2ef8f
TP		 1252016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
126
127 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
128 (ARM_SET_SYM_CMSE_SPCL): Likewise.
129
dfdaec14
AJ		 1302016-08-01 Andrew Jenner <andrew@codesourcery.com>
131
132 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
133
fa3fcee7
NC		 1342016-07-29 Aldy Hernandez <aldyh@redhat.com>
135
136 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
137
db18dbab
GM		 1382016-07-27 Graham Markall <graham.markall@embecosm.com>
139
140 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
141 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
142 ARC_NUM_ADDRTYPES.
143 * opcode/arc.h: Add BMU to insn_class_t enum.
144 * opcode/arc.h: Add PMU to insn_class_t enum.
145
37fd5ef3
CZ		 1462016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
147
148 * dis-asm.h: Declare print_arc_disassembler_options.
149
76359541
TP		 1502016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
151
152 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
153 out_implib_bfd fields.
154
fa1c0170
CZ		 1552016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
156
157 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
158
f0728ee3
AV		 1592016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
160
161 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
162 (SHF_ARM_PURECODE): ... this.
163
93d8990c
SN		 1642016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
165
166 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
167 (AARCH64_CPU_HAS_ANY_FEATURES): New.
168 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
169 (AARCH64_OPCODE_HAS_FEATURE): Remove.
170
534dbe46
MW		 1712016-06-30 Matthew Wahab <matthew.wahab@arm.com>
172
173 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
174 of enabled FPU features.
175
042c94de
TS		 1762016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
177
178 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
179 SPARC_OPCODE_ARCH_MAX into the enum.
180
dab26bf4
RS		 1812016-06-28 Richard Sandiford <richard.sandiford@arm.com>
182
183 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
184
c9775dde
MR		 1852016-06-28 Maciej W. Rozycki <macro@imgtec.com>
186
187 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
188
7c2c4aa1
TS		 1892016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
190
191 * elf/xtensa.h (xtensa_make_property_section): New prototype.
192
b00f86d0
JB		 1932016-06-24 John Baldwin <jhb@FreeBSD.org>
194
195 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
196 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
197 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
198 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
199
ce440d63
GM		 2002016-06-23 Graham Markall <graham.markall@embecosm.com>
201
202 * opcode/arc.h: Make insn_class_t alphabetical again.
203
6b477896
TS		 2042016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
205
206 * elf/dlx.h: Wrap in extern C.
207 * elf/xtensa.h: Likewise.
208 * opcode/arc.h: Likewise.
209
6edaf4d7
TS		 2102016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
211
212 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
213 tilegx_pipeline.
214
bdd582db
GM		 2152016-06-21 Graham Markall <graham.markall@embecosm.com>
216
217 * opcode/arc.h: Add nps400 extension and instruction
218 subclass.
219 Remove ARC_OPCODE_NPS400
220 * elf/arc.h: Remove E_ARC_MACH_NPS400
221
4f26fb3a
JM		 2222016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
223
224 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
225 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
226 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
227 SPARC_OPCODE_ARCH_V9M.
228
99a54ef6
JB		 2292016-06-14 John Baldwin <jhb@FreeBSD.org>
230
231 * opcode/msp430-decode.h (MSP430_Size): Remove.
232 (Msp430_Opcode_Decoded): Change type of size to int.
233
0eaf2e1b
AM		 2342016-06-11 Alan Modra <amodra@gmail.com>
235
236 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
237
337c570c
JM		 2382016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
239
240 * opcode/sparc.h: Add missing documentation for hyperprivileged
241 registers in rd (%) and rs1 ($).
242
14b57c7c
AM		 2432016-06-07 Alan Modra <amodra@gmail.com>
244
245 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
246 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
247 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
248 PPC_APUINFO_VLE: Define.
249
4d1464f2
MW		 2502016-06-07 Matthew Wahab <matthew.wahab@arm.com>
251
252 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
253 entries.
254 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
255
4eb6f892
AB		 2562016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
257
258 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
259 (struct arc_long_opcode): New structure.
260 (arc_long_opcodes): Declare.
261 (arc_num_long_opcodes): Declare.
262
1fe0971e
TS		 2632016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
264
265 * elf/mips.h: Add extern "C".
266 * elf/sh.h: Likewise.
267 * opcode/d10v.h: Likewise.
268 * opcode/d30v.h: Likewise.
269 * opcode/ia64.h: Likewise.
270 * opcode/mips.h: Likewise.
271 * opcode/ppc.h: Likewise.
272 * opcode/sparc.h: Likewise.
273 * opcode/tic6x.h: Likewise.
274 * opcode/v850.h: Likewise.
275
1a72702b
AM		 2762016-05-28 Alan Modra <amodra@gmail.com>
277
278 * bfdlink.h (struct bfd_link_callbacks): Update comments.
279 Return void from multiple_definition, multiple_common,
280 add_to_set, constructor, warning, undefined_symbol,
281 reloc_overflow, reloc_dangerous and unattached_reloc.
282
94740f9c
TS		 2832016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
284
285 * opcode/metag.h: wrap declarations in extern "C".
286
d9eca1df
CZ		 2872016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
288
289 * opcode/arc.h (insn_subclass_t): Add COND.
290 (flag_class_t): Add F_CLASS_EXTEND.
291
c810e0b8
CZ		 2922016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
293
294 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
295 insn_class.
296 (struct arc_flag_class): Renamed attribute class to flag_class.
297
3d207518
TS		 2982016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
299
300 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
301 plain symbol.
302
5ff087ac
TT		 3032016-04-29 Tom Tromey <tom@tromey.com>
304
305 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
306 DW_LANG_Rust_old>: New constants.
307
8f4f9071
MF		 3082016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
309
310 * elf/mips.h (AFL_ASE_DSPR3): New macro.
311 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
312 * opcode/mips.h (ASE_DSPR3): New macro.
313
39d911fc
TP		 3142016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
315 Nick Clifton <nickc@redhat.com>
316
317 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
318 enumerator.
319 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
320 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
321 (ARM_SYM_BRANCH_TYPE): Replace by ...
322 (ARM_GET_SYM_BRANCH_TYPE): This and ...
323 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
324 BFD_ASSERT is defined or not.
325
15afaa63
TP		 3262016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
327
328 * elf/arm.h (Tag_DSP_extension): Define.
329
d942732e
TP		 3302016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
331
332 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
333
16a1fa25
TP		 3342016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
335
336 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
337 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
338 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
339 for the high core bits.
340
945e0f82
CZ		 3412016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
342
343 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
344 (ARC_SYNTAX_NOP): Likewsie.
345 (ARC_OP1_MUST_BE_IMM): Update defined value.
346 (ARC_OP1_IMM_IMPLIED): Likewise.
347 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
348
4bd13cde
NC		 3492016-04-28 Nick Clifton <nickc@redhat.com>
350
351 PR target/19722
352 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
353
a6a4679f
AM		 3542016-04-27 Alan Modra <amodra@gmail.com>
355
356 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
357 undef. Formatting.
358
4f3b23b3
NC		 3592016-04-21 Nick Clifton <nickc@redhat.com>
360
361 * bfdlink.h: Add prototype for bfd_link_check_relocs.
362
d9689752
L		 3632016-04-20 H.J. Lu <hongjiu.lu@intel.com>
364
365 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
366
52176c67
AB		 3672016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
368
369 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
370
537aefaf
AB		 3712016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
372
373 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
374
c8f785f2
AB		 3752016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
376
377 * opcode/arc.h (insn_class_t): Add NET and ACL class.
378
4b0c052e
AB		 3792016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
380
381 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
382 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
383
f36e33da
CZ		 3842016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
385
386 * opcode/arc.h (flag_class_t): Update.
387 (ARC_OPCODE_NONE): Define.
388 (ARC_OPCODE_ARCALL): Likewise.
389 (ARC_OPCODE_ARCFPX): Likewise.
390 (ARC_REGISTER_READONLY): Likewise.
391 (ARC_REGISTER_WRITEONLY): Likewise.
392 (ARC_REGISTER_NOSHORT_CUT): Likewise.
393 (arc_aux_reg): Add cpu.
394
b99747ae
CZ		 3952016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
396
397 * opcode/arc.h (arc_num_opcodes): Remove.
398 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
399 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
400 (ARC_SUFFIX_FLAG): Define.
401 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
402 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
403 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
404 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
405 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
406 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
407 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
408 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
409 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
410 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
411
4122016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
413
414 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
415 (ARC_FPUDA): Define.
416 (arc_aux_reg): Add new field.
417
4182016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
094fb063
CZ		 419
420 * opcode/arc-func.h (replace_bits24): Changed.
421 (replace_bits24_be): Created.
422
f2dd8838
CZ		 4232016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
424
b99747ae
CZ		 425 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
426 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
427 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
428 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
429 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
430 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
431 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
432 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
433 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
434 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
435 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
436 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
437 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
438 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
f2dd8838 439
b9bb4a93
TS		 4402016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
441
442 * opcode/i960.h: Add const qualifiers.
443 * opcode/tic4x.h (struct tic4x_inst): Likewise.
444
e23e8ebe
AB		 4452016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
446
447 * opcodes/arc.h (insn_class_t): Add BITOP type.
448
1ae8ab47
AB		 4492016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
450
451 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
452 new classes instead.
453
8699fc3e
AB		 4542016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
455
456 * elf/arc.h (E_ARC_MACH_NPS400): Define.
457 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
458
a9522a21
AB		 4592016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
460
461 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
462
c0334580
AB		 4632016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
464
465 * elf/arc.h (EF_ARC_MACH): Delete.
466 (EF_ARC_MACH_MSK): Remove out of date comment.
467
24740d83
AB		 4682016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
469
470 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
471
4c10bbaa
L		 4722016-03-15 H.J. Lu <hongjiu.lu@intel.com>
473
474 PR ld/19807
475 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
476
72f3b6aa
CZ		 4772016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
478 Andrew Burgess <andrew.burgess@embecosm.com>
479
480 * elf/arc-reloc.def: Add a call to ME within the formula for each
481 relocation that requires middle-endian correction.
482
f86f5863
TS		 4832016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
484
485 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
486 * opcode/h8300.h (struct h8_opcode): Likewise.
487 * opcode/hppa.h (struct pa_opcode): Likewise.
488 * opcode/msp430.h: Likewise.
489 * opcode/spu.h (struct spu_opcode): Likewise.
490 * opcode/tic30.h (struct _register): Likewise.
491 * opcode/tic4x.h (struct tic4x_register): Likewise.
492 (struct tic4x_cond): Likewise.
493 (struct tic4x_indirect): Likewise.
494 (struct tic4x_inst): Likewise.
495 * opcode/visium.h (struct reg_entry): Likewise.
496
643afb90
MW		 4972016-03-04 Matthew Wahab <matthew.wahab@arm.com>
498
499 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
500 (ARM_CPU_HAS_FEATURE): Add comment.
501
3f1f41f5
L		 5022016-03-03 Than McIntosh <thanm@google.com>
503
504 * plugin-api.h: Add new hooks to the plugin transfer vector to
505 to support querying section alignment and section size.
506 (ld_plugin_get_input_section_alignment): New hook.
507 (ld_plugin_get_input_section_size): New hook.
508 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
509 and LDPT_GET_INPUT_SECTION_SIZE.
510 (ld_plugin_tv): Add tv_get_input_section_alignment and
511 tv_get_input_section_size.
512
9b738e36 5132016-03-03 Evgenii Stepanov <eugenis@google.com>
95ecdfbf
ES		 514
515 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
516
11e5f1ec
L		 5172016-02-26 H.J. Lu <hongjiu.lu@intel.com>
518
519 PR ld/19645
520 * bfdlink.h (bfd_link_elf_stt_common): New enum.
521 (bfd_link_info): Add elf_stt_common.
522
aec6b87e
L		 5232016-02-26 H.J. Lu <hongjiu.lu@intel.com>
524
525 PR ld/19636
526 PR ld/19704
527 PR ld/19719
528 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
529
b8ec4e87
JW		 5302016-02-19 Matthew Wahab <matthew.wahab@arm.com>
531 Jiong Wang <jiong.wang@arm.com>
532
533 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
534
4670103e
CZ		 5352016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
536 Janek van Oirschot <jvanoirs@synopsys.com>
537
b99747ae
CZ		 538 * opcode/arc.h (arc_opcode arc_relax_opcodes)
539 (arc_num_relax_opcodes): Declare.
4670103e 540
609332f1
NC		 5412016-02-09 Nick Clifton <nickc@redhat.com>
542
543 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
544 * opcode/nds32.h (nds32_r45map): Likewise.
545 (nds32_r54map): Likewise.
546 * opcode/visium.h (gen_reg_table): Likewise.
547 (fp_reg_table, cc_table, opcode_table): Likewise.
548
24f5f69a
AM		 5492016-02-09 Alan Modra <amodra@gmail.com>
550
551 PR 16583
552 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
553
c1d9289f
NC		 5542016-02-04 Nick Clifton <nickc@redhat.com>
555
556 PR target/19561
557 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
558 (RRUX): Synthesise using case 2 rather than 7.
559
f4ddf30f
JB		 5602016-01-19 John Baldwin <jhb@FreeBSD.org>
561
562 * elf/common.h (NT_FREEBSD_THRMISC): Define.
563 (NT_FREEBSD_PROCSTAT_PROC): Define.
564 (NT_FREEBSD_PROCSTAT_FILES): Define.
565 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
566 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
567 (NT_FREEBSD_PROCSTAT_UMASK): Define.
568 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
569 (NT_FREEBSD_PROCSTAT_OSREL): Define.
570 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
571 (NT_FREEBSD_PROCSTAT_AUXV): Define.
572
34e967a5
MC		 5732016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
574 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
575
576 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
577 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
578 (ARC_TLS_LE_32): Fixed formula.
579 (ARC_TLS_GD_LD): Use new special function.
580 * opcode/arc-func.h: Changed all the replacement
581 functions to clear the patching bits before doing an or it with the value
582 argument.
583
9ae678af
NC		 5842016-01-18 Nick Clifton <nickc@redhat.com>
585
586 PR ld/19440
587 * coff/internal.h (internal_syment): Use int to hold section
588 number.
589 (N_UNDEF): Cast to int not short.
590 (N_ABS): Likewise.
591 (N_DEBUG): Likewise.
592 (N_TV): Likewise.
593 (P_TV): Likewise.
594
4849dfd8
NC		 5952016-01-11 Nick Clifton <nickc@redhat.com>
596
597 Import this change from GCC mainline:
598
599 2016-01-07 Mike Frysinger <vapier@gentoo.org>
600
601 * longlong.h: Change !__SHMEDIA__ to
602 (!defined (__SHMEDIA__) || !__SHMEDIA__).
603 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
604
b31e4803
MR		 6052016-01-06 Maciej W. Rozycki <macro@imgtec.com>
606
607 * opcode/mips.h: Add a summary of MIPS16 operand codes.
608
b36c1ccb
MF		 6092016-01-05 Mike Frysinger <vapier@gentoo.org>
610
611 * libiberty.h (dupargv): Change arg to char * const *.
612 (writeargv, countargv): Likewise.
613
6f2750fe
AM		 6142016-01-01 Alan Modra <amodra@gmail.com>
615
616 Update year range in copyright notice of all files.
617
3499769a
AM		 618For older changes see ChangeLog-0415, aout/ChangeLog-9115,
619cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
620mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
621som/ChangeLog-1015, and vms/ChangeLog-1015
622\f
623Copyright (C) 2016 Free Software Foundation, Inc.
624
625Copying and distribution of this file, with or without modification,
626are permitted in any medium without royalty provided the copyright
627notice and this notice are preserved.
628
629Local Variables:
630mode: change-log
631left-margin: 8
632fill-column: 74
633version-control: never
634End:
GDB Binutils - Deliverables
This page took 0.082306 seconds and 4 git commands to generate.