projects / deliverable / binutils-gdb.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Convert tid_range_parser and get_number_or_range to classes
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
a5721ba2
AM		 12016-09-29 Alan Modra <amodra@gmail.com>
2
3 * opcode/ppc.h (PPC_OPERAND_OPTIONAL32): Define.
4
2b848ebd
CZ		 52016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
6
7 * opcode/arc.h (insn_class_t): Add two new classes.
8
005d79fd
AM		 92016-09-26 Alan Modra <amodra@gmail.com>
10
11 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
12
bb7eff52
RS		 132016-09-21 Richard Sandiford <richard.sandiford@arm.com>
14
15 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
16
c0890d26
RS		 172016-09-21 Richard Sandiford <richard.sandiford@arm.com>
18
19 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
20 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
21 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
22 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
23
116b6019
RS		 242016-09-21 Richard Sandiford <richard.sandiford@arm.com>
25
26 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
27 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
28 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
29 aarch64_insn_classes.
30
047cd301
RS		 312016-09-21 Richard Sandiford <richard.sandiford@arm.com>
32
33 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
34 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
35 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
36
165d4950
RS		 372016-09-21 Richard Sandiford <richard.sandiford@arm.com>
38
39 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
40 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
41 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
42
e950b345
RS		 432016-09-21 Richard Sandiford <richard.sandiford@arm.com>
44
45 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
46 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
47 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
48 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
49 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
50 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
51 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
52 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
53 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
54 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
55 (aarch64_sve_dupm_mov_immediate_p): Declare.
56
98907a70
RS		 572016-09-21 Richard Sandiford <richard.sandiford@arm.com>
58
59 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
60 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
61 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
62 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
63 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
64
4df068de
RS		 652016-09-21 Richard Sandiford <richard.sandiford@arm.com>
66
67 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
68 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
69 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
70 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
71 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
72 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
73 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
74 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
75 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
76 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
77 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
78 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
79 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
80 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
81 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
82 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
83 Likewise.
84
2442d846
RS		 852016-09-21 Richard Sandiford <richard.sandiford@arm.com>
86
87 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
88 aarch64_opnd.
89 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
90 (aarch64_opnd_info): Make shifter.amount an int64_t and
91 rearrange the fields.
92
245d2e3f
RS		 932016-09-21 Richard Sandiford <richard.sandiford@arm.com>
94
95 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
96 (AARCH64_OPND_SVE_PRFOP): Likewise.
97 (aarch64_sve_pattern_array): Declare.
98 (aarch64_sve_prfop_array): Likewise.
99
d50c751e
RS		 1002016-09-21 Richard Sandiford <richard.sandiford@arm.com>
101
102 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
103 (AARCH64_OPND_QLF_P_M): Likewise.
104
f11ad6bc
RS		 1052016-09-21 Richard Sandiford <richard.sandiford@arm.com>
106
107 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
108 aarch64_operand_class.
109 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
110 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
111 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
112 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
113 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
114 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
115 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
116 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
117
0c608d6b
RS		 1182016-09-21 Richard Sandiford <richard.sandiford@arm.com>
119
120 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
121 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
122
4989adac
RS		 1232016-09-21 Richard Sandiford <richard.sandiford@arm.com>
124
125 * opcode/aarch64.h (F_STRICT): New flag.
126
27e5a270
RE		 1272016-09-07 Richard Earnshaw <rearnsha@arm.com>
128
129 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
130
a87aa054
CM		 1312016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
132 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
133 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
134 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
135 relocation.
136
4ba2ef8f
TP		 1372016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
138
139 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
140 (ARM_SET_SYM_CMSE_SPCL): Likewise.
141
dfdaec14
AJ		 1422016-08-01 Andrew Jenner <andrew@codesourcery.com>
143
144 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
145
fa3fcee7
NC		 1462016-07-29 Aldy Hernandez <aldyh@redhat.com>
147
148 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
149
db18dbab
GM		 1502016-07-27 Graham Markall <graham.markall@embecosm.com>
151
152 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
153 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
154 ARC_NUM_ADDRTYPES.
155 * opcode/arc.h: Add BMU to insn_class_t enum.
156 * opcode/arc.h: Add PMU to insn_class_t enum.
157
37fd5ef3
CZ		 1582016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
159
160 * dis-asm.h: Declare print_arc_disassembler_options.
161
76359541
TP		 1622016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
163
164 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
165 out_implib_bfd fields.
166
fa1c0170
CZ		 1672016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
168
169 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
170
f0728ee3
AV		 1712016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
172
173 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
174 (SHF_ARM_PURECODE): ... this.
175
93d8990c
SN		 1762016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
177
178 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
179 (AARCH64_CPU_HAS_ANY_FEATURES): New.
180 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
181 (AARCH64_OPCODE_HAS_FEATURE): Remove.
182
534dbe46
MW		 1832016-06-30 Matthew Wahab <matthew.wahab@arm.com>
184
185 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
186 of enabled FPU features.
187
042c94de
TS		 1882016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
189
190 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
191 SPARC_OPCODE_ARCH_MAX into the enum.
192
dab26bf4
RS		 1932016-06-28 Richard Sandiford <richard.sandiford@arm.com>
194
195 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
196
c9775dde
MR		 1972016-06-28 Maciej W. Rozycki <macro@imgtec.com>
198
199 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
200
7c2c4aa1
TS		 2012016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
202
203 * elf/xtensa.h (xtensa_make_property_section): New prototype.
204
b00f86d0
JB		 2052016-06-24 John Baldwin <jhb@FreeBSD.org>
206
207 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
208 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
209 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
210 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
211
ce440d63
GM		 2122016-06-23 Graham Markall <graham.markall@embecosm.com>
213
214 * opcode/arc.h: Make insn_class_t alphabetical again.
215
6b477896
TS		 2162016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
217
218 * elf/dlx.h: Wrap in extern C.
219 * elf/xtensa.h: Likewise.
220 * opcode/arc.h: Likewise.
221
6edaf4d7
TS		 2222016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
223
224 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
225 tilegx_pipeline.
226
bdd582db
GM		 2272016-06-21 Graham Markall <graham.markall@embecosm.com>
228
229 * opcode/arc.h: Add nps400 extension and instruction
230 subclass.
231 Remove ARC_OPCODE_NPS400
232 * elf/arc.h: Remove E_ARC_MACH_NPS400
233
4f26fb3a
JM		 2342016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
235
236 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
237 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
238 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
239 SPARC_OPCODE_ARCH_V9M.
240
99a54ef6
JB		 2412016-06-14 John Baldwin <jhb@FreeBSD.org>
242
243 * opcode/msp430-decode.h (MSP430_Size): Remove.
244 (Msp430_Opcode_Decoded): Change type of size to int.
245
0eaf2e1b
AM		 2462016-06-11 Alan Modra <amodra@gmail.com>
247
248 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
249
337c570c
JM		 2502016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
251
252 * opcode/sparc.h: Add missing documentation for hyperprivileged
253 registers in rd (%) and rs1 ($).
254
14b57c7c
AM		 2552016-06-07 Alan Modra <amodra@gmail.com>
256
257 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
258 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
259 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
260 PPC_APUINFO_VLE: Define.
261
4d1464f2
MW		 2622016-06-07 Matthew Wahab <matthew.wahab@arm.com>
263
264 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
265 entries.
266 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
267
4eb6f892
AB		 2682016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
269
270 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
271 (struct arc_long_opcode): New structure.
272 (arc_long_opcodes): Declare.
273 (arc_num_long_opcodes): Declare.
274
1fe0971e
TS		 2752016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
276
277 * elf/mips.h: Add extern "C".
278 * elf/sh.h: Likewise.
279 * opcode/d10v.h: Likewise.
280 * opcode/d30v.h: Likewise.
281 * opcode/ia64.h: Likewise.
282 * opcode/mips.h: Likewise.
283 * opcode/ppc.h: Likewise.
284 * opcode/sparc.h: Likewise.
285 * opcode/tic6x.h: Likewise.
286 * opcode/v850.h: Likewise.
287
1a72702b
AM		 2882016-05-28 Alan Modra <amodra@gmail.com>
289
290 * bfdlink.h (struct bfd_link_callbacks): Update comments.
291 Return void from multiple_definition, multiple_common,
292 add_to_set, constructor, warning, undefined_symbol,
293 reloc_overflow, reloc_dangerous and unattached_reloc.
294
94740f9c
TS		 2952016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
296
297 * opcode/metag.h: wrap declarations in extern "C".
298
d9eca1df
CZ		 2992016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
300
301 * opcode/arc.h (insn_subclass_t): Add COND.
302 (flag_class_t): Add F_CLASS_EXTEND.
303
c810e0b8
CZ		 3042016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
305
306 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
307 insn_class.
308 (struct arc_flag_class): Renamed attribute class to flag_class.
309
3d207518
TS		 3102016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
311
312 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
313 plain symbol.
314
5ff087ac
TT		 3152016-04-29 Tom Tromey <tom@tromey.com>
316
317 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
318 DW_LANG_Rust_old>: New constants.
319
8f4f9071
MF		 3202016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
321
322 * elf/mips.h (AFL_ASE_DSPR3): New macro.
323 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
324 * opcode/mips.h (ASE_DSPR3): New macro.
325
39d911fc
TP		 3262016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
327 Nick Clifton <nickc@redhat.com>
328
329 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
330 enumerator.
331 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
332 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
333 (ARM_SYM_BRANCH_TYPE): Replace by ...
334 (ARM_GET_SYM_BRANCH_TYPE): This and ...
335 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
336 BFD_ASSERT is defined or not.
337
15afaa63
TP		 3382016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
339
340 * elf/arm.h (Tag_DSP_extension): Define.
341
d942732e
TP		 3422016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
343
344 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
345
16a1fa25
TP		 3462016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
347
348 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
349 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
350 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
351 for the high core bits.
352
945e0f82
CZ		 3532016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
354
355 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
356 (ARC_SYNTAX_NOP): Likewsie.
357 (ARC_OP1_MUST_BE_IMM): Update defined value.
358 (ARC_OP1_IMM_IMPLIED): Likewise.
359 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
360
4bd13cde
NC		 3612016-04-28 Nick Clifton <nickc@redhat.com>
362
363 PR target/19722
364 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
365
a6a4679f
AM		 3662016-04-27 Alan Modra <amodra@gmail.com>
367
368 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
369 undef. Formatting.
370
4f3b23b3
NC		 3712016-04-21 Nick Clifton <nickc@redhat.com>
372
373 * bfdlink.h: Add prototype for bfd_link_check_relocs.
374
d9689752
L		 3752016-04-20 H.J. Lu <hongjiu.lu@intel.com>
376
377 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
378
52176c67
AB		 3792016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
380
381 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
382
537aefaf
AB		 3832016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
384
385 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
386
c8f785f2
AB		 3872016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
388
389 * opcode/arc.h (insn_class_t): Add NET and ACL class.
390
4b0c052e
AB		 3912016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
392
393 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
394 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
395
f36e33da
CZ		 3962016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
397
398 * opcode/arc.h (flag_class_t): Update.
399 (ARC_OPCODE_NONE): Define.
400 (ARC_OPCODE_ARCALL): Likewise.
401 (ARC_OPCODE_ARCFPX): Likewise.
402 (ARC_REGISTER_READONLY): Likewise.
403 (ARC_REGISTER_WRITEONLY): Likewise.
404 (ARC_REGISTER_NOSHORT_CUT): Likewise.
405 (arc_aux_reg): Add cpu.
406
b99747ae
CZ		 4072016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
408
409 * opcode/arc.h (arc_num_opcodes): Remove.
410 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
411 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
412 (ARC_SUFFIX_FLAG): Define.
413 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
414 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
415 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
416 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
417 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
418 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
419 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
420 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
421 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
422 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
423
4242016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
425
426 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
427 (ARC_FPUDA): Define.
428 (arc_aux_reg): Add new field.
429
4302016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
094fb063
CZ		 431
432 * opcode/arc-func.h (replace_bits24): Changed.
433 (replace_bits24_be): Created.
434
f2dd8838
CZ		 4352016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
436
b99747ae
CZ		 437 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
438 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
439 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
440 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
441 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
442 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
443 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
444 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
445 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
446 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
447 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
448 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
449 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
450 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
f2dd8838 451
b9bb4a93
TS		 4522016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
453
454 * opcode/i960.h: Add const qualifiers.
455 * opcode/tic4x.h (struct tic4x_inst): Likewise.
456
e23e8ebe
AB		 4572016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
458
459 * opcodes/arc.h (insn_class_t): Add BITOP type.
460
1ae8ab47
AB		 4612016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
462
463 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
464 new classes instead.
465
8699fc3e
AB		 4662016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
467
468 * elf/arc.h (E_ARC_MACH_NPS400): Define.
469 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
470
a9522a21
AB		 4712016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
472
473 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
474
c0334580
AB		 4752016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
476
477 * elf/arc.h (EF_ARC_MACH): Delete.
478 (EF_ARC_MACH_MSK): Remove out of date comment.
479
24740d83
AB		 4802016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
481
482 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
483
4c10bbaa
L		 4842016-03-15 H.J. Lu <hongjiu.lu@intel.com>
485
486 PR ld/19807
487 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
488
72f3b6aa
CZ		 4892016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
490 Andrew Burgess <andrew.burgess@embecosm.com>
491
492 * elf/arc-reloc.def: Add a call to ME within the formula for each
493 relocation that requires middle-endian correction.
494
f86f5863
TS		 4952016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
496
497 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
498 * opcode/h8300.h (struct h8_opcode): Likewise.
499 * opcode/hppa.h (struct pa_opcode): Likewise.
500 * opcode/msp430.h: Likewise.
501 * opcode/spu.h (struct spu_opcode): Likewise.
502 * opcode/tic30.h (struct _register): Likewise.
503 * opcode/tic4x.h (struct tic4x_register): Likewise.
504 (struct tic4x_cond): Likewise.
505 (struct tic4x_indirect): Likewise.
506 (struct tic4x_inst): Likewise.
507 * opcode/visium.h (struct reg_entry): Likewise.
508
643afb90
MW		 5092016-03-04 Matthew Wahab <matthew.wahab@arm.com>
510
511 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
512 (ARM_CPU_HAS_FEATURE): Add comment.
513
3f1f41f5
L		 5142016-03-03 Than McIntosh <thanm@google.com>
515
516 * plugin-api.h: Add new hooks to the plugin transfer vector to
517 to support querying section alignment and section size.
518 (ld_plugin_get_input_section_alignment): New hook.
519 (ld_plugin_get_input_section_size): New hook.
520 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
521 and LDPT_GET_INPUT_SECTION_SIZE.
522 (ld_plugin_tv): Add tv_get_input_section_alignment and
523 tv_get_input_section_size.
524
9b738e36 5252016-03-03 Evgenii Stepanov <eugenis@google.com>
95ecdfbf
ES		 526
527 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
528
11e5f1ec
L		 5292016-02-26 H.J. Lu <hongjiu.lu@intel.com>
530
531 PR ld/19645
532 * bfdlink.h (bfd_link_elf_stt_common): New enum.
533 (bfd_link_info): Add elf_stt_common.
534
aec6b87e
L		 5352016-02-26 H.J. Lu <hongjiu.lu@intel.com>
536
537 PR ld/19636
538 PR ld/19704
539 PR ld/19719
540 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
541
b8ec4e87
JW		 5422016-02-19 Matthew Wahab <matthew.wahab@arm.com>
543 Jiong Wang <jiong.wang@arm.com>
544
545 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
546
4670103e
CZ		 5472016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
548 Janek van Oirschot <jvanoirs@synopsys.com>
549
b99747ae
CZ		 550 * opcode/arc.h (arc_opcode arc_relax_opcodes)
551 (arc_num_relax_opcodes): Declare.
4670103e 552
609332f1
NC		 5532016-02-09 Nick Clifton <nickc@redhat.com>
554
555 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
556 * opcode/nds32.h (nds32_r45map): Likewise.
557 (nds32_r54map): Likewise.
558 * opcode/visium.h (gen_reg_table): Likewise.
559 (fp_reg_table, cc_table, opcode_table): Likewise.
560
24f5f69a
AM		 5612016-02-09 Alan Modra <amodra@gmail.com>
562
563 PR 16583
564 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
565
c1d9289f
NC		 5662016-02-04 Nick Clifton <nickc@redhat.com>
567
568 PR target/19561
569 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
570 (RRUX): Synthesise using case 2 rather than 7.
571
f4ddf30f
JB		 5722016-01-19 John Baldwin <jhb@FreeBSD.org>
573
574 * elf/common.h (NT_FREEBSD_THRMISC): Define.
575 (NT_FREEBSD_PROCSTAT_PROC): Define.
576 (NT_FREEBSD_PROCSTAT_FILES): Define.
577 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
578 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
579 (NT_FREEBSD_PROCSTAT_UMASK): Define.
580 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
581 (NT_FREEBSD_PROCSTAT_OSREL): Define.
582 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
583 (NT_FREEBSD_PROCSTAT_AUXV): Define.
584
34e967a5
MC		 5852016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
586 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
587
588 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
589 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
590 (ARC_TLS_LE_32): Fixed formula.
591 (ARC_TLS_GD_LD): Use new special function.
592 * opcode/arc-func.h: Changed all the replacement
593 functions to clear the patching bits before doing an or it with the value
594 argument.
595
9ae678af
NC		 5962016-01-18 Nick Clifton <nickc@redhat.com>
597
598 PR ld/19440
599 * coff/internal.h (internal_syment): Use int to hold section
600 number.
601 (N_UNDEF): Cast to int not short.
602 (N_ABS): Likewise.
603 (N_DEBUG): Likewise.
604 (N_TV): Likewise.
605 (P_TV): Likewise.
606
4849dfd8
NC		 6072016-01-11 Nick Clifton <nickc@redhat.com>
608
609 Import this change from GCC mainline:
610
611 2016-01-07 Mike Frysinger <vapier@gentoo.org>
612
613 * longlong.h: Change !__SHMEDIA__ to
614 (!defined (__SHMEDIA__) || !__SHMEDIA__).
615 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
616
b31e4803
MR		 6172016-01-06 Maciej W. Rozycki <macro@imgtec.com>
618
619 * opcode/mips.h: Add a summary of MIPS16 operand codes.
620
b36c1ccb
MF		 6212016-01-05 Mike Frysinger <vapier@gentoo.org>
622
623 * libiberty.h (dupargv): Change arg to char * const *.
624 (writeargv, countargv): Likewise.
625
6f2750fe
AM		 6262016-01-01 Alan Modra <amodra@gmail.com>
627
628 Update year range in copyright notice of all files.
629
3499769a
AM		 630For older changes see ChangeLog-0415, aout/ChangeLog-9115,
631cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
632mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
633som/ChangeLog-1015, and vms/ChangeLog-1015
634\f
635Copyright (C) 2016 Free Software Foundation, Inc.
636
637Copying and distribution of this file, with or without modification,
638are permitted in any medium without royalty provided the copyright
639notice and this notice are preserved.
640
641Local Variables:
642mode: change-log
643left-margin: 8
644fill-column: 74
645version-control: never
646End:
GDB Binutils - Deliverables
This page took 0.079777 seconds and 4 git commands to generate.