x86: Support Intel AVX512 BF16
[deliverable/binutils-gdb.git] / include / ChangeLog
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34ef62f4
AV
12019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
2
3 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
4 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
5 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
6 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
7 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
8 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
9 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
10 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
11
96a86c01
AM
122019-03-28 Alan Modra <amodra@gmail.com>
13
14 PR 24390
15 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
16
53b2f36b
TC
172019-03-25 Tamar Christina <tamar.christina@arm.com>
18
19 * dis-asm.h (struct disassemble_info): Add stop_offset.
20
1dbade74
SD
212019-03-13 Sudakshina Das <sudi.das@arm.com>
22
23 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
24
37c18eed
SD
252019-03-13 Sudakshina Das <sudi.das@arm.com>
26 Szabolcs Nagy <szabolcs.nagy@arm.com>
27
28 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
29
cd702818
SD
302019-03-13 Sudakshina Das <sudi.das@arm.com>
31
32 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
33 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
34 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
35
e6c3b5bf
AH
362019-02-20 Alan Hayward <alan.hayward@arm.com>
37
38 * elf/common.h (NT_ARM_PAC_MASK): Add define.
39
91d78b81
SJ
402019-02-15 Saagar Jha <saagar@saagarjha.com>
41
42 * mach-o/loader.h: Use new OS names in comments.
43
e2077304 442019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
45
46 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
47 (splay_tree_delete_value_fn): Likewise.
48
fc60b8c8
AK
492019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
50
51 * opcode/s390.h (enum s390_opcode_cpu_val): Add
52 S390_OPCODE_ARCH13.
53
550fd7bf
SD
542019-01-25 Sudakshina Das <sudi.das@arm.com>
55 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
56
57 * opcode/aarch64.h (enum aarch64_opnd): Remove
58 AARCH64_OPND_ADDR_SIMPLE_2.
59 (enum aarch64_insn_class): Remove ldstgv_indexed.
60
71ba91e1
TT
612019-01-22 Tom Tromey <tom@tromey.com>
62
63 * coff/ecoff.h: Include coff/sym.h.
64
f974f26c
NC
652018-06-24 Nick Clifton <nickc@redhat.com>
66
67 2.32 branch created.
68
2dc8dd17
JW
692019-01-16 Kito Cheng <kito@andestech.com>
70
71 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
72 (Tag_RISCV_arch): Likewise.
73 (Tag_RISCV_priv_spec): Likewise.
74 (Tag_RISCV_priv_spec_minor): Likewise.
75 (Tag_RISCV_priv_spec_revision): Likewise.
76 (Tag_RISCV_unaligned_access): Likewise.
77 (Tag_RISCV_stack_align): Likewise.
78
8f0a2148
ПК
792019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
80
81 * dis-asm.h: include <string.h>
82
1910070b
NC
832019-01-10 Nick Clifton <nickc@redhat.com>
84
85 * Merge from GCC:
86 2018-12-22 Jason Merrill <jason@redhat.com>
87
88 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
89 ARM, HP, and EDG demangling styles.
90
a08da33e
SL
912019-01-09 Sandra Loosemore <sandra@codesourcery.com>
92
93 Merge from GCC:
94 PR other/16615
95
96 * libiberty.h: Mechanically replace "can not" with "cannot".
97 * plugin-api.h: Likewise.
98
59581069
YS
992018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
100
101 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
102 (E_FLAG_RX_V3): New RXv3 type.
103 * opcode/rx.h (RX_Size): Add double size.
104 (RX_Operand_Type): Add double FPU registers.
105 (RX_Opcode_ID): Add new instuctions.
106
82704155
AM
1072019-01-01 Alan Modra <amodra@gmail.com>
108
109 Update year range in copyright notice of all files.
110
d5c04e1b 111For older changes see ChangeLog-2018
3499769a 112\f
d5c04e1b 113Copyright (C) 2019 Free Software Foundation, Inc.
3499769a
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114
115Copying and distribution of this file, with or without modification,
116are permitted in any medium without royalty provided the copyright
117notice and this notice are preserved.
118
119Local Variables:
120mode: change-log
121left-margin: 8
122fill-column: 74
123version-control: never
124End:
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