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[ARC] ISA alignment.
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
2b848ebd
CZ		 12016-09-26 Claudiu Zissulescu <claziss@synopsys.com>
2
3 * opcode/arc.h (insn_class_t): Add two new classes.
4
005d79fd
AM		 52016-09-26 Alan Modra <amodra@gmail.com>
6
7 * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment on new values.
8
bb7eff52
RS		 92016-09-21 Richard Sandiford <richard.sandiford@arm.com>
10
11 * opcode/aarch64.h (aarch64_cond): Bump array size to 4.
12
c0890d26
RS		 132016-09-21 Richard Sandiford <richard.sandiford@arm.com>
14
15 * opcode/aarch64.h (AARCH64_FEATURE_SVE): New macro.
16 (OP_MOV_P_P, OP_MOV_Z_P_Z, OP_MOV_Z_V, OP_MOV_Z_Z, OP_MOV_Z_Zi)
17 (OP_MOVM_P_P_P, OP_MOVS_P_P, OP_MOVZS_P_P_P, OP_MOVZ_P_P_P)
18 (OP_NOTS_P_P_P_Z, OP_NOT_P_P_P_Z): New aarch64_ops.
19
116b6019
RS		 202016-09-21 Richard Sandiford <richard.sandiford@arm.com>
21
22 * opcode/aarch64.h (sve_cpy, sve_index, sve_limm, sve_misc)
23 (sve_movprfx, sve_pred_zm, sve_shift_pred, sve_shift_unpred)
24 (sve_size_bhs, sve_size_bhsd, sve_size_hsd, sve_size_sd): New
25 aarch64_insn_classes.
26
047cd301
RS		 272016-09-21 Richard Sandiford <richard.sandiford@arm.com>
28
29 * opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
30 (AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
31 (AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.
32
165d4950
RS		 332016-09-21 Richard Sandiford <richard.sandiford@arm.com>
34
35 * opcode/aarch64.h (AARCH64_OPND_SVE_FPIMM8): New aarch64_opnd.
36 (AARCH64_OPND_SVE_I1_HALF_ONE, AARCH64_OPND_SVE_I1_HALF_TWO)
37 (AARCH64_OPND_SVE_I1_ZERO_ONE): Likewise.
38
e950b345
RS		 392016-09-21 Richard Sandiford <richard.sandiford@arm.com>
40
41 * opcode/aarch64.h (AARCH64_OPND_SIMM5): New aarch64_opnd.
42 (AARCH64_OPND_SVE_AIMM, AARCH64_OPND_SVE_ASIMM)
43 (AARCH64_OPND_SVE_INV_LIMM, AARCH64_OPND_SVE_LIMM)
44 (AARCH64_OPND_SVE_LIMM_MOV, AARCH64_OPND_SVE_SHLIMM_PRED)
45 (AARCH64_OPND_SVE_SHLIMM_UNPRED, AARCH64_OPND_SVE_SHRIMM_PRED)
46 (AARCH64_OPND_SVE_SHRIMM_UNPRED, AARCH64_OPND_SVE_SIMM5)
47 (AARCH64_OPND_SVE_SIMM5B, AARCH64_OPND_SVE_SIMM6)
48 (AARCH64_OPND_SVE_SIMM8, AARCH64_OPND_SVE_UIMM3)
49 (AARCH64_OPND_SVE_UIMM7, AARCH64_OPND_SVE_UIMM8)
50 (AARCH64_OPND_SVE_UIMM8_53): Likewise.
51 (aarch64_sve_dupm_mov_immediate_p): Declare.
52
98907a70
RS		 532016-09-21 Richard Sandiford <richard.sandiford@arm.com>
54
55 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4xVL): New aarch64_opnd.
56 (AARCH64_OPND_SVE_ADDR_RI_S4x2xVL, AARCH64_OPND_SVE_ADDR_RI_S4x3xVL)
57 (AARCH64_OPND_SVE_ADDR_RI_S4x4xVL, AARCH64_OPND_SVE_ADDR_RI_S6xVL)
58 (AARCH64_OPND_SVE_ADDR_RI_S9xVL): Likewise.
59 (AARCH64_MOD_MUL_VL): New aarch64_modifier_kind.
60
4df068de
RS		 612016-09-21 Richard Sandiford <richard.sandiford@arm.com>
62
63 * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_U6): New aarch64_opnd.
64 (AARCH64_OPND_SVE_ADDR_RI_U6x2, AARCH64_OPND_SVE_ADDR_RI_U6x4)
65 (AARCH64_OPND_SVE_ADDR_RI_U6x8, AARCH64_OPND_SVE_ADDR_RR)
66 (AARCH64_OPND_SVE_ADDR_RR_LSL1, AARCH64_OPND_SVE_ADDR_RR_LSL2)
67 (AARCH64_OPND_SVE_ADDR_RR_LSL3, AARCH64_OPND_SVE_ADDR_RX)
68 (AARCH64_OPND_SVE_ADDR_RX_LSL1, AARCH64_OPND_SVE_ADDR_RX_LSL2)
69 (AARCH64_OPND_SVE_ADDR_RX_LSL3, AARCH64_OPND_SVE_ADDR_RZ)
70 (AARCH64_OPND_SVE_ADDR_RZ_LSL1, AARCH64_OPND_SVE_ADDR_RZ_LSL2)
71 (AARCH64_OPND_SVE_ADDR_RZ_LSL3, AARCH64_OPND_SVE_ADDR_RZ_XTW_14)
72 (AARCH64_OPND_SVE_ADDR_RZ_XTW_22, AARCH64_OPND_SVE_ADDR_RZ_XTW1_14)
73 (AARCH64_OPND_SVE_ADDR_RZ_XTW1_22, AARCH64_OPND_SVE_ADDR_RZ_XTW2_14)
74 (AARCH64_OPND_SVE_ADDR_RZ_XTW2_22, AARCH64_OPND_SVE_ADDR_RZ_XTW3_14)
75 (AARCH64_OPND_SVE_ADDR_RZ_XTW3_22, AARCH64_OPND_SVE_ADDR_ZI_U5)
76 (AARCH64_OPND_SVE_ADDR_ZI_U5x2, AARCH64_OPND_SVE_ADDR_ZI_U5x4)
77 (AARCH64_OPND_SVE_ADDR_ZI_U5x8, AARCH64_OPND_SVE_ADDR_ZZ_LSL)
78 (AARCH64_OPND_SVE_ADDR_ZZ_SXTW, AARCH64_OPND_SVE_ADDR_ZZ_UXTW):
79 Likewise.
80
2442d846
RS		 812016-09-21 Richard Sandiford <richard.sandiford@arm.com>
82
83 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN_SCALED): New
84 aarch64_opnd.
85 (AARCH64_MOD_MUL): New aarch64_modifier_kind.
86 (aarch64_opnd_info): Make shifter.amount an int64_t and
87 rearrange the fields.
88
245d2e3f
RS		 892016-09-21 Richard Sandiford <richard.sandiford@arm.com>
90
91 * opcode/aarch64.h (AARCH64_OPND_SVE_PATTERN): New aarch64_opnd.
92 (AARCH64_OPND_SVE_PRFOP): Likewise.
93 (aarch64_sve_pattern_array): Declare.
94 (aarch64_sve_prfop_array): Likewise.
95
d50c751e
RS		 962016-09-21 Richard Sandiford <richard.sandiford@arm.com>
97
98 * opcode/aarch64.h (AARCH64_OPND_QLF_P_Z): New aarch64_opnd_qualifier.
99 (AARCH64_OPND_QLF_P_M): Likewise.
100
f11ad6bc
RS		 1012016-09-21 Richard Sandiford <richard.sandiford@arm.com>
102
103 * opcode/aarch64.h (AARCH64_OPND_CLASS_SVE_REG): New
104 aarch64_operand_class.
105 (AARCH64_OPND_CLASS_PRED_REG): Likewise.
106 (AARCH64_OPND_SVE_Pd, AARCH64_OPND_SVE_Pg3, AARCH64_OPND_SVE_Pg4_5)
107 (AARCH64_OPND_SVE_Pg4_10, AARCH64_OPND_SVE_Pg4_16)
108 (AARCH64_OPND_SVE_Pm, AARCH64_OPND_SVE_Pn, AARCH64_OPND_SVE_Pt)
109 (AARCH64_OPND_SVE_Za_5, AARCH64_OPND_SVE_Za_16, AARCH64_OPND_SVE_Zd)
110 (AARCH64_OPND_SVE_Zm_5, AARCH64_OPND_SVE_Zm_16, AARCH64_OPND_SVE_Zn)
111 (AARCH64_OPND_SVE_Zn_INDEX, AARCH64_OPND_SVE_ZnxN)
112 (AARCH64_OPND_SVE_Zt, AARCH64_OPND_SVE_ZtxN): New aarch64_opnds.
113
0c608d6b
RS		 1142016-09-21 Richard Sandiford <richard.sandiford@arm.com>
115
116 * opcode/aarch64.h (aarch64_opcode): Add a tied_operand field.
117 (AARCH64_OPDE_UNTIED_OPERAND): New aarch64_operand_error_kind.
118
4989adac
RS		 1192016-09-21 Richard Sandiford <richard.sandiford@arm.com>
120
121 * opcode/aarch64.h (F_STRICT): New flag.
122
27e5a270
RE		 1232016-09-07 Richard Earnshaw <rearnsha@arm.com>
124
125 * opcode/arm.h (ARM_ARCH_V8A_CRC): New architecture.
126
a87aa054
CM		 1272016-08-26 Cupertino Miranda <cmiranda@synopsys.com>
128 * elf/arc-reloc.def: Fixed relocation formula for N*, SDA, SDA_12,
129 SDA_16_LD*, S13_PCREL, N32_ME, SECTOFF_* relocations.
130 * opcode/arc-func.h (replace_disp12s): Added. Used for SDA_12
131 relocation.
132
4ba2ef8f
TP		 1332016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>
134
135 * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro.
136 (ARM_SET_SYM_CMSE_SPCL): Likewise.
137
dfdaec14
AJ		 1382016-08-01 Andrew Jenner <andrew@codesourcery.com>
139
140 * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
141
fa3fcee7
NC		 1422016-07-29 Aldy Hernandez <aldyh@redhat.com>
143
144 * libiberty.h (MAX_ALLOCA_SIZE): New macro.
145
db18dbab
GM		 1462016-07-27 Graham Markall <graham.markall@embecosm.com>
147
148 * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE,
149 ARC_OPERAND_COLON. Add the arc_nps_address_type enum and
150 ARC_NUM_ADDRTYPES.
151 * opcode/arc.h: Add BMU to insn_class_t enum.
152 * opcode/arc.h: Add PMU to insn_class_t enum.
153
37fd5ef3
CZ		 1542016-07-20 Claudiu Zissulescu <claziss@synopsys.com>
155
156 * dis-asm.h: Declare print_arc_disassembler_options.
157
76359541
TP		 1582016-07-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
159
160 * bfdlink.h (struct bfd_link_info): Declare new ldscript_def and
161 out_implib_bfd fields.
162
fa1c0170
CZ		 1632016-07-14 Claudiu Zissulescu <claziss@synopsys.com>
164
165 * elf/arc-reloc.def (ARC_SDA32): Don't use ME transformation.
166
f0728ee3
AV		 1672016-07-05 Andre Vieria <andre.simoesdiasvieira@arm.com>
168
169 * include/elf/arm.h (SHF_ARM_NOREAD): Rename to ...
170 (SHF_ARM_PURECODE): ... this.
171
93d8990c
SN		 1722016-07-01 Szabolcs Nagy <szabolcs.nagy@arm.com>
173
174 * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New.
175 (AARCH64_CPU_HAS_ANY_FEATURES): New.
176 (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES.
177 (AARCH64_OPCODE_HAS_FEATURE): Remove.
178
534dbe46
MW		 1792016-06-30 Matthew Wahab <matthew.wahab@arm.com>
180
181 * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set
182 of enabled FPU features.
183
042c94de
TS		 1842016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
185
186 * opcode/sparc.h (enum sparc_opcode_arch_val): Move
187 SPARC_OPCODE_ARCH_MAX into the enum.
188
dab26bf4
RS		 1892016-06-28 Richard Sandiford <richard.sandiford@arm.com>
190
191 * opcode/aarch64.h (aarch64_opnd_info): Change index fields to int64_t.
192
c9775dde
MR		 1932016-06-28 Maciej W. Rozycki <macro@imgtec.com>
194
195 * elf/mips.h (R_MIPS16_PC16_S1): New relocation.
196
7c2c4aa1
TS		 1972016-06-25 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
198
199 * elf/xtensa.h (xtensa_make_property_section): New prototype.
200
b00f86d0
JB		 2012016-06-24 John Baldwin <jhb@FreeBSD.org>
202
203 * elf/common.h (AT_FREEBSD_EXECPATH, AT_FREEBSD_CANARY)
204 (AT_FREEBSD_CANARYLEN, AT_FREEBSD_OSRELDATE, AT_FREEBSD_NCPUS)
205 (AT_FREEBSD_PAGESIZES, AT_FREEBSD_PAGESIZESLEN)
206 (AT_FREEBSD_TIMEKEEP, AT_FREEBSD_STACKPROT): Define.
207
ce440d63
GM		 2082016-06-23 Graham Markall <graham.markall@embecosm.com>
209
210 * opcode/arc.h: Make insn_class_t alphabetical again.
211
6b477896
TS		 2122016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
213
214 * elf/dlx.h: Wrap in extern C.
215 * elf/xtensa.h: Likewise.
216 * opcode/arc.h: Likewise.
217
6edaf4d7
TS		 2182016-06-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
219
220 * opcode/tilegx.h: Move TILEGX_NUM_PIPELINE_ENCODINGS into
221 tilegx_pipeline.
222
bdd582db
GM		 2232016-06-21 Graham Markall <graham.markall@embecosm.com>
224
225 * opcode/arc.h: Add nps400 extension and instruction
226 subclass.
227 Remove ARC_OPCODE_NPS400
228 * elf/arc.h: Remove E_ARC_MACH_NPS400
229
4f26fb3a
JM		 2302016-06-17 Jose E. Marchesi <jose.marchesi@oracle.com>
231
232 * opcode/sparc.h (enum sparc_opcode_arch_val): Add
233 SPARC_OPCODE_ARCH_V9C, SPARC_OPCODE_ARCH_V9D,
234 SPARC_OPCODE_ARCH_V9E, SPARC_OPCODE_ARCH_V9V and
235 SPARC_OPCODE_ARCH_V9M.
236
99a54ef6
JB		 2372016-06-14 John Baldwin <jhb@FreeBSD.org>
238
239 * opcode/msp430-decode.h (MSP430_Size): Remove.
240 (Msp430_Opcode_Decoded): Change type of size to int.
241
0eaf2e1b
AM		 2422016-06-11 Alan Modra <amodra@gmail.com>
243
244 * coff/sparc.h (COFF_ADJUST_SYM_OUT_POST): Define.
245
337c570c
JM		 2462016-06-08 Jose E. Marchesi <jose.marchesi@oracle.com>
247
248 * opcode/sparc.h: Add missing documentation for hyperprivileged
249 registers in rd (%) and rs1 ($).
250
14b57c7c
AM		 2512016-06-07 Alan Modra <amodra@gmail.com>
252
253 * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL,
254 PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK,
255 PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK,
256 PPC_APUINFO_VLE: Define.
257
4d1464f2
MW		 2582016-06-07 Matthew Wahab <matthew.wahab@arm.com>
259
260 * opcode/arm.h (ARM_EXT2_RAS): New. Also align preceding
261 entries.
262 (ARM_AEXT_V8_2A): Add ARM_EXT2_RAS.
263
4eb6f892
AB		 2642016-06-02 Andrew Burgess <andrew.burgess@embecosm.com>
265
266 * opcode/arc.h (MAX_INSN_ARGS): Increase to 16.
267 (struct arc_long_opcode): New structure.
268 (arc_long_opcodes): Declare.
269 (arc_num_long_opcodes): Declare.
270
1fe0971e
TS		 2712016-06-01 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
272
273 * elf/mips.h: Add extern "C".
274 * elf/sh.h: Likewise.
275 * opcode/d10v.h: Likewise.
276 * opcode/d30v.h: Likewise.
277 * opcode/ia64.h: Likewise.
278 * opcode/mips.h: Likewise.
279 * opcode/ppc.h: Likewise.
280 * opcode/sparc.h: Likewise.
281 * opcode/tic6x.h: Likewise.
282 * opcode/v850.h: Likewise.
283
1a72702b
AM		 2842016-05-28 Alan Modra <amodra@gmail.com>
285
286 * bfdlink.h (struct bfd_link_callbacks): Update comments.
287 Return void from multiple_definition, multiple_common,
288 add_to_set, constructor, warning, undefined_symbol,
289 reloc_overflow, reloc_dangerous and unattached_reloc.
290
94740f9c
TS		 2912016-05-26 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
292
293 * opcode/metag.h: wrap declarations in extern "C".
294
d9eca1df
CZ		 2952016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
296
297 * opcode/arc.h (insn_subclass_t): Add COND.
298 (flag_class_t): Add F_CLASS_EXTEND.
299
c810e0b8
CZ		 3002016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
301
302 * opcode/arc.h (struct arc_opcode): Renamed attribute class to
303 insn_class.
304 (struct arc_flag_class): Renamed attribute class to flag_class.
305
3d207518
TS		 3062016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
307
308 * opcode/tic54x.h (struct symbol_): typedef to tic54x_symbol instead of
309 plain symbol.
310
5ff087ac
TT		 3112016-04-29 Tom Tromey <tom@tromey.com>
312
313 * dwarf2.h (enum dwarf_source_language) <DW_LANG_Rust,
314 DW_LANG_Rust_old>: New constants.
315
8f4f9071
MF		 3162016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
317
318 * elf/mips.h (AFL_ASE_DSPR3): New macro.
319 (AFL_ASE_MASK): Update to include AFL_ASE_DSPR3.
320 * opcode/mips.h (ASE_DSPR3): New macro.
321
39d911fc
TP		 3222016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
323 Nick Clifton <nickc@redhat.com>
324
325 * arm.h (enum arm_st_branch_type): Add new ST_BRANCH_ENUM_SIZE
326 enumerator.
327 (NUM_ENUM_ARM_ST_BRANCH_TYPE_BITS): New macro.
328 (ENUM_ARM_ST_BRANCH_TYPE_BITMASK): Likewise.
329 (ARM_SYM_BRANCH_TYPE): Replace by ...
330 (ARM_GET_SYM_BRANCH_TYPE): This and ...
331 (ARM_SET_SYM_BRANCH_TYPE): This in two versions depending on whether
332 BFD_ASSERT is defined or not.
333
15afaa63
TP		 3342016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
335
336 * elf/arm.h (Tag_DSP_extension): Define.
337
d942732e
TP		 3382016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
339
340 * arm.h (ARM_FSET_CPU_SUBSET): Define macro.
341
16a1fa25
TP		 3422016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
343
344 * opcode/arm.h (ARM_EXT2_V8M_MAIN): new feature bit.
345 (ARM_AEXT2_V8M_MAIN): New architecture extension feature set.
346 (ARM_ARCH_V8M_MAIN): Use ARM_AEXT2_V8M_MAIN instead of ARM_AEXT2_V8M
347 for the high core bits.
348
945e0f82
CZ		 3492016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
350
351 * opcode/arc.h (ARC_SYNTAX_1OP): Declare
352 (ARC_SYNTAX_NOP): Likewsie.
353 (ARC_OP1_MUST_BE_IMM): Update defined value.
354 (ARC_OP1_IMM_IMPLIED): Likewise.
355 (arg_32bit_rc, arg_32bit_u6, arg_32bit_limm): Declare.
356
4bd13cde
NC		 3572016-04-28 Nick Clifton <nickc@redhat.com>
358
359 PR target/19722
360 * opcode/aarch64.h (struct aarch64_opcode): Add verifier field.
361
a6a4679f
AM		 3622016-04-27 Alan Modra <amodra@gmail.com>
363
364 * bfdlink.h (struct bfd_link_hash_entry): Add "section" field to
365 undef. Formatting.
366
4f3b23b3
NC		 3672016-04-21 Nick Clifton <nickc@redhat.com>
368
369 * bfdlink.h: Add prototype for bfd_link_check_relocs.
370
d9689752
L		 3712016-04-20 H.J. Lu <hongjiu.lu@intel.com>
372
373 * bfdlink.h (bfd_link_info): Add check_relocs_after_open_input.
374
52176c67
AB		 3752016-04-20 Andrew Burgess <andrew.burgess@embecosm.com>
376
377 * elf/arc-reloc.def (ARC_NPS_CMEM16): Add ME modifier to formula.
378
537aefaf
AB		 3792016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
380
381 * opcode/arc.h (MAX_INSN_ARGS): Increase 6 to 8.
382
c8f785f2
AB		 3832016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
384
385 * opcode/arc.h (insn_class_t): Add NET and ACL class.
386
4b0c052e
AB		 3872016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
388
389 * elf/arc-reloc.def: Add ARC_NPS_CMEM16 reloc.
390 * opcode/arc.h (NPS_CMEM_HIGH_VALUE): Define.
391
f36e33da
CZ		 3922016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
393
394 * opcode/arc.h (flag_class_t): Update.
395 (ARC_OPCODE_NONE): Define.
396 (ARC_OPCODE_ARCALL): Likewise.
397 (ARC_OPCODE_ARCFPX): Likewise.
398 (ARC_REGISTER_READONLY): Likewise.
399 (ARC_REGISTER_WRITEONLY): Likewise.
400 (ARC_REGISTER_NOSHORT_CUT): Likewise.
401 (arc_aux_reg): Add cpu.
402
b99747ae
CZ		 4032016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
404
405 * opcode/arc.h (arc_num_opcodes): Remove.
406 (ARC_SYNTAX_3OP, ARC_SYNTAX_2OP, ARC_OP1_MUST_BE_IMM)
407 (ARC_OP1_IMM_IMPLIED, ARC_SUFFIX_NONE, ARC_SUFFIX_COND)
408 (ARC_SUFFIX_FLAG): Define.
409 (flags_none, flags_f, flags_cc, flags_ccf): Declare.
410 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
411 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
412 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
413 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
414 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
415 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
416 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
417 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
418 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
419
4202016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
421
422 * opcode/arc.h (DPA, DPX, SPX): New subclass enums.
423 (ARC_FPUDA): Define.
424 (arc_aux_reg): Add new field.
425
4262016-04-05 Cupertino Miranda <cmiranda@synopsys.com>
094fb063
CZ		 427
428 * opcode/arc-func.h (replace_bits24): Changed.
429 (replace_bits24_be): Created.
430
f2dd8838
CZ		 4312016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
432
b99747ae
CZ		 433 * opcode/arc.h (insn_subclass_t): Add QUARKSE subclass.
434 (FIELDA, FIELDB, FIELDC, FIELDF, FIELDQ, INSN3OP, INSN2OP)
435 (INSN2OP, INSN3OP_ABC, INSN3OP_ALC, INSN3OP_ABL, INSN3OP_ALL)
436 (INSN3OP_0BC, INSN3OP_0LC, INSN3OP_0BL, INSN3OP_0LL, INSN3OP_ABU)
437 (INSN3OP_ALU, INSN3OP_0BU, INSN3OP_0LU, INSN3OP_BBS, INSN3OP_0LS)
438 (INSN3OP_CBBC, INSN3OP_CBBL, INSN3OP_C0LC, INSN3OP_C0LL)
439 (INSN3OP_CBBU, INSN3OP_C0LU, MINSN3OP_ABC, MINSN3OP_ALC)
440 (MINSN3OP_ABL, MINSN3OP_ALL, MINSN3OP_0BC, MINSN3OP_0LC)
441 (MINSN3OP_0BL, MINSN3OP_0LL, MINSN3OP_ABU, MINSN3OP_ALU)
442 (MINSN3OP_0BU, MINSN3OP_0LU, MINSN3OP_BBS, MINSN3OP_0LS)
443 (MINSN3OP_CBBC, MINSN3OP_CBBL, MINSN3OP_C0LC, MINSN3OP_C0LL)
444 (MINSN3OP_CBBU, MINSN3OP_C0LU, INSN2OP_BC, INSN2OP_BL, INSN2OP_0C)
445 (INSN2OP_0L INSN2OP_BU, INSN2OP_0U, MINSN2OP_BC, MINSN2OP_BL)
446 (MINSN2OP_0C, MINSN2OP_0L, MINSN2OP_BU, MINSN2OP_0U): Define.
f2dd8838 447
b9bb4a93
TS		 4482016-03-22 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
449
450 * opcode/i960.h: Add const qualifiers.
451 * opcode/tic4x.h (struct tic4x_inst): Likewise.
452
e23e8ebe
AB		 4532016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
454
455 * opcodes/arc.h (insn_class_t): Add BITOP type.
456
1ae8ab47
AB		 4572016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
458
459 * opcode/arc.h (flag_class_t): Remove all old flag classes, add 3
460 new classes instead.
461
8699fc3e
AB		 4622016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
463
464 * elf/arc.h (E_ARC_MACH_NPS400): Define.
465 * opcode/arc.h (ARC_OPCODE_NPS400): Define.
466
a9522a21
AB		 4672016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
468
469 * elf/arc.h (EF_ARC_CPU_GENERIC): Delete. Update related comment.
470
c0334580
AB		 4712016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
472
473 * elf/arc.h (EF_ARC_MACH): Delete.
474 (EF_ARC_MACH_MSK): Remove out of date comment.
475
24740d83
AB		 4762016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
477
478 * opcode/arc.h (ARC_OPCODE_BASE): Delete.
479
4c10bbaa
L		 4802016-03-15 H.J. Lu <hongjiu.lu@intel.com>
481
482 PR ld/19807
483 * bfdlink.h (bfd_link_info): Add no_reloc_overflow_check.
484
72f3b6aa
CZ		 4852016-03-08 Cupertino Miranda <Cupertino.Miranda@synopsys.com>
486 Andrew Burgess <andrew.burgess@embecosm.com>
487
488 * elf/arc-reloc.def: Add a call to ME within the formula for each
489 relocation that requires middle-endian correction.
490
f86f5863
TS		 4912016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
492
493 * opcode/dlx.h (struct dlx_opcode): Add const qualifiers.
494 * opcode/h8300.h (struct h8_opcode): Likewise.
495 * opcode/hppa.h (struct pa_opcode): Likewise.
496 * opcode/msp430.h: Likewise.
497 * opcode/spu.h (struct spu_opcode): Likewise.
498 * opcode/tic30.h (struct _register): Likewise.
499 * opcode/tic4x.h (struct tic4x_register): Likewise.
500 (struct tic4x_cond): Likewise.
501 (struct tic4x_indirect): Likewise.
502 (struct tic4x_inst): Likewise.
503 * opcode/visium.h (struct reg_entry): Likewise.
504
643afb90
MW		 5052016-03-04 Matthew Wahab <matthew.wahab@arm.com>
506
507 * arm.h (ARM_ARCH_V8_1A): Add FPU_NEON_EXT_RDMA.
508 (ARM_CPU_HAS_FEATURE): Add comment.
509
3f1f41f5
L		 5102016-03-03 Than McIntosh <thanm@google.com>
511
512 * plugin-api.h: Add new hooks to the plugin transfer vector to
513 to support querying section alignment and section size.
514 (ld_plugin_get_input_section_alignment): New hook.
515 (ld_plugin_get_input_section_size): New hook.
516 (ld_plugin_tag): Add LDPT_GET_INPUT_SECTION_ALIGNMENT
517 and LDPT_GET_INPUT_SECTION_SIZE.
518 (ld_plugin_tv): Add tv_get_input_section_alignment and
519 tv_get_input_section_size.
520
9b738e36 5212016-03-03 Evgenii Stepanov <eugenis@google.com>
95ecdfbf
ES		 522
523 * plugin-api.h (enum ld_plugin_tag): Add LDPT_GET_SYMBOLS_V3.
524
11e5f1ec
L		 5252016-02-26 H.J. Lu <hongjiu.lu@intel.com>
526
527 PR ld/19645
528 * bfdlink.h (bfd_link_elf_stt_common): New enum.
529 (bfd_link_info): Add elf_stt_common.
530
aec6b87e
L		 5312016-02-26 H.J. Lu <hongjiu.lu@intel.com>
532
533 PR ld/19636
534 PR ld/19704
535 PR ld/19719
536 * bfdlink.h (bfd_link_info): Add dynamic_undefined_weak.
537
b8ec4e87
JW		 5382016-02-19 Matthew Wahab <matthew.wahab@arm.com>
539 Jiong Wang <jiong.wang@arm.com>
540
541 * opcode/arm.h (ARM_EXT2_FP16_INSN): New.
542
4670103e
CZ		 5432016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
544 Janek van Oirschot <jvanoirs@synopsys.com>
545
b99747ae
CZ		 546 * opcode/arc.h (arc_opcode arc_relax_opcodes)
547 (arc_num_relax_opcodes): Declare.
4670103e 548
609332f1
NC		 5492016-02-09 Nick Clifton <nickc@redhat.com>
550
551 * opcode/metag.h (metag_scondtab): Mark as possibly unused.
552 * opcode/nds32.h (nds32_r45map): Likewise.
553 (nds32_r54map): Likewise.
554 * opcode/visium.h (gen_reg_table): Likewise.
555 (fp_reg_table, cc_table, opcode_table): Likewise.
556
24f5f69a
AM		 5572016-02-09 Alan Modra <amodra@gmail.com>
558
559 PR 16583
560 * elf/common.h (AT_SUN_HWCAP): Undef before defining.
561
c1d9289f
NC		 5622016-02-04 Nick Clifton <nickc@redhat.com>
563
564 PR target/19561
565 * opcode/msp430.h (IGNORE_CARRY_BIT): New define.
566 (RRUX): Synthesise using case 2 rather than 7.
567
f4ddf30f
JB		 5682016-01-19 John Baldwin <jhb@FreeBSD.org>
569
570 * elf/common.h (NT_FREEBSD_THRMISC): Define.
571 (NT_FREEBSD_PROCSTAT_PROC): Define.
572 (NT_FREEBSD_PROCSTAT_FILES): Define.
573 (NT_FREEBSD_PROCSTAT_VMMAP): Define.
574 (NT_FREEBSD_PROCSTAT_GROUPS): Define.
575 (NT_FREEBSD_PROCSTAT_UMASK): Define.
576 (NT_FREEBSD_PROCSTAT_RLIMIT): Define.
577 (NT_FREEBSD_PROCSTAT_OSREL): Define.
578 (NT_FREEBSD_PROCSTAT_PSSTRINGS): Define.
579 (NT_FREEBSD_PROCSTAT_AUXV): Define.
580
34e967a5
MC		 5812016-01-18 Miranda Cupertino <Cupertino.Miranda@synopsys.com>
582 Zissulescu Claudiu <Claudiu.Zissulescu@synopsys.com>
583
584 * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT)
585 (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9)
586 (ARC_TLS_LE_32): Fixed formula.
587 (ARC_TLS_GD_LD): Use new special function.
588 * opcode/arc-func.h: Changed all the replacement
589 functions to clear the patching bits before doing an or it with the value
590 argument.
591
9ae678af
NC		 5922016-01-18 Nick Clifton <nickc@redhat.com>
593
594 PR ld/19440
595 * coff/internal.h (internal_syment): Use int to hold section
596 number.
597 (N_UNDEF): Cast to int not short.
598 (N_ABS): Likewise.
599 (N_DEBUG): Likewise.
600 (N_TV): Likewise.
601 (P_TV): Likewise.
602
4849dfd8
NC		 6032016-01-11 Nick Clifton <nickc@redhat.com>
604
605 Import this change from GCC mainline:
606
607 2016-01-07 Mike Frysinger <vapier@gentoo.org>
608
609 * longlong.h: Change !__SHMEDIA__ to
610 (!defined (__SHMEDIA__) || !__SHMEDIA__).
611 Change __SHMEDIA__ to defined (__SHMEDIA__) && __SHMEDIA__.
612
b31e4803
MR		 6132016-01-06 Maciej W. Rozycki <macro@imgtec.com>
614
615 * opcode/mips.h: Add a summary of MIPS16 operand codes.
616
b36c1ccb
MF		 6172016-01-05 Mike Frysinger <vapier@gentoo.org>
618
619 * libiberty.h (dupargv): Change arg to char * const *.
620 (writeargv, countargv): Likewise.
621
6f2750fe
AM		 6222016-01-01 Alan Modra <amodra@gmail.com>
623
624 Update year range in copyright notice of all files.
625
3499769a
AM		 626For older changes see ChangeLog-0415, aout/ChangeLog-9115,
627cgen/ChangeLog-0915, coff/ChangeLog-0415, elf/ChangeLog-0415,
628mach-o/ChangeLog-1115, nlm/ChangeLog-9315, opcode/ChangeLog-0415,
629som/ChangeLog-1015, and vms/ChangeLog-1015
630\f
631Copyright (C) 2016 Free Software Foundation, Inc.
632
633Copying and distribution of this file, with or without modification,
634are permitted in any medium without royalty provided the copyright
635notice and this notice are preserved.
636
637Local Variables:
638mode: change-log
639left-margin: 8
640fill-column: 74
641version-control: never
642End:
GDB Binutils - Deliverables
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