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PowerPC64 higher REL16 relocations
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
4a969973
AM		 12018-08-31 Alan Modra <amodra@gmail.com>
2
3 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
4 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
5 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
6 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
7
43135d3b
JW		 82018-08-30 Kito Cheng <kito@andestech.com>
9
10 * opcode/riscv.h (MAX_SUBSET_NUM): New.
11 (riscv_opcode): Add xlen_requirement field and change type of
12 subset.
13
bd782c07
CX		 142018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
15
9108bc33
CX		 16 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
17 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
18
192018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
bd782c07
CX		 20
21 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
22 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
23
ac8cb70f
CX		 242018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
25
26 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
27 E_MIPS_MACH_GS464.
28 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
29 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
30 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
31 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
32
a693765e
CX		 332018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
34
35 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
36 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
37 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
38
bdc6c06e
CX		 392018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
40
41 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
42 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
43 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
44
716c08de
CX		 452018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
46
47 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
48 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
49 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
50
a9eafb08
L		 512018-08-24 H.J. Lu <hongjiu.lu@intel.com>
52
53 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
54 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
55 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
56 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
57 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
58 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
59 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
60 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
61 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
62 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
63 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
64 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
65 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
66 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
67 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
68 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
69 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
70 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
71 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
72 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
73 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
74 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
75 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
76 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
77 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
78 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
79 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
80 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
81 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
82 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
83 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
84 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
85 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
86 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
87 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
88 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
89 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
90 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
91 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
92 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
93 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
94 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
95 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
96 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
97 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
98 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
99 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
100 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
101 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
102 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
103 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
104 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
105 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
106 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
107 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
108 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
109
aa7bca9b
L		 1102018-08-24 H.J. Lu <hongjiu.lu@intel.com>
111
112 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
113
ebf983a4 1142018-08-21 John Darrington <john@darrington.wattle.id.au>
4e57b456
JD		 115
116 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
117
9cf7e568
AM		 1182018-08-21 Alan Modra <amodra@gmail.com>
119
120 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
121 Mention use of "extract" function to provide default value.
122 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
123 (ppc_optional_operand_value): Rewrite to use extract function.
124
08a8fe2f 1252018-08-18 John Darrington <john@darrington.wattle.id.au>
7ba3ba91 126
d203b41a 127 * opcode/s12z.h: New file.
7ba3ba91 128
57285ade
RE		 1292018-08-09 Richard Earnshaw <rearnsha@arm.com>
130
131 * elf/arm.h: Updated comments for e_flags definitions.
132
db1e1b45 1332018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
134
135 * elf/arc.h (Tag_ARC_ATR_version): New tag.
136
b6523c37 1372018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
138
139 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
140
50320b1d 1412018-08-01 Richard Earnshaw <rearnsha@arm.com>
142
143 Copy over from GCC
144 2018-07-26 Martin Liska <mliska@suse.cz>
145
d203b41a 146 PR lto/86548
50320b1d 147 * libiberty.h (make_temp_file_with_prefix): New function.
148
eb41b248
JW		 1492018-07-30 Jim Wilson <jimw@sifive.com>
150
151 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
152 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
153 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
154
b8891f8d
AJ		 1552018-07-30 Andrew Jenner <andrew@codesourcery.com>
156
157 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
158 * elf/csky.h: New file.
159
2bb9bbe2
CX		 1602018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
161 Maciej W. Rozycki <macro@linux-mips.org>
162
163 * elf/mips.h (AFL_ASE_MASK): Correct typo.
164
fa758a70
AC		 1652018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
166
167 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
168
33cb30a1
AM		 1692018-07-26 Alan Modra <amodra@gmail.com>
170
171 * elf/ppc64.h: Specify byte offset to local entry for values
172 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
173 value for such functions when entering via global entry point.
174 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
175
67ce483b
AM		 1762018-07-24 Alan Modra <amodra@gmail.com>
177
178 PR 23430
179 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
180
8095d2f7
CX		 1812018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
182 Maciej W. Rozycki <macro@mips.com>
183
184 * elf/mips.h (AFL_ASE_MMI): New macro.
185 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
186 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
187
d5c928c0
MR		 1882018-07-17 Maciej W. Rozycki <macro@mips.com>
189
190 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
191
fe75810f
AM		 1922018-07-06 Alan Modra <amodra@gmail.com>
193
194 * diagnostics.h: Comment on macro usage.
195
6821842f
SM		 1962018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
197
198 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
199 Define for clang.
200
471b9d15
MR		 2012018-07-02 Maciej W. Rozycki <macro@mips.com>
202
203 PR tdep/8282
204 * dis-asm.h (disasm_option_arg_t): New typedef.
205 (disasm_options_and_args_t): Likewise.
206 (disasm_options_t): Add `arg' member, document members.
207 (disassembler_options_mips): New prototype.
208 (disassembler_options_arm, disassembler_options_powerpc)
209 (disassembler_options_s390): Update prototypes.
210
369c9167
TC		 2112018-06-29 Tamar Christina <tamar.christina@arm.com>
212
213 PR binutils/23192
214 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
215
2393a7e3
AM		 2162018-06-26 Alan Modra <amodra@gmail.com>
217
218 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
219
719d8288
NC		 2202018-06-24 Nick Clifton <nickc@redhat.com>
221
222 2.31 branch created.
223
57c0d77c
AH		 2242018-06-21 Alan Hayward <alan.hayward@arm.com>
225
226 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
227 for non SHT_NOBITS.
228
d856f9a8
SM		 2292018-06-19 Simon Marchi <simon.marchi@ericsson.com>
230
231 Sync with GCC
232
233 2018-05-24 Tom Rix <trix@juniper.net>
234
235 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
236
237 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
238
239 * longlong.h [__riscv] (__umulsidi3): Define.
240 [__riscv] (umul_ppmm): Likewise.
241 [__riscv] (__muluw3): Likewise.
242
6f20c942
FS		 2432018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
244
245 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
246 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
247 * opcode/mips.h: Document "+\" operand format.
248 (ASE_GINV): New macro.
249
730c3174
SE		 2502018-06-13 Scott Egerton <scott.egerton@imgtec.com>
251 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
252
253 * elf/mips.h (AFL_ASE_CRC): New macro.
254 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
255 * opcode/mips.h (ASE_CRC): New macro.
256 * opcode/mips.h (ASE_CRC64): Likewise.
257
4b8e28c7
MF		 2582018-06-04 Max Filippov <jcmvbkbc@gmail.com>
259
260 * elf/xtensa.h (xtensa_read_table_entries)
261 (xtensa_compute_fill_extra_space): New declarations.
262
95da9854
L		 2632018-06-04 H.J. Lu <hongjiu.lu@intel.com>
264
265 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
266 define for GCC.
267
23081219
L		 2682018-06-04 H.J. Lu <hongjiu.lu@intel.com>
269
270 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
271 (DIAGNOSTIC_STRINGIFY): Likewise.
272 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
273 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
274 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
275 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
276 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
277 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
278
e9cb46ab
L		 2792018-06-01 H.J. Lu <hongjiu.lu@intel.com>
280
281 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
282
22467434 2832018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
284
285 * splay-tree.h (splay_tree_compare_strings,
286 splay_tree_delete_pointers): Declare new utility functions.
287
98553ad3
PB		 2882018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
289
290 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
291
7f999549
JW		 2922018-05-18 Kito Cheng <kito.cheng@gmail.com>
293
294 * elf/riscv.h (EF_RISCV_RVE): New define.
295
7b4ae824
JD		 2962018-05-18 John Darrington <john@darrington.wattle.id.au>
297
298 * elf/s12z.h: New header.
299
f9830ec1
TC		 3002018-05-15 Tamar Christina <tamar.christina@arm.com>
301
302 PR binutils/21446
303 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
304
7d02540a
TC		 3052018-05-15 Tamar Christina <tamar.christina@arm.com>
306
307 PR binutils/21446
308 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
309 (aarch64_print_operand): Support notes.
310
561a72d4
TC		 3112018-05-15 Tamar Christina <tamar.christina@arm.com>
312
313 PR binutils/21446
314 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
315 (aarch64_decode_insn): Accept error struct.
316
1678bd35
FT		 3172018-05-15 Francois H. Theron <francois.theron@netronome.com>
318
319 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
320
637b1970
JD		 3212018-05-10 John Darrington <john@darrington.wattle.id.au>
322
323 * elf/common.h (EM_S12Z): New macro.
324
84f9f8c3
AM		 3252018-05-09 Sebastian Rasmussen <sebras@gmail.com>
326
327 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
328 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
329 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
330 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
331
e6f372ba
JW		 3322018-05-08 Jim Wilson <jimw@sifive.com>
333
334 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
335 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
336 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
337
2ceb7719
PB		 3382018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
339
340 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
341 (vle_num_opcodes): Likewise.
342 (spe2_num_opcodes): Likewise.
343
602f1657
AM		 3442018-05-04 Alan Modra <amodra@gmail.com>
345
346 * ansidecl.h: Import from gcc.
347 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
348 to s_name.
349 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
350
fe944acf
FT		 3512018-04-30 Francois H. Theron <francois.theron@netronome.com>
352
353 * dis-asm.h: Added print_nfp_disassembler_options prototype.
354 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
355 Generic System V Application Binary Interface.
356 * elf/nfp.h: New, for NFP support.
357 * opcode/nfp.h: New, for NFP support.
358
5c5a4843
CL		 3592018-04-25 Christophe Lyon <christophe.lyon@st.com>
360 Mickaël Guêné <mickael.guene@st.com>
361
362 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
363 R_ARM_TLS_IE32_FDPIC.
364
188fd7ae
CL		 3652018-04-25 Christophe Lyon <christophe.lyon@st.com>
366 Mickaël Guêné <mickael.guene@st.com>
367
368 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
369 (R_ARM_FUNCDESC)
370 (R_ARM_FUNCDESC_VALUE): Define new relocations.
371
18a20338
CL		 3722018-04-25 Christophe Lyon <christophe.lyon@st.com>
373 Mickaël Guêné <mickael.guene@st.com>
374
375 * elf/arm.h (EF_ARM_FDPIC): New.
376
3596d8ce
AM		 3772018-04-18 Alan Modra <amodra@gmail.com>
378
379 * coff/mipspe.h: Delete.
380
c65c21e1
AM		 3812018-04-18 Alan Modra <amodra@gmail.com>
382
383 * aout/dynix3.h: Delete.
384
884d4d8a 3852018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
3f0a5f17
ME		 386
387 Microblaze Target: PIC data text relative
388
389 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
390 * elf/microblaze.h (Add 3 new relocations):
391 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
392 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
393
f954747f
AM		 3942018-04-17 Alan Modra <amodra@gmail.com>
395
396 * elf/i370.h: Revert removal.
397 * elf/i860.h: Likewise.
398 * elf/i960.h: Likewise.
399
5452f388
AM		 4002018-04-16 Alan Modra <amodra@gmail.com>
401
402 * coff/sparc.h: Delete.
403
dc12032b
AM		 4042018-04-16 Alan Modra <amodra@gmail.com>
405
406 * aout/host.h: Remove m68k-aout and m68k-coff support.
407 * aout/hp300hpux.h: Delete.
408 * coff/apollo.h: Delete.
409 * coff/aux-coff.h: Delete.
410 * coff/m68k.h: Delete.
411
211dc24b
AM		 4122018-04-16 Alan Modra <amodra@gmail.com>
413
414 * dis-asm.h: Remove sh5 and sh64 support.
415
a9a4b302
AM		 4162018-04-16 Alan Modra <amodra@gmail.com>
417
418 * coff/internal.h: Remove w65 support.
419 * coff/w65.h: Delete.
420
04cb01fd
AM		 4212018-04-16 Alan Modra <amodra@gmail.com>
422
423 * coff/we32k.h: Delete.
424
c2bf1eec
AM		 4252018-04-16 Alan Modra <amodra@gmail.com>
426
427 * coff/internal.h: Remove m88k support.
428 * coff/m88k.h: Delete.
429 * opcode/m88k.h: Delete.
430
6793974d
AM		 4312018-04-16 Alan Modra <amodra@gmail.com>
432
433 * elf/i370.h: Delete.
434 * opcode/i370.h: Delete.
435
e82aa794
AM		 4362018-04-16 Alan Modra <amodra@gmail.com>
437
438 * coff/h8500.h: Delete.
439 * coff/internal.h: Remove h8500 support.
440
fe0bf0fd
AM		 4412018-04-16 Alan Modra <amodra@gmail.com>
442
443 * coff/h8300.h: Delete.
444
fdef3943
AM		 4452018-04-16 Alan Modra <amodra@gmail.com>
446
447 * ieee.h: Delete.
448
5972ac73
AM		 4492018-04-16 Alan Modra <amodra@gmail.com>
450
451 * aout/host.h: Remove newsos3 support.
452
b4b594e3
AM		 4532018-04-16 Alan Modra <amodra@gmail.com>
454
455 * nlm/ChangeLog-9315: Delete.
456 * nlm/alpha-ext.h: Delete.
457 * nlm/common.h: Delete.
458 * nlm/external.h: Delete.
459 * nlm/i386-ext.h: Delete.
460 * nlm/internal.h: Delete.
461 * nlm/ppc-ext.h: Delete.
462 * nlm/sparc32-ext.h: Delete.
463
fceadf09
AM		 4642018-04-16 Alan Modra <amodra@gmail.com>
465
466 * opcode/tahoe.h: Delete.
467
a8eb42a8
AM		 4682018-04-11 Alan Modra <amodra@gmail.com>
469
470 * aout/adobe.h: Delete.
471 * aout/reloc.h: Delete.
472 * coff/i860.h: Delete.
473 * coff/i960.h: Delete.
474 * elf/i860.h: Delete.
475 * elf/i960.h: Delete.
476 * opcode/i860.h: Delete.
477 * opcode/i960.h: Delete.
478 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
479 * aout/ar.h (ARMAGB): Remove.
480 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
481 union internal_auxent): Remove i960 support.
482
23cedd1d
AM		 4832018-04-09 Alan Modra <amodra@gmail.com>
484
485 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
486 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
487
84f1b9fb
RL		 4882018-03-28 Renlin Li <renlin.li@arm.com>
489
490 PR ld/22970
491 * elf/aarch64.h: Add relocation number for
492 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
493 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
494 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
495 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
496 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
497 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
498 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
499 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
500
c8d59609
NC		 5012018-03-28 Nick Clifton <nickc@redhat.com>
502
503 PR 22988
504 * opcode/aarch64.h (enum aarch64_opnd): Add
505 AARCH64_OPND_SVE_ADDR_R.
506
b1202ffa
L		 5072018-03-21 H.J. Lu <hongjiu.lu@intel.com>
508
509 * elf/common.h (DF_1_KMOD): New.
510 (DF_1_WEAKFILTER): Likewise.
511 (DF_1_NOCOMMON): Likewise.
512
0e35537d
JW		 5132018-03-14 Kito Cheng <kito.cheng@gmail.com>
514
515 * opcode/riscv.h (OP_MASK_FUNCT3): New.
516 (OP_SH_FUNCT3): Likewise.
517 (OP_MASK_FUNCT7): Likewise.
518 (OP_SH_FUNCT7): Likewise.
519 (OP_MASK_OP2): Likewise.
520 (OP_SH_OP2): Likewise.
521 (OP_MASK_CFUNCT4): Likewise.
522 (OP_SH_CFUNCT4): Likewise.
523 (OP_MASK_CFUNCT3): Likewise.
524 (OP_SH_CFUNCT3): Likewise.
525 (riscv_insn_types): Likewise.
526
3e33b239
NC		 5272018-03-13 Nick Clifton <nickc@redhat.com>
528
529 PR 22113
530 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
531 field.
532
bd5dea88
L		 5332018-03-08 H.J. Lu <hongjiu.lu@intel.com>
534
535 * opcode/i386 (OLDGCC_COMPAT): Removed.
536
5b616bef
TP		 5372018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
538
539 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
540
75f31665
MR		 5412018-02-20 Maciej W. Rozycki <macro@mips.com>
542
543 * opcode/mips.h: Remove `M' operand code.
544
830db048
ZF		 5452018-02-12 Zebediah Figura <z.figura12@gmail.com>
546
547 * coff/msdos.h: New header.
548 * coff/pe.h: Move common defines to msdos.h.
549 * coff/powerpc.h: Likewise.
550
faf766e3
NC		 5512018-01-13 Nick Clifton <nickc@redhat.com>
552
553 2.30 branch created.
554
47acac12
L		 5552018-01-11 H.J. Lu <hongjiu.lu@intel.com>
556
557 PR ld/22393
558 * bfdlink.h (bfd_link_info): Add separate_code.
559
645a2c5b
JW		 5602018-01-04 Jim Wilson <jimw@sifive.com>
561
562 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
563 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
564 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
565 Add alias to map mbadaddr to CSR_MTVAL.
566
219d1afa
AM		 5672018-01-03 Alan Modra <amodra@gmail.com>
568
569 Update year range in copyright notice of all files.
570
1e563868 571For older changes see ChangeLog-2017
3499769a 572\f
1e563868 573Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
AM		 574
575Copying and distribution of this file, with or without modification,
576are permitted in any medium without royalty provided the copyright
577notice and this notice are preserved.
578
579Local Variables:
580mode: change-log
581left-margin: 8
582fill-column: 74
583version-control: never
584End:
GDB Binutils - Deliverables
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