AArch64: Wire through instr_sequence
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
7e84b55d
TC
12018-10-03 Tamar Christina <tamar.christina@arm.com>
2
3 * opcode/aarch64.h (struct aarch64_instr_sequence): New.
4 (aarch64_opcode_encode): Use it.
5
eae424ae
TC
62018-10-03 Tamar Christina <tamar.christina@arm.com>
7
8 * opcode/aarch64.h (struct aarch64_opcode): Add constraints,
9 extend flags field size.
10 (F_SCAN, C_SCAN_MOVPRFX, C_MAX_ELEM): New.
11
007d2fe4
JD
122018-10-03 John Darrington <john@darrington.wattle.id.au>
13
14 * dis-asm.h (print_insn_s12z): New declaration.
15
64a336ac
PD
162018-10-02 Palmer Dabbelt <palmer@sifive.com>
17
18 * opcode/riscv-opc.h (MATCH_FENCE_TSO): New define.
19 (MASK_FENCE_TSO): Likewise.
20
eb528ad1
CM
212018-10-01 Cupertino Miranda <cmiranda@synopsys.com>
22
23 * arc-reloc.def (ARC_TLS_LE_32): Updated reloc formula.
24
95475e5d
L
252018-09-21 H.J. Lu <hongjiu.lu@intel.com>
26
27 PR binutils/23694
28 * include/elf/internal.h (ELF_SECTION_IN_SEGMENT_1): Don't
29 include zero size sections at start of PT_NOTE segment.
30
fbaf61ad
NC
312018-09-20 Nelson Chu <nelson.chu1990@gmail.com>
32
33 * elf/nds32.h: Remove the unused target features.
34 * dis-asm.h (disassemble_init_nds32): Declared.
35 * elf/nds32.h (E_NDS32_NULL): Removed.
36 (E_NDS32_HAS_DSP_INST, E_NDS32_HAS_ZOL): New.
37 * opcode/nds32.h: Ident.
38 (N32_SUB6, INSN_LW): New macros.
39 (enum n32_opcodes): Updated.
40 * elf/nds32.h: Doc fixes.
41 * elf/nds32.h: Add R_NDS32_LSI.
42 * elf/nds32.h: Add new relocations for TLS.
43
3d282ac3
RO
442018-09-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
45
46 * elf/common.h (AT_SUN_HWCAP): Rename to ...
47 (AT_SUN_CAP_HW1): ... this. Retain old name for backward
48 compatibility.
49 (AT_SUN_EMULATOR, AT_SUN_BRANDNAME, AT_SUN_BRAND_AUX1)
50 (AT_SUN_BRAND_AUX2, AT_SUN_BRAND_AUX3, AT_SUN_CAP_HW2): Define.
51
af39b1c2
SM
522018-09-05 Simon Marchi <simon.marchi@ericsson.com>
53
54 * diagnostics.h (DIAGNOSTIC_IGNORE_FORMAT_NONLITERAL): New macro.
55
4a969973
AM
562018-08-31 Alan Modra <amodra@gmail.com>
57
58 * elf/ppc64.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
59 (R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
60 (R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
61 (R_PPC64_LO_DS_OPT, R_PPC64_16DX_HA): Bump value.
62
43135d3b
JW
632018-08-30 Kito Cheng <kito@andestech.com>
64
65 * opcode/riscv.h (MAX_SUBSET_NUM): New.
66 (riscv_opcode): Add xlen_requirement field and change type of
67 subset.
68
bd782c07
CX
692018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
70
9108bc33
CX
71 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS264E.
72 * opcode/mips.h (CPU_XXX): New CPU_GS264E.
73
742018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
bd782c07
CX
75
76 * elf/mips.h (E_MIPS_MACH_XXX): New E_MIPS_MACH_GS464E.
77 * opcode/mips.h (CPU_XXX): New CPU_GS464E.
78
ac8cb70f
CX
792018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
80
81 * elf/mips.h (E_MIPS_MACH_XXX): Rename E_MIPS_MACH_LS3A to
82 E_MIPS_MACH_GS464.
83 (AFL_EXT_XXX): Delete AFL_EXT_LOONGSON_3A.
84 * opcode/mips.h (INSN_XXX): Delete INSN_LOONGSON_3A.
85 (CPU_XXX): Rename CPU_LOONGSON_3A to CPU_GS464.
86 * opcode/mips.h (mips_isa_table): Delete CPU_LOONGSON_3A case.
87
a693765e
CX
882018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
89
90 * elf/mips.h (AFL_ASE_LOONGSON_EXT2): New macro.
91 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT2.
92 * opcode/mips.h (ASE_LOONGSON_EXT2): New macro.
93
bdc6c06e
CX
942018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
95
96 * elf/mips.h (AFL_ASE_LOONGSON_EXT): New macro.
97 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_EXT.
98 * opcode/mips.h (ASE_LOONGSON_EXT): New macro.
99
716c08de
CX
1002018-08-29 Chenghua Xu <paul.hua.gm@gmail.com>
101
102 * elf/mips.h (AFL_ASE_LOONGSON_CAM): New macro.
103 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_CAM.
104 * opcode/mips.h (ASE_LOONGSON_CAM): New macro.
105
a9eafb08
L
1062018-08-24 H.J. Lu <hongjiu.lu@intel.com>
107
108 * elf/common.h (GNU_PROPERTY_X86_ISA_1_USED): Renamed to ...
109 (GNU_PROPERTY_X86_COMPAT_ISA_1_USED): This.
110 (GNU_PROPERTY_X86_ISA_1_NEEDED): Renamed to ...
111 (GNU_PROPERTY_X86_COMPAT_ISA_1_NEEDED): This.
112 (GNU_PROPERTY_X86_ISA_1_XXX): Renamed to ...
113 (GNU_PROPERTY_X86_COMPAT_ISA_1_XXX): This.
114 (GNU_PROPERTY_X86_UINT32_AND_LO): New.
115 (GNU_PROPERTY_X86_UINT32_AND_HI): Likewise.
116 (GNU_PROPERTY_X86_UINT32_OR_LO): Likewise.
117 (GNU_PROPERTY_X86_UINT32_OR_HI): Likewise.
118 (GNU_PROPERTY_X86_UINT32_OR_AND_LO): Likewise.
119 (GNU_PROPERTY_X86_UINT32_OR_AND_HI): Likewise.
120 (GNU_PROPERTY_X86_ISA_1_CMOV): Likewise.
121 (GNU_PROPERTY_X86_ISA_1_SSE): Likewise.
122 (GNU_PROPERTY_X86_ISA_1_SSE2): Likewise.
123 (GNU_PROPERTY_X86_ISA_1_SSE3): Likewise.
124 (GNU_PROPERTY_X86_ISA_1_SSSE3): Likewise.
125 (GNU_PROPERTY_X86_ISA_1_SSE4_1): Likewise.
126 (GNU_PROPERTY_X86_ISA_1_SSE4_2): Likewise.
127 (GNU_PROPERTY_X86_ISA_1_AVX): Likewise.
128 (GNU_PROPERTY_X86_ISA_1_AVX2): Likewise.
129 (GNU_PROPERTY_X86_ISA_1_FMA): Likewise.
130 (GNU_PROPERTY_X86_ISA_1_AVX512F): Likewise.
131 (GNU_PROPERTY_X86_ISA_1_AVX512CD): Likewise.
132 (GNU_PROPERTY_X86_ISA_1_AVX512ER): Likewise.
133 (GNU_PROPERTY_X86_ISA_1_AVX512PF): Likewise.
134 (GNU_PROPERTY_X86_ISA_1_AVX512VL): Likewise.
135 (GNU_PROPERTY_X86_ISA_1_AVX512DQ): Likewise.
136 (GNU_PROPERTY_X86_ISA_1_AVX512BW): Likewise.
137 (GNU_PROPERTY_X86_ISA_1_AVX512_4FMAPS): Likewise.
138 (GNU_PROPERTY_X86_ISA_1_AVX512_4VNNIW): Likewise.
139 (GNU_PROPERTY_X86_ISA_1_AVX512_BITALG): Likewise.
140 (GNU_PROPERTY_X86_ISA_1_AVX512_IFMA): Likewise.
141 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI): Likewise.
142 (GNU_PROPERTY_X86_ISA_1_AVX512_VBMI2): Likewise.
143 (GNU_PROPERTY_X86_ISA_1_AVX512_VNNI): Likewise.
144 (GNU_PROPERTY_X86_FEATURE_2_X86): Likewise.
145 (GNU_PROPERTY_X86_FEATURE_2_X87): Likewise.
146 (GNU_PROPERTY_X86_FEATURE_2_MMX): Likewise.
147 (GNU_PROPERTY_X86_FEATURE_2_XMM): Likewise.
148 (GNU_PROPERTY_X86_FEATURE_2_YMM): Likewise.
149 (GNU_PROPERTY_X86_FEATURE_2_ZMM): Likewise.
150 (GNU_PROPERTY_X86_FEATURE_2_FXSR): Likewise.
151 (GNU_PROPERTY_X86_FEATURE_2_XSAVE): Likewise.
152 (GNU_PROPERTY_X86_FEATURE_2_XSAVEOPT): Likewise.
153 (GNU_PROPERTY_X86_FEATURE_2_XSAVEC): Likewise.
154 (GNU_PROPERTY_X86_FEATURE_1_AND): Updated to
155 (GNU_PROPERTY_X86_UINT32_AND_LO + 0).
156 (GNU_PROPERTY_X86_ISA_1_NEEDED): Defined to
157 (GNU_PROPERTY_X86_UINT32_OR_LO + 0).
158 (GNU_PROPERTY_X86_FEATURE_2_NEEDED): New. Defined to
159 (GNU_PROPERTY_X86_UINT32_OR_LO + 1).
160 (GNU_PROPERTY_X86_ISA_1_USED): Defined to
161 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 0).
162 (GNU_PROPERTY_X86_FEATURE_2_USED): New. Defined to
163 (GNU_PROPERTY_X86_UINT32_OR_AND_LO + 1).
164
aa7bca9b
L
1652018-08-24 H.J. Lu <hongjiu.lu@intel.com>
166
167 * elf/common.h (GNU_PROPERTY_X86_UINT32_VALID): New.
168
ebf983a4 1692018-08-21 John Darrington <john@darrington.wattle.id.au>
4e57b456
JD
170
171 * elf/s12z.h: Rename R_S12Z_UKNWN_3 to R_S12Z_EXT18.
172
9cf7e568
AM
1732018-08-21 Alan Modra <amodra@gmail.com>
174
175 * opcode/ppc.h (struct powerpc_operand): Correct "insert" comment.
176 Mention use of "extract" function to provide default value.
177 (PPC_OPERAND_OPTIONAL_VALUE): Delete.
178 (ppc_optional_operand_value): Rewrite to use extract function.
179
08a8fe2f 1802018-08-18 John Darrington <john@darrington.wattle.id.au>
7ba3ba91 181
d203b41a 182 * opcode/s12z.h: New file.
7ba3ba91 183
57285ade
RE
1842018-08-09 Richard Earnshaw <rearnsha@arm.com>
185
186 * elf/arm.h: Updated comments for e_flags definitions.
187
db1e1b45 1882018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
189
190 * elf/arc.h (Tag_ARC_ATR_version): New tag.
191
b6523c37 1922018-08-06 Claudiu Zissulescu <claziss@synopsys.com>
193
194 * opcode/arc.h (ARC_OPCODE_ARCV1): Define.
195
50320b1d 1962018-08-01 Richard Earnshaw <rearnsha@arm.com>
197
198 Copy over from GCC
199 2018-07-26 Martin Liska <mliska@suse.cz>
200
d203b41a 201 PR lto/86548
50320b1d 202 * libiberty.h (make_temp_file_with_prefix): New function.
203
eb41b248
JW
2042018-07-30 Jim Wilson <jimw@sifive.com>
205
206 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
207 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
208 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
209
b8891f8d
AJ
2102018-07-30 Andrew Jenner <andrew@codesourcery.com>
211
212 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
213 * elf/csky.h: New file.
214
2bb9bbe2
CX
2152018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
216 Maciej W. Rozycki <macro@linux-mips.org>
217
218 * elf/mips.h (AFL_ASE_MASK): Correct typo.
219
fa758a70
AC
2202018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
221
222 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
223
33cb30a1
AM
2242018-07-26 Alan Modra <amodra@gmail.com>
225
226 * elf/ppc64.h: Specify byte offset to local entry for values
227 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
228 value for such functions when entering via global entry point.
229 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
230
67ce483b
AM
2312018-07-24 Alan Modra <amodra@gmail.com>
232
233 PR 23430
234 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
235
8095d2f7
CX
2362018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
237 Maciej W. Rozycki <macro@mips.com>
238
239 * elf/mips.h (AFL_ASE_MMI): New macro.
240 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
241 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
242
d5c928c0
MR
2432018-07-17 Maciej W. Rozycki <macro@mips.com>
244
245 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
246
fe75810f
AM
2472018-07-06 Alan Modra <amodra@gmail.com>
248
249 * diagnostics.h: Comment on macro usage.
250
6821842f
SM
2512018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
252
253 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
254 Define for clang.
255
471b9d15
MR
2562018-07-02 Maciej W. Rozycki <macro@mips.com>
257
258 PR tdep/8282
259 * dis-asm.h (disasm_option_arg_t): New typedef.
260 (disasm_options_and_args_t): Likewise.
261 (disasm_options_t): Add `arg' member, document members.
262 (disassembler_options_mips): New prototype.
263 (disassembler_options_arm, disassembler_options_powerpc)
264 (disassembler_options_s390): Update prototypes.
265
369c9167
TC
2662018-06-29 Tamar Christina <tamar.christina@arm.com>
267
268 PR binutils/23192
269 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
270
2393a7e3
AM
2712018-06-26 Alan Modra <amodra@gmail.com>
272
273 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
274
719d8288
NC
2752018-06-24 Nick Clifton <nickc@redhat.com>
276
277 2.31 branch created.
278
57c0d77c
AH
2792018-06-21 Alan Hayward <alan.hayward@arm.com>
280
281 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
282 for non SHT_NOBITS.
283
d856f9a8
SM
2842018-06-19 Simon Marchi <simon.marchi@ericsson.com>
285
286 Sync with GCC
287
288 2018-05-24 Tom Rix <trix@juniper.net>
289
290 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
291
292 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
293
294 * longlong.h [__riscv] (__umulsidi3): Define.
295 [__riscv] (umul_ppmm): Likewise.
296 [__riscv] (__muluw3): Likewise.
297
6f20c942
FS
2982018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
299
300 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
301 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
302 * opcode/mips.h: Document "+\" operand format.
303 (ASE_GINV): New macro.
304
730c3174
SE
3052018-06-13 Scott Egerton <scott.egerton@imgtec.com>
306 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
307
308 * elf/mips.h (AFL_ASE_CRC): New macro.
309 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
310 * opcode/mips.h (ASE_CRC): New macro.
311 * opcode/mips.h (ASE_CRC64): Likewise.
312
4b8e28c7
MF
3132018-06-04 Max Filippov <jcmvbkbc@gmail.com>
314
315 * elf/xtensa.h (xtensa_read_table_entries)
316 (xtensa_compute_fill_extra_space): New declarations.
317
95da9854
L
3182018-06-04 H.J. Lu <hongjiu.lu@intel.com>
319
320 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
321 define for GCC.
322
23081219
L
3232018-06-04 H.J. Lu <hongjiu.lu@intel.com>
324
325 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
326 (DIAGNOSTIC_STRINGIFY): Likewise.
327 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
328 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
329 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
330 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
331 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
332 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
333
e9cb46ab
L
3342018-06-01 H.J. Lu <hongjiu.lu@intel.com>
335
336 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
337
22467434 3382018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
339
340 * splay-tree.h (splay_tree_compare_strings,
341 splay_tree_delete_pointers): Declare new utility functions.
342
98553ad3
PB
3432018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
344
345 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
346
7f999549
JW
3472018-05-18 Kito Cheng <kito.cheng@gmail.com>
348
349 * elf/riscv.h (EF_RISCV_RVE): New define.
350
7b4ae824
JD
3512018-05-18 John Darrington <john@darrington.wattle.id.au>
352
353 * elf/s12z.h: New header.
354
f9830ec1
TC
3552018-05-15 Tamar Christina <tamar.christina@arm.com>
356
357 PR binutils/21446
358 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
359
7d02540a
TC
3602018-05-15 Tamar Christina <tamar.christina@arm.com>
361
362 PR binutils/21446
363 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
364 (aarch64_print_operand): Support notes.
365
561a72d4
TC
3662018-05-15 Tamar Christina <tamar.christina@arm.com>
367
368 PR binutils/21446
369 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
370 (aarch64_decode_insn): Accept error struct.
371
1678bd35
FT
3722018-05-15 Francois H. Theron <francois.theron@netronome.com>
373
374 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
375
637b1970
JD
3762018-05-10 John Darrington <john@darrington.wattle.id.au>
377
378 * elf/common.h (EM_S12Z): New macro.
379
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AM
3802018-05-09 Sebastian Rasmussen <sebras@gmail.com>
381
382 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
383 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
384 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
385 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
386
e6f372ba
JW
3872018-05-08 Jim Wilson <jimw@sifive.com>
388
389 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
390 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
391 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
392
2ceb7719
PB
3932018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
394
395 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
396 (vle_num_opcodes): Likewise.
397 (spe2_num_opcodes): Likewise.
398
602f1657
AM
3992018-05-04 Alan Modra <amodra@gmail.com>
400
401 * ansidecl.h: Import from gcc.
402 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
403 to s_name.
404 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
405
fe944acf
FT
4062018-04-30 Francois H. Theron <francois.theron@netronome.com>
407
408 * dis-asm.h: Added print_nfp_disassembler_options prototype.
409 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
410 Generic System V Application Binary Interface.
411 * elf/nfp.h: New, for NFP support.
412 * opcode/nfp.h: New, for NFP support.
413
5c5a4843
CL
4142018-04-25 Christophe Lyon <christophe.lyon@st.com>
415 Mickaël Guêné <mickael.guene@st.com>
416
417 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
418 R_ARM_TLS_IE32_FDPIC.
419
188fd7ae
CL
4202018-04-25 Christophe Lyon <christophe.lyon@st.com>
421 Mickaël Guêné <mickael.guene@st.com>
422
423 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
424 (R_ARM_FUNCDESC)
425 (R_ARM_FUNCDESC_VALUE): Define new relocations.
426
18a20338
CL
4272018-04-25 Christophe Lyon <christophe.lyon@st.com>
428 Mickaël Guêné <mickael.guene@st.com>
429
430 * elf/arm.h (EF_ARM_FDPIC): New.
431
3596d8ce
AM
4322018-04-18 Alan Modra <amodra@gmail.com>
433
434 * coff/mipspe.h: Delete.
435
c65c21e1
AM
4362018-04-18 Alan Modra <amodra@gmail.com>
437
438 * aout/dynix3.h: Delete.
439
884d4d8a 4402018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
3f0a5f17
ME
441
442 Microblaze Target: PIC data text relative
443
444 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
445 * elf/microblaze.h (Add 3 new relocations):
446 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
447 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
448
f954747f
AM
4492018-04-17 Alan Modra <amodra@gmail.com>
450
451 * elf/i370.h: Revert removal.
452 * elf/i860.h: Likewise.
453 * elf/i960.h: Likewise.
454
5452f388
AM
4552018-04-16 Alan Modra <amodra@gmail.com>
456
457 * coff/sparc.h: Delete.
458
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AM
4592018-04-16 Alan Modra <amodra@gmail.com>
460
461 * aout/host.h: Remove m68k-aout and m68k-coff support.
462 * aout/hp300hpux.h: Delete.
463 * coff/apollo.h: Delete.
464 * coff/aux-coff.h: Delete.
465 * coff/m68k.h: Delete.
466
211dc24b
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4672018-04-16 Alan Modra <amodra@gmail.com>
468
469 * dis-asm.h: Remove sh5 and sh64 support.
470
a9a4b302
AM
4712018-04-16 Alan Modra <amodra@gmail.com>
472
473 * coff/internal.h: Remove w65 support.
474 * coff/w65.h: Delete.
475
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AM
4762018-04-16 Alan Modra <amodra@gmail.com>
477
478 * coff/we32k.h: Delete.
479
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AM
4802018-04-16 Alan Modra <amodra@gmail.com>
481
482 * coff/internal.h: Remove m88k support.
483 * coff/m88k.h: Delete.
484 * opcode/m88k.h: Delete.
485
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4862018-04-16 Alan Modra <amodra@gmail.com>
487
488 * elf/i370.h: Delete.
489 * opcode/i370.h: Delete.
490
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4912018-04-16 Alan Modra <amodra@gmail.com>
492
493 * coff/h8500.h: Delete.
494 * coff/internal.h: Remove h8500 support.
495
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4962018-04-16 Alan Modra <amodra@gmail.com>
497
498 * coff/h8300.h: Delete.
499
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5002018-04-16 Alan Modra <amodra@gmail.com>
501
502 * ieee.h: Delete.
503
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AM
5042018-04-16 Alan Modra <amodra@gmail.com>
505
506 * aout/host.h: Remove newsos3 support.
507
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5082018-04-16 Alan Modra <amodra@gmail.com>
509
510 * nlm/ChangeLog-9315: Delete.
511 * nlm/alpha-ext.h: Delete.
512 * nlm/common.h: Delete.
513 * nlm/external.h: Delete.
514 * nlm/i386-ext.h: Delete.
515 * nlm/internal.h: Delete.
516 * nlm/ppc-ext.h: Delete.
517 * nlm/sparc32-ext.h: Delete.
518
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5192018-04-16 Alan Modra <amodra@gmail.com>
520
521 * opcode/tahoe.h: Delete.
522
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5232018-04-11 Alan Modra <amodra@gmail.com>
524
525 * aout/adobe.h: Delete.
526 * aout/reloc.h: Delete.
527 * coff/i860.h: Delete.
528 * coff/i960.h: Delete.
529 * elf/i860.h: Delete.
530 * elf/i960.h: Delete.
531 * opcode/i860.h: Delete.
532 * opcode/i960.h: Delete.
533 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
534 * aout/ar.h (ARMAGB): Remove.
535 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
536 union internal_auxent): Remove i960 support.
537
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5382018-04-09 Alan Modra <amodra@gmail.com>
539
540 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
541 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
542
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RL
5432018-03-28 Renlin Li <renlin.li@arm.com>
544
545 PR ld/22970
546 * elf/aarch64.h: Add relocation number for
547 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
548 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
549 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
550 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
551 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
552 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
553 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
554 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
555
c8d59609
NC
5562018-03-28 Nick Clifton <nickc@redhat.com>
557
558 PR 22988
559 * opcode/aarch64.h (enum aarch64_opnd): Add
560 AARCH64_OPND_SVE_ADDR_R.
561
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5622018-03-21 H.J. Lu <hongjiu.lu@intel.com>
563
564 * elf/common.h (DF_1_KMOD): New.
565 (DF_1_WEAKFILTER): Likewise.
566 (DF_1_NOCOMMON): Likewise.
567
0e35537d
JW
5682018-03-14 Kito Cheng <kito.cheng@gmail.com>
569
570 * opcode/riscv.h (OP_MASK_FUNCT3): New.
571 (OP_SH_FUNCT3): Likewise.
572 (OP_MASK_FUNCT7): Likewise.
573 (OP_SH_FUNCT7): Likewise.
574 (OP_MASK_OP2): Likewise.
575 (OP_SH_OP2): Likewise.
576 (OP_MASK_CFUNCT4): Likewise.
577 (OP_SH_CFUNCT4): Likewise.
578 (OP_MASK_CFUNCT3): Likewise.
579 (OP_SH_CFUNCT3): Likewise.
580 (riscv_insn_types): Likewise.
581
3e33b239
NC
5822018-03-13 Nick Clifton <nickc@redhat.com>
583
584 PR 22113
585 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
586 field.
587
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L
5882018-03-08 H.J. Lu <hongjiu.lu@intel.com>
589
590 * opcode/i386 (OLDGCC_COMPAT): Removed.
591
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TP
5922018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
593
594 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
595
75f31665
MR
5962018-02-20 Maciej W. Rozycki <macro@mips.com>
597
598 * opcode/mips.h: Remove `M' operand code.
599
830db048
ZF
6002018-02-12 Zebediah Figura <z.figura12@gmail.com>
601
602 * coff/msdos.h: New header.
603 * coff/pe.h: Move common defines to msdos.h.
604 * coff/powerpc.h: Likewise.
605
faf766e3
NC
6062018-01-13 Nick Clifton <nickc@redhat.com>
607
608 2.30 branch created.
609
47acac12
L
6102018-01-11 H.J. Lu <hongjiu.lu@intel.com>
611
612 PR ld/22393
613 * bfdlink.h (bfd_link_info): Add separate_code.
614
645a2c5b
JW
6152018-01-04 Jim Wilson <jimw@sifive.com>
616
617 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
618 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
619 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
620 Add alias to map mbadaddr to CSR_MTVAL.
621
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6222018-01-03 Alan Modra <amodra@gmail.com>
623
624 Update year range in copyright notice of all files.
625
1e563868 626For older changes see ChangeLog-2017
3499769a 627\f
1e563868 628Copyright (C) 2018 Free Software Foundation, Inc.
3499769a
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629
630Copying and distribution of this file, with or without modification,
631are permitted in any medium without royalty provided the copyright
632notice and this notice are preserved.
633
634Local Variables:
635mode: change-log
636left-margin: 8
637fill-column: 74
638version-control: never
639End:
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