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Revert "ARM STM32L4XX erratum test failure"
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
28ed815a
MM		 12019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
2
3 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHLIMM_UNPRED_22
4 operand.
5
fd1dc4a0
MM		 62019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
7
8 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_tsz_bhs
9 iclass.
10
31e36ab3
MM		 112019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
12
13 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm4_11_INDEX operand.
14
1be5f94f
MM		 152019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
16
17 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_shift_tsz_bhsd
18 iclass.
19
3c17238b
MM		 202019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
21
22 * opcode/aarch64.h (enum aarch64_opnd): New SVE_SHRIMM_UNPRED_22
23 operand.
24 (enum aarch64_insn_class): Add sve_shift_tsz_hsd iclass.
25
cd50a87a
MM		 262019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
27
28 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_013 iclass.
29
3c705960
MM		 302019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
31
32 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_bh iclass.
33
0a57e14f
MM		 342019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
35
36 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_sd2 iclass.
37
c469c864
MM		 382019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
39
40 * opcode/aarch64.h (enum aarch64_opnd): New SVE_ADDR_ZX operand.
41
116adc27
MM		 422019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
43
44 * opcode/aarch64.h (enum aarch64_opnd): New SVE_Zm3_11_INDEX operand.
45
3bd82c86
MM		 462019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
47
48 * opcode/aarch64.h (enum aarch64_insn_class): Add sve_size_hsd2 iclass.
49
adccc507
MM		 502019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
51
52 * opcode/aarch64.h (enum aarch64_opnd): New SVE_IMM_ROT3 operand.
53
7ce2460a
MM		 542019-05-09 Matthew Malcomson <matthew.malcomson@arm.com>
55
56 * opcode/aarch64.h (AARCH64_FEATURE_SVE2
57 AARCH64_FEATURE_SVE2_AES, AARCH64_FEATURE_SVE2_BITPERM,
58 AARCH64_FEATURE_SVE2_SM4, AARCH64_FEATURE_SVE2_SHA3): New
59 feature macros.
60
41cee089
FS		 612019-05-06 Andrew Bennett <andrew.bennett@imgtec.com>
62 Faraz Shahbazker <fshahbazker@wavecomp.com>
63
64 * opcode/mips.h (ASE_EVA_R6): New macro.
65 (M_LLWPE_AB, M_SCWPE_AB): New enum values.
66
b83b4b13
SD		 672019-05-01 Sudakshina Das <sudi.das@arm.com>
68
69 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
70 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
71
a45328b9
AB		 722019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
73 Faraz Shahbazker <fshahbazker@wavecomp.com>
74
75 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
76 (M_SCWP_AB, M_SCDP_AB): Likewise.
77
cd092337
MR		 782019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
79
80 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
81
1889da70
AV		 822019-04-15 Sudakshina Das <sudi.das@arm.com>
83
84 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
85
1caf72a5
AV		 862019-04-15 Sudakshina Das <sudi.das@arm.com>
87
88 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
89
e5d6e09e
AV		 902019-04-15 Sudakshina Das <sudi.das@arm.com>
91
92 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
93
031254f2
AV		 942019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
95
96 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
97 (MAX_TAG_CPU_ARCH): Set value to above macro.
98 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
99 (ARM_AEXT_V8_1M_MAIN): Likewise.
100 (ARM_AEXT2_V8_1M_MAIN): Likewise.
101 (ARM_ARCH_V8_1M_MAIN): Likewise.
102
bd7ceb8d
SD		 1032019-04-11 Sudakshina Das <sudi.das@arm.com>
104
105 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
106
462cac58
L		 1072019-04-08 H.J. Lu <hongjiu.lu@intel.com>
108
109 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
110
07ffcfec
AM		 1112019-04-07 Alan Modra <amodra@gmail.com>
112
113 Merge from gcc.
114 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
115 PR89877
116 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
117 (sub_ddmmss): Likewise.
118
5b9c07b2
L		 1192019-04-06 H.J. Lu <hongjiu.lu@intel.com>
120
121 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
122
34ef62f4
AV		 1232019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
124
125 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
126 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
127 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
128 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
129 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
130 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
131 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
132 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
133
96a86c01
AM		 1342019-03-28 Alan Modra <amodra@gmail.com>
135
136 PR 24390
137 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
138
53b2f36b
TC		 1392019-03-25 Tamar Christina <tamar.christina@arm.com>
140
141 * dis-asm.h (struct disassemble_info): Add stop_offset.
142
1dbade74
SD		 1432019-03-13 Sudakshina Das <sudi.das@arm.com>
144
145 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
146
37c18eed
SD		 1472019-03-13 Sudakshina Das <sudi.das@arm.com>
148 Szabolcs Nagy <szabolcs.nagy@arm.com>
149
150 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
151
cd702818
SD		 1522019-03-13 Sudakshina Das <sudi.das@arm.com>
153
154 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
155 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
156 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
157
e6c3b5bf
AH		 1582019-02-20 Alan Hayward <alan.hayward@arm.com>
159
160 * elf/common.h (NT_ARM_PAC_MASK): Add define.
161
91d78b81
SJ		 1622019-02-15 Saagar Jha <saagar@saagarjha.com>
163
164 * mach-o/loader.h: Use new OS names in comments.
165
e2077304 1662019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
167
168 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
169 (splay_tree_delete_value_fn): Likewise.
170
fc60b8c8
AK		 1712019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
172
173 * opcode/s390.h (enum s390_opcode_cpu_val): Add
174 S390_OPCODE_ARCH13.
175
550fd7bf
SD		 1762019-01-25 Sudakshina Das <sudi.das@arm.com>
177 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
178
179 * opcode/aarch64.h (enum aarch64_opnd): Remove
180 AARCH64_OPND_ADDR_SIMPLE_2.
181 (enum aarch64_insn_class): Remove ldstgv_indexed.
182
71ba91e1
TT		 1832019-01-22 Tom Tromey <tom@tromey.com>
184
185 * coff/ecoff.h: Include coff/sym.h.
186
f974f26c
NC		 1872018-06-24 Nick Clifton <nickc@redhat.com>
188
189 2.32 branch created.
190
2dc8dd17
JW		 1912019-01-16 Kito Cheng <kito@andestech.com>
192
193 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
194 (Tag_RISCV_arch): Likewise.
195 (Tag_RISCV_priv_spec): Likewise.
196 (Tag_RISCV_priv_spec_minor): Likewise.
197 (Tag_RISCV_priv_spec_revision): Likewise.
198 (Tag_RISCV_unaligned_access): Likewise.
199 (Tag_RISCV_stack_align): Likewise.
200
8f0a2148
ПК		 2012019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
202
203 * dis-asm.h: include <string.h>
204
1910070b
NC		 2052019-01-10 Nick Clifton <nickc@redhat.com>
206
207 * Merge from GCC:
208 2018-12-22 Jason Merrill <jason@redhat.com>
209
210 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
211 ARM, HP, and EDG demangling styles.
212
a08da33e
SL		 2132019-01-09 Sandra Loosemore <sandra@codesourcery.com>
214
215 Merge from GCC:
216 PR other/16615
217
218 * libiberty.h: Mechanically replace "can not" with "cannot".
219 * plugin-api.h: Likewise.
220
59581069
YS		 2212018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
222
223 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
224 (E_FLAG_RX_V3): New RXv3 type.
225 * opcode/rx.h (RX_Size): Add double size.
226 (RX_Operand_Type): Add double FPU registers.
227 (RX_Opcode_ID): Add new instuctions.
228
82704155
AM		 2292019-01-01 Alan Modra <amodra@gmail.com>
230
231 Update year range in copyright notice of all files.
232
d5c04e1b 233For older changes see ChangeLog-2018
3499769a 234\f
d5c04e1b 235Copyright (C) 2019 Free Software Foundation, Inc.
3499769a
AM		 236
237Copying and distribution of this file, with or without modification,
238are permitted in any medium without royalty provided the copyright
239notice and this notice are preserved.
240
241Local Variables:
242mode: change-log
243left-margin: 8
244fill-column: 74
245version-control: never
246End:
GDB Binutils - Deliverables
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