[BINUTILS, AArch64] Enable Transactional Memory Extension
[deliverable/binutils-gdb.git] / include / ChangeLog
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b83b4b13
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12019-05-01 Sudakshina Das <sudi.das@arm.com>
2
3 * opcode/aarch64.h (AARCH64_FEATURE_TME): New.
4 (enum aarch64_opnd): Add AARCH64_OPND_TME_UIMM16.
5
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62019-04-26 Andrew Bennett <andrew.bennett@imgtec.com>
7 Faraz Shahbazker <fshahbazker@wavecomp.com>
8
9 * opcode/mips.h (M_LLWP_AB, M_LLDP_AB): New enum values.
10 (M_SCWP_AB, M_SCDP_AB): Likewise.
11
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122019-04-25 Maciej W. Rozycki <macro@linux-mips.org>
13
14 * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
15
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162019-04-15 Sudakshina Das <sudi.das@arm.com>
17
18 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.
19
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202019-04-15 Sudakshina Das <sudi.das@arm.com>
21
22 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF18.
23
e5d6e09e
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242019-04-15 Sudakshina Das <sudi.das@arm.com>
25
26 * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF16.
27
031254f2
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282019-04-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
29
30 * elf/arm.h (TAG_CPU_ARCH_V8_1M_MAIN): new macro.
31 (MAX_TAG_CPU_ARCH): Set value to above macro.
32 * opcode/arm.h (ARM_EXT2_V8_1M_MAIN): New macro.
33 (ARM_AEXT_V8_1M_MAIN): Likewise.
34 (ARM_AEXT2_V8_1M_MAIN): Likewise.
35 (ARM_ARCH_V8_1M_MAIN): Likewise.
36
bd7ceb8d
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372019-04-11 Sudakshina Das <sudi.das@arm.com>
38
39 * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_Rt_SP.
40
462cac58
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412019-04-08 H.J. Lu <hongjiu.lu@intel.com>
42
43 * elf/common.h (GNU_PROPERTY_X86_ISA_1_AVX512_BF16): New.
44
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452019-04-07 Alan Modra <amodra@gmail.com>
46
47 Merge from gcc.
48 2019-04-03 Vineet Gupta <vgupta@synopsys.com>
49 PR89877
50 * longlong.h [__arc__] (add_ssaaaa): Add cc clobber.
51 (sub_ddmmss): Likewise.
52
5b9c07b2
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532019-04-06 H.J. Lu <hongjiu.lu@intel.com>
54
55 * bfdlink.h (bfd_link_info): Remove x86-specific linker options.
56
34ef62f4
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572019-04-01 Andre Vieira <andre.simoesdiasvieira@arm.com>
58
59 * opcode/arm.h (FPU_NEON_ARMV8_1): New.
60 (FPU_ARCH_NEON_VFP_ARMV8_1): Use FPU_NEON_ARMV8_1.
61 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_1): Likewise.
62 (FPU_ARCH_DOTPROD_NEON_VFP_ARMV8): Likewise.
63 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16): New.
64 (FPU_ARCH_NEON_VFP_ARMV8_2_FP16FML): New.
65 (FPU_ARCH_NEON_VFP_ARMV8_4_FP16FML): New.
66 (FPU_ARCH_CRYPTO_NEON_VFP_ARMV8_4): New.
67
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682019-03-28 Alan Modra <amodra@gmail.com>
69
70 PR 24390
71 * opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
72
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732019-03-25 Tamar Christina <tamar.christina@arm.com>
74
75 * dis-asm.h (struct disassemble_info): Add stop_offset.
76
1dbade74
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772019-03-13 Sudakshina Das <sudi.das@arm.com>
78
79 * elf/aarch64.h (DT_AARCH64_PAC_PLT): New.
80
37c18eed
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812019-03-13 Sudakshina Das <sudi.das@arm.com>
82 Szabolcs Nagy <szabolcs.nagy@arm.com>
83
84 * elf/aarch64.h (DT_AARCH64_BTI_PLT): New.
85
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862019-03-13 Sudakshina Das <sudi.das@arm.com>
87
88 * elf/common.h (GNU_PROPERTY_AARCH64_FEATURE_1_AND): New.
89 (GNU_PROPERTY_AARCH64_FEATURE_1_BTI): New.
90 (GNU_PROPERTY_AARCH64_FEATURE_1_PAC): New.
91
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922019-02-20 Alan Hayward <alan.hayward@arm.com>
93
94 * elf/common.h (NT_ARM_PAC_MASK): Add define.
95
91d78b81
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962019-02-15 Saagar Jha <saagar@saagarjha.com>
97
98 * mach-o/loader.h: Use new OS names in comments.
99
e2077304 1002019-02-11 Philippe Waroquiers <philippe.waroquiers@skynet.be>
101
102 * splay-tree.h (splay_tree_delete_key_fn): Update comment.
103 (splay_tree_delete_value_fn): Likewise.
104
fc60b8c8
AK
1052019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
106
107 * opcode/s390.h (enum s390_opcode_cpu_val): Add
108 S390_OPCODE_ARCH13.
109
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1102019-01-25 Sudakshina Das <sudi.das@arm.com>
111 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
112
113 * opcode/aarch64.h (enum aarch64_opnd): Remove
114 AARCH64_OPND_ADDR_SIMPLE_2.
115 (enum aarch64_insn_class): Remove ldstgv_indexed.
116
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1172019-01-22 Tom Tromey <tom@tromey.com>
118
119 * coff/ecoff.h: Include coff/sym.h.
120
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1212018-06-24 Nick Clifton <nickc@redhat.com>
122
123 2.32 branch created.
124
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1252019-01-16 Kito Cheng <kito@andestech.com>
126
127 * elf/riscv.h (SHT_RISCV_ATTRIBUTES): Define.
128 (Tag_RISCV_arch): Likewise.
129 (Tag_RISCV_priv_spec): Likewise.
130 (Tag_RISCV_priv_spec_minor): Likewise.
131 (Tag_RISCV_priv_spec_revision): Likewise.
132 (Tag_RISCV_unaligned_access): Likewise.
133 (Tag_RISCV_stack_align): Likewise.
134
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1352019-01-14 Pavel I. Kryukov <kryukov@frtk.ru>
136
137 * dis-asm.h: include <string.h>
138
1910070b
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1392019-01-10 Nick Clifton <nickc@redhat.com>
140
141 * Merge from GCC:
142 2018-12-22 Jason Merrill <jason@redhat.com>
143
144 * demangle.h: Remove support for ancient GNU (pre-3.0), Lucid,
145 ARM, HP, and EDG demangling styles.
146
a08da33e
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1472019-01-09 Sandra Loosemore <sandra@codesourcery.com>
148
149 Merge from GCC:
150 PR other/16615
151
152 * libiberty.h: Mechanically replace "can not" with "cannot".
153 * plugin-api.h: Likewise.
154
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YS
1552018-12-25 Yoshinori Sato <ysato@users.sourceforge.jp>
156
157 * elf/rx.h (EF_RX_CPU_MASK): Update new bits.
158 (E_FLAG_RX_V3): New RXv3 type.
159 * opcode/rx.h (RX_Size): Add double size.
160 (RX_Operand_Type): Add double FPU registers.
161 (RX_Opcode_ID): Add new instuctions.
162
82704155
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1632019-01-01 Alan Modra <amodra@gmail.com>
164
165 Update year range in copyright notice of all files.
166
d5c04e1b 167For older changes see ChangeLog-2018
3499769a 168\f
d5c04e1b 169Copyright (C) 2019 Free Software Foundation, Inc.
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170
171Copying and distribution of this file, with or without modification,
172are permitted in any medium without royalty provided the copyright
173notice and this notice are preserved.
174
175Local Variables:
176mode: change-log
177left-margin: 8
178fill-column: 74
179version-control: never
180End:
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