RISC-V: Set insn info fields correctly when disassembling.
[deliverable/binutils-gdb.git] / include / ChangeLog
CommitLineData
eb41b248
JW
12018-07-30 Jim Wilson <jimw@sifive.com>
2
3 * opcode/riscv.h (INSN_TYPE, INSN_BRANCH, INSN_CONDBRANCH, INSN_JSR)
4 (INSN_DREF, INSN_DATA_SIZE, INSN_DATA_SIZE_SHIFT, INSN_1_BYTE)
5 (INSN_2_BYTE, INSN_4_BYTE, INSN_8_BYTE, INSN_16_BYTE): New.
6
b8891f8d
AJ
72018-07-30 Andrew Jenner <andrew@codesourcery.com>
8
9 * elf/common.h (EM_CSKY, EM_CSKY_OLD): Define.
10 * elf/csky.h: New file.
11
2bb9bbe2
CX
122018-07-27 Chenghua Xu <paul.hua.gm@gmail.com>
13 Maciej W. Rozycki <macro@linux-mips.org>
14
15 * elf/mips.h (AFL_ASE_MASK): Correct typo.
16
fa758a70
AC
172018-07-26 Alex Chadwick <Alex.Chadwick@cl.cam.ac.uk>
18
19 * opcode/ppc.h (PPC_OPCODE_750): Adjust comment.
20
33cb30a1
AM
212018-07-26 Alan Modra <amodra@gmail.com>
22
23 * elf/ppc64.h: Specify byte offset to local entry for values
24 of two to six in STO_PPC64_LOCAL_MASK. Clarify r2 return
25 value for such functions when entering via global entry point.
26 Specify meaning of a value of one in STO_PPC64_LOCAL_MASK.
27
67ce483b
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282018-07-24 Alan Modra <amodra@gmail.com>
29
30 PR 23430
31 * elf/common.h (SHT_SYMTAB_SHNDX): Fix comment typo.
32
8095d2f7
CX
332018-07-20 Chenghua Xu <paul.hua.gm@gmail.com>
34 Maciej W. Rozycki <macro@mips.com>
35
36 * elf/mips.h (AFL_ASE_MMI): New macro.
37 (AFL_ASE_MASK): Update to include AFL_ASE_LOONGSON_MMI.
38 * opcode/mips.h (ASE_LOONGSON_MMI): New macro.
39
d5c928c0
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402018-07-17 Maciej W. Rozycki <macro@mips.com>
41
42 * bfdlink.h (bfd_link_hash_entry): Add `rel_from_abs' member.
43
fe75810f
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442018-07-06 Alan Modra <amodra@gmail.com>
45
46 * diagnostics.h: Comment on macro usage.
47
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482018-07-05 Simon Marchi <simon.marchi@polymtl.ca>
49
50 * diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_DECLARATIONS):
51 Define for clang.
52
471b9d15
MR
532018-07-02 Maciej W. Rozycki <macro@mips.com>
54
55 PR tdep/8282
56 * dis-asm.h (disasm_option_arg_t): New typedef.
57 (disasm_options_and_args_t): Likewise.
58 (disasm_options_t): Add `arg' member, document members.
59 (disassembler_options_mips): New prototype.
60 (disassembler_options_arm, disassembler_options_powerpc)
61 (disassembler_options_s390): Update prototypes.
62
369c9167
TC
632018-06-29 Tamar Christina <tamar.christina@arm.com>
64
65 PR binutils/23192
66 *opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_Em16.
67
2393a7e3
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682018-06-26 Alan Modra <amodra@gmail.com>
69
70 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Revert last change.
71
719d8288
NC
722018-06-24 Nick Clifton <nickc@redhat.com>
73
74 2.31 branch created.
75
57c0d77c
AH
762018-06-21 Alan Hayward <alan.hayward@arm.com>
77
78 * elf/internal.h (ELF_SECTION_IN_SEGMENT): Don’t check addresses
79 for non SHT_NOBITS.
80
d856f9a8
SM
812018-06-19 Simon Marchi <simon.marchi@ericsson.com>
82
83 Sync with GCC
84
85 2018-05-24 Tom Rix <trix@juniper.net>
86
87 * dwarf2.def (DW_FORM_strx*, DW_FORM_addrx*): New.
88
89 2017-11-20 Kito Cheng <kito.cheng@gmail.com>
90
91 * longlong.h [__riscv] (__umulsidi3): Define.
92 [__riscv] (umul_ppmm): Likewise.
93 [__riscv] (__muluw3): Likewise.
94
6f20c942
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952018-06-14 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
96
97 * elf/mips.h (AFL_ASE_GINV, AFL_ASE_RESERVED1): New macros.
98 (AFL_ASE_MASK): Update to include AFL_ASE_GINV.
99 * opcode/mips.h: Document "+\" operand format.
100 (ASE_GINV): New macro.
101
730c3174
SE
1022018-06-13 Scott Egerton <scott.egerton@imgtec.com>
103 Faraz Shahbazker <Faraz.Shahbazker@mips.com>
104
105 * elf/mips.h (AFL_ASE_CRC): New macro.
106 (AFL_ASE_MASK): Update to include AFL_ASE_CRC.
107 * opcode/mips.h (ASE_CRC): New macro.
108 * opcode/mips.h (ASE_CRC64): Likewise.
109
4b8e28c7
MF
1102018-06-04 Max Filippov <jcmvbkbc@gmail.com>
111
112 * elf/xtensa.h (xtensa_read_table_entries)
113 (xtensa_compute_fill_extra_space): New declarations.
114
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1152018-06-04 H.J. Lu <hongjiu.lu@intel.com>
116
117 * diagnostics.h (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): Always
118 define for GCC.
119
23081219
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1202018-06-04 H.J. Lu <hongjiu.lu@intel.com>
121
122 * diagnostics.h (DIAGNOSTIC_STRINGIFY_1): New.
123 (DIAGNOSTIC_STRINGIFY): Likewise.
124 (DIAGNOSTIC_IGNORE): Replace STRINGIFY with DIAGNOSTIC_STRINGIFY.
125 (DIAGNOSTIC_IGNORE_SELF_MOVE): Define empty if not defined.
126 (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): Likewise.
127 (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): Likewise.
128 (DIAGNOSTIC_IGNORE_SWITCH_DIFFERENT_ENUM_TYPES): Likewise.
129 (DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION): New.
130
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1312018-06-01 H.J. Lu <hongjiu.lu@intel.com>
132
133 * diagnostics.h: Moved from ../gdb/common/diagnostics.h.
134
22467434 1352018-05-28 Bernd Edlinger <bernd.edlinger@hotmail.de>
136
137 * splay-tree.h (splay_tree_compare_strings,
138 splay_tree_delete_pointers): Declare new utility functions.
139
98553ad3
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1402018-05-21 Peter Bergner <bergner@vnet.ibm.com.com>
141
142 * opcode/ppc.h (PPC_OPERAND_FAKE): Delete macro.
143
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JW
1442018-05-18 Kito Cheng <kito.cheng@gmail.com>
145
146 * elf/riscv.h (EF_RISCV_RVE): New define.
147
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1482018-05-18 John Darrington <john@darrington.wattle.id.au>
149
150 * elf/s12z.h: New header.
151
f9830ec1
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1522018-05-15 Tamar Christina <tamar.christina@arm.com>
153
154 PR binutils/21446
155 * opcode/aarch64.h (F_SYS_READ, F_SYS_WRITE): New.
156
7d02540a
TC
1572018-05-15 Tamar Christina <tamar.christina@arm.com>
158
159 PR binutils/21446
160 * opcode/aarch64.h (aarch64_operand_error): Add non_fatal.
161 (aarch64_print_operand): Support notes.
162
561a72d4
TC
1632018-05-15 Tamar Christina <tamar.christina@arm.com>
164
165 PR binutils/21446
166 * opcode/aarch64.h (aarch64_opnd_info): Change sysreg to struct.
167 (aarch64_decode_insn): Accept error struct.
168
1678bd35
FT
1692018-05-15 Francois H. Theron <francois.theron@netronome.com>
170
171 * opcode/nfp.h: Use uint64_t instead of bfd_vma.
172
637b1970
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1732018-05-10 John Darrington <john@darrington.wattle.id.au>
174
175 * elf/common.h (EM_S12Z): New macro.
176
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AM
1772018-05-09 Sebastian Rasmussen <sebras@gmail.com>
178
179 * mach-o/unwind.h (MACH_O_UNWIND_X86_64_RBP_FRAME_REGISTERS):
180 Rename from MACH_O_UNWIND_X86_64_RBP_FRAME_REGSITERS.
181 (MACH_O_UNWIND_X86_EBP_FRAME_REGISTERS): Rename from
182 MACH_O_UNWIND_X86_EBP_FRAME_REGSITERS.
183
e6f372ba
JW
1842018-05-08 Jim Wilson <jimw@sifive.com>
185
186 * opcode/riscv-opc.h (MATCH_C_SRLI64, MASK_C_SRLI64): New.
187 (MATCH_C_SRAI64, MASK_C_SRAI64): New.
188 (MATCH_C_SLLI64, MASK_C_SLLI64): New.
189
2ceb7719
PB
1902018-05-07 Peter Bergner <bergner@vnet.ibm.com.com>
191
192 * opcode/ppc.h (powerpc_num_opcodes): Change type to unsigned.
193 (vle_num_opcodes): Likewise.
194 (spe2_num_opcodes): Likewise.
195
602f1657
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1962018-05-04 Alan Modra <amodra@gmail.com>
197
198 * ansidecl.h: Import from gcc.
199 * coff/internal.h (struct internal_scnhdr): Add ATTRIBUTE_NONSTRING
200 to s_name.
201 (struct internal_syment): Add ATTRIBUTE_NONSTRING to _n_name.
202
fe944acf
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2032018-04-30 Francois H. Theron <francois.theron@netronome.com>
204
205 * dis-asm.h: Added print_nfp_disassembler_options prototype.
206 * elf/common.h: Added EM_NFP, officially assigned. See Google Group
207 Generic System V Application Binary Interface.
208 * elf/nfp.h: New, for NFP support.
209 * opcode/nfp.h: New, for NFP support.
210
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CL
2112018-04-25 Christophe Lyon <christophe.lyon@st.com>
212 Mickaël Guêné <mickael.guene@st.com>
213
214 * elf/arm.h: Add R_ARM_TLS_GD32_FDPIC, R_ARM_TLS_LDM32_FDPIC,
215 R_ARM_TLS_IE32_FDPIC.
216
188fd7ae
CL
2172018-04-25 Christophe Lyon <christophe.lyon@st.com>
218 Mickaël Guêné <mickael.guene@st.com>
219
220 * elf/arm.h (R_ARM_GOTFUNCDESC, R_ARM_GOTOFFFUNCDESC)
221 (R_ARM_FUNCDESC)
222 (R_ARM_FUNCDESC_VALUE): Define new relocations.
223
18a20338
CL
2242018-04-25 Christophe Lyon <christophe.lyon@st.com>
225 Mickaël Guêné <mickael.guene@st.com>
226
227 * elf/arm.h (EF_ARM_FDPIC): New.
228
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2292018-04-18 Alan Modra <amodra@gmail.com>
230
231 * coff/mipspe.h: Delete.
232
c65c21e1
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2332018-04-18 Alan Modra <amodra@gmail.com>
234
235 * aout/dynix3.h: Delete.
236
884d4d8a 2372018-04-17 Andrew Sadek <andrew.sadek.se@gmail.com>
3f0a5f17
ME
238
239 Microblaze Target: PIC data text relative
240
241 * bfdlink.h (Add flag): Add new flag @ 'bfd_link_info' struct.
242 * elf/microblaze.h (Add 3 new relocations):
243 R_MICROBLAZE_TEXTPCREL_64, R_MICROBLAZE_TEXTREL_64
244 and R_MICROBLAZE_TEXTREL_32_LO for relax function.
245
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2462018-04-17 Alan Modra <amodra@gmail.com>
247
248 * elf/i370.h: Revert removal.
249 * elf/i860.h: Likewise.
250 * elf/i960.h: Likewise.
251
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2522018-04-16 Alan Modra <amodra@gmail.com>
253
254 * coff/sparc.h: Delete.
255
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2562018-04-16 Alan Modra <amodra@gmail.com>
257
258 * aout/host.h: Remove m68k-aout and m68k-coff support.
259 * aout/hp300hpux.h: Delete.
260 * coff/apollo.h: Delete.
261 * coff/aux-coff.h: Delete.
262 * coff/m68k.h: Delete.
263
211dc24b
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2642018-04-16 Alan Modra <amodra@gmail.com>
265
266 * dis-asm.h: Remove sh5 and sh64 support.
267
a9a4b302
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2682018-04-16 Alan Modra <amodra@gmail.com>
269
270 * coff/internal.h: Remove w65 support.
271 * coff/w65.h: Delete.
272
04cb01fd
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2732018-04-16 Alan Modra <amodra@gmail.com>
274
275 * coff/we32k.h: Delete.
276
c2bf1eec
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2772018-04-16 Alan Modra <amodra@gmail.com>
278
279 * coff/internal.h: Remove m88k support.
280 * coff/m88k.h: Delete.
281 * opcode/m88k.h: Delete.
282
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2832018-04-16 Alan Modra <amodra@gmail.com>
284
285 * elf/i370.h: Delete.
286 * opcode/i370.h: Delete.
287
e82aa794
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2882018-04-16 Alan Modra <amodra@gmail.com>
289
290 * coff/h8500.h: Delete.
291 * coff/internal.h: Remove h8500 support.
292
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2932018-04-16 Alan Modra <amodra@gmail.com>
294
295 * coff/h8300.h: Delete.
296
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2972018-04-16 Alan Modra <amodra@gmail.com>
298
299 * ieee.h: Delete.
300
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3012018-04-16 Alan Modra <amodra@gmail.com>
302
303 * aout/host.h: Remove newsos3 support.
304
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3052018-04-16 Alan Modra <amodra@gmail.com>
306
307 * nlm/ChangeLog-9315: Delete.
308 * nlm/alpha-ext.h: Delete.
309 * nlm/common.h: Delete.
310 * nlm/external.h: Delete.
311 * nlm/i386-ext.h: Delete.
312 * nlm/internal.h: Delete.
313 * nlm/ppc-ext.h: Delete.
314 * nlm/sparc32-ext.h: Delete.
315
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3162018-04-16 Alan Modra <amodra@gmail.com>
317
318 * opcode/tahoe.h: Delete.
319
a8eb42a8
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3202018-04-11 Alan Modra <amodra@gmail.com>
321
322 * aout/adobe.h: Delete.
323 * aout/reloc.h: Delete.
324 * coff/i860.h: Delete.
325 * coff/i960.h: Delete.
326 * elf/i860.h: Delete.
327 * elf/i960.h: Delete.
328 * opcode/i860.h: Delete.
329 * opcode/i960.h: Delete.
330 * aout/aout64.h (enum reloc_type): Trim off 29k and other unused values.
331 * aout/ar.h (ARMAGB): Remove.
332 * coff/internal.h (struct internal_aouthdr, struct internal_scnhdr,
333 union internal_auxent): Remove i960 support.
334
23cedd1d
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3352018-04-09 Alan Modra <amodra@gmail.com>
336
337 * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define.
338 * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define.
339
84f1b9fb
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3402018-03-28 Renlin Li <renlin.li@arm.com>
341
342 PR ld/22970
343 * elf/aarch64.h: Add relocation number for
344 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12,
345 R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC,
346 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12,
347 R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC,
348 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12,
349 R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC,
350 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12,
351 R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC.
352
c8d59609
NC
3532018-03-28 Nick Clifton <nickc@redhat.com>
354
355 PR 22988
356 * opcode/aarch64.h (enum aarch64_opnd): Add
357 AARCH64_OPND_SVE_ADDR_R.
358
b1202ffa
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3592018-03-21 H.J. Lu <hongjiu.lu@intel.com>
360
361 * elf/common.h (DF_1_KMOD): New.
362 (DF_1_WEAKFILTER): Likewise.
363 (DF_1_NOCOMMON): Likewise.
364
0e35537d
JW
3652018-03-14 Kito Cheng <kito.cheng@gmail.com>
366
367 * opcode/riscv.h (OP_MASK_FUNCT3): New.
368 (OP_SH_FUNCT3): Likewise.
369 (OP_MASK_FUNCT7): Likewise.
370 (OP_SH_FUNCT7): Likewise.
371 (OP_MASK_OP2): Likewise.
372 (OP_SH_OP2): Likewise.
373 (OP_MASK_CFUNCT4): Likewise.
374 (OP_SH_CFUNCT4): Likewise.
375 (OP_MASK_CFUNCT3): Likewise.
376 (OP_SH_CFUNCT3): Likewise.
377 (riscv_insn_types): Likewise.
378
3e33b239
NC
3792018-03-13 Nick Clifton <nickc@redhat.com>
380
381 PR 22113
382 * coff/pe.h (struct pex64_unwind_info): Add a rawUnwindCodesEnd
383 field.
384
bd5dea88
L
3852018-03-08 H.J. Lu <hongjiu.lu@intel.com>
386
387 * opcode/i386 (OLDGCC_COMPAT): Removed.
388
5b616bef
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3892018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
390
391 * opcode/arm.h (ARM_FEATURE_COPY): Remove macro definition.
392
75f31665
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3932018-02-20 Maciej W. Rozycki <macro@mips.com>
394
395 * opcode/mips.h: Remove `M' operand code.
396
830db048
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3972018-02-12 Zebediah Figura <z.figura12@gmail.com>
398
399 * coff/msdos.h: New header.
400 * coff/pe.h: Move common defines to msdos.h.
401 * coff/powerpc.h: Likewise.
402
faf766e3
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4032018-01-13 Nick Clifton <nickc@redhat.com>
404
405 2.30 branch created.
406
47acac12
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4072018-01-11 H.J. Lu <hongjiu.lu@intel.com>
408
409 PR ld/22393
410 * bfdlink.h (bfd_link_info): Add separate_code.
411
645a2c5b
JW
4122018-01-04 Jim Wilson <jimw@sifive.com>
413
414 * opcode/riscv-opc.h (CSR_SBADADDR): Rename to CSR_STVAL. Rename
415 DECLARE_CSR entry. Add alias to map sbadaddr to CSR_STVAL.
416 (CSR_MBADADDR): Rename to CSR_MTVAL. Rename DECLARE_CSR entry.
417 Add alias to map mbadaddr to CSR_MTVAL.
418
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4192018-01-03 Alan Modra <amodra@gmail.com>
420
421 Update year range in copyright notice of all files.
422
1e563868 423For older changes see ChangeLog-2017
3499769a 424\f
1e563868 425Copyright (C) 2018 Free Software Foundation, Inc.
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426
427Copying and distribution of this file, with or without modification,
428are permitted in any medium without royalty provided the copyright
429notice and this notice are preserved.
430
431Local Variables:
432mode: change-log
433left-margin: 8
434fill-column: 74
435version-control: never
436End:
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