Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef ASMARM_PCI_H |
2 | #define ASMARM_PCI_H | |
3 | ||
4 | #ifdef __KERNEL__ | |
1da177e4 LT |
5 | #include <asm-generic/pci-dma-compat.h> |
6 | ||
7 | #include <asm/hardware.h> /* for PCIBIOS_MIN_* */ | |
8 | ||
9 | #define pcibios_scan_all_fns(a, b) 0 | |
10 | ||
a8fc0789 MR |
11 | #ifdef CONFIG_PCI_HOST_ITE8152 |
12 | /* ITE bridge requires setting latency timer to avoid early bus access | |
13 | termination by PIC bus mater devices | |
14 | */ | |
15 | extern void pcibios_set_master(struct pci_dev *dev); | |
16 | #else | |
1da177e4 LT |
17 | static inline void pcibios_set_master(struct pci_dev *dev) |
18 | { | |
19 | /* No special bus mastering setup handling */ | |
20 | } | |
a8fc0789 | 21 | #endif |
1da177e4 | 22 | |
c9c3e457 | 23 | static inline void pcibios_penalize_isa_irq(int irq, int active) |
1da177e4 LT |
24 | { |
25 | /* We don't do dynamic PCI IRQ allocation */ | |
26 | } | |
27 | ||
28 | /* | |
29 | * The PCI address space does equal the physical memory address space. | |
30 | * The networking and block device layers use this boolean for bounce | |
31 | * buffer decisions. | |
32 | */ | |
33 | #define PCI_DMA_BUS_IS_PHYS (0) | |
34 | ||
1da177e4 LT |
35 | /* |
36 | * Whether pci_unmap_{single,page} is a nop depends upon the | |
37 | * configuration. | |
38 | */ | |
39 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME; | |
40 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME; | |
41 | #define pci_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME) | |
42 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL)) | |
43 | #define pci_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME) | |
44 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL)) | |
45 | ||
bb4a61b6 | 46 | #ifdef CONFIG_PCI |
e24c2d96 DM |
47 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, |
48 | enum pci_dma_burst_strategy *strat, | |
49 | unsigned long *strategy_parameter) | |
50 | { | |
51 | *strat = PCI_DMA_BURST_INFINITY; | |
52 | *strategy_parameter = ~0UL; | |
53 | } | |
bb4a61b6 | 54 | #endif |
e24c2d96 | 55 | |
1da177e4 LT |
56 | #define HAVE_PCI_MMAP |
57 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
58 | enum pci_mmap_state mmap_state, int write_combine); | |
59 | ||
60 | extern void | |
61 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | |
62 | struct resource *res); | |
63 | ||
43c34735 DB |
64 | extern void |
65 | pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, | |
66 | struct pci_bus_region *region); | |
67 | ||
085ae41f DM |
68 | static inline struct resource * |
69 | pcibios_select_root(struct pci_dev *pdev, struct resource *res) | |
70 | { | |
71 | struct resource *root = NULL; | |
72 | ||
73 | if (res->flags & IORESOURCE_IO) | |
74 | root = &ioport_resource; | |
75 | if (res->flags & IORESOURCE_MEM) | |
76 | root = &iomem_resource; | |
77 | ||
78 | return root; | |
79 | } | |
80 | ||
1da177e4 LT |
81 | #endif /* __KERNEL__ */ |
82 | ||
83 | #endif |