[ARM] Provide dummy noncoherent DMA API
[deliverable/linux.git] / include / asm-arm / pgtable-nommu.h
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1/*
2 * linux/include/asm-arm/pgtable-nommu.h
3 *
4 * Copyright (C) 1995-2002 Russell King
5 * Copyright (C) 2004 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef _ASMARM_PGTABLE_NOMMU_H
12#define _ASMARM_PGTABLE_NOMMU_H
13
14#ifndef __ASSEMBLY__
15
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16#include <linux/slab.h>
17#include <asm/processor.h>
18#include <asm/page.h>
19#include <asm/io.h>
20
21/*
22 * Trivial page table functions.
23 */
24#define pgd_present(pgd) (1)
25#define pgd_none(pgd) (0)
26#define pgd_bad(pgd) (0)
27#define pgd_clear(pgdp)
28#define kern_addr_valid(addr) (1)
29#define pmd_offset(a, b) ((void *)0)
30/* FIXME */
31/*
32 * PMD_SHIFT determines the size of the area a second-level page table can map
33 * PGDIR_SHIFT determines what a third-level page table entry can map
34 */
35#define PGDIR_SHIFT 21
36
37#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
38#define PGDIR_MASK (~(PGDIR_SIZE-1))
39/* FIXME */
40
41#define PAGE_NONE __pgprot(0)
42#define PAGE_SHARED __pgprot(0)
43#define PAGE_COPY __pgprot(0)
44#define PAGE_READONLY __pgprot(0)
45#define PAGE_KERNEL __pgprot(0)
46
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47#define swapper_pg_dir ((pgd_t *) 0)
48
49#define __swp_type(x) (0)
50#define __swp_offset(x) (0)
51#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
52#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
53#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
54
55
56typedef pte_t *pte_addr_t;
57
58static inline int pte_file(pte_t pte) { return 0; }
59
60/*
61 * ZERO_PAGE is a global shared page that is always zero: used
62 * for zero-mapped memory areas etc..
63 */
64#define ZERO_PAGE(vaddr) (virt_to_page(0))
65
66/*
67 * Mark the prot value as uncacheable and unbufferable.
68 */
69#define pgprot_noncached(prot) __pgprot(0)
70#define pgprot_writecombine(prot) __pgprot(0)
71
72
73/*
74 * These would be in other places but having them here reduces the diffs.
75 */
76extern unsigned int kobjsize(const void *objp);
77extern int is_in_rom(unsigned long);
78
79/*
80 * No page table caches to initialise.
81 */
82#define pgtable_cache_init() do { } while (0)
83#define io_remap_page_range remap_page_range
84#define io_remap_pfn_range remap_pfn_range
85
86#define MK_IOSPACE_PFN(space, pfn) (pfn)
87#define GET_IOSPACE(pfn) 0
88#define GET_PFN(pfn) (pfn)
89
90
91/*
92 * All 32bit addresses are effectively valid for vmalloc...
93 * Sort of meaningless for non-VM targets.
94 */
95#define VMALLOC_START 0
96#define VMALLOC_END 0xffffffff
97
98#define FIRST_USER_ADDRESS (0)
99
100#else
101
102/*
103 * dummy tlb and user structures.
104 */
105#define v3_tlb_fns (0)
106#define v4_tlb_fns (0)
107#define v4wb_tlb_fns (0)
108#define v4wbi_tlb_fns (0)
109#define v6_tlb_fns (0)
110
111#define v3_user_fns (0)
112#define v4_user_fns (0)
113#define v4_mc_user_fns (0)
114#define v4wb_user_fns (0)
115#define v4wt_user_fns (0)
116#define v6_user_fns (0)
117#define xscale_mc_user_fns (0)
118
119#endif /*__ASSEMBLY__*/
120
121#endif /* _ASMARM_PGTABLE_H */
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