[deliverable/linux.git] / include / asm-arm26 / pgtable.h

/*
 *  linux/include/asm-arm26/pgtable.h
 *
 *  Copyright (C) 2000-2002 Russell King
 *  Copyright (C) 2003 Ian Molton
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef _ASMARM_PGTABLE_H
#define _ASMARM_PGTABLE_H

#include <asm-generic/4level-fixup.h>

#include <linux/config.h>
#include <asm/memory.h>

/*
 * The table below defines the page protection levels that we insert into our
 * Linux page table version.  These get translated into the best that the
 * architecture can perform.  Note that on most ARM hardware:
 *  1) We cannot do execute protection
 *  2) If we could do execute protection, then read is implied
 *  3) write implies read permissions
 */
#define __P000  PAGE_NONE
#define __P001  PAGE_READONLY
#define __P010  PAGE_COPY
#define __P011  PAGE_COPY
#define __P100  PAGE_READONLY
#define __P101  PAGE_READONLY
#define __P110  PAGE_COPY
#define __P111  PAGE_COPY

#define __S000  PAGE_NONE
#define __S001  PAGE_READONLY
#define __S010  PAGE_SHARED
#define __S011  PAGE_SHARED
#define __S100  PAGE_READONLY
#define __S101  PAGE_READONLY
#define __S110  PAGE_SHARED
#define __S111  PAGE_SHARED

/*
 * PMD_SHIFT determines the size of the area a second-level page table can map
 * PGDIR_SHIFT determines what a third-level page table entry can map
 */
#define PGD_SHIFT		25
#define PMD_SHIFT		20

#define PGD_SIZE                (1UL << PGD_SHIFT)
#define PGD_MASK                (~(PGD_SIZE-1))
#define PMD_SIZE                (1UL << PMD_SHIFT)
#define PMD_MASK                (~(PMD_SIZE-1))

/* The kernel likes to use these names for the above (ick) */
#define PGDIR_SIZE PGD_SIZE
#define PGDIR_MASK PGD_MASK

#define PTRS_PER_PGD            32
#define PTRS_PER_PMD            1
#define PTRS_PER_PTE            32

/*
 * This is the lowest virtual address we can permit any user space
 * mapping to be mapped at.  This is particularly important for
 * non-high vector CPUs.
 */
#define FIRST_USER_ADDRESS	PAGE_SIZE

#define FIRST_USER_PGD_NR       1
#define USER_PTRS_PER_PGD       ((TASK_SIZE/PGD_SIZE) - FIRST_USER_PGD_NR)

// FIXME - WTF?
#define LIBRARY_TEXT_START	0x0c000000


#ifndef __ASSEMBLY__
extern void __pte_error(const char *file, int line, unsigned long val);
extern void __pmd_error(const char *file, int line, unsigned long val);
extern void __pgd_error(const char *file, int line, unsigned long val);

#define pte_ERROR(pte)		__pte_error(__FILE__, __LINE__, pte_val(pte))
#define pmd_ERROR(pmd)		__pmd_error(__FILE__, __LINE__, pmd_val(pmd))
#define pgd_ERROR(pgd)		__pgd_error(__FILE__, __LINE__, pgd_val(pgd))

/*
 * ZERO_PAGE is a global shared page that is always zero: used
 * for zero-mapped memory areas etc..
 */
extern struct page *empty_zero_page;
#define ZERO_PAGE(vaddr)	(empty_zero_page)

#define pte_pfn(pte)		(pte_val(pte) >> PAGE_SHIFT)
#define pte_page(pte)           (pfn_to_page(pte_pfn(pte)))
#define pfn_pte(pfn,prot)	(__pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)))
#define pages_to_mb(x)		((x) >> (20 - PAGE_SHIFT))
#define mk_pte(page,prot)	pfn_pte(page_to_pfn(page),prot)

/*
 * Terminology: PGD = Page Directory, PMD = Page Middle Directory,
 *              PTE = Page Table Entry
 *
 * on arm26 we have no 2nd level page table. we simulate this by removing the
 * PMD.
 *
 * pgd_none is 0 to prevernt pmd_alloc() calling __pmd_alloc(). This causes it
 * to return pmd_offset(pgd,addr) which is a pointer to the pgd (IOW, a no-op).
 *
 * however, to work this way, whilst we are allocating 32 pgds, containing 32
 * PTEs, the actual work is done on the PMDs, thus:
 *
 * instead of  mm->pgd->pmd->pte
 * we have     mm->pgdpmd->pte
 *
 * IOW, think of PGD operations and PMD ones as being the same thing, just
 * that PGD stuff deals with the mm_struct side of things, wheras PMD stuff
 * deals with the pte side of things.
 *
 * additionally, we store some bits in the PGD and PTE pointers: 
 * PGDs:
 *   o The lowest (1) bit of the PGD is to determine if it is present or swap.
 *   o The 2nd bit of the PGD is unused and must be zero.
 *   o The top 6 bits of the PGD must be zero. 
 * PTEs:
 *   o The lower 5 bits of a pte are flags. bit 1 is the 'present' flag. The
 *     others determine the pages attributes.
 *
 * the pgd_val, pmd_val, and pte_val macros seem to be private to our code.
 * They get the RAW value of the PGD/PMD/PTE entry, including our flags
 * encoded into the pointers.
 * 
 * The pgd_offset, pmd_offset, and pte_offset macros are used by the kernel,
 * so they shouldnt have our flags attached.
 *
 * If you understood that, feel free to explain it to me...
 *
 */

#define _PMD_PRESENT     (0x01)

/* These definitions allow us to optimise out stuff like pmd_alloc() */
#define pgd_none(pgd)		(0) 
#define pgd_bad(pgd)		(0)
#define pgd_present(pgd)	(1)
#define pgd_clear(pgdp)		do { } while (0)

/* Whilst these handle our actual 'page directory' (the agglomeration of pgd and pmd)
 */
#define pmd_none(pmd)           (!pmd_val(pmd))
#define pmd_bad(pmd)            ((pmd_val(pmd) & 0xfc000002))
#define pmd_present(pmd)        (pmd_val(pmd) & _PMD_PRESENT)
#define set_pmd(pmd_ptr, pmd)   ((*(pmd_ptr)) = (pmd))
#define pmd_clear(pmdp)         set_pmd(pmdp, __pmd(0))

/* and these handle our pte tables */
#define pte_none(pte)           (!pte_val(pte))
#define pte_present(pte)        (pte_val(pte) & _PAGE_PRESENT)
#define set_pte(pte_ptr, pte)   ((*(pte_ptr)) = (pte))
#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
#define pte_clear(mm,addr,ptep)	set_pte_at((mm),(addr),(ptep), __pte(0))

/* macros to ease the getting of pointers to stuff... */
#define pgd_offset(mm, addr)	((pgd_t *)(mm)->pgd        + __pgd_index(addr))
#define pmd_offset(pgd, addr)	((pmd_t *)(pgd))
#define pte_offset(pmd, addr)   ((pte_t *)pmd_page(*(pmd)) + __pte_index(addr))

/* there is no __pmd_index as we dont use pmds */
#define __pgd_index(addr)	((addr) >> PGD_SHIFT)
#define __pte_index(addr)	(((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))


/* Keep the kernel happy */
#define pgd_index(addr)         __pgd_index(addr)
#define pgd_offset_k(addr)	(pgd_offset(&init_mm, addr))

/*
 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
 * area for the same reason. ;) FIXME: surely 1 page not 4k ?
 */
#define VMALLOC_START     0x01a00000
#define VMALLOC_END       0x01c00000

/* Is pmd_page supposed to return a pointer to a page in some arches? ours seems to
 * return a pointer to memory (no special alignment)
 */
#define pmd_page(pmd)  ((struct page *)(pmd_val((pmd)) & ~_PMD_PRESENT))
#define pmd_page_kernel(pmd) ((pte_t *)(pmd_val((pmd)) & ~_PMD_PRESENT))

#define pte_offset_kernel(dir,addr)     (pmd_page_kernel(*(dir)) + __pte_index(addr))

#define pte_offset_map(dir,addr)        (pmd_page_kernel(*(dir)) + __pte_index(addr))
#define pte_offset_map_nested(dir,addr) (pmd_page_kernel(*(dir)) + __pte_index(addr))
#define pte_unmap(pte)                  do { } while (0)
#define pte_unmap_nested(pte)           do { } while (0)


#define _PAGE_PRESENT   0x01
#define _PAGE_READONLY  0x02
#define _PAGE_NOT_USER  0x04
#define _PAGE_OLD       0x08
#define _PAGE_CLEAN     0x10

// an old page has never been read.
// a clean page has never been written.

/*                               -- present --   -- !dirty --  --- !write ---   ---- !user --- */
#define PAGE_NONE       __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY | _PAGE_NOT_USER)
#define PAGE_SHARED     __pgprot(_PAGE_PRESENT | _PAGE_CLEAN                                  )
#define PAGE_COPY       __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY                 )
#define PAGE_READONLY   __pgprot(_PAGE_PRESENT | _PAGE_CLEAN | _PAGE_READONLY                 )
#define PAGE_KERNEL     __pgprot(_PAGE_PRESENT                                | _PAGE_NOT_USER)

#define _PAGE_CHG_MASK  (PAGE_MASK | _PAGE_OLD | _PAGE_CLEAN)

/*
 * The following only work if pte_present() is true.
 * Undefined behaviour if not..
 */
#define pte_read(pte)                   (!(pte_val(pte) & _PAGE_NOT_USER))
#define pte_write(pte)                  (!(pte_val(pte) & _PAGE_READONLY))
#define pte_exec(pte)                   (!(pte_val(pte) & _PAGE_NOT_USER))
#define pte_dirty(pte)                  (!(pte_val(pte) & _PAGE_CLEAN))
#define pte_young(pte)                  (!(pte_val(pte) & _PAGE_OLD))
//ONLY when !pte_present() I think. nicked from arm32 (FIXME!)
#define pte_file(pte)                   (!(pte_val(pte) & _PAGE_OLD))

#define PTE_BIT_FUNC(fn,op)                     \
static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }

PTE_BIT_FUNC(wrprotect, |=  _PAGE_READONLY);
PTE_BIT_FUNC(mkwrite,   &= ~_PAGE_READONLY);
PTE_BIT_FUNC(exprotect, |=  _PAGE_NOT_USER);
PTE_BIT_FUNC(mkexec,    &= ~_PAGE_NOT_USER);
PTE_BIT_FUNC(mkclean,   |=  _PAGE_CLEAN);
PTE_BIT_FUNC(mkdirty,   &= ~_PAGE_CLEAN);
PTE_BIT_FUNC(mkold,     |=  _PAGE_OLD);
PTE_BIT_FUNC(mkyoung,   &= ~_PAGE_OLD);

/*
 * We don't store cache state bits in the page table here. FIXME - or do we?
 */
#define pgprot_noncached(prot)  (prot)
#define pgprot_writecombine(prot) (prot) //FIXME - is a no-op?

extern void pgtable_cache_init(void);

//FIXME - nicked from arm32 and brutally hacked. probably wrong.
#define pte_to_pgoff(x) (pte_val(x) >> 2)
#define pgoff_to_pte(x) __pte(((x) << 2) & ~_PAGE_OLD)

//FIXME - next line borrowed from arm32. is it right?
#define PTE_FILE_MAX_BITS       30


static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
{
	pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot);
	return pte;
}

extern pgd_t swapper_pg_dir[PTRS_PER_PGD];

/* Encode and decode a swap entry.
 *
 * We support up to 32GB of swap on 4k machines
 */
#define __swp_type(x)		(((x).val >> 2) & 0x7f)
#define __swp_offset(x)		((x).val >> 9)
#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) | ((offset) << 9) })
#define __pte_to_swp_entry(pte)	((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(swp)	((pte_t) { (swp).val })

/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
/* FIXME: this is not correct */
#define kern_addr_valid(addr)	(1)

/*
 * Conversion functions: convert a page and protection to a page entry,
 * and a page entry and page directory to the page they refer to.
 */
static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
{
        pte_t pte;
        pte_val(pte) = physpage | pgprot_val(pgprot);
        return pte;
}


#include <asm-generic/pgtable.h>

/*
 * remap a physical page `pfn' of size `size' with page protection `prot'
 * into virtual address `from'
 */
#define io_remap_pfn_range(vma,from,pfn,size,prot) \
		remap_pfn_range(vma, from, pfn, size, prot)

#define MK_IOSPACE_PFN(space, pfn)	(pfn)
#define GET_IOSPACE(pfn)		0
#define GET_PFN(pfn)			(pfn)

#endif /* !__ASSEMBLY__ */

#endif /* _ASMARM_PGTABLE_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/include/asm-arm26/pgtable.h
	3	*
	4	* Copyright (C) 2000-2002 Russell King
	5	* Copyright (C) 2003 Ian Molton
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11	#ifndef _ASMARM_PGTABLE_H
	12	#define _ASMARM_PGTABLE_H
	13
	14	#include <asm-generic/4level-fixup.h>
	15
	16	#include <linux/config.h>
	17	#include <asm/memory.h>
	18
	19	/*
	20	* The table below defines the page protection levels that we insert into our
	21	* Linux page table version. These get translated into the best that the
	22	* architecture can perform. Note that on most ARM hardware:
	23	* 1) We cannot do execute protection
	24	* 2) If we could do execute protection, then read is implied
	25	* 3) write implies read permissions
	26	*/
	27	#define __P000 PAGE_NONE
	28	#define __P001 PAGE_READONLY
	29	#define __P010 PAGE_COPY
	30	#define __P011 PAGE_COPY
	31	#define __P100 PAGE_READONLY
	32	#define __P101 PAGE_READONLY
	33	#define __P110 PAGE_COPY
	34	#define __P111 PAGE_COPY
	35
	36	#define __S000 PAGE_NONE
	37	#define __S001 PAGE_READONLY
	38	#define __S010 PAGE_SHARED
	39	#define __S011 PAGE_SHARED
	40	#define __S100 PAGE_READONLY
	41	#define __S101 PAGE_READONLY
	42	#define __S110 PAGE_SHARED
	43	#define __S111 PAGE_SHARED
	44
	45	/*
	46	* PMD_SHIFT determines the size of the area a second-level page table can map
	47	* PGDIR_SHIFT determines what a third-level page table entry can map
	48	*/
	49	#define PGD_SHIFT 25
	50	#define PMD_SHIFT 20
	51
	52	#define PGD_SIZE (1UL << PGD_SHIFT)
	53	#define PGD_MASK (~(PGD_SIZE-1))
	54	#define PMD_SIZE (1UL << PMD_SHIFT)
	55	#define PMD_MASK (~(PMD_SIZE-1))
	56
	57	/* The kernel likes to use these names for the above (ick) */
	58	#define PGDIR_SIZE PGD_SIZE
	59	#define PGDIR_MASK PGD_MASK
	60
	61	#define PTRS_PER_PGD 32
	62	#define PTRS_PER_PMD 1
	63	#define PTRS_PER_PTE 32
	64
cdfb82ff HD	65	/*
	66	* This is the lowest virtual address we can permit any user space
	67	* mapping to be mapped at. This is particularly important for
	68	* non-high vector CPUs.
	69	*/
	70	#define FIRST_USER_ADDRESS PAGE_SIZE
	71
1da177e4 LT	72	#define FIRST_USER_PGD_NR 1
	73	#define USER_PTRS_PER_PGD ((TASK_SIZE/PGD_SIZE) - FIRST_USER_PGD_NR)
	74
	75	// FIXME - WTF?
	76	#define LIBRARY_TEXT_START 0x0c000000
	77
	78
	79
	80	#ifndef __ASSEMBLY__
	81	extern void __pte_error(const char *file, int line, unsigned long val);
	82	extern void __pmd_error(const char *file, int line, unsigned long val);
	83	extern void __pgd_error(const char *file, int line, unsigned long val);
	84
	85	#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
	86	#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
	87	#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
	88
	89	/*
	90	* ZERO_PAGE is a global shared page that is always zero: used
	91	* for zero-mapped memory areas etc..
	92	*/
	93	extern struct page *empty_zero_page;
	94	#define ZERO_PAGE(vaddr) (empty_zero_page)
	95
	96	#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
	97	#define pte_page(pte) (pfn_to_page(pte_pfn(pte)))
	98	#define pfn_pte(pfn,prot) (__pte(((pfn) << PAGE_SHIFT) \| pgprot_val(prot)))
	99	#define pages_to_mb(x) ((x) >> (20 - PAGE_SHIFT))
	100	#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
1da177e4 LT	101
	102	/*
	103	* Terminology: PGD = Page Directory, PMD = Page Middle Directory,
	104	* PTE = Page Table Entry
	105	*
	106	* on arm26 we have no 2nd level page table. we simulate this by removing the
	107	* PMD.
	108	*
	109	* pgd_none is 0 to prevernt pmd_alloc() calling __pmd_alloc(). This causes it
	110	* to return pmd_offset(pgd,addr) which is a pointer to the pgd (IOW, a no-op).
	111	*
	112	* however, to work this way, whilst we are allocating 32 pgds, containing 32
	113	* PTEs, the actual work is done on the PMDs, thus:
	114	*
	115	* instead of mm->pgd->pmd->pte
	116	* we have mm->pgdpmd->pte
	117	*
	118	* IOW, think of PGD operations and PMD ones as being the same thing, just
	119	* that PGD stuff deals with the mm_struct side of things, wheras PMD stuff
	120	* deals with the pte side of things.
	121	*
	122	* additionally, we store some bits in the PGD and PTE pointers:
	123	* PGDs:
	124	* o The lowest (1) bit of the PGD is to determine if it is present or swap.
	125	* o The 2nd bit of the PGD is unused and must be zero.
	126	* o The top 6 bits of the PGD must be zero.
	127	* PTEs:
	128	* o The lower 5 bits of a pte are flags. bit 1 is the 'present' flag. The
	129	* others determine the pages attributes.
	130	*
	131	* the pgd_val, pmd_val, and pte_val macros seem to be private to our code.
	132	* They get the RAW value of the PGD/PMD/PTE entry, including our flags
	133	* encoded into the pointers.
	134	*
	135	* The pgd_offset, pmd_offset, and pte_offset macros are used by the kernel,
	136	* so they shouldnt have our flags attached.
	137	*
	138	* If you understood that, feel free to explain it to me...
	139	*
	140	*/
	141
	142	#define _PMD_PRESENT (0x01)
	143
	144	/* These definitions allow us to optimise out stuff like pmd_alloc() */
	145	#define pgd_none(pgd) (0)
	146	#define pgd_bad(pgd) (0)
	147	#define pgd_present(pgd) (1)
	148	#define pgd_clear(pgdp) do { } while (0)
	149
	150	/* Whilst these handle our actual 'page directory' (the agglomeration of pgd and pmd)
	151	*/
	152	#define pmd_none(pmd) (!pmd_val(pmd))
	153	#define pmd_bad(pmd) ((pmd_val(pmd) & 0xfc000002))
	154	#define pmd_present(pmd) (pmd_val(pmd) & _PMD_PRESENT)
	155	#define set_pmd(pmd_ptr, pmd) ((*(pmd_ptr)) = (pmd))
	156	#define pmd_clear(pmdp) set_pmd(pmdp, __pmd(0))
	157
	158	/* and these handle our pte tables */
	159	#define pte_none(pte) (!pte_val(pte))
	160	#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
	161	#define set_pte(pte_ptr, pte) ((*(pte_ptr)) = (pte))
	162	#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
	163	#define pte_clear(mm,addr,ptep) set_pte_at((mm),(addr),(ptep), __pte(0))
	164
165	/* macros to ease the getting of pointers to stuff... */
166	#define pgd_offset(mm, addr) ((pgd_t *)(mm)->pgd + __pgd_index(addr))
167	#define pmd_offset(pgd, addr) ((pmd_t *)(pgd))
168	#define pte_offset(pmd, addr) ((pte_t )pmd_page((pmd)) + __pte_index(addr))
169
170	/* there is no __pmd_index as we dont use pmds */
171	#define __pgd_index(addr) ((addr) >> PGD_SHIFT)
172	#define __pte_index(addr) (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
173
174
175	/* Keep the kernel happy */
176	#define pgd_index(addr) __pgd_index(addr)
177	#define pgd_offset_k(addr) (pgd_offset(&init_mm, addr))
178
179	/*
180	* The vmalloc() routines leaves a hole of 4kB between each vmalloced
181	* area for the same reason. ;) FIXME: surely 1 page not 4k ?
182	*/
183	#define VMALLOC_START 0x01a00000
184	#define VMALLOC_END 0x01c00000
185
186	/* Is pmd_page supposed to return a pointer to a page in some arches? ours seems to
187	* return a pointer to memory (no special alignment)
188	*/
189	#define pmd_page(pmd) ((struct page *)(pmd_val((pmd)) & ~_PMD_PRESENT))
190	#define pmd_page_kernel(pmd) ((pte_t *)(pmd_val((pmd)) & ~_PMD_PRESENT))
191
192	#define pte_offset_kernel(dir,addr) (pmd_page_kernel(*(dir)) + __pte_index(addr))
193
194	#define pte_offset_map(dir,addr) (pmd_page_kernel(*(dir)) + __pte_index(addr))
195	#define pte_offset_map_nested(dir,addr) (pmd_page_kernel(*(dir)) + __pte_index(addr))
196	#define pte_unmap(pte) do { } while (0)
197	#define pte_unmap_nested(pte) do { } while (0)
198
199
200	#define _PAGE_PRESENT 0x01
201	#define _PAGE_READONLY 0x02
202	#define _PAGE_NOT_USER 0x04
203	#define _PAGE_OLD 0x08
204	#define _PAGE_CLEAN 0x10
205
206	// an old page has never been read.
207	// a clean page has never been written.
208
209	/* -- present -- -- !dirty -- --- !write --- ---- !user --- */
210	#define PAGE_NONE __pgprot(_PAGE_PRESENT \| _PAGE_CLEAN \| _PAGE_READONLY \| _PAGE_NOT_USER)
211	#define PAGE_SHARED __pgprot(_PAGE_PRESENT \| _PAGE_CLEAN )
212	#define PAGE_COPY __pgprot(_PAGE_PRESENT \| _PAGE_CLEAN \| _PAGE_READONLY )
213	#define PAGE_READONLY __pgprot(_PAGE_PRESENT \| _PAGE_CLEAN \| _PAGE_READONLY )
214	#define PAGE_KERNEL __pgprot(_PAGE_PRESENT \| _PAGE_NOT_USER)
215
216	#define _PAGE_CHG_MASK (PAGE_MASK \| _PAGE_OLD \| _PAGE_CLEAN)
217
218	/*
219	* The following only work if pte_present() is true.
220	* Undefined behaviour if not..
221	*/
222	#define pte_read(pte) (!(pte_val(pte) & _PAGE_NOT_USER))
223	#define pte_write(pte) (!(pte_val(pte) & _PAGE_READONLY))
224	#define pte_exec(pte) (!(pte_val(pte) & _PAGE_NOT_USER))
225	#define pte_dirty(pte) (!(pte_val(pte) & _PAGE_CLEAN))
226	#define pte_young(pte) (!(pte_val(pte) & _PAGE_OLD))
227	//ONLY when !pte_present() I think. nicked from arm32 (FIXME!)
228	#define pte_file(pte) (!(pte_val(pte) & _PAGE_OLD))
229
230	#define PTE_BIT_FUNC(fn,op) \
231	static inline pte_t pte_##fn(pte_t pte) { pte_val(pte) op; return pte; }
232
233	PTE_BIT_FUNC(wrprotect, \|= _PAGE_READONLY);
234	PTE_BIT_FUNC(mkwrite, &= ~_PAGE_READONLY);
235	PTE_BIT_FUNC(exprotect, \|= _PAGE_NOT_USER);
236	PTE_BIT_FUNC(mkexec, &= ~_PAGE_NOT_USER);
237	PTE_BIT_FUNC(mkclean, \|= _PAGE_CLEAN);
238	PTE_BIT_FUNC(mkdirty, &= ~_PAGE_CLEAN);
239	PTE_BIT_FUNC(mkold, \|= _PAGE_OLD);
240	PTE_BIT_FUNC(mkyoung, &= ~_PAGE_OLD);
241
242	/*
243	* We don't store cache state bits in the page table here. FIXME - or do we?
244	*/
245	#define pgprot_noncached(prot) (prot)
246	#define pgprot_writecombine(prot) (prot) //FIXME - is a no-op?
247
248	extern void pgtable_cache_init(void);
249
250	//FIXME - nicked from arm32 and brutally hacked. probably wrong.
251	#define pte_to_pgoff(x) (pte_val(x) >> 2)
252	#define pgoff_to_pte(x) __pte(((x) << 2) & ~_PAGE_OLD)
253
254	//FIXME - next line borrowed from arm32. is it right?
255	#define PTE_FILE_MAX_BITS 30
256
257
258	static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
259	{
260	pte_val(pte) = (pte_val(pte) & _PAGE_CHG_MASK) \| pgprot_val(newprot);
261	return pte;
262	}
263
264	extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
265
266	/* Encode and decode a swap entry.
267	*
268	* We support up to 32GB of swap on 4k machines
269	*/
270	#define __swp_type(x) (((x).val >> 2) & 0x7f)
271	#define __swp_offset(x) ((x).val >> 9)
272	#define __swp_entry(type,offset) ((swp_entry_t) { ((type) << 2) \| ((offset) << 9) })
273	#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
274	#define __swp_entry_to_pte(swp) ((pte_t) { (swp).val })
275
276	/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
277	/* FIXME: this is not correct */
278	#define kern_addr_valid(addr) (1)
279
280	/*
281	* Conversion functions: convert a page and protection to a page entry,
282	* and a page entry and page directory to the page they refer to.
283	*/
284	static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
285	{
286	pte_t pte;
287	pte_val(pte) = physpage \| pgprot_val(pgprot);
288	return pte;
289	}
290
291
292	#include <asm-generic/pgtable.h>
293
294	/*
33bf5610	295	* remap a physical page `pfn' of size `size' with page protection `prot'
1da177e4 LT	296	* into virtual address `from'
1da177e4 LT	297	*/
1da177e4 LT	298	#define io_remap_pfn_range(vma,from,pfn,size,prot) \
	299	remap_pfn_range(vma, from, pfn, size, prot)
	300
	301	#define MK_IOSPACE_PFN(space, pfn) (pfn)
	302	#define GET_IOSPACE(pfn) 0
	303	#define GET_PFN(pfn) (pfn)
	304
	305	#endif /* !__ASSEMBLY__ */
	306
	307	#endif /* _ASMARM_PGTABLE_H */