[deliverable/linux.git] / include / asm-blackfin / kgdb.h

/*
 * File:         include/asm-blackfin/kgdb.h
 * Based on:
 * Author:       Sonic Zhang
 *
 * Created:
 * Description:
 *
 * Rev:          $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
 *
 * Modified:
 *               Copyright 2005-2006 Analog Devices Inc.
 *
 * Bugs:         Enter bugs at http://blackfin.uclinux.org/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, see the file COPYING, or write
 * to the Free Software Foundation, Inc.,
 * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
 */

#ifndef __ASM_BLACKFIN_KGDB_H__
#define __ASM_BLACKFIN_KGDB_H__

#include <linux/ptrace.h>

/* gdb locks */
#define KGDB_MAX_NO_CPUS 8

/************************************************************************/
/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
/* at least NUMREGBYTES*2 are needed for register packets */
/* Longer buffer is needed to list all threads */
#define BUFMAX 2048

/*
 *  Note that this register image is different from
 *  the register image that Linux produces at interrupt time.
 *  
 *  Linux's register image is defined by struct pt_regs in ptrace.h.
 */
enum regnames {
  /* Core Registers */
  BFIN_R0 = 0,
  BFIN_R1,
  BFIN_R2,
  BFIN_R3,
  BFIN_R4,
  BFIN_R5,
  BFIN_R6,
  BFIN_R7,
  BFIN_P0,
  BFIN_P1,
  BFIN_P2,
  BFIN_P3,
  BFIN_P4,
  BFIN_P5,
  BFIN_SP,
  BFIN_FP,
  BFIN_I0,
  BFIN_I1,
  BFIN_I2,
  BFIN_I3,
  BFIN_M0,
  BFIN_M1,
  BFIN_M2,
  BFIN_M3,
  BFIN_B0,
  BFIN_B1,
  BFIN_B2,
  BFIN_B3,
  BFIN_L0,
  BFIN_L1,
  BFIN_L2,
  BFIN_L3,
  BFIN_A0_DOT_X,
  BFIN_A0_DOT_W,
  BFIN_A1_DOT_X,
  BFIN_A1_DOT_W,
  BFIN_ASTAT,
  BFIN_RETS,
  BFIN_LC0,
  BFIN_LT0,
  BFIN_LB0,
  BFIN_LC1,
  BFIN_LT1,
  BFIN_LB1,
  BFIN_CYCLES,
  BFIN_CYCLES2,
  BFIN_USP,
  BFIN_SEQSTAT,
  BFIN_SYSCFG,
  BFIN_RETI,
  BFIN_RETX,
  BFIN_RETN,
  BFIN_RETE,
  
  /* Pseudo Registers */
  BFIN_PC,
  BFIN_CC,
  BFIN_EXTRA1,		/* Address of .text section.  */
  BFIN_EXTRA2,		/* Address of .data section.  */
  BFIN_EXTRA3,		/* Address of .bss section.  */
  BFIN_FDPIC_EXEC, 
  BFIN_FDPIC_INTERP,

  /* MMRs */
  BFIN_IPEND,

  /* LAST ENTRY SHOULD NOT BE CHANGED.  */
  BFIN_NUM_REGS		/* The number of all registers.  */
};

/* Number of bytes of registers.  */
#define NUMREGBYTES BFIN_NUM_REGS*4

#define BREAKPOINT() asm("   EXCPT 2;");
#define BREAK_INSTR_SIZE       2
#define HW_BREAKPOINT_NUM		6

/* Instruction watchpoint address control register bits mask */
#define WPPWR		0x1
#define WPIREN01	0x2
#define WPIRINV01	0x4
#define WPIAEN0		0x8
#define WPIAEN1		0x10
#define WPICNTEN0	0x20
#define WPICNTEN1	0x40
#define EMUSW0		0x80
#define EMUSW1		0x100
#define WPIREN23	0x200
#define WPIRINV23	0x400
#define WPIAEN2		0x800
#define WPIAEN3		0x1000
#define WPICNTEN2	0x2000
#define WPICNTEN3	0x4000
#define EMUSW2		0x8000
#define EMUSW3		0x10000
#define WPIREN45	0x20000
#define WPIRINV45	0x40000
#define WPIAEN4		0x80000
#define WPIAEN5		0x100000
#define WPICNTEN4	0x200000
#define WPICNTEN5	0x400000
#define EMUSW4		0x800000
#define EMUSW5		0x1000000
#define WPAND		0x2000000

/* Data watchpoint address control register bits mask */
#define WPDREN01	0x1
#define WPDRINV01	0x2
#define WPDAEN0		0x4
#define WPDAEN1		0x8
#define WPDCNTEN0	0x10
#define WPDCNTEN1	0x20
#define WPDSRC0		0xc0
#define WPDACC0		0x300
#define WPDSRC1		0xc00
#define WPDACC1		0x3000

/* Watchpoint status register bits mask */
#define STATIA0		0x1
#define STATIA1		0x2
#define STATIA2		0x4
#define STATIA3		0x8
#define STATIA4		0x10
#define STATIA5		0x20
#define STATDA0		0x40
#define STATDA1		0x80

extern void kgdb_print(const char *fmt, ...);
extern void init_kgdb_uart(void);

#endif
Commit	Line	Data
474f1a66 SZ	1	/*
	2	* File: include/asm-blackfin/kgdb.h
	3	* Based on:
	4	* Author: Sonic Zhang
	5	*
	6	* Created:
	7	* Description:
	8	*
	9	* Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $
	10	*
	11	* Modified:
	12	* Copyright 2005-2006 Analog Devices Inc.
	13	*
	14	* Bugs: Enter bugs at http://blackfin.uclinux.org/
	15	*
	16	* This program is free software; you can redistribute it and/or modify
	17	* it under the terms of the GNU General Public License as published by
	18	* the Free Software Foundation; either version 2 of the License, or
	19	* (at your option) any later version.
	20	*
	21	* This program is distributed in the hope that it will be useful,
	22	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	23	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	24	* GNU General Public License for more details.
	25	*
	26	* You should have received a copy of the GNU General Public License
	27	* along with this program; if not, see the file COPYING, or write
	28	* to the Free Software Foundation, Inc.,
	29	* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
	30	*/
	31
	32	#ifndef __ASM_BLACKFIN_KGDB_H__
	33	#define __ASM_BLACKFIN_KGDB_H__
	34
	35	#include <linux/ptrace.h>
	36
	37	/* gdb locks */
	38	#define KGDB_MAX_NO_CPUS 8
	39
	40	/************************************************************************/
	41	/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
	42	/* at least NUMREGBYTES2 are needed for register packets /
	43	/* Longer buffer is needed to list all threads */
	44	#define BUFMAX 2048
	45
	46	/*
	47	* Note that this register image is different from
	48	* the register image that Linux produces at interrupt time.
	49	*
	50	* Linux's register image is defined by struct pt_regs in ptrace.h.
	51	*/
	52	enum regnames {
	53	/* Core Registers */
	54	BFIN_R0 = 0,
	55	BFIN_R1,
	56	BFIN_R2,
	57	BFIN_R3,
	58	BFIN_R4,
	59	BFIN_R5,
	60	BFIN_R6,
	61	BFIN_R7,
	62	BFIN_P0,
	63	BFIN_P1,
	64	BFIN_P2,
65	BFIN_P3,
66	BFIN_P4,
67	BFIN_P5,
68	BFIN_SP,
69	BFIN_FP,
70	BFIN_I0,
71	BFIN_I1,
72	BFIN_I2,
73	BFIN_I3,
74	BFIN_M0,
75	BFIN_M1,
76	BFIN_M2,
77	BFIN_M3,
78	BFIN_B0,
79	BFIN_B1,
80	BFIN_B2,
81	BFIN_B3,
82	BFIN_L0,
83	BFIN_L1,
84	BFIN_L2,
85	BFIN_L3,
86	BFIN_A0_DOT_X,
87	BFIN_A0_DOT_W,
88	BFIN_A1_DOT_X,
89	BFIN_A1_DOT_W,
90	BFIN_ASTAT,
91	BFIN_RETS,
92	BFIN_LC0,
93	BFIN_LT0,
94	BFIN_LB0,
95	BFIN_LC1,
96	BFIN_LT1,
97	BFIN_LB1,
98	BFIN_CYCLES,
99	BFIN_CYCLES2,
100	BFIN_USP,
101	BFIN_SEQSTAT,
102	BFIN_SYSCFG,
103	BFIN_RETI,
104	BFIN_RETX,
105	BFIN_RETN,
106	BFIN_RETE,
107
108	/* Pseudo Registers */
109	BFIN_PC,
110	BFIN_CC,
111	BFIN_EXTRA1, /* Address of .text section. */
112	BFIN_EXTRA2, /* Address of .data section. */
113	BFIN_EXTRA3, /* Address of .bss section. */
114	BFIN_FDPIC_EXEC,
115	BFIN_FDPIC_INTERP,
116
117	/* MMRs */
118	BFIN_IPEND,
119
120	/* LAST ENTRY SHOULD NOT BE CHANGED. */
121	BFIN_NUM_REGS /* The number of all registers. */
122	};
123
124	/* Number of bytes of registers. */
125	#define NUMREGBYTES BFIN_NUM_REGS*4
126
127	#define BREAKPOINT() asm(" EXCPT 2;");
128	#define BREAK_INSTR_SIZE 2
129	#define HW_BREAKPOINT_NUM 6
130
131	/* Instruction watchpoint address control register bits mask */
132	#define WPPWR 0x1
133	#define WPIREN01 0x2
134	#define WPIRINV01 0x4
135	#define WPIAEN0 0x8
136	#define WPIAEN1 0x10
137	#define WPICNTEN0 0x20
138	#define WPICNTEN1 0x40
139	#define EMUSW0 0x80
140	#define EMUSW1 0x100
141	#define WPIREN23 0x200
142	#define WPIRINV23 0x400
143	#define WPIAEN2 0x800
144	#define WPIAEN3 0x1000
145	#define WPICNTEN2 0x2000
146	#define WPICNTEN3 0x4000
147	#define EMUSW2 0x8000
148	#define EMUSW3 0x10000
149	#define WPIREN45 0x20000
150	#define WPIRINV45 0x40000
151	#define WPIAEN4 0x80000
152	#define WPIAEN5 0x100000
153	#define WPICNTEN4 0x200000
154	#define WPICNTEN5 0x400000
155	#define EMUSW4 0x800000
156	#define EMUSW5 0x1000000
157	#define WPAND 0x2000000
158
159	/* Data watchpoint address control register bits mask */
160	#define WPDREN01 0x1
161	#define WPDRINV01 0x2
162	#define WPDAEN0 0x4
163	#define WPDAEN1 0x8
164	#define WPDCNTEN0 0x10
165	#define WPDCNTEN1 0x20
166	#define WPDSRC0 0xc0
167	#define WPDACC0 0x300
168	#define WPDSRC1 0xc00
169	#define WPDACC1 0x3000
170
171	/* Watchpoint status register bits mask */
172	#define STATIA0 0x1
173	#define STATIA1 0x2
174	#define STATIA2 0x4
175	#define STATIA3 0x8
176	#define STATIA4 0x10
177	#define STATIA5 0x20
178	#define STATDA0 0x40
179	#define STATDA1 0x80
180
181	extern void kgdb_print(const char *fmt, ...);
a359cca7	182	extern void init_kgdb_uart(void);
474f1a66 SZ	183
474f1a66 SZ	184	#endif