Commit | Line | Data |
---|---|---|
4c20386c DB |
1 | #ifndef _ASM_GENERIC_GPIO_H |
2 | #define _ASM_GENERIC_GPIO_H | |
3 | ||
b3db4a8a | 4 | #include <linux/kernel.h> |
6ea0205b | 5 | #include <linux/types.h> |
25947d5a | 6 | #include <linux/errno.h> |
15c9a0ac | 7 | #include <linux/of.h> |
f23f1516 | 8 | #include <linux/pinctrl/pinctrl.h> |
6ea0205b | 9 | |
7444a72e | 10 | #ifdef CONFIG_GPIOLIB |
d2876d08 | 11 | |
6ea0205b DB |
12 | #include <linux/compiler.h> |
13 | ||
d2876d08 DB |
14 | /* Platforms may implement their GPIO interface with library code, |
15 | * at a small performance cost for non-inlined operations and some | |
16 | * extra memory (for code and for per-GPIO table entries). | |
17 | * | |
18 | * While the GPIO programming interface defines valid GPIO numbers | |
19 | * to be in the range 0..MAX_INT, this library restricts them to the | |
6a9436d0 | 20 | * smaller range 0..ARCH_NR_GPIOS-1. |
c956126c DB |
21 | * |
22 | * ARCH_NR_GPIOS is somewhat arbitrary; it usually reflects the sum of | |
23 | * builtin/SoC GPIOs plus a number of GPIOs on expanders; the latter is | |
24 | * actually an estimate of a board-specific value. | |
d2876d08 DB |
25 | */ |
26 | ||
27 | #ifndef ARCH_NR_GPIOS | |
28 | #define ARCH_NR_GPIOS 256 | |
29 | #endif | |
30 | ||
c956126c DB |
31 | /* |
32 | * "valid" GPIO numbers are nonnegative and may be passed to | |
33 | * setup routines like gpio_request(). only some valid numbers | |
34 | * can successfully be requested and used. | |
35 | * | |
36 | * Invalid GPIO numbers are useful for indicating no-such-GPIO in | |
37 | * platform data and other tables. | |
38 | */ | |
39 | ||
3474cb3c | 40 | static inline bool gpio_is_valid(int number) |
e6de1808 | 41 | { |
3474cb3c | 42 | return number >= 0 && number < ARCH_NR_GPIOS; |
e6de1808 GL |
43 | } |
44 | ||
1f018c8d | 45 | struct device; |
feb83699 | 46 | struct gpio; |
d2876d08 | 47 | struct seq_file; |
438d8908 | 48 | struct module; |
a19e3da5 | 49 | struct device_node; |
d2876d08 DB |
50 | |
51 | /** | |
52 | * struct gpio_chip - abstract a GPIO controller | |
53 | * @label: for diagnostics | |
d8f388d8 DB |
54 | * @dev: optional device providing the GPIOs |
55 | * @owner: helps prevent removal of modules exporting active GPIOs | |
35e8bb51 DB |
56 | * @request: optional hook for chip-specific activation, such as |
57 | * enabling module power and clock; may sleep | |
58 | * @free: optional hook for chip-specific deactivation, such as | |
59 | * disabling module power and clock; may sleep | |
80b0a602 MN |
60 | * @get_direction: returns direction for signal "offset", 0=out, 1=in, |
61 | * (same as GPIOF_DIR_XXX), or negative error | |
d2876d08 DB |
62 | * @direction_input: configures signal "offset" as input, or returns error |
63 | * @get: returns value for signal "offset"; for output signals this | |
64 | * returns either the value actually sensed, or zero | |
65 | * @direction_output: configures signal "offset" as output, or returns error | |
1ae96314 RS |
66 | * @set_debounce: optional hook for setting debounce time for specified gpio in |
67 | * interrupt triggered gpio chips | |
d2876d08 | 68 | * @set: assigns output value for signal "offset" |
0f6d504e DB |
69 | * @to_irq: optional hook supporting non-static gpio_to_irq() mappings; |
70 | * implementation may not sleep | |
d2876d08 DB |
71 | * @dbg_show: optional routine to show contents in debugfs; default code |
72 | * will be used when this is omitted, but custom code can show extra | |
73 | * state (such as pullup/pulldown configuration). | |
74 | * @base: identifies the first GPIO number handled by this chip; or, if | |
75 | * negative during registration, requests dynamic ID allocation. | |
76 | * @ngpio: the number of GPIOs handled by this controller; the last GPIO | |
77 | * handled is (base + ngpio - 1). | |
78 | * @can_sleep: flag must be set iff get()/set() methods sleep, as they | |
79 | * must while accessing GPIO expander chips over I2C or SPI | |
926b663c DS |
80 | * @names: if set, must be an array of strings to use as alternative |
81 | * names for the GPIOs in this chip. Any entry in the array | |
82 | * may be NULL if there is no alias for the GPIO, however the | |
7839ec78 UKK |
83 | * array must be @ngpio entries long. A name can include a single printk |
84 | * format specifier for an unsigned int. It is substituted by the actual | |
85 | * number of the gpio. | |
d2876d08 DB |
86 | * |
87 | * A gpio_chip can help platforms abstract various sources of GPIOs so | |
88 | * they can all be accessed through a common programing interface. | |
89 | * Example sources would be SOC controllers, FPGAs, multifunction | |
90 | * chips, dedicated GPIO expanders, and so on. | |
91 | * | |
92 | * Each chip controls a number of signals, identified in method calls | |
93 | * by "offset" values in the range 0..(@ngpio - 1). When those signals | |
94 | * are referenced through calls like gpio_get_value(gpio), the offset | |
95 | * is calculated by subtracting @base from the gpio number. | |
96 | */ | |
97 | struct gpio_chip { | |
4fd5463c | 98 | const char *label; |
d8f388d8 | 99 | struct device *dev; |
438d8908 | 100 | struct module *owner; |
d2876d08 | 101 | |
35e8bb51 DB |
102 | int (*request)(struct gpio_chip *chip, |
103 | unsigned offset); | |
104 | void (*free)(struct gpio_chip *chip, | |
105 | unsigned offset); | |
80b0a602 MN |
106 | int (*get_direction)(struct gpio_chip *chip, |
107 | unsigned offset); | |
d2876d08 DB |
108 | int (*direction_input)(struct gpio_chip *chip, |
109 | unsigned offset); | |
110 | int (*get)(struct gpio_chip *chip, | |
111 | unsigned offset); | |
112 | int (*direction_output)(struct gpio_chip *chip, | |
113 | unsigned offset, int value); | |
c4b5be98 FB |
114 | int (*set_debounce)(struct gpio_chip *chip, |
115 | unsigned offset, unsigned debounce); | |
116 | ||
d2876d08 DB |
117 | void (*set)(struct gpio_chip *chip, |
118 | unsigned offset, int value); | |
0f6d504e DB |
119 | |
120 | int (*to_irq)(struct gpio_chip *chip, | |
121 | unsigned offset); | |
122 | ||
d2876d08 DB |
123 | void (*dbg_show)(struct seq_file *s, |
124 | struct gpio_chip *chip); | |
125 | int base; | |
126 | u16 ngpio; | |
62154991 | 127 | const char *const *names; |
d2876d08 | 128 | unsigned can_sleep:1; |
d8f388d8 | 129 | unsigned exported:1; |
a19e3da5 AV |
130 | |
131 | #if defined(CONFIG_OF_GPIO) | |
132 | /* | |
133 | * If CONFIG_OF is enabled, then all GPIO controllers described in the | |
134 | * device tree automatically may have an OF translation | |
135 | */ | |
136 | struct device_node *of_node; | |
137 | int of_gpio_n_cells; | |
15c9a0ac GL |
138 | int (*of_xlate)(struct gpio_chip *gc, |
139 | const struct of_phandle_args *gpiospec, u32 *flags); | |
a19e3da5 | 140 | #endif |
f23f1516 SH |
141 | #ifdef CONFIG_PINCTRL |
142 | /* | |
143 | * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally | |
144 | * describe the actual pin range which they serve in an SoC. This | |
145 | * information would be used by pinctrl subsystem to configure | |
146 | * corresponding pins for gpio usage. | |
147 | */ | |
148 | struct list_head pin_ranges; | |
149 | #endif | |
d2876d08 DB |
150 | }; |
151 | ||
152 | extern const char *gpiochip_is_requested(struct gpio_chip *chip, | |
153 | unsigned offset); | |
1a2d397a | 154 | extern struct gpio_chip *gpio_to_chip(unsigned gpio); |
6ea0205b | 155 | extern int __must_check gpiochip_reserve(int start, int ngpio); |
d2876d08 DB |
156 | |
157 | /* add/remove chips */ | |
158 | extern int gpiochip_add(struct gpio_chip *chip); | |
159 | extern int __must_check gpiochip_remove(struct gpio_chip *chip); | |
07ce8ec7 | 160 | extern struct gpio_chip *gpiochip_find(void *data, |
594fa265 | 161 | int (*match)(struct gpio_chip *chip, |
3d0f7cf0 | 162 | void *data)); |
d2876d08 DB |
163 | |
164 | ||
165 | /* Always use the library code for GPIO management calls, | |
166 | * or when sleeping may be involved. | |
167 | */ | |
d8a3515e | 168 | extern int gpio_request(unsigned gpio, const char *label); |
d2876d08 DB |
169 | extern void gpio_free(unsigned gpio); |
170 | ||
d8a3515e LT |
171 | extern int gpio_direction_input(unsigned gpio); |
172 | extern int gpio_direction_output(unsigned gpio, int value); | |
d2876d08 | 173 | |
c4b5be98 FB |
174 | extern int gpio_set_debounce(unsigned gpio, unsigned debounce); |
175 | ||
d2876d08 DB |
176 | extern int gpio_get_value_cansleep(unsigned gpio); |
177 | extern void gpio_set_value_cansleep(unsigned gpio, int value); | |
178 | ||
179 | ||
180 | /* A platform's <asm/gpio.h> code may want to inline the I/O calls when | |
181 | * the GPIO is constant and refers to some always-present controller, | |
182 | * giving direct access to chip registers and tight bitbanging loops. | |
183 | */ | |
184 | extern int __gpio_get_value(unsigned gpio); | |
185 | extern void __gpio_set_value(unsigned gpio, int value); | |
186 | ||
187 | extern int __gpio_cansleep(unsigned gpio); | |
188 | ||
0f6d504e | 189 | extern int __gpio_to_irq(unsigned gpio); |
d2876d08 | 190 | |
d8a3515e | 191 | extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label); |
7c295975 LPC |
192 | extern int gpio_request_array(const struct gpio *array, size_t num); |
193 | extern void gpio_free_array(const struct gpio *array, size_t num); | |
3e45f1d1 | 194 | |
1a0703ed JC |
195 | /* bindings for managed devices that want to request gpios */ |
196 | int devm_gpio_request(struct device *dev, unsigned gpio, const char *label); | |
09d71ff1 MB |
197 | int devm_gpio_request_one(struct device *dev, unsigned gpio, |
198 | unsigned long flags, const char *label); | |
1a0703ed JC |
199 | void devm_gpio_free(struct device *dev, unsigned int gpio); |
200 | ||
d8f388d8 DB |
201 | #ifdef CONFIG_GPIO_SYSFS |
202 | ||
203 | /* | |
204 | * A sysfs interface can be exported by individual drivers if they want, | |
205 | * but more typically is configured entirely from userspace. | |
206 | */ | |
207 | extern int gpio_export(unsigned gpio, bool direction_may_change); | |
a4177ee7 JN |
208 | extern int gpio_export_link(struct device *dev, const char *name, |
209 | unsigned gpio); | |
07697461 | 210 | extern int gpio_sysfs_set_active_low(unsigned gpio, int value); |
d8f388d8 DB |
211 | extern void gpio_unexport(unsigned gpio); |
212 | ||
213 | #endif /* CONFIG_GPIO_SYSFS */ | |
214 | ||
09cd9527 | 215 | #else /* !CONFIG_GPIOLIB */ |
d2876d08 | 216 | |
3474cb3c | 217 | static inline bool gpio_is_valid(int number) |
e6de1808 GL |
218 | { |
219 | /* only non-negative numbers are valid */ | |
220 | return number >= 0; | |
221 | } | |
222 | ||
4c20386c DB |
223 | /* platforms that don't directly support access to GPIOs through I2C, SPI, |
224 | * or other blocking infrastructure can use these wrappers. | |
225 | */ | |
226 | ||
227 | static inline int gpio_cansleep(unsigned gpio) | |
228 | { | |
229 | return 0; | |
230 | } | |
231 | ||
232 | static inline int gpio_get_value_cansleep(unsigned gpio) | |
233 | { | |
234 | might_sleep(); | |
eb9ae7f2 | 235 | return __gpio_get_value(gpio); |
4c20386c DB |
236 | } |
237 | ||
238 | static inline void gpio_set_value_cansleep(unsigned gpio, int value) | |
239 | { | |
240 | might_sleep(); | |
eb9ae7f2 | 241 | __gpio_set_value(gpio, value); |
4c20386c DB |
242 | } |
243 | ||
09cd9527 | 244 | #endif /* !CONFIG_GPIOLIB */ |
d8f388d8 DB |
245 | |
246 | #ifndef CONFIG_GPIO_SYSFS | |
247 | ||
1f018c8d MF |
248 | struct device; |
249 | ||
d8f388d8 DB |
250 | /* sysfs support is only available with gpiolib, where it's optional */ |
251 | ||
252 | static inline int gpio_export(unsigned gpio, bool direction_may_change) | |
253 | { | |
254 | return -ENOSYS; | |
255 | } | |
256 | ||
a4177ee7 JN |
257 | static inline int gpio_export_link(struct device *dev, const char *name, |
258 | unsigned gpio) | |
259 | { | |
260 | return -ENOSYS; | |
261 | } | |
262 | ||
07697461 JN |
263 | static inline int gpio_sysfs_set_active_low(unsigned gpio, int value) |
264 | { | |
265 | return -ENOSYS; | |
266 | } | |
267 | ||
d8f388d8 DB |
268 | static inline void gpio_unexport(unsigned gpio) |
269 | { | |
270 | } | |
271 | #endif /* CONFIG_GPIO_SYSFS */ | |
d2876d08 | 272 | |
50309a9c LW |
273 | #ifdef CONFIG_PINCTRL |
274 | ||
275 | /** | |
276 | * struct gpio_pin_range - pin range controlled by a gpio chip | |
277 | * @head: list for maintaining set of pin ranges, used internally | |
278 | * @pctldev: pinctrl device which handles corresponding pins | |
279 | * @range: actual range of pins controlled by a gpio controller | |
280 | */ | |
281 | ||
282 | struct gpio_pin_range { | |
283 | struct list_head node; | |
284 | struct pinctrl_dev *pctldev; | |
285 | struct pinctrl_gpio_range range; | |
286 | }; | |
287 | ||
288 | int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, | |
316511c0 | 289 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 290 | unsigned int npins); |
50309a9c LW |
291 | void gpiochip_remove_pin_ranges(struct gpio_chip *chip); |
292 | ||
293 | #else | |
294 | ||
295 | static inline int | |
296 | gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name, | |
316511c0 | 297 | unsigned int gpio_offset, unsigned int pin_offset, |
3f0f8670 | 298 | unsigned int npins) |
50309a9c LW |
299 | { |
300 | return 0; | |
301 | } | |
302 | ||
303 | static inline void | |
304 | gpiochip_remove_pin_ranges(struct gpio_chip *chip) | |
305 | { | |
306 | } | |
307 | ||
308 | #endif /* CONFIG_PINCTRL */ | |
309 | ||
4c20386c | 310 | #endif /* _ASM_GENERIC_GPIO_H */ |