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[deliverable/linux.git] / include / asm-generic / gpio.h
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1#ifndef _ASM_GENERIC_GPIO_H
2#define _ASM_GENERIC_GPIO_H
3
b3db4a8a 4#include <linux/kernel.h>
6ea0205b 5#include <linux/types.h>
25947d5a 6#include <linux/errno.h>
15c9a0ac 7#include <linux/of.h>
f23f1516 8#include <linux/pinctrl/pinctrl.h>
6ea0205b 9
7444a72e 10#ifdef CONFIG_GPIOLIB
d2876d08 11
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12#include <linux/compiler.h>
13
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14/* Platforms may implement their GPIO interface with library code,
15 * at a small performance cost for non-inlined operations and some
16 * extra memory (for code and for per-GPIO table entries).
17 *
18 * While the GPIO programming interface defines valid GPIO numbers
19 * to be in the range 0..MAX_INT, this library restricts them to the
6a9436d0 20 * smaller range 0..ARCH_NR_GPIOS-1.
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21 *
22 * ARCH_NR_GPIOS is somewhat arbitrary; it usually reflects the sum of
23 * builtin/SoC GPIOs plus a number of GPIOs on expanders; the latter is
24 * actually an estimate of a board-specific value.
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25 */
26
27#ifndef ARCH_NR_GPIOS
28#define ARCH_NR_GPIOS 256
29#endif
30
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31/*
32 * "valid" GPIO numbers are nonnegative and may be passed to
33 * setup routines like gpio_request(). only some valid numbers
34 * can successfully be requested and used.
35 *
36 * Invalid GPIO numbers are useful for indicating no-such-GPIO in
37 * platform data and other tables.
38 */
39
3474cb3c 40static inline bool gpio_is_valid(int number)
e6de1808 41{
3474cb3c 42 return number >= 0 && number < ARCH_NR_GPIOS;
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43}
44
1f018c8d 45struct device;
feb83699 46struct gpio;
d2876d08 47struct seq_file;
438d8908 48struct module;
a19e3da5 49struct device_node;
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50
51/**
52 * struct gpio_chip - abstract a GPIO controller
53 * @label: for diagnostics
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54 * @dev: optional device providing the GPIOs
55 * @owner: helps prevent removal of modules exporting active GPIOs
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56 * @request: optional hook for chip-specific activation, such as
57 * enabling module power and clock; may sleep
58 * @free: optional hook for chip-specific deactivation, such as
59 * disabling module power and clock; may sleep
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60 * @get_direction: returns direction for signal "offset", 0=out, 1=in,
61 * (same as GPIOF_DIR_XXX), or negative error
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62 * @direction_input: configures signal "offset" as input, or returns error
63 * @get: returns value for signal "offset"; for output signals this
64 * returns either the value actually sensed, or zero
65 * @direction_output: configures signal "offset" as output, or returns error
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66 * @set_debounce: optional hook for setting debounce time for specified gpio in
67 * interrupt triggered gpio chips
d2876d08 68 * @set: assigns output value for signal "offset"
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69 * @to_irq: optional hook supporting non-static gpio_to_irq() mappings;
70 * implementation may not sleep
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71 * @dbg_show: optional routine to show contents in debugfs; default code
72 * will be used when this is omitted, but custom code can show extra
73 * state (such as pullup/pulldown configuration).
74 * @base: identifies the first GPIO number handled by this chip; or, if
75 * negative during registration, requests dynamic ID allocation.
76 * @ngpio: the number of GPIOs handled by this controller; the last GPIO
77 * handled is (base + ngpio - 1).
78 * @can_sleep: flag must be set iff get()/set() methods sleep, as they
79 * must while accessing GPIO expander chips over I2C or SPI
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80 * @names: if set, must be an array of strings to use as alternative
81 * names for the GPIOs in this chip. Any entry in the array
82 * may be NULL if there is no alias for the GPIO, however the
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83 * array must be @ngpio entries long. A name can include a single printk
84 * format specifier for an unsigned int. It is substituted by the actual
85 * number of the gpio.
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86 *
87 * A gpio_chip can help platforms abstract various sources of GPIOs so
88 * they can all be accessed through a common programing interface.
89 * Example sources would be SOC controllers, FPGAs, multifunction
90 * chips, dedicated GPIO expanders, and so on.
91 *
92 * Each chip controls a number of signals, identified in method calls
93 * by "offset" values in the range 0..(@ngpio - 1). When those signals
94 * are referenced through calls like gpio_get_value(gpio), the offset
95 * is calculated by subtracting @base from the gpio number.
96 */
97struct gpio_chip {
4fd5463c 98 const char *label;
d8f388d8 99 struct device *dev;
438d8908 100 struct module *owner;
d2876d08 101
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102 int (*request)(struct gpio_chip *chip,
103 unsigned offset);
104 void (*free)(struct gpio_chip *chip,
105 unsigned offset);
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106 int (*get_direction)(struct gpio_chip *chip,
107 unsigned offset);
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108 int (*direction_input)(struct gpio_chip *chip,
109 unsigned offset);
110 int (*get)(struct gpio_chip *chip,
111 unsigned offset);
112 int (*direction_output)(struct gpio_chip *chip,
113 unsigned offset, int value);
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114 int (*set_debounce)(struct gpio_chip *chip,
115 unsigned offset, unsigned debounce);
116
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117 void (*set)(struct gpio_chip *chip,
118 unsigned offset, int value);
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119
120 int (*to_irq)(struct gpio_chip *chip,
121 unsigned offset);
122
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123 void (*dbg_show)(struct seq_file *s,
124 struct gpio_chip *chip);
125 int base;
126 u16 ngpio;
62154991 127 const char *const *names;
d2876d08 128 unsigned can_sleep:1;
d8f388d8 129 unsigned exported:1;
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130
131#if defined(CONFIG_OF_GPIO)
132 /*
133 * If CONFIG_OF is enabled, then all GPIO controllers described in the
134 * device tree automatically may have an OF translation
135 */
136 struct device_node *of_node;
137 int of_gpio_n_cells;
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138 int (*of_xlate)(struct gpio_chip *gc,
139 const struct of_phandle_args *gpiospec, u32 *flags);
a19e3da5 140#endif
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141#ifdef CONFIG_PINCTRL
142 /*
143 * If CONFIG_PINCTRL is enabled, then gpio controllers can optionally
144 * describe the actual pin range which they serve in an SoC. This
145 * information would be used by pinctrl subsystem to configure
146 * corresponding pins for gpio usage.
147 */
148 struct list_head pin_ranges;
149#endif
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150};
151
152extern const char *gpiochip_is_requested(struct gpio_chip *chip,
153 unsigned offset);
1a2d397a 154extern struct gpio_chip *gpio_to_chip(unsigned gpio);
6ea0205b 155extern int __must_check gpiochip_reserve(int start, int ngpio);
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156
157/* add/remove chips */
158extern int gpiochip_add(struct gpio_chip *chip);
159extern int __must_check gpiochip_remove(struct gpio_chip *chip);
07ce8ec7 160extern struct gpio_chip *gpiochip_find(void *data,
594fa265 161 int (*match)(struct gpio_chip *chip,
3d0f7cf0 162 void *data));
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163
164
165/* Always use the library code for GPIO management calls,
166 * or when sleeping may be involved.
167 */
d8a3515e 168extern int gpio_request(unsigned gpio, const char *label);
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169extern void gpio_free(unsigned gpio);
170
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171extern int gpio_direction_input(unsigned gpio);
172extern int gpio_direction_output(unsigned gpio, int value);
d2876d08 173
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174extern int gpio_set_debounce(unsigned gpio, unsigned debounce);
175
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176extern int gpio_get_value_cansleep(unsigned gpio);
177extern void gpio_set_value_cansleep(unsigned gpio, int value);
178
179
180/* A platform's <asm/gpio.h> code may want to inline the I/O calls when
181 * the GPIO is constant and refers to some always-present controller,
182 * giving direct access to chip registers and tight bitbanging loops.
183 */
184extern int __gpio_get_value(unsigned gpio);
185extern void __gpio_set_value(unsigned gpio, int value);
186
187extern int __gpio_cansleep(unsigned gpio);
188
0f6d504e 189extern int __gpio_to_irq(unsigned gpio);
d2876d08 190
d8a3515e 191extern int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
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192extern int gpio_request_array(const struct gpio *array, size_t num);
193extern void gpio_free_array(const struct gpio *array, size_t num);
3e45f1d1 194
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195/* bindings for managed devices that want to request gpios */
196int devm_gpio_request(struct device *dev, unsigned gpio, const char *label);
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197int devm_gpio_request_one(struct device *dev, unsigned gpio,
198 unsigned long flags, const char *label);
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199void devm_gpio_free(struct device *dev, unsigned int gpio);
200
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201#ifdef CONFIG_GPIO_SYSFS
202
203/*
204 * A sysfs interface can be exported by individual drivers if they want,
205 * but more typically is configured entirely from userspace.
206 */
207extern int gpio_export(unsigned gpio, bool direction_may_change);
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208extern int gpio_export_link(struct device *dev, const char *name,
209 unsigned gpio);
07697461 210extern int gpio_sysfs_set_active_low(unsigned gpio, int value);
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211extern void gpio_unexport(unsigned gpio);
212
213#endif /* CONFIG_GPIO_SYSFS */
214
09cd9527 215#else /* !CONFIG_GPIOLIB */
d2876d08 216
3474cb3c 217static inline bool gpio_is_valid(int number)
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218{
219 /* only non-negative numbers are valid */
220 return number >= 0;
221}
222
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223/* platforms that don't directly support access to GPIOs through I2C, SPI,
224 * or other blocking infrastructure can use these wrappers.
225 */
226
227static inline int gpio_cansleep(unsigned gpio)
228{
229 return 0;
230}
231
232static inline int gpio_get_value_cansleep(unsigned gpio)
233{
234 might_sleep();
eb9ae7f2 235 return __gpio_get_value(gpio);
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236}
237
238static inline void gpio_set_value_cansleep(unsigned gpio, int value)
239{
240 might_sleep();
eb9ae7f2 241 __gpio_set_value(gpio, value);
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242}
243
09cd9527 244#endif /* !CONFIG_GPIOLIB */
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245
246#ifndef CONFIG_GPIO_SYSFS
247
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248struct device;
249
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250/* sysfs support is only available with gpiolib, where it's optional */
251
252static inline int gpio_export(unsigned gpio, bool direction_may_change)
253{
254 return -ENOSYS;
255}
256
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257static inline int gpio_export_link(struct device *dev, const char *name,
258 unsigned gpio)
259{
260 return -ENOSYS;
261}
262
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263static inline int gpio_sysfs_set_active_low(unsigned gpio, int value)
264{
265 return -ENOSYS;
266}
267
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268static inline void gpio_unexport(unsigned gpio)
269{
270}
271#endif /* CONFIG_GPIO_SYSFS */
d2876d08 272
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273#ifdef CONFIG_PINCTRL
274
275/**
276 * struct gpio_pin_range - pin range controlled by a gpio chip
277 * @head: list for maintaining set of pin ranges, used internally
278 * @pctldev: pinctrl device which handles corresponding pins
279 * @range: actual range of pins controlled by a gpio controller
280 */
281
282struct gpio_pin_range {
283 struct list_head node;
284 struct pinctrl_dev *pctldev;
285 struct pinctrl_gpio_range range;
286};
287
288int gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 289 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 290 unsigned int npins);
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291void gpiochip_remove_pin_ranges(struct gpio_chip *chip);
292
293#else
294
295static inline int
296gpiochip_add_pin_range(struct gpio_chip *chip, const char *pinctl_name,
316511c0 297 unsigned int gpio_offset, unsigned int pin_offset,
3f0f8670 298 unsigned int npins)
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299{
300 return 0;
301}
302
303static inline void
304gpiochip_remove_pin_ranges(struct gpio_chip *chip)
305{
306}
307
308#endif /* CONFIG_PINCTRL */
309
4c20386c 310#endif /* _ASM_GENERIC_GPIO_H */
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