Commit | Line | Data |
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1da177e4 LT |
1 | #ifndef _ASM_GENERIC_PGTABLE_H |
2 | #define _ASM_GENERIC_PGTABLE_H | |
3 | ||
673eae82 | 4 | #ifndef __ASSEMBLY__ |
9535239f | 5 | #ifdef CONFIG_MMU |
673eae82 | 6 | |
fbd71844 | 7 | #include <linux/mm_types.h> |
187f1882 | 8 | #include <linux/bug.h> |
fbd71844 | 9 | |
6ee8630e HD |
10 | /* |
11 | * On almost all architectures and configurations, 0 can be used as the | |
12 | * upper ceiling to free_pgtables(): on many architectures it has the same | |
13 | * effect as using TASK_SIZE. However, there is one configuration which | |
14 | * must impose a more careful limit, to avoid freeing kernel pgtables. | |
15 | */ | |
16 | #ifndef USER_PGTABLES_CEILING | |
17 | #define USER_PGTABLES_CEILING 0UL | |
18 | #endif | |
19 | ||
1da177e4 | 20 | #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS |
e2cda322 AA |
21 | extern int ptep_set_access_flags(struct vm_area_struct *vma, |
22 | unsigned long address, pte_t *ptep, | |
23 | pte_t entry, int dirty); | |
24 | #endif | |
25 | ||
26 | #ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS | |
27 | extern int pmdp_set_access_flags(struct vm_area_struct *vma, | |
28 | unsigned long address, pmd_t *pmdp, | |
29 | pmd_t entry, int dirty); | |
1da177e4 LT |
30 | #endif |
31 | ||
32 | #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG | |
e2cda322 AA |
33 | static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, |
34 | unsigned long address, | |
35 | pte_t *ptep) | |
36 | { | |
37 | pte_t pte = *ptep; | |
38 | int r = 1; | |
39 | if (!pte_young(pte)) | |
40 | r = 0; | |
41 | else | |
42 | set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte)); | |
43 | return r; | |
44 | } | |
45 | #endif | |
46 | ||
47 | #ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG | |
48 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
49 | static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
50 | unsigned long address, | |
51 | pmd_t *pmdp) | |
52 | { | |
53 | pmd_t pmd = *pmdp; | |
54 | int r = 1; | |
55 | if (!pmd_young(pmd)) | |
56 | r = 0; | |
57 | else | |
58 | set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd)); | |
59 | return r; | |
60 | } | |
61 | #else /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
62 | static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma, | |
63 | unsigned long address, | |
64 | pmd_t *pmdp) | |
65 | { | |
66 | BUG(); | |
67 | return 0; | |
68 | } | |
69 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
1da177e4 LT |
70 | #endif |
71 | ||
72 | #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH | |
e2cda322 AA |
73 | int ptep_clear_flush_young(struct vm_area_struct *vma, |
74 | unsigned long address, pte_t *ptep); | |
75 | #endif | |
76 | ||
77 | #ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH | |
78 | int pmdp_clear_flush_young(struct vm_area_struct *vma, | |
79 | unsigned long address, pmd_t *pmdp); | |
1da177e4 LT |
80 | #endif |
81 | ||
1da177e4 | 82 | #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR |
e2cda322 AA |
83 | static inline pte_t ptep_get_and_clear(struct mm_struct *mm, |
84 | unsigned long address, | |
85 | pte_t *ptep) | |
86 | { | |
87 | pte_t pte = *ptep; | |
88 | pte_clear(mm, address, ptep); | |
89 | return pte; | |
90 | } | |
91 | #endif | |
92 | ||
93 | #ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR | |
94 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
95 | static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm, | |
96 | unsigned long address, | |
97 | pmd_t *pmdp) | |
98 | { | |
99 | pmd_t pmd = *pmdp; | |
2d28a227 | 100 | pmd_clear(pmdp); |
e2cda322 | 101 | return pmd; |
49b24d6b | 102 | } |
e2cda322 | 103 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
1da177e4 LT |
104 | #endif |
105 | ||
a600388d | 106 | #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL |
e2cda322 AA |
107 | static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm, |
108 | unsigned long address, pte_t *ptep, | |
109 | int full) | |
110 | { | |
111 | pte_t pte; | |
112 | pte = ptep_get_and_clear(mm, address, ptep); | |
113 | return pte; | |
114 | } | |
a600388d ZA |
115 | #endif |
116 | ||
9888a1ca ZA |
117 | /* |
118 | * Some architectures may be able to avoid expensive synchronization | |
119 | * primitives when modifications are made to PTE's which are already | |
120 | * not present, or in the process of an address space destruction. | |
121 | */ | |
122 | #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL | |
e2cda322 AA |
123 | static inline void pte_clear_not_present_full(struct mm_struct *mm, |
124 | unsigned long address, | |
125 | pte_t *ptep, | |
126 | int full) | |
127 | { | |
128 | pte_clear(mm, address, ptep); | |
129 | } | |
a600388d ZA |
130 | #endif |
131 | ||
1da177e4 | 132 | #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH |
e2cda322 AA |
133 | extern pte_t ptep_clear_flush(struct vm_area_struct *vma, |
134 | unsigned long address, | |
135 | pte_t *ptep); | |
136 | #endif | |
137 | ||
138 | #ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH | |
139 | extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma, | |
140 | unsigned long address, | |
141 | pmd_t *pmdp); | |
1da177e4 LT |
142 | #endif |
143 | ||
144 | #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT | |
8c65b4a6 | 145 | struct mm_struct; |
1da177e4 LT |
146 | static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) |
147 | { | |
148 | pte_t old_pte = *ptep; | |
149 | set_pte_at(mm, address, ptep, pte_wrprotect(old_pte)); | |
150 | } | |
151 | #endif | |
152 | ||
e2cda322 AA |
153 | #ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT |
154 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
155 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
156 | unsigned long address, pmd_t *pmdp) | |
157 | { | |
158 | pmd_t old_pmd = *pmdp; | |
159 | set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd)); | |
160 | } | |
161 | #else /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
162 | static inline void pmdp_set_wrprotect(struct mm_struct *mm, | |
163 | unsigned long address, pmd_t *pmdp) | |
164 | { | |
165 | BUG(); | |
166 | } | |
167 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
168 | #endif | |
169 | ||
170 | #ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH | |
73636b1a CM |
171 | extern void pmdp_splitting_flush(struct vm_area_struct *vma, |
172 | unsigned long address, pmd_t *pmdp); | |
e2cda322 AA |
173 | #endif |
174 | ||
e3ebcf64 | 175 | #ifndef __HAVE_ARCH_PGTABLE_DEPOSIT |
6b0b50b0 AK |
176 | extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp, |
177 | pgtable_t pgtable); | |
e3ebcf64 GS |
178 | #endif |
179 | ||
180 | #ifndef __HAVE_ARCH_PGTABLE_WITHDRAW | |
6b0b50b0 | 181 | extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp); |
e3ebcf64 GS |
182 | #endif |
183 | ||
46dcde73 GS |
184 | #ifndef __HAVE_ARCH_PMDP_INVALIDATE |
185 | extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address, | |
186 | pmd_t *pmdp); | |
187 | #endif | |
188 | ||
1da177e4 | 189 | #ifndef __HAVE_ARCH_PTE_SAME |
e2cda322 AA |
190 | static inline int pte_same(pte_t pte_a, pte_t pte_b) |
191 | { | |
192 | return pte_val(pte_a) == pte_val(pte_b); | |
193 | } | |
194 | #endif | |
195 | ||
196 | #ifndef __HAVE_ARCH_PMD_SAME | |
197 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
198 | static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) | |
199 | { | |
200 | return pmd_val(pmd_a) == pmd_val(pmd_b); | |
201 | } | |
202 | #else /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
203 | static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b) | |
204 | { | |
205 | BUG(); | |
206 | return 0; | |
207 | } | |
208 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ | |
1da177e4 LT |
209 | #endif |
210 | ||
1da177e4 | 211 | #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG |
2d42552d | 212 | #define page_test_and_clear_young(pfn) (0) |
1da177e4 LT |
213 | #endif |
214 | ||
215 | #ifndef __HAVE_ARCH_PGD_OFFSET_GATE | |
216 | #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr) | |
217 | #endif | |
218 | ||
0b0968a3 | 219 | #ifndef __HAVE_ARCH_MOVE_PTE |
8b1f3124 | 220 | #define move_pte(pte, prot, old_addr, new_addr) (pte) |
8b1f3124 NP |
221 | #endif |
222 | ||
2c3cf556 RR |
223 | #ifndef pte_accessible |
224 | # define pte_accessible(pte) ((void)(pte),1) | |
225 | #endif | |
226 | ||
61c77326 SL |
227 | #ifndef flush_tlb_fix_spurious_fault |
228 | #define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address) | |
229 | #endif | |
230 | ||
0634a632 PM |
231 | #ifndef pgprot_noncached |
232 | #define pgprot_noncached(prot) (prot) | |
233 | #endif | |
234 | ||
2520bd31 | 235 | #ifndef pgprot_writecombine |
236 | #define pgprot_writecombine pgprot_noncached | |
237 | #endif | |
238 | ||
1da177e4 | 239 | /* |
8f6c99c1 HD |
240 | * When walking page tables, get the address of the next boundary, |
241 | * or the end address of the range if that comes earlier. Although no | |
242 | * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout. | |
1da177e4 LT |
243 | */ |
244 | ||
1da177e4 LT |
245 | #define pgd_addr_end(addr, end) \ |
246 | ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \ | |
247 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
248 | }) | |
1da177e4 LT |
249 | |
250 | #ifndef pud_addr_end | |
251 | #define pud_addr_end(addr, end) \ | |
252 | ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \ | |
253 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
254 | }) | |
255 | #endif | |
256 | ||
257 | #ifndef pmd_addr_end | |
258 | #define pmd_addr_end(addr, end) \ | |
259 | ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \ | |
260 | (__boundary - 1 < (end) - 1)? __boundary: (end); \ | |
261 | }) | |
262 | #endif | |
263 | ||
1da177e4 LT |
264 | /* |
265 | * When walking page tables, we usually want to skip any p?d_none entries; | |
266 | * and any p?d_bad entries - reporting the error before resetting to none. | |
267 | * Do the tests inline, but report and clear the bad entry in mm/memory.c. | |
268 | */ | |
269 | void pgd_clear_bad(pgd_t *); | |
270 | void pud_clear_bad(pud_t *); | |
271 | void pmd_clear_bad(pmd_t *); | |
272 | ||
273 | static inline int pgd_none_or_clear_bad(pgd_t *pgd) | |
274 | { | |
275 | if (pgd_none(*pgd)) | |
276 | return 1; | |
277 | if (unlikely(pgd_bad(*pgd))) { | |
278 | pgd_clear_bad(pgd); | |
279 | return 1; | |
280 | } | |
281 | return 0; | |
282 | } | |
283 | ||
284 | static inline int pud_none_or_clear_bad(pud_t *pud) | |
285 | { | |
286 | if (pud_none(*pud)) | |
287 | return 1; | |
288 | if (unlikely(pud_bad(*pud))) { | |
289 | pud_clear_bad(pud); | |
290 | return 1; | |
291 | } | |
292 | return 0; | |
293 | } | |
294 | ||
295 | static inline int pmd_none_or_clear_bad(pmd_t *pmd) | |
296 | { | |
297 | if (pmd_none(*pmd)) | |
298 | return 1; | |
299 | if (unlikely(pmd_bad(*pmd))) { | |
300 | pmd_clear_bad(pmd); | |
301 | return 1; | |
302 | } | |
303 | return 0; | |
304 | } | |
9535239f | 305 | |
1ea0704e JF |
306 | static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm, |
307 | unsigned long addr, | |
308 | pte_t *ptep) | |
309 | { | |
310 | /* | |
311 | * Get the current pte state, but zero it out to make it | |
312 | * non-present, preventing the hardware from asynchronously | |
313 | * updating it. | |
314 | */ | |
315 | return ptep_get_and_clear(mm, addr, ptep); | |
316 | } | |
317 | ||
318 | static inline void __ptep_modify_prot_commit(struct mm_struct *mm, | |
319 | unsigned long addr, | |
320 | pte_t *ptep, pte_t pte) | |
321 | { | |
322 | /* | |
323 | * The pte is non-present, so there's no hardware state to | |
324 | * preserve. | |
325 | */ | |
326 | set_pte_at(mm, addr, ptep, pte); | |
327 | } | |
328 | ||
329 | #ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION | |
330 | /* | |
331 | * Start a pte protection read-modify-write transaction, which | |
332 | * protects against asynchronous hardware modifications to the pte. | |
333 | * The intention is not to prevent the hardware from making pte | |
334 | * updates, but to prevent any updates it may make from being lost. | |
335 | * | |
336 | * This does not protect against other software modifications of the | |
337 | * pte; the appropriate pte lock must be held over the transation. | |
338 | * | |
339 | * Note that this interface is intended to be batchable, meaning that | |
340 | * ptep_modify_prot_commit may not actually update the pte, but merely | |
341 | * queue the update to be done at some later time. The update must be | |
342 | * actually committed before the pte lock is released, however. | |
343 | */ | |
344 | static inline pte_t ptep_modify_prot_start(struct mm_struct *mm, | |
345 | unsigned long addr, | |
346 | pte_t *ptep) | |
347 | { | |
348 | return __ptep_modify_prot_start(mm, addr, ptep); | |
349 | } | |
350 | ||
351 | /* | |
352 | * Commit an update to a pte, leaving any hardware-controlled bits in | |
353 | * the PTE unmodified. | |
354 | */ | |
355 | static inline void ptep_modify_prot_commit(struct mm_struct *mm, | |
356 | unsigned long addr, | |
357 | pte_t *ptep, pte_t pte) | |
358 | { | |
359 | __ptep_modify_prot_commit(mm, addr, ptep, pte); | |
360 | } | |
361 | #endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */ | |
fe1a6875 | 362 | #endif /* CONFIG_MMU */ |
1ea0704e | 363 | |
9535239f GU |
364 | /* |
365 | * A facility to provide lazy MMU batching. This allows PTE updates and | |
366 | * page invalidations to be delayed until a call to leave lazy MMU mode | |
367 | * is issued. Some architectures may benefit from doing this, and it is | |
368 | * beneficial for both shadow and direct mode hypervisors, which may batch | |
369 | * the PTE updates which happen during this window. Note that using this | |
370 | * interface requires that read hazards be removed from the code. A read | |
371 | * hazard could result in the direct mode hypervisor case, since the actual | |
372 | * write to the page tables may not yet have taken place, so reads though | |
373 | * a raw PTE pointer after it has been modified are not guaranteed to be | |
374 | * up to date. This mode can only be entered and left under the protection of | |
375 | * the page table locks for all page tables which may be modified. In the UP | |
376 | * case, this is required so that preemption is disabled, and in the SMP case, | |
377 | * it must synchronize the delayed page table writes properly on other CPUs. | |
378 | */ | |
379 | #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE | |
380 | #define arch_enter_lazy_mmu_mode() do {} while (0) | |
381 | #define arch_leave_lazy_mmu_mode() do {} while (0) | |
382 | #define arch_flush_lazy_mmu_mode() do {} while (0) | |
383 | #endif | |
384 | ||
385 | /* | |
7fd7d83d JF |
386 | * A facility to provide batching of the reload of page tables and |
387 | * other process state with the actual context switch code for | |
388 | * paravirtualized guests. By convention, only one of the batched | |
389 | * update (lazy) modes (CPU, MMU) should be active at any given time, | |
390 | * entry should never be nested, and entry and exits should always be | |
391 | * paired. This is for sanity of maintaining and reasoning about the | |
392 | * kernel code. In this case, the exit (end of the context switch) is | |
393 | * in architecture-specific code, and so doesn't need a generic | |
394 | * definition. | |
9535239f | 395 | */ |
7fd7d83d | 396 | #ifndef __HAVE_ARCH_START_CONTEXT_SWITCH |
224101ed | 397 | #define arch_start_context_switch(prev) do {} while (0) |
9535239f GU |
398 | #endif |
399 | ||
34801ba9 | 400 | #ifndef __HAVE_PFNMAP_TRACKING |
401 | /* | |
5180da41 SS |
402 | * Interfaces that can be used by architecture code to keep track of |
403 | * memory type of pfn mappings specified by the remap_pfn_range, | |
404 | * vm_insert_pfn. | |
405 | */ | |
406 | ||
407 | /* | |
408 | * track_pfn_remap is called when a _new_ pfn mapping is being established | |
409 | * by remap_pfn_range() for physical range indicated by pfn and size. | |
34801ba9 | 410 | */ |
5180da41 | 411 | static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 KK |
412 | unsigned long pfn, unsigned long addr, |
413 | unsigned long size) | |
34801ba9 | 414 | { |
415 | return 0; | |
416 | } | |
417 | ||
418 | /* | |
5180da41 SS |
419 | * track_pfn_insert is called when a _new_ single pfn is established |
420 | * by vm_insert_pfn(). | |
421 | */ | |
422 | static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, | |
423 | unsigned long pfn) | |
424 | { | |
425 | return 0; | |
426 | } | |
427 | ||
428 | /* | |
429 | * track_pfn_copy is called when vma that is covering the pfnmap gets | |
34801ba9 | 430 | * copied through copy_page_range(). |
431 | */ | |
5180da41 | 432 | static inline int track_pfn_copy(struct vm_area_struct *vma) |
34801ba9 | 433 | { |
434 | return 0; | |
435 | } | |
436 | ||
437 | /* | |
34801ba9 | 438 | * untrack_pfn_vma is called while unmapping a pfnmap for a region. |
439 | * untrack can be called for a specific region indicated by pfn and size or | |
5180da41 | 440 | * can be for the entire vma (in which case pfn, size are zero). |
34801ba9 | 441 | */ |
5180da41 SS |
442 | static inline void untrack_pfn(struct vm_area_struct *vma, |
443 | unsigned long pfn, unsigned long size) | |
34801ba9 | 444 | { |
445 | } | |
446 | #else | |
5180da41 | 447 | extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot, |
b3b9c293 KK |
448 | unsigned long pfn, unsigned long addr, |
449 | unsigned long size); | |
5180da41 SS |
450 | extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot, |
451 | unsigned long pfn); | |
452 | extern int track_pfn_copy(struct vm_area_struct *vma); | |
453 | extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn, | |
454 | unsigned long size); | |
34801ba9 | 455 | #endif |
456 | ||
816422ad KS |
457 | #ifdef __HAVE_COLOR_ZERO_PAGE |
458 | static inline int is_zero_pfn(unsigned long pfn) | |
459 | { | |
460 | extern unsigned long zero_pfn; | |
461 | unsigned long offset_from_zero_pfn = pfn - zero_pfn; | |
462 | return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT); | |
463 | } | |
464 | ||
2f91ec8c KS |
465 | #define my_zero_pfn(addr) page_to_pfn(ZERO_PAGE(addr)) |
466 | ||
816422ad KS |
467 | #else |
468 | static inline int is_zero_pfn(unsigned long pfn) | |
469 | { | |
470 | extern unsigned long zero_pfn; | |
471 | return pfn == zero_pfn; | |
472 | } | |
473 | ||
474 | static inline unsigned long my_zero_pfn(unsigned long addr) | |
475 | { | |
476 | extern unsigned long zero_pfn; | |
477 | return zero_pfn; | |
478 | } | |
479 | #endif | |
480 | ||
1a5a9906 AA |
481 | #ifdef CONFIG_MMU |
482 | ||
5f6e8da7 AA |
483 | #ifndef CONFIG_TRANSPARENT_HUGEPAGE |
484 | static inline int pmd_trans_huge(pmd_t pmd) | |
485 | { | |
486 | return 0; | |
487 | } | |
488 | static inline int pmd_trans_splitting(pmd_t pmd) | |
489 | { | |
490 | return 0; | |
491 | } | |
e2cda322 AA |
492 | #ifndef __HAVE_ARCH_PMD_WRITE |
493 | static inline int pmd_write(pmd_t pmd) | |
494 | { | |
495 | BUG(); | |
496 | return 0; | |
497 | } | |
498 | #endif /* __HAVE_ARCH_PMD_WRITE */ | |
1a5a9906 AA |
499 | #endif /* CONFIG_TRANSPARENT_HUGEPAGE */ |
500 | ||
26c19178 AA |
501 | #ifndef pmd_read_atomic |
502 | static inline pmd_t pmd_read_atomic(pmd_t *pmdp) | |
503 | { | |
504 | /* | |
505 | * Depend on compiler for an atomic pmd read. NOTE: this is | |
506 | * only going to work, if the pmdval_t isn't larger than | |
507 | * an unsigned long. | |
508 | */ | |
509 | return *pmdp; | |
510 | } | |
511 | #endif | |
512 | ||
1a5a9906 AA |
513 | /* |
514 | * This function is meant to be used by sites walking pagetables with | |
515 | * the mmap_sem hold in read mode to protect against MADV_DONTNEED and | |
516 | * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd | |
517 | * into a null pmd and the transhuge page fault can convert a null pmd | |
518 | * into an hugepmd or into a regular pmd (if the hugepage allocation | |
519 | * fails). While holding the mmap_sem in read mode the pmd becomes | |
520 | * stable and stops changing under us only if it's not null and not a | |
521 | * transhuge pmd. When those races occurs and this function makes a | |
522 | * difference vs the standard pmd_none_or_clear_bad, the result is | |
523 | * undefined so behaving like if the pmd was none is safe (because it | |
524 | * can return none anyway). The compiler level barrier() is critically | |
525 | * important to compute the two checks atomically on the same pmdval. | |
26c19178 AA |
526 | * |
527 | * For 32bit kernels with a 64bit large pmd_t this automatically takes | |
528 | * care of reading the pmd atomically to avoid SMP race conditions | |
529 | * against pmd_populate() when the mmap_sem is hold for reading by the | |
530 | * caller (a special atomic read not done by "gcc" as in the generic | |
531 | * version above, is also needed when THP is disabled because the page | |
532 | * fault can populate the pmd from under us). | |
1a5a9906 AA |
533 | */ |
534 | static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd) | |
535 | { | |
26c19178 | 536 | pmd_t pmdval = pmd_read_atomic(pmd); |
1a5a9906 AA |
537 | /* |
538 | * The barrier will stabilize the pmdval in a register or on | |
539 | * the stack so that it will stop changing under the code. | |
e4eed03f AA |
540 | * |
541 | * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE, | |
542 | * pmd_read_atomic is allowed to return a not atomic pmdval | |
543 | * (for example pointing to an hugepage that has never been | |
544 | * mapped in the pmd). The below checks will only care about | |
545 | * the low part of the pmd with 32bit PAE x86 anyway, with the | |
546 | * exception of pmd_none(). So the important thing is that if | |
547 | * the low part of the pmd is found null, the high part will | |
548 | * be also null or the pmd_none() check below would be | |
549 | * confused. | |
1a5a9906 AA |
550 | */ |
551 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
552 | barrier(); | |
553 | #endif | |
554 | if (pmd_none(pmdval)) | |
555 | return 1; | |
556 | if (unlikely(pmd_bad(pmdval))) { | |
557 | if (!pmd_trans_huge(pmdval)) | |
558 | pmd_clear_bad(pmd); | |
559 | return 1; | |
560 | } | |
561 | return 0; | |
562 | } | |
563 | ||
564 | /* | |
565 | * This is a noop if Transparent Hugepage Support is not built into | |
566 | * the kernel. Otherwise it is equivalent to | |
567 | * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in | |
568 | * places that already verified the pmd is not none and they want to | |
569 | * walk ptes while holding the mmap sem in read mode (write mode don't | |
570 | * need this). If THP is not enabled, the pmd can't go away under the | |
571 | * code even if MADV_DONTNEED runs, but if THP is enabled we need to | |
572 | * run a pmd_trans_unstable before walking the ptes after | |
573 | * split_huge_page_pmd returns (because it may have run when the pmd | |
574 | * become null, but then a page fault can map in a THP and not a | |
575 | * regular page). | |
576 | */ | |
577 | static inline int pmd_trans_unstable(pmd_t *pmd) | |
578 | { | |
579 | #ifdef CONFIG_TRANSPARENT_HUGEPAGE | |
580 | return pmd_none_or_trans_huge_or_clear_bad(pmd); | |
581 | #else | |
582 | return 0; | |
5f6e8da7 | 583 | #endif |
1a5a9906 AA |
584 | } |
585 | ||
be3a7284 AA |
586 | #ifdef CONFIG_NUMA_BALANCING |
587 | #ifdef CONFIG_ARCH_USES_NUMA_PROT_NONE | |
588 | /* | |
589 | * _PAGE_NUMA works identical to _PAGE_PROTNONE (it's actually the | |
590 | * same bit too). It's set only when _PAGE_PRESET is not set and it's | |
591 | * never set if _PAGE_PRESENT is set. | |
592 | * | |
593 | * pte/pmd_present() returns true if pte/pmd_numa returns true. Page | |
594 | * fault triggers on those regions if pte/pmd_numa returns true | |
595 | * (because _PAGE_PRESENT is not set). | |
596 | */ | |
597 | #ifndef pte_numa | |
598 | static inline int pte_numa(pte_t pte) | |
599 | { | |
600 | return (pte_flags(pte) & | |
601 | (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA; | |
602 | } | |
603 | #endif | |
604 | ||
605 | #ifndef pmd_numa | |
606 | static inline int pmd_numa(pmd_t pmd) | |
607 | { | |
608 | return (pmd_flags(pmd) & | |
609 | (_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA; | |
610 | } | |
611 | #endif | |
612 | ||
613 | /* | |
614 | * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically | |
615 | * because they're called by the NUMA hinting minor page fault. If we | |
616 | * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler | |
617 | * would be forced to set it later while filling the TLB after we | |
618 | * return to userland. That would trigger a second write to memory | |
619 | * that we optimize away by setting _PAGE_ACCESSED here. | |
620 | */ | |
621 | #ifndef pte_mknonnuma | |
622 | static inline pte_t pte_mknonnuma(pte_t pte) | |
623 | { | |
624 | pte = pte_clear_flags(pte, _PAGE_NUMA); | |
625 | return pte_set_flags(pte, _PAGE_PRESENT|_PAGE_ACCESSED); | |
626 | } | |
627 | #endif | |
628 | ||
629 | #ifndef pmd_mknonnuma | |
630 | static inline pmd_t pmd_mknonnuma(pmd_t pmd) | |
631 | { | |
632 | pmd = pmd_clear_flags(pmd, _PAGE_NUMA); | |
633 | return pmd_set_flags(pmd, _PAGE_PRESENT|_PAGE_ACCESSED); | |
634 | } | |
635 | #endif | |
636 | ||
637 | #ifndef pte_mknuma | |
638 | static inline pte_t pte_mknuma(pte_t pte) | |
639 | { | |
640 | pte = pte_set_flags(pte, _PAGE_NUMA); | |
641 | return pte_clear_flags(pte, _PAGE_PRESENT); | |
642 | } | |
643 | #endif | |
644 | ||
645 | #ifndef pmd_mknuma | |
646 | static inline pmd_t pmd_mknuma(pmd_t pmd) | |
647 | { | |
648 | pmd = pmd_set_flags(pmd, _PAGE_NUMA); | |
649 | return pmd_clear_flags(pmd, _PAGE_PRESENT); | |
650 | } | |
651 | #endif | |
652 | #else | |
653 | extern int pte_numa(pte_t pte); | |
654 | extern int pmd_numa(pmd_t pmd); | |
655 | extern pte_t pte_mknonnuma(pte_t pte); | |
656 | extern pmd_t pmd_mknonnuma(pmd_t pmd); | |
657 | extern pte_t pte_mknuma(pte_t pte); | |
658 | extern pmd_t pmd_mknuma(pmd_t pmd); | |
659 | #endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */ | |
660 | #else | |
661 | static inline int pmd_numa(pmd_t pmd) | |
662 | { | |
663 | return 0; | |
664 | } | |
665 | ||
666 | static inline int pte_numa(pte_t pte) | |
667 | { | |
668 | return 0; | |
669 | } | |
670 | ||
671 | static inline pte_t pte_mknonnuma(pte_t pte) | |
672 | { | |
673 | return pte; | |
674 | } | |
675 | ||
676 | static inline pmd_t pmd_mknonnuma(pmd_t pmd) | |
677 | { | |
678 | return pmd; | |
679 | } | |
680 | ||
681 | static inline pte_t pte_mknuma(pte_t pte) | |
682 | { | |
683 | return pte; | |
684 | } | |
685 | ||
686 | static inline pmd_t pmd_mknuma(pmd_t pmd) | |
687 | { | |
688 | return pmd; | |
689 | } | |
690 | #endif /* CONFIG_NUMA_BALANCING */ | |
691 | ||
1a5a9906 | 692 | #endif /* CONFIG_MMU */ |
5f6e8da7 | 693 | |
1da177e4 LT |
694 | #endif /* !__ASSEMBLY__ */ |
695 | ||
696 | #endif /* _ASM_GENERIC_PGTABLE_H */ |