[deliverable/linux.git] / include / asm-i386 / io.h

#ifndef _ASM_IO_H
#define _ASM_IO_H

#include <linux/string.h>
#include <linux/compiler.h>

/*
 * This file contains the definitions for the x86 IO instructions
 * inb/inw/inl/outb/outw/outl and the "string versions" of the same
 * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
 * versions of the single-IO instructions (inb_p/inw_p/..).
 *
 * This file is not meant to be obfuscating: it's just complicated
 * to (a) handle it all in a way that makes gcc able to optimize it
 * as well as possible and (b) trying to avoid writing the same thing
 * over and over again with slight variations and possibly making a
 * mistake somewhere.
 */

/*
 * Thanks to James van Artsdalen for a better timing-fix than
 * the two short jumps: using outb's to a nonexistent port seems
 * to guarantee better timings even on fast machines.
 *
 * On the other hand, I'd like to be sure of a non-existent port:
 * I feel a bit unsafe about using 0x80 (should be safe, though)
 *
 *		Linus
 */

 /*
  *  Bit simplified and optimized by Jan Hubicka
  *  Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  *
  *  isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  *  isa_read[wl] and isa_write[wl] fixed
  *  - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  */

#define IO_SPACE_LIMIT 0xffff

#define XQUAD_PORTIO_BASE 0xfe400000
#define XQUAD_PORTIO_QUAD 0x40000  /* 256k per quad. */

#ifdef __KERNEL__

#include <asm-generic/iomap.h>

#include <linux/vmalloc.h>

/*
 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
 * access
 */
#define xlate_dev_mem_ptr(p)	__va(p)

/*
 * Convert a virtual cached pointer to an uncached pointer
 */
#define xlate_dev_kmem_ptr(p)	p

/**
 *	virt_to_phys	-	map virtual addresses to physical
 *	@address: address to remap
 *
 *	The returned physical address is the physical (CPU) mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses directly mapped or allocated via kmalloc. 
 *
 *	This function does not give bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */
 
static inline unsigned long virt_to_phys(volatile void * address)
{
	return __pa(address);
}

/**
 *	phys_to_virt	-	map physical address to virtual
 *	@address: address to remap
 *
 *	The returned virtual address is a current CPU mapping for
 *	the memory address given. It is only valid to use this function on
 *	addresses that have a kernel mapping
 *
 *	This function does not handle bus mappings for DMA transfers. In
 *	almost all conceivable cases a device driver should not be using
 *	this function
 */

static inline void * phys_to_virt(unsigned long address)
{
	return __va(address);
}

/*
 * Change "struct page" to physical address.
 */
#define page_to_phys(page)    ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)

extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);

/**
 * ioremap     -   map bus memory into CPU space
 * @offset:    bus address of the memory
 * @size:      size of the resource to map
 *
 * ioremap performs a platform specific sequence of operations to
 * make bus memory CPU accessible via the readb/readw/readl/writeb/
 * writew/writel functions and the other mmio helpers. The returned
 * address is not guaranteed to be usable directly as a virtual
 * address. 
 *
 * If the area you are trying to map is a PCI BAR you should have a
 * look at pci_iomap().
 */

static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
{
	return __ioremap(offset, size, 0);
}

extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
extern void iounmap(volatile void __iomem *addr);

/*
 * bt_ioremap() and bt_iounmap() are for temporary early boot-time
 * mappings, before the real ioremap() is functional.
 * A boot-time mapping is currently limited to at most 16 pages.
 */
extern void *bt_ioremap(unsigned long offset, unsigned long size);
extern void bt_iounmap(void *addr, unsigned long size);
extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);

/* Use early IO mappings for DMI because it's initialized early */
#define dmi_ioremap bt_ioremap
#define dmi_iounmap bt_iounmap
#define dmi_alloc alloc_bootmem

/*
 * ISA I/O bus memory addresses are 1:1 with the physical address.
 */
#define isa_virt_to_bus virt_to_phys
#define isa_page_to_bus page_to_phys
#define isa_bus_to_virt phys_to_virt

/*
 * However PCI ones are not necessarily 1:1 and therefore these interfaces
 * are forbidden in portable PCI drivers.
 *
 * Allow them on x86 for legacy drivers, though.
 */
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt

/*
 * readX/writeX() are used to access memory mapped devices. On some
 * architectures the memory mapped IO stuff needs to be accessed
 * differently. On the x86 architecture, we just read/write the
 * memory location directly.
 */

static inline unsigned char readb(const volatile void __iomem *addr)
{
	return *(volatile unsigned char __force *) addr;
}
static inline unsigned short readw(const volatile void __iomem *addr)
{
	return *(volatile unsigned short __force *) addr;
}
static inline unsigned int readl(const volatile void __iomem *addr)
{
	return *(volatile unsigned int __force *) addr;
}
#define readb_relaxed(addr) readb(addr)
#define readw_relaxed(addr) readw(addr)
#define readl_relaxed(addr) readl(addr)
#define __raw_readb readb
#define __raw_readw readw
#define __raw_readl readl

static inline void writeb(unsigned char b, volatile void __iomem *addr)
{
	*(volatile unsigned char __force *) addr = b;
}
static inline void writew(unsigned short b, volatile void __iomem *addr)
{
	*(volatile unsigned short __force *) addr = b;
}
static inline void writel(unsigned int b, volatile void __iomem *addr)
{
	*(volatile unsigned int __force *) addr = b;
}
#define __raw_writeb writeb
#define __raw_writew writew
#define __raw_writel writel

#define mmiowb()

static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
{
	memset((void __force *) addr, val, count);
}
static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
{
	__memcpy(dst, (void __force *) src, count);
}
static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
{
	__memcpy((void __force *) dst, src, count);
}

/*
 * ISA space is 'always mapped' on a typical x86 system, no need to
 * explicitly ioremap() it. The fact that the ISA IO space is mapped
 * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
 * are physical addresses. The following constant pointer can be
 * used as the IO-area pointer (it can be iounmapped as well, so the
 * analogy with PCI is quite large):
 */
#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))

/*
 *	Cache management
 *
 *	This needed for two cases
 *	1. Out of order aware processors
 *	2. Accidentally out of order processors (PPro errata #51)
 */
 
#if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)

static inline void flush_write_buffers(void)
{
	__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
}

#define dma_cache_inv(_start,_size)		flush_write_buffers()
#define dma_cache_wback(_start,_size)		flush_write_buffers()
#define dma_cache_wback_inv(_start,_size)	flush_write_buffers()

#else

/* Nothing to do */

#define dma_cache_inv(_start,_size)		do { } while (0)
#define dma_cache_wback(_start,_size)		do { } while (0)
#define dma_cache_wback_inv(_start,_size)	do { } while (0)
#define flush_write_buffers()

#endif

#endif /* __KERNEL__ */

static inline void native_io_delay(void)
{
	asm volatile("outb %%al,$0x80" : : : "memory");
}

#if defined(CONFIG_PARAVIRT)
#include <asm/paravirt.h>
#else

static inline void slow_down_io(void) {
	native_io_delay();
#ifdef REALLY_SLOW_IO
	native_io_delay();
	native_io_delay();
	native_io_delay();
#endif
}

#endif

#ifdef CONFIG_X86_NUMAQ
extern void *xquad_portio;    /* Where the IO area was mapped */
#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
#define __BUILDIO(bwl,bw,type) \
static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
	if (xquad_portio) \
		write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
	else \
		out##bwl##_local(value, port); \
} \
static inline void out##bwl(unsigned type value, int port) { \
	out##bwl##_quad(value, port, 0); \
} \
static inline unsigned type in##bwl##_quad(int port, int quad) { \
	if (xquad_portio) \
		return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
	else \
		return in##bwl##_local(port); \
} \
static inline unsigned type in##bwl(int port) { \
	return in##bwl##_quad(port, 0); \
}
#else
#define __BUILDIO(bwl,bw,type) \
static inline void out##bwl(unsigned type value, int port) { \
	out##bwl##_local(value, port); \
} \
static inline unsigned type in##bwl(int port) { \
	return in##bwl##_local(port); \
}
#endif


#define BUILDIO(bwl,bw,type) \
static inline void out##bwl##_local(unsigned type value, int port) { \
	__asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
} \
static inline unsigned type in##bwl##_local(int port) { \
	unsigned type value; \
	__asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
	return value; \
} \
static inline void out##bwl##_local_p(unsigned type value, int port) { \
	out##bwl##_local(value, port); \
	slow_down_io(); \
} \
static inline unsigned type in##bwl##_local_p(int port) { \
	unsigned type value = in##bwl##_local(port); \
	slow_down_io(); \
	return value; \
} \
__BUILDIO(bwl,bw,type) \
static inline void out##bwl##_p(unsigned type value, int port) { \
	out##bwl(value, port); \
	slow_down_io(); \
} \
static inline unsigned type in##bwl##_p(int port) { \
	unsigned type value = in##bwl(port); \
	slow_down_io(); \
	return value; \
} \
static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
	__asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
} \
static inline void ins##bwl(int port, void *addr, unsigned long count) { \
	__asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
}

BUILDIO(b,b,char)
BUILDIO(w,w,short)
BUILDIO(l,,int)

#endif
Commit	Line	Data
1da177e4 LT	1	#ifndef _ASM_IO_H
	2	#define _ASM_IO_H
	3
1da177e4 LT	4	#include <linux/string.h>
	5	#include <linux/compiler.h>
	6
	7	/*
	8	* This file contains the definitions for the x86 IO instructions
	9	* inb/inw/inl/outb/outw/outl and the "string versions" of the same
	10	* (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
	11	* versions of the single-IO instructions (inb_p/inw_p/..).
	12	*
	13	* This file is not meant to be obfuscating: it's just complicated
	14	* to (a) handle it all in a way that makes gcc able to optimize it
	15	* as well as possible and (b) trying to avoid writing the same thing
	16	* over and over again with slight variations and possibly making a
	17	* mistake somewhere.
	18	*/
	19
	20	/*
	21	* Thanks to James van Artsdalen for a better timing-fix than
	22	* the two short jumps: using outb's to a nonexistent port seems
	23	* to guarantee better timings even on fast machines.
	24	*
	25	* On the other hand, I'd like to be sure of a non-existent port:
	26	* I feel a bit unsafe about using 0x80 (should be safe, though)
	27	*
	28	* Linus
	29	*/
	30
	31	/*
	32	* Bit simplified and optimized by Jan Hubicka
	33	* Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
	34	*
	35	* isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
	36	* isa_read[wl] and isa_write[wl] fixed
	37	* - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
	38	*/
	39
	40	#define IO_SPACE_LIMIT 0xffff
	41
	42	#define XQUAD_PORTIO_BASE 0xfe400000
	43	#define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
	44
	45	#ifdef __KERNEL__
	46
	47	#include <asm-generic/iomap.h>
	48
	49	#include <linux/vmalloc.h>
	50
	51	/*
	52	* Convert a physical pointer to a virtual kernel pointer for /dev/mem
	53	* access
	54	*/
	55	#define xlate_dev_mem_ptr(p) __va(p)
	56
	57	/*
	58	* Convert a virtual cached pointer to an uncached pointer
	59	*/
	60	#define xlate_dev_kmem_ptr(p) p
	61
	62	/**
	63	* virt_to_phys - map virtual addresses to physical
	64	* @address: address to remap
	65	*
	66	* The returned physical address is the physical (CPU) mapping for
	67	* the memory address given. It is only valid to use this function on
68	* addresses directly mapped or allocated via kmalloc.
69	*
70	* This function does not give bus mappings for DMA transfers. In
71	* almost all conceivable cases a device driver should not be using
72	* this function
73	*/
74
75	static inline unsigned long virt_to_phys(volatile void * address)
76	{
77	return __pa(address);
78	}
79
80	/**
81	* phys_to_virt - map physical address to virtual
82	* @address: address to remap
83	*
84	* The returned virtual address is a current CPU mapping for
85	* the memory address given. It is only valid to use this function on
86	* addresses that have a kernel mapping
87	*
88	* This function does not handle bus mappings for DMA transfers. In
89	* almost all conceivable cases a device driver should not be using
90	* this function
91	*/
92
93	static inline void * phys_to_virt(unsigned long address)
94	{
95	return __va(address);
96	}
97
98	/*
99	* Change "struct page" to physical address.
100	*/
101	#define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
102
103	extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
104
105	/**
106	* ioremap - map bus memory into CPU space
107	* @offset: bus address of the memory
108	* @size: size of the resource to map
109	*
110	* ioremap performs a platform specific sequence of operations to
111	* make bus memory CPU accessible via the readb/readw/readl/writeb/
112	* writew/writel functions and the other mmio helpers. The returned
113	* address is not guaranteed to be usable directly as a virtual
114	* address.
5ca24814 REB	115	*
	116	* If the area you are trying to map is a PCI BAR you should have a
	117	* look at pci_iomap().
1da177e4 LT	118	*/
	119
	120	static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
	121	{
	122	return __ioremap(offset, size, 0);
	123	}
	124
	125	extern void __iomem * ioremap_nocache(unsigned long offset, unsigned long size);
	126	extern void iounmap(volatile void __iomem *addr);
	127
	128	/*
	129	* bt_ioremap() and bt_iounmap() are for temporary early boot-time
	130	* mappings, before the real ioremap() is functional.
	131	* A boot-time mapping is currently limited to at most 16 pages.
	132	*/
	133	extern void *bt_ioremap(unsigned long offset, unsigned long size);
	134	extern void bt_iounmap(void *addr, unsigned long size);
18a8bd94	135	extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
1da177e4	136
e9928674 AK	137	/* Use early IO mappings for DMI because it's initialized early */
	138	#define dmi_ioremap bt_ioremap
	139	#define dmi_iounmap bt_iounmap
	140	#define dmi_alloc alloc_bootmem
	141
1da177e4 LT	142	/*
	143	* ISA I/O bus memory addresses are 1:1 with the physical address.
	144	*/
	145	#define isa_virt_to_bus virt_to_phys
	146	#define isa_page_to_bus page_to_phys
	147	#define isa_bus_to_virt phys_to_virt
	148
	149	/*
	150	* However PCI ones are not necessarily 1:1 and therefore these interfaces
	151	* are forbidden in portable PCI drivers.
	152	*
	153	* Allow them on x86 for legacy drivers, though.
	154	*/
	155	#define virt_to_bus virt_to_phys
	156	#define bus_to_virt phys_to_virt
	157
	158	/*
	159	* readX/writeX() are used to access memory mapped devices. On some
	160	* architectures the memory mapped IO stuff needs to be accessed
	161	* differently. On the x86 architecture, we just read/write the
	162	* memory location directly.
	163	*/
	164
	165	static inline unsigned char readb(const volatile void __iomem *addr)
	166	{
	167	return (volatile unsigned char __force ) addr;
	168	}
	169	static inline unsigned short readw(const volatile void __iomem *addr)
	170	{
	171	return (volatile unsigned short __force ) addr;
	172	}
	173	static inline unsigned int readl(const volatile void __iomem *addr)
	174	{
	175	return (volatile unsigned int __force ) addr;
	176	}
	177	#define readb_relaxed(addr) readb(addr)
	178	#define readw_relaxed(addr) readw(addr)
	179	#define readl_relaxed(addr) readl(addr)
	180	#define __raw_readb readb
	181	#define __raw_readw readw
	182	#define __raw_readl readl
	183
	184	static inline void writeb(unsigned char b, volatile void __iomem *addr)
	185	{
	186	(volatile unsigned char __force ) addr = b;
	187	}
	188	static inline void writew(unsigned short b, volatile void __iomem *addr)
	189	{
	190	(volatile unsigned short __force ) addr = b;
	191	}
	192	static inline void writel(unsigned int b, volatile void __iomem *addr)
	193	{
	194	(volatile unsigned int __force ) addr = b;
	195	}
	196	#define __raw_writeb writeb
	197	#define __raw_writew writew
	198	#define __raw_writel writel
	199
	200	#define mmiowb()
	201
	202	static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
	203	{
	204	memset((void __force *) addr, val, count);
	205	}
206	static inline void memcpy_fromio(void dst, const volatile void __iomem src, int count)
207	{
208	__memcpy(dst, (void __force *) src, count);
209	}
210	static inline void memcpy_toio(volatile void __iomem dst, const void src, int count)
211	{
212	__memcpy((void __force *) dst, src, count);
213	}
214
215	/*
216	* ISA space is 'always mapped' on a typical x86 system, no need to
217	* explicitly ioremap() it. The fact that the ISA IO space is mapped
218	* to PAGE_OFFSET is pure coincidence - it does not mean ISA values
219	* are physical addresses. The following constant pointer can be
220	* used as the IO-area pointer (it can be iounmapped as well, so the
221	* analogy with PCI is quite large):
222	*/
223	#define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
224
1da177e4 LT	225	/*
	226	* Cache management
	227	*
	228	* This needed for two cases
	229	* 1. Out of order aware processors
	230	* 2. Accidentally out of order processors (PPro errata #51)
	231	*/
	232
	233	#if defined(CONFIG_X86_OOSTORE) \|\| defined(CONFIG_X86_PPRO_FENCE)
	234
	235	static inline void flush_write_buffers(void)
	236	{
	237	__asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
	238	}
	239
	240	#define dma_cache_inv(_start,_size) flush_write_buffers()
	241	#define dma_cache_wback(_start,_size) flush_write_buffers()
	242	#define dma_cache_wback_inv(_start,_size) flush_write_buffers()
	243
	244	#else
	245
	246	/* Nothing to do */
	247
	248	#define dma_cache_inv(_start,_size) do { } while (0)
	249	#define dma_cache_wback(_start,_size) do { } while (0)
	250	#define dma_cache_wback_inv(_start,_size) do { } while (0)
	251	#define flush_write_buffers()
	252
	253	#endif
	254
	255	#endif /* __KERNEL__ */
	256
90a0a06a RR	257	static inline void native_io_delay(void)
	258	{
	259	asm volatile("outb %%al,$0x80" : : : "memory");
	260	}
	261
d3561b7f RR	262	#if defined(CONFIG_PARAVIRT)
d3561b7f RR	263	#include <asm/paravirt.h>
1da177e4	264	#else
d3561b7f	265
1da177e4	266	static inline void slow_down_io(void) {
90a0a06a	267	native_io_delay();
1da177e4	268	#ifdef REALLY_SLOW_IO
90a0a06a RR	269	native_io_delay();
	270	native_io_delay();
	271	native_io_delay();
1da177e4	272	#endif
1da177e4 LT	273	}
1da177e4 LT	274
d3561b7f RR	275	#endif
d3561b7f RR	276
1da177e4 LT	277	#ifdef CONFIG_X86_NUMAQ
	278	extern void xquad_portio; / Where the IO area was mapped */
	279	#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
	280	#define __BUILDIO(bwl,bw,type) \
	281	static inline void out##bwl##_quad(unsigned type value, int port, int quad) { \
	282	if (xquad_portio) \
	283	write##bwl(value, XQUAD_PORT_ADDR(port, quad)); \
	284	else \
	285	out##bwl##_local(value, port); \
	286	} \
	287	static inline void out##bwl(unsigned type value, int port) { \
	288	out##bwl##_quad(value, port, 0); \
	289	} \
	290	static inline unsigned type in##bwl##_quad(int port, int quad) { \
	291	if (xquad_portio) \
	292	return read##bwl(XQUAD_PORT_ADDR(port, quad)); \
	293	else \
	294	return in##bwl##_local(port); \
	295	} \
	296	static inline unsigned type in##bwl(int port) { \
	297	return in##bwl##_quad(port, 0); \
	298	}
	299	#else
	300	#define __BUILDIO(bwl,bw,type) \
	301	static inline void out##bwl(unsigned type value, int port) { \
	302	out##bwl##_local(value, port); \
	303	} \
	304	static inline unsigned type in##bwl(int port) { \
	305	return in##bwl##_local(port); \
	306	}
	307	#endif
	308
	309
	310	#define BUILDIO(bwl,bw,type) \
	311	static inline void out##bwl##_local(unsigned type value, int port) { \
	312	__asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
	313	} \
	314	static inline unsigned type in##bwl##_local(int port) { \
	315	unsigned type value; \
	316	__asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
	317	return value; \
	318	} \
	319	static inline void out##bwl##_local_p(unsigned type value, int port) { \
	320	out##bwl##_local(value, port); \
	321	slow_down_io(); \
	322	} \
	323	static inline unsigned type in##bwl##_local_p(int port) { \
	324	unsigned type value = in##bwl##_local(port); \
	325	slow_down_io(); \
	326	return value; \
	327	} \
	328	__BUILDIO(bwl,bw,type) \
	329	static inline void out##bwl##_p(unsigned type value, int port) { \
	330	out##bwl(value, port); \
	331	slow_down_io(); \
	332	} \
	333	static inline unsigned type in##bwl##_p(int port) { \
	334	unsigned type value = in##bwl(port); \
	335	slow_down_io(); \
	336	return value; \
	337	} \
	338	static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
	339	__asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
	340	} \
341	static inline void ins##bwl(int port, void *addr, unsigned long count) { \
342	__asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
343	}
344
345	BUILDIO(b,b,char)
346	BUILDIO(w,w,short)
347	BUILDIO(l,,int)
348
349	#endif