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1da177e4 LT |
1 | #ifndef __ASM_IA64_IOSAPIC_H |
2 | #define __ASM_IA64_IOSAPIC_H | |
3 | ||
4 | #define IOSAPIC_REG_SELECT 0x0 | |
5 | #define IOSAPIC_WINDOW 0x10 | |
6 | #define IOSAPIC_EOI 0x40 | |
7 | ||
8 | #define IOSAPIC_VERSION 0x1 | |
9 | ||
10 | /* | |
11 | * Redirection table entry | |
12 | */ | |
13 | #define IOSAPIC_RTE_LOW(i) (0x10+i*2) | |
14 | #define IOSAPIC_RTE_HIGH(i) (0x11+i*2) | |
15 | ||
16 | #define IOSAPIC_DEST_SHIFT 16 | |
17 | ||
18 | /* | |
19 | * Delivery mode | |
20 | */ | |
21 | #define IOSAPIC_DELIVERY_SHIFT 8 | |
22 | #define IOSAPIC_FIXED 0x0 | |
23 | #define IOSAPIC_LOWEST_PRIORITY 0x1 | |
24 | #define IOSAPIC_PMI 0x2 | |
25 | #define IOSAPIC_NMI 0x4 | |
26 | #define IOSAPIC_INIT 0x5 | |
27 | #define IOSAPIC_EXTINT 0x7 | |
28 | ||
29 | /* | |
30 | * Interrupt polarity | |
31 | */ | |
32 | #define IOSAPIC_POLARITY_SHIFT 13 | |
33 | #define IOSAPIC_POL_HIGH 0 | |
34 | #define IOSAPIC_POL_LOW 1 | |
35 | ||
36 | /* | |
37 | * Trigger mode | |
38 | */ | |
39 | #define IOSAPIC_TRIGGER_SHIFT 15 | |
40 | #define IOSAPIC_EDGE 0 | |
41 | #define IOSAPIC_LEVEL 1 | |
42 | ||
43 | /* | |
44 | * Mask bit | |
45 | */ | |
46 | ||
47 | #define IOSAPIC_MASK_SHIFT 16 | |
48 | #define IOSAPIC_MASK (1<<IOSAPIC_MASK_SHIFT) | |
49 | ||
cd378f18 YI |
50 | #define IOSAPIC_VECTOR_MASK 0xffffff00 |
51 | ||
1da177e4 LT |
52 | #ifndef __ASSEMBLY__ |
53 | ||
54 | #ifdef CONFIG_IOSAPIC | |
55 | ||
56 | #define NR_IOSAPICS 256 | |
57 | ||
c1726d6f | 58 | static inline unsigned int __iosapic_read(char __iomem *iosapic, unsigned int reg) |
1da177e4 LT |
59 | { |
60 | writel(reg, iosapic + IOSAPIC_REG_SELECT); | |
61 | return readl(iosapic + IOSAPIC_WINDOW); | |
62 | } | |
63 | ||
c1726d6f | 64 | static inline void __iosapic_write(char __iomem *iosapic, unsigned int reg, u32 val) |
1da177e4 LT |
65 | { |
66 | writel(reg, iosapic + IOSAPIC_REG_SELECT); | |
67 | writel(val, iosapic + IOSAPIC_WINDOW); | |
68 | } | |
69 | ||
70 | static inline void iosapic_eoi(char __iomem *iosapic, u32 vector) | |
71 | { | |
72 | writel(vector, iosapic + IOSAPIC_EOI); | |
73 | } | |
74 | ||
75 | extern void __init iosapic_system_init (int pcat_compat); | |
0e888adc | 76 | extern int __devinit iosapic_init (unsigned long address, |
1da177e4 | 77 | unsigned int gsi_base); |
0e888adc KK |
78 | #ifdef CONFIG_HOTPLUG |
79 | extern int iosapic_remove (unsigned int gsi_base); | |
1c53e435 KK |
80 | #else |
81 | #define iosapic_remove(gsi_base) (-EINVAL) | |
0e888adc | 82 | #endif /* CONFIG_HOTPLUG */ |
1da177e4 | 83 | extern int gsi_to_irq (unsigned int gsi); |
1da177e4 LT |
84 | extern int iosapic_register_intr (unsigned int gsi, unsigned long polarity, |
85 | unsigned long trigger); | |
1da177e4 | 86 | extern void iosapic_unregister_intr (unsigned int irq); |
0f7ac29e | 87 | extern void __devinit iosapic_override_isa_irq (unsigned int isa_irq, unsigned int gsi, |
1da177e4 LT |
88 | unsigned long polarity, |
89 | unsigned long trigger); | |
90 | extern int __init iosapic_register_platform_intr (u32 int_type, | |
91 | unsigned int gsi, | |
92 | int pmi_vector, | |
93 | u16 eid, u16 id, | |
94 | unsigned long polarity, | |
95 | unsigned long trigger); | |
1da177e4 | 96 | |
1da177e4 | 97 | #ifdef CONFIG_NUMA |
0e888adc | 98 | extern void __devinit map_iosapic_to_node (unsigned int, int); |
1da177e4 LT |
99 | #endif |
100 | #else | |
101 | #define iosapic_system_init(pcat_compat) do { } while (0) | |
0e888adc | 102 | #define iosapic_init(address,gsi_base) (-EINVAL) |
0e888adc | 103 | #define iosapic_remove(gsi_base) (-ENODEV) |
1da177e4 LT |
104 | #define iosapic_register_intr(gsi,polarity,trigger) (gsi) |
105 | #define iosapic_unregister_intr(irq) do { } while (0) | |
106 | #define iosapic_override_isa_irq(isa_irq,gsi,polarity,trigger) do { } while (0) | |
107 | #define iosapic_register_platform_intr(type,gsi,pmi,eid,id, \ | |
108 | polarity,trigger) (gsi) | |
109 | #endif | |
110 | ||
111 | # endif /* !__ASSEMBLY__ */ | |
112 | #endif /* __ASM_IA64_IOSAPIC_H */ |