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1da177e4 LT |
1 | /* |
2 | * Machine vector for IA-64. | |
3 | * | |
4 | * Copyright (C) 1999 Silicon Graphics, Inc. | |
5 | * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com> | |
6 | * Copyright (C) Vijay Chander <vijay@engr.sgi.com> | |
7 | * Copyright (C) 1999-2001, 2003-2004 Hewlett-Packard Co. | |
8 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
9 | */ | |
10 | #ifndef _ASM_IA64_MACHVEC_H | |
11 | #define _ASM_IA64_MACHVEC_H | |
12 | ||
1da177e4 LT |
13 | #include <linux/types.h> |
14 | ||
15 | /* forward declarations: */ | |
16 | struct device; | |
17 | struct pt_regs; | |
18 | struct scatterlist; | |
19 | struct page; | |
20 | struct mm_struct; | |
21 | struct pci_bus; | |
e08e6c52 | 22 | struct task_struct; |
3b7d1921 | 23 | struct pci_dev; |
1da177e4 LT |
24 | |
25 | typedef void ia64_mv_setup_t (char **); | |
26 | typedef void ia64_mv_cpu_init_t (void); | |
27 | typedef void ia64_mv_irq_init_t (void); | |
28 | typedef void ia64_mv_send_ipi_t (int, int, int, int); | |
7d12e780 | 29 | typedef void ia64_mv_timer_interrupt_t (int, void *); |
c1902aae | 30 | typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long); |
1da177e4 LT |
31 | typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *); |
32 | typedef unsigned int ia64_mv_local_vector_to_irq (u8); | |
33 | typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *); | |
34 | typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val, | |
35 | u8 size); | |
36 | typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val, | |
37 | u8 size); | |
e08e6c52 | 38 | typedef void ia64_mv_migrate_t(struct task_struct * task); |
8ea6091f | 39 | typedef void ia64_mv_pci_fixup_bus_t (struct pci_bus *); |
1da177e4 LT |
40 | |
41 | /* DMA-mapping interface: */ | |
42 | typedef void ia64_mv_dma_init (void); | |
06a54497 | 43 | typedef void *ia64_mv_dma_alloc_coherent (struct device *, size_t, dma_addr_t *, gfp_t); |
1da177e4 LT |
44 | typedef void ia64_mv_dma_free_coherent (struct device *, size_t, void *, dma_addr_t); |
45 | typedef dma_addr_t ia64_mv_dma_map_single (struct device *, void *, size_t, int); | |
46 | typedef void ia64_mv_dma_unmap_single (struct device *, dma_addr_t, size_t, int); | |
47 | typedef int ia64_mv_dma_map_sg (struct device *, struct scatterlist *, int, int); | |
48 | typedef void ia64_mv_dma_unmap_sg (struct device *, struct scatterlist *, int, int); | |
49 | typedef void ia64_mv_dma_sync_single_for_cpu (struct device *, dma_addr_t, size_t, int); | |
50 | typedef void ia64_mv_dma_sync_sg_for_cpu (struct device *, struct scatterlist *, int, int); | |
51 | typedef void ia64_mv_dma_sync_single_for_device (struct device *, dma_addr_t, size_t, int); | |
52 | typedef void ia64_mv_dma_sync_sg_for_device (struct device *, struct scatterlist *, int, int); | |
53 | typedef int ia64_mv_dma_mapping_error (dma_addr_t dma_addr); | |
54 | typedef int ia64_mv_dma_supported (struct device *, u64); | |
55 | ||
56 | /* | |
57 | * WARNING: The legacy I/O space is _architected_. Platforms are | |
58 | * expected to follow this architected model (see Section 10.7 in the | |
59 | * IA-64 Architecture Software Developer's Manual). Unfortunately, | |
60 | * some broken machines do not follow that model, which is why we have | |
61 | * to make the inX/outX operations part of the machine vector. | |
62 | * Platform designers should follow the architected model whenever | |
63 | * possible. | |
64 | */ | |
65 | typedef unsigned int ia64_mv_inb_t (unsigned long); | |
66 | typedef unsigned int ia64_mv_inw_t (unsigned long); | |
67 | typedef unsigned int ia64_mv_inl_t (unsigned long); | |
68 | typedef void ia64_mv_outb_t (unsigned char, unsigned long); | |
69 | typedef void ia64_mv_outw_t (unsigned short, unsigned long); | |
70 | typedef void ia64_mv_outl_t (unsigned int, unsigned long); | |
71 | typedef void ia64_mv_mmiowb_t (void); | |
72 | typedef unsigned char ia64_mv_readb_t (const volatile void __iomem *); | |
73 | typedef unsigned short ia64_mv_readw_t (const volatile void __iomem *); | |
74 | typedef unsigned int ia64_mv_readl_t (const volatile void __iomem *); | |
75 | typedef unsigned long ia64_mv_readq_t (const volatile void __iomem *); | |
76 | typedef unsigned char ia64_mv_readb_relaxed_t (const volatile void __iomem *); | |
77 | typedef unsigned short ia64_mv_readw_relaxed_t (const volatile void __iomem *); | |
78 | typedef unsigned int ia64_mv_readl_relaxed_t (const volatile void __iomem *); | |
79 | typedef unsigned long ia64_mv_readq_relaxed_t (const volatile void __iomem *); | |
3b7d1921 EB |
80 | |
81 | typedef int ia64_mv_setup_msi_irq_t (unsigned int irq, struct pci_dev *pdev); | |
82 | typedef void ia64_mv_teardown_msi_irq_t (unsigned int irq); | |
1da177e4 LT |
83 | |
84 | static inline void | |
85 | machvec_noop (void) | |
86 | { | |
87 | } | |
88 | ||
89 | static inline void | |
90 | machvec_noop_mm (struct mm_struct *mm) | |
91 | { | |
92 | } | |
93 | ||
e08e6c52 BC |
94 | static inline void |
95 | machvec_noop_task (struct task_struct *task) | |
96 | { | |
97 | } | |
98 | ||
8ea6091f JK |
99 | static inline void |
100 | machvec_noop_bus (struct pci_bus *bus) | |
101 | { | |
102 | } | |
103 | ||
1da177e4 | 104 | extern void machvec_setup (char **); |
7d12e780 | 105 | extern void machvec_timer_interrupt (int, void *); |
1da177e4 LT |
106 | extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int); |
107 | extern void machvec_dma_sync_sg (struct device *, struct scatterlist *, int, int); | |
108 | extern void machvec_tlb_migrate_finish (struct mm_struct *); | |
109 | ||
110 | # if defined (CONFIG_IA64_HP_SIM) | |
111 | # include <asm/machvec_hpsim.h> | |
112 | # elif defined (CONFIG_IA64_DIG) | |
113 | # include <asm/machvec_dig.h> | |
114 | # elif defined (CONFIG_IA64_HP_ZX1) | |
115 | # include <asm/machvec_hpzx1.h> | |
116 | # elif defined (CONFIG_IA64_HP_ZX1_SWIOTLB) | |
117 | # include <asm/machvec_hpzx1_swiotlb.h> | |
118 | # elif defined (CONFIG_IA64_SGI_SN2) | |
119 | # include <asm/machvec_sn2.h> | |
120 | # elif defined (CONFIG_IA64_GENERIC) | |
121 | ||
122 | # ifdef MACHVEC_PLATFORM_HEADER | |
123 | # include MACHVEC_PLATFORM_HEADER | |
124 | # else | |
125 | # define platform_name ia64_mv.name | |
126 | # define platform_setup ia64_mv.setup | |
127 | # define platform_cpu_init ia64_mv.cpu_init | |
128 | # define platform_irq_init ia64_mv.irq_init | |
129 | # define platform_send_ipi ia64_mv.send_ipi | |
130 | # define platform_timer_interrupt ia64_mv.timer_interrupt | |
131 | # define platform_global_tlb_purge ia64_mv.global_tlb_purge | |
132 | # define platform_tlb_migrate_finish ia64_mv.tlb_migrate_finish | |
133 | # define platform_dma_init ia64_mv.dma_init | |
134 | # define platform_dma_alloc_coherent ia64_mv.dma_alloc_coherent | |
135 | # define platform_dma_free_coherent ia64_mv.dma_free_coherent | |
136 | # define platform_dma_map_single ia64_mv.dma_map_single | |
137 | # define platform_dma_unmap_single ia64_mv.dma_unmap_single | |
138 | # define platform_dma_map_sg ia64_mv.dma_map_sg | |
139 | # define platform_dma_unmap_sg ia64_mv.dma_unmap_sg | |
140 | # define platform_dma_sync_single_for_cpu ia64_mv.dma_sync_single_for_cpu | |
141 | # define platform_dma_sync_sg_for_cpu ia64_mv.dma_sync_sg_for_cpu | |
142 | # define platform_dma_sync_single_for_device ia64_mv.dma_sync_single_for_device | |
143 | # define platform_dma_sync_sg_for_device ia64_mv.dma_sync_sg_for_device | |
144 | # define platform_dma_mapping_error ia64_mv.dma_mapping_error | |
145 | # define platform_dma_supported ia64_mv.dma_supported | |
146 | # define platform_local_vector_to_irq ia64_mv.local_vector_to_irq | |
147 | # define platform_pci_get_legacy_mem ia64_mv.pci_get_legacy_mem | |
148 | # define platform_pci_legacy_read ia64_mv.pci_legacy_read | |
149 | # define platform_pci_legacy_write ia64_mv.pci_legacy_write | |
150 | # define platform_inb ia64_mv.inb | |
151 | # define platform_inw ia64_mv.inw | |
152 | # define platform_inl ia64_mv.inl | |
153 | # define platform_outb ia64_mv.outb | |
154 | # define platform_outw ia64_mv.outw | |
155 | # define platform_outl ia64_mv.outl | |
156 | # define platform_mmiowb ia64_mv.mmiowb | |
157 | # define platform_readb ia64_mv.readb | |
158 | # define platform_readw ia64_mv.readw | |
159 | # define platform_readl ia64_mv.readl | |
160 | # define platform_readq ia64_mv.readq | |
161 | # define platform_readb_relaxed ia64_mv.readb_relaxed | |
162 | # define platform_readw_relaxed ia64_mv.readw_relaxed | |
163 | # define platform_readl_relaxed ia64_mv.readl_relaxed | |
164 | # define platform_readq_relaxed ia64_mv.readq_relaxed | |
e08e6c52 | 165 | # define platform_migrate ia64_mv.migrate |
3b7d1921 EB |
166 | # define platform_setup_msi_irq ia64_mv.setup_msi_irq |
167 | # define platform_teardown_msi_irq ia64_mv.teardown_msi_irq | |
8ea6091f | 168 | # define platform_pci_fixup_bus ia64_mv.pci_fixup_bus |
1da177e4 LT |
169 | # endif |
170 | ||
171 | /* __attribute__((__aligned__(16))) is required to make size of the | |
172 | * structure multiple of 16 bytes. | |
173 | * This will fillup the holes created because of section 3.3.1 in | |
174 | * Software Conventions guide. | |
175 | */ | |
176 | struct ia64_machine_vector { | |
177 | const char *name; | |
178 | ia64_mv_setup_t *setup; | |
179 | ia64_mv_cpu_init_t *cpu_init; | |
180 | ia64_mv_irq_init_t *irq_init; | |
181 | ia64_mv_send_ipi_t *send_ipi; | |
182 | ia64_mv_timer_interrupt_t *timer_interrupt; | |
183 | ia64_mv_global_tlb_purge_t *global_tlb_purge; | |
184 | ia64_mv_tlb_migrate_finish_t *tlb_migrate_finish; | |
185 | ia64_mv_dma_init *dma_init; | |
186 | ia64_mv_dma_alloc_coherent *dma_alloc_coherent; | |
187 | ia64_mv_dma_free_coherent *dma_free_coherent; | |
188 | ia64_mv_dma_map_single *dma_map_single; | |
189 | ia64_mv_dma_unmap_single *dma_unmap_single; | |
190 | ia64_mv_dma_map_sg *dma_map_sg; | |
191 | ia64_mv_dma_unmap_sg *dma_unmap_sg; | |
192 | ia64_mv_dma_sync_single_for_cpu *dma_sync_single_for_cpu; | |
193 | ia64_mv_dma_sync_sg_for_cpu *dma_sync_sg_for_cpu; | |
194 | ia64_mv_dma_sync_single_for_device *dma_sync_single_for_device; | |
195 | ia64_mv_dma_sync_sg_for_device *dma_sync_sg_for_device; | |
196 | ia64_mv_dma_mapping_error *dma_mapping_error; | |
197 | ia64_mv_dma_supported *dma_supported; | |
198 | ia64_mv_local_vector_to_irq *local_vector_to_irq; | |
199 | ia64_mv_pci_get_legacy_mem_t *pci_get_legacy_mem; | |
200 | ia64_mv_pci_legacy_read_t *pci_legacy_read; | |
201 | ia64_mv_pci_legacy_write_t *pci_legacy_write; | |
202 | ia64_mv_inb_t *inb; | |
203 | ia64_mv_inw_t *inw; | |
204 | ia64_mv_inl_t *inl; | |
205 | ia64_mv_outb_t *outb; | |
206 | ia64_mv_outw_t *outw; | |
207 | ia64_mv_outl_t *outl; | |
208 | ia64_mv_mmiowb_t *mmiowb; | |
209 | ia64_mv_readb_t *readb; | |
210 | ia64_mv_readw_t *readw; | |
211 | ia64_mv_readl_t *readl; | |
212 | ia64_mv_readq_t *readq; | |
213 | ia64_mv_readb_relaxed_t *readb_relaxed; | |
214 | ia64_mv_readw_relaxed_t *readw_relaxed; | |
215 | ia64_mv_readl_relaxed_t *readl_relaxed; | |
216 | ia64_mv_readq_relaxed_t *readq_relaxed; | |
e08e6c52 | 217 | ia64_mv_migrate_t *migrate; |
3b7d1921 EB |
218 | ia64_mv_setup_msi_irq_t *setup_msi_irq; |
219 | ia64_mv_teardown_msi_irq_t *teardown_msi_irq; | |
8ea6091f | 220 | ia64_mv_pci_fixup_bus_t *pci_fixup_bus; |
1da177e4 LT |
221 | } __attribute__((__aligned__(16))); /* align attrib? see above comment */ |
222 | ||
223 | #define MACHVEC_INIT(name) \ | |
224 | { \ | |
225 | #name, \ | |
226 | platform_setup, \ | |
227 | platform_cpu_init, \ | |
228 | platform_irq_init, \ | |
229 | platform_send_ipi, \ | |
230 | platform_timer_interrupt, \ | |
231 | platform_global_tlb_purge, \ | |
232 | platform_tlb_migrate_finish, \ | |
233 | platform_dma_init, \ | |
234 | platform_dma_alloc_coherent, \ | |
235 | platform_dma_free_coherent, \ | |
236 | platform_dma_map_single, \ | |
237 | platform_dma_unmap_single, \ | |
238 | platform_dma_map_sg, \ | |
239 | platform_dma_unmap_sg, \ | |
240 | platform_dma_sync_single_for_cpu, \ | |
241 | platform_dma_sync_sg_for_cpu, \ | |
242 | platform_dma_sync_single_for_device, \ | |
243 | platform_dma_sync_sg_for_device, \ | |
244 | platform_dma_mapping_error, \ | |
245 | platform_dma_supported, \ | |
246 | platform_local_vector_to_irq, \ | |
247 | platform_pci_get_legacy_mem, \ | |
248 | platform_pci_legacy_read, \ | |
249 | platform_pci_legacy_write, \ | |
250 | platform_inb, \ | |
251 | platform_inw, \ | |
252 | platform_inl, \ | |
253 | platform_outb, \ | |
254 | platform_outw, \ | |
255 | platform_outl, \ | |
256 | platform_mmiowb, \ | |
257 | platform_readb, \ | |
258 | platform_readw, \ | |
259 | platform_readl, \ | |
260 | platform_readq, \ | |
261 | platform_readb_relaxed, \ | |
262 | platform_readw_relaxed, \ | |
263 | platform_readl_relaxed, \ | |
264 | platform_readq_relaxed, \ | |
e08e6c52 | 265 | platform_migrate, \ |
3b7d1921 EB |
266 | platform_setup_msi_irq, \ |
267 | platform_teardown_msi_irq, \ | |
8ea6091f | 268 | platform_pci_fixup_bus, \ |
1da177e4 LT |
269 | } |
270 | ||
271 | extern struct ia64_machine_vector ia64_mv; | |
272 | extern void machvec_init (const char *name); | |
273 | ||
274 | # else | |
275 | # error Unknown configuration. Update asm-ia64/machvec.h. | |
276 | # endif /* CONFIG_IA64_GENERIC */ | |
277 | ||
278 | /* | |
279 | * Declare default routines which aren't declared anywhere else: | |
280 | */ | |
281 | extern ia64_mv_dma_init swiotlb_init; | |
282 | extern ia64_mv_dma_alloc_coherent swiotlb_alloc_coherent; | |
283 | extern ia64_mv_dma_free_coherent swiotlb_free_coherent; | |
284 | extern ia64_mv_dma_map_single swiotlb_map_single; | |
285 | extern ia64_mv_dma_unmap_single swiotlb_unmap_single; | |
286 | extern ia64_mv_dma_map_sg swiotlb_map_sg; | |
287 | extern ia64_mv_dma_unmap_sg swiotlb_unmap_sg; | |
288 | extern ia64_mv_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu; | |
289 | extern ia64_mv_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu; | |
290 | extern ia64_mv_dma_sync_single_for_device swiotlb_sync_single_for_device; | |
291 | extern ia64_mv_dma_sync_sg_for_device swiotlb_sync_sg_for_device; | |
292 | extern ia64_mv_dma_mapping_error swiotlb_dma_mapping_error; | |
293 | extern ia64_mv_dma_supported swiotlb_dma_supported; | |
294 | ||
295 | /* | |
296 | * Define default versions so we can extend machvec for new platforms without having | |
297 | * to update the machvec files for all existing platforms. | |
298 | */ | |
299 | #ifndef platform_setup | |
300 | # define platform_setup machvec_setup | |
301 | #endif | |
302 | #ifndef platform_cpu_init | |
303 | # define platform_cpu_init machvec_noop | |
304 | #endif | |
305 | #ifndef platform_irq_init | |
306 | # define platform_irq_init machvec_noop | |
307 | #endif | |
308 | ||
309 | #ifndef platform_send_ipi | |
310 | # define platform_send_ipi ia64_send_ipi /* default to architected version */ | |
311 | #endif | |
312 | #ifndef platform_timer_interrupt | |
313 | # define platform_timer_interrupt machvec_timer_interrupt | |
314 | #endif | |
315 | #ifndef platform_global_tlb_purge | |
316 | # define platform_global_tlb_purge ia64_global_tlb_purge /* default to architected version */ | |
317 | #endif | |
318 | #ifndef platform_tlb_migrate_finish | |
319 | # define platform_tlb_migrate_finish machvec_noop_mm | |
320 | #endif | |
321 | #ifndef platform_dma_init | |
322 | # define platform_dma_init swiotlb_init | |
323 | #endif | |
324 | #ifndef platform_dma_alloc_coherent | |
325 | # define platform_dma_alloc_coherent swiotlb_alloc_coherent | |
326 | #endif | |
327 | #ifndef platform_dma_free_coherent | |
328 | # define platform_dma_free_coherent swiotlb_free_coherent | |
329 | #endif | |
330 | #ifndef platform_dma_map_single | |
331 | # define platform_dma_map_single swiotlb_map_single | |
332 | #endif | |
333 | #ifndef platform_dma_unmap_single | |
334 | # define platform_dma_unmap_single swiotlb_unmap_single | |
335 | #endif | |
336 | #ifndef platform_dma_map_sg | |
337 | # define platform_dma_map_sg swiotlb_map_sg | |
338 | #endif | |
339 | #ifndef platform_dma_unmap_sg | |
340 | # define platform_dma_unmap_sg swiotlb_unmap_sg | |
341 | #endif | |
342 | #ifndef platform_dma_sync_single_for_cpu | |
343 | # define platform_dma_sync_single_for_cpu swiotlb_sync_single_for_cpu | |
344 | #endif | |
345 | #ifndef platform_dma_sync_sg_for_cpu | |
346 | # define platform_dma_sync_sg_for_cpu swiotlb_sync_sg_for_cpu | |
347 | #endif | |
348 | #ifndef platform_dma_sync_single_for_device | |
349 | # define platform_dma_sync_single_for_device swiotlb_sync_single_for_device | |
350 | #endif | |
351 | #ifndef platform_dma_sync_sg_for_device | |
352 | # define platform_dma_sync_sg_for_device swiotlb_sync_sg_for_device | |
353 | #endif | |
354 | #ifndef platform_dma_mapping_error | |
355 | # define platform_dma_mapping_error swiotlb_dma_mapping_error | |
356 | #endif | |
357 | #ifndef platform_dma_supported | |
358 | # define platform_dma_supported swiotlb_dma_supported | |
359 | #endif | |
360 | #ifndef platform_local_vector_to_irq | |
361 | # define platform_local_vector_to_irq __ia64_local_vector_to_irq | |
362 | #endif | |
363 | #ifndef platform_pci_get_legacy_mem | |
364 | # define platform_pci_get_legacy_mem ia64_pci_get_legacy_mem | |
365 | #endif | |
366 | #ifndef platform_pci_legacy_read | |
367 | # define platform_pci_legacy_read ia64_pci_legacy_read | |
a72391e4 | 368 | extern int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size); |
1da177e4 LT |
369 | #endif |
370 | #ifndef platform_pci_legacy_write | |
371 | # define platform_pci_legacy_write ia64_pci_legacy_write | |
a72391e4 | 372 | extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size); |
1da177e4 LT |
373 | #endif |
374 | #ifndef platform_inb | |
375 | # define platform_inb __ia64_inb | |
376 | #endif | |
377 | #ifndef platform_inw | |
378 | # define platform_inw __ia64_inw | |
379 | #endif | |
380 | #ifndef platform_inl | |
381 | # define platform_inl __ia64_inl | |
382 | #endif | |
383 | #ifndef platform_outb | |
384 | # define platform_outb __ia64_outb | |
385 | #endif | |
386 | #ifndef platform_outw | |
387 | # define platform_outw __ia64_outw | |
388 | #endif | |
389 | #ifndef platform_outl | |
390 | # define platform_outl __ia64_outl | |
391 | #endif | |
392 | #ifndef platform_mmiowb | |
393 | # define platform_mmiowb __ia64_mmiowb | |
394 | #endif | |
395 | #ifndef platform_readb | |
396 | # define platform_readb __ia64_readb | |
397 | #endif | |
398 | #ifndef platform_readw | |
399 | # define platform_readw __ia64_readw | |
400 | #endif | |
401 | #ifndef platform_readl | |
402 | # define platform_readl __ia64_readl | |
403 | #endif | |
404 | #ifndef platform_readq | |
405 | # define platform_readq __ia64_readq | |
406 | #endif | |
407 | #ifndef platform_readb_relaxed | |
408 | # define platform_readb_relaxed __ia64_readb_relaxed | |
409 | #endif | |
410 | #ifndef platform_readw_relaxed | |
411 | # define platform_readw_relaxed __ia64_readw_relaxed | |
412 | #endif | |
413 | #ifndef platform_readl_relaxed | |
414 | # define platform_readl_relaxed __ia64_readl_relaxed | |
415 | #endif | |
416 | #ifndef platform_readq_relaxed | |
417 | # define platform_readq_relaxed __ia64_readq_relaxed | |
418 | #endif | |
e08e6c52 BC |
419 | #ifndef platform_migrate |
420 | # define platform_migrate machvec_noop_task | |
421 | #endif | |
3b7d1921 EB |
422 | #ifndef platform_setup_msi_irq |
423 | # define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL) | |
424 | #endif | |
425 | #ifndef platform_teardown_msi_irq | |
426 | # define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) | |
fd58e55f | 427 | #endif |
8ea6091f JK |
428 | #ifndef platform_pci_fixup_bus |
429 | # define platform_pci_fixup_bus machvec_noop_bus | |
430 | #endif | |
1da177e4 LT |
431 | |
432 | #endif /* _ASM_IA64_MACHVEC_H */ |