[deliverable/linux.git] / include / asm-ia64 / smp.h

/*
 * SMP Support
 *
 * Copyright (C) 1999 VA Linux Systems
 * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
 * (c) Copyright 2001-2003, 2005 Hewlett-Packard Development Company, L.P.
 *	David Mosberger-Tang <davidm@hpl.hp.com>
 *	Bjorn Helgaas <bjorn.helgaas@hp.com>
 */
#ifndef _ASM_IA64_SMP_H
#define _ASM_IA64_SMP_H

#include <linux/init.h>
#include <linux/threads.h>
#include <linux/kernel.h>
#include <linux/cpumask.h>
#include <linux/bitops.h>

#include <asm/io.h>
#include <asm/param.h>
#include <asm/processor.h>
#include <asm/ptrace.h>

static inline unsigned int
ia64_get_lid (void)
{
	union {
		struct {
			unsigned long reserved : 16;
			unsigned long eid : 8;
			unsigned long id : 8;
			unsigned long ignored : 32;
		} f;
		unsigned long bits;
	} lid;

	lid.bits = ia64_getreg(_IA64_REG_CR_LID);
	return lid.f.id << 8 | lid.f.eid;
}

extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
				  void *info, int wait);

#define hard_smp_processor_id()		ia64_get_lid()

#ifdef CONFIG_SMP

#define XTP_OFFSET		0x1e0008

#define SMP_IRQ_REDIRECTION	(1 << 0)
#define SMP_IPI_REDIRECTION	(1 << 1)

#define raw_smp_processor_id() (current_thread_info()->cpu)

extern struct smp_boot_data {
	int cpu_count;
	int cpu_phys_id[NR_CPUS];
} smp_boot_data __initdata;

extern char no_int_routing __devinitdata;

extern cpumask_t cpu_online_map;
extern cpumask_t cpu_core_map[NR_CPUS];
DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
extern int smp_num_siblings;
extern void __iomem *ipi_base_addr;
extern unsigned char smp_int_redirect;

extern volatile int ia64_cpu_to_sapicid[];
#define cpu_physical_id(i)	ia64_cpu_to_sapicid[i]

extern unsigned long ap_wakeup_vector;

/*
 * Function to map hard smp processor id to logical id.  Slow, so don't use this in
 * performance-critical code.
 */
static inline int
cpu_logical_id (int cpuid)
{
	int i;

	for (i = 0; i < NR_CPUS; ++i)
		if (cpu_physical_id(i) == cpuid)
			break;
	return i;
}

/*
 * XTP control functions:
 *	min_xtp   : route all interrupts to this CPU
 *	normal_xtp: nominal XTP value
 *	max_xtp   : never deliver interrupts to this CPU.
 */

static inline void
min_xtp (void)
{
	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
		writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */
}

static inline void
normal_xtp (void)
{
	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
		writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */
}

static inline void
max_xtp (void)
{
	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
		writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */
}

/* Upping and downing of CPUs */
extern int __cpu_disable (void);
extern void __cpu_die (unsigned int cpu);
extern void cpu_die (void) __attribute__ ((noreturn));
extern void __init smp_build_cpu_map(void);

extern void __init init_smp_config (void);
extern void smp_do_timer (struct pt_regs *regs);

extern void smp_send_reschedule (int cpu);
extern void lock_ipi_calllock(void);
extern void unlock_ipi_calllock(void);
extern void identify_siblings (struct cpuinfo_ia64 *);
extern int is_multithreading_enabled(void);

#else /* CONFIG_SMP */

#define cpu_logical_id(i)		0
#define cpu_physical_id(i)		ia64_get_lid()

#endif /* CONFIG_SMP */
#endif /* _ASM_IA64_SMP_H */
Commit	Line	Data
1da177e4 LT	1	/*
	2	* SMP Support
	3	*
	4	* Copyright (C) 1999 VA Linux Systems
	5	* Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
	6	* (c) Copyright 2001-2003, 2005 Hewlett-Packard Development Company, L.P.
	7	* David Mosberger-Tang <davidm@hpl.hp.com>
	8	* Bjorn Helgaas <bjorn.helgaas@hp.com>
	9	*/
	10	#ifndef _ASM_IA64_SMP_H
	11	#define _ASM_IA64_SMP_H
	12
1da177e4 LT	13	#include <linux/init.h>
	14	#include <linux/threads.h>
	15	#include <linux/kernel.h>
	16	#include <linux/cpumask.h>
1977f032	17	#include <linux/bitops.h>
1da177e4	18
1da177e4 LT	19	#include <asm/io.h>
	20	#include <asm/param.h>
	21	#include <asm/processor.h>
	22	#include <asm/ptrace.h>
	23
	24	static inline unsigned int
	25	ia64_get_lid (void)
	26	{
	27	union {
	28	struct {
	29	unsigned long reserved : 16;
	30	unsigned long eid : 8;
	31	unsigned long id : 8;
	32	unsigned long ignored : 32;
	33	} f;
	34	unsigned long bits;
	35	} lid;
	36
	37	lid.bits = ia64_getreg(_IA64_REG_CR_LID);
	38	return lid.f.id << 8 \| lid.f.eid;
	39	}
	40
31a6b11f XZ	41	extern int smp_call_function_mask(cpumask_t mask, void (func)(void ),
	42	void *info, int wait);
	43
818563dc FLVC	44	#define hard_smp_processor_id() ia64_get_lid()
818563dc FLVC	45
1da177e4 LT	46	#ifdef CONFIG_SMP
	47
	48	#define XTP_OFFSET 0x1e0008
	49
	50	#define SMP_IRQ_REDIRECTION (1 << 0)
	51	#define SMP_IPI_REDIRECTION (1 << 1)
	52
39c715b7	53	#define raw_smp_processor_id() (current_thread_info()->cpu)
1da177e4 LT	54
	55	extern struct smp_boot_data {
	56	int cpu_count;
	57	int cpu_phys_id[NR_CPUS];
	58	} smp_boot_data __initdata;
	59
	60	extern char no_int_routing __devinitdata;
	61
	62	extern cpumask_t cpu_online_map;
e927ecb0	63	extern cpumask_t cpu_core_map[NR_CPUS];
d5a7430d	64	DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
e927ecb0	65	extern int smp_num_siblings;
1da177e4 LT	66	extern void __iomem *ipi_base_addr;
	67	extern unsigned char smp_int_redirect;
	68
	69	extern volatile int ia64_cpu_to_sapicid[];
	70	#define cpu_physical_id(i) ia64_cpu_to_sapicid[i]
	71
	72	extern unsigned long ap_wakeup_vector;
	73
	74	/*
	75	* Function to map hard smp processor id to logical id. Slow, so don't use this in
	76	* performance-critical code.
	77	*/
	78	static inline int
	79	cpu_logical_id (int cpuid)
	80	{
	81	int i;
	82
	83	for (i = 0; i < NR_CPUS; ++i)
	84	if (cpu_physical_id(i) == cpuid)
	85	break;
	86	return i;
	87	}
	88
	89	/*
	90	* XTP control functions:
	91	* min_xtp : route all interrupts to this CPU
	92	* normal_xtp: nominal XTP value
	93	* max_xtp : never deliver interrupts to this CPU.
	94	*/
	95
	96	static inline void
	97	min_xtp (void)
	98	{
	99	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
	100	writeb(0x00, ipi_base_addr + XTP_OFFSET); /* XTP to min */
	101	}
	102
	103	static inline void
	104	normal_xtp (void)
	105	{
	106	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
	107	writeb(0x08, ipi_base_addr + XTP_OFFSET); /* XTP normal */
	108	}
	109
	110	static inline void
	111	max_xtp (void)
	112	{
	113	if (smp_int_redirect & SMP_IRQ_REDIRECTION)
	114	writeb(0x0f, ipi_base_addr + XTP_OFFSET); /* Set XTP to max */
	115	}
	116
1da177e4 LT	117	/* Upping and downing of CPUs */
	118	extern int __cpu_disable (void);
	119	extern void __cpu_die (unsigned int cpu);
	120	extern void cpu_die (void) __attribute__ ((noreturn));
1da177e4 LT	121	extern void __init smp_build_cpu_map(void);
	122
	123	extern void __init init_smp_config (void);
	124	extern void smp_do_timer (struct pt_regs *regs);
	125
1da177e4 LT	126	extern void smp_send_reschedule (int cpu);
	127	extern void lock_ipi_calllock(void);
	128	extern void unlock_ipi_calllock(void);
e927ecb0	129	extern void identify_siblings (struct cpuinfo_ia64 *);
dd562c05	130	extern int is_multithreading_enabled(void);
1da177e4	131
2f4dfe20	132	#else /* CONFIG_SMP */
1da177e4 LT	133
	134	#define cpu_logical_id(i) 0
	135	#define cpu_physical_id(i) ia64_get_lid()
	136
	137	#endif /* CONFIG_SMP */
	138	#endif /* _ASM_IA64_SMP_H */