Support the MIPS32 / MIPS64 DSP ASE.
[deliverable/linux.git] / include / asm-mips / mach-sibyte / cpu-feature-overrides.h
CommitLineData
1da177e4
LT
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2003, 2004 Ralf Baechle
7 */
8#ifndef __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
9#define __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H
10
11/*
12 * Sibyte are MIPS64 processors weired to a specific configuration
13 */
14#define cpu_has_watch 1
15#define cpu_has_mips16 0
16#define cpu_has_divec 1
17#define cpu_has_vce 0
18#define cpu_has_cache_cdex_p 0
19#define cpu_has_cache_cdex_s 0
20#define cpu_has_prefetch 1
21#define cpu_has_mcheck 1
22#define cpu_has_ejtag 1
23
24#define cpu_has_llsc 1
25#define cpu_has_vtag_icache 1
26#define cpu_has_dc_aliases 0
27#define cpu_has_ic_fills_f_dc 0
e50c0a8f 28#define cpu_has_dsp 0
1da177e4
LT
29#define cpu_icache_snoops_remote_store 0
30
31#define cpu_has_nofpuex 0
32#define cpu_has_64bits 1
33
34#define cpu_has_subset_pcaches 0
35
36#define cpu_dcache_line_size() 32
37#define cpu_icache_line_size() 32
38#define cpu_scache_line_size() 32
39
40#endif /* __ASM_MACH_SIBYTE_CPU_FEATURE_OVERRIDES_H */
This page took 0.072811 seconds and 5 git commands to generate.