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1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 1992 - 1997 Silicon Graphics, Inc. | |
7 | */ | |
8 | #ifndef __ASM_SN_NMI_H | |
9 | #define __ASM_SN_NMI_H | |
10 | ||
11 | #ident "$Revision: 1.5 $" | |
12 | ||
13 | #include <asm/sn/addrs.h> | |
14 | ||
15 | /* | |
16 | * The launch data structure resides at a fixed place in each node's memory | |
17 | * and is used to communicate between the master processor and the slave | |
18 | * processors. | |
19 | * | |
20 | * The master stores launch parameters in the launch structure | |
21 | * corresponding to a target processor that is in a slave loop, then sends | |
22 | * an interrupt to the slave processor. The slave calls the desired | |
23 | * function, followed by an optional rendezvous function, then returns to | |
24 | * the slave loop. The master does not wait for the slaves before | |
25 | * returning. | |
26 | * | |
27 | * There is an array of launch structures, one per CPU on the node. One | |
28 | * interrupt level is used per CPU. | |
29 | */ | |
30 | ||
31 | #define NMI_MAGIC 0x48414d4d455201 | |
32 | #define NMI_SIZEOF 0x40 | |
33 | ||
34 | #define NMI_OFF_MAGIC 0x00 /* Struct offsets for assembly */ | |
35 | #define NMI_OFF_FLAGS 0x08 | |
36 | #define NMI_OFF_CALL 0x10 | |
37 | #define NMI_OFF_CALLC 0x18 | |
38 | #define NMI_OFF_CALLPARM 0x20 | |
39 | #define NMI_OFF_GMASTER 0x28 | |
40 | ||
41 | /* | |
42 | * The NMI routine is called only if the complement address is | |
43 | * correct. | |
44 | * | |
45 | * Before control is transferred to a routine, the complement address | |
46 | * is zeroed (invalidated) to prevent an accidental call from a spurious | |
47 | * interrupt. | |
48 | * | |
49 | */ | |
50 | ||
51 | #ifndef __ASSEMBLY__ | |
52 | ||
53 | typedef struct nmi_s { | |
54 | volatile unsigned long magic; /* Magic number */ | |
55 | volatile unsigned long flags; /* Combination of flags above */ | |
56 | volatile void *call_addr; /* Routine for slave to call */ | |
57 | volatile void *call_addr_c; /* 1's complement of address */ | |
58 | volatile void *call_parm; /* Single parm passed to call */ | |
59 | volatile unsigned long gmaster; /* Flag true only on global master*/ | |
60 | } nmi_t; | |
61 | ||
62 | #endif /* !__ASSEMBLY__ */ | |
63 | ||
64 | /* Following definitions are needed both in the prom & the kernel | |
65 | * to identify the format of the nmi cpu register save area in the | |
66 | * low memory on each node. | |
67 | */ | |
68 | #ifndef __ASSEMBLY__ | |
69 | ||
70 | struct reg_struct { | |
71 | unsigned long gpr[32]; | |
72 | unsigned long sr; | |
73 | unsigned long cause; | |
74 | unsigned long epc; | |
75 | unsigned long badva; | |
76 | unsigned long error_epc; | |
77 | unsigned long cache_err; | |
78 | unsigned long nmi_sr; | |
79 | }; | |
80 | ||
81 | #endif /* !__ASSEMBLY__ */ | |
82 | ||
83 | /* These are the assembly language offsets into the reg_struct structure */ | |
84 | ||
85 | #define R0_OFF 0x0 | |
86 | #define R1_OFF 0x8 | |
87 | #define R2_OFF 0x10 | |
88 | #define R3_OFF 0x18 | |
89 | #define R4_OFF 0x20 | |
90 | #define R5_OFF 0x28 | |
91 | #define R6_OFF 0x30 | |
92 | #define R7_OFF 0x38 | |
93 | #define R8_OFF 0x40 | |
94 | #define R9_OFF 0x48 | |
95 | #define R10_OFF 0x50 | |
96 | #define R11_OFF 0x58 | |
97 | #define R12_OFF 0x60 | |
98 | #define R13_OFF 0x68 | |
99 | #define R14_OFF 0x70 | |
100 | #define R15_OFF 0x78 | |
101 | #define R16_OFF 0x80 | |
102 | #define R17_OFF 0x88 | |
103 | #define R18_OFF 0x90 | |
104 | #define R19_OFF 0x98 | |
105 | #define R20_OFF 0xa0 | |
106 | #define R21_OFF 0xa8 | |
107 | #define R22_OFF 0xb0 | |
108 | #define R23_OFF 0xb8 | |
109 | #define R24_OFF 0xc0 | |
110 | #define R25_OFF 0xc8 | |
111 | #define R26_OFF 0xd0 | |
112 | #define R27_OFF 0xd8 | |
113 | #define R28_OFF 0xe0 | |
114 | #define R29_OFF 0xe8 | |
115 | #define R30_OFF 0xf0 | |
116 | #define R31_OFF 0xf8 | |
117 | #define SR_OFF 0x100 | |
118 | #define CAUSE_OFF 0x108 | |
119 | #define EPC_OFF 0x110 | |
120 | #define BADVA_OFF 0x118 | |
121 | #define ERROR_EPC_OFF 0x120 | |
122 | #define CACHE_ERR_OFF 0x128 | |
123 | #define NMISR_OFF 0x130 | |
124 | ||
125 | #endif /* __ASM_SN_NMI_H */ |