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1da177e4 LT |
1 | #ifndef _ASM_IO_H |
2 | #define _ASM_IO_H | |
3 | ||
1da177e4 LT |
4 | #include <linux/types.h> |
5 | #include <asm/pgtable.h> | |
6 | ||
7 | extern unsigned long parisc_vmerge_boundary; | |
8 | extern unsigned long parisc_vmerge_max_size; | |
9 | ||
10 | #define BIO_VMERGE_BOUNDARY parisc_vmerge_boundary | |
11 | #define BIO_VMERGE_MAX_SIZE parisc_vmerge_max_size | |
12 | ||
13 | #define virt_to_phys(a) ((unsigned long)__pa(a)) | |
14 | #define phys_to_virt(a) __va(a) | |
15 | #define virt_to_bus virt_to_phys | |
16 | #define bus_to_virt phys_to_virt | |
17 | ||
18 | /* | |
19 | * Memory mapped I/O | |
20 | * | |
21 | * readX()/writeX() do byteswapping and take an ioremapped address | |
22 | * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address. | |
23 | * gsc_*() don't byteswap and operate on physical addresses; | |
24 | * eg dev->hpa or 0xfee00000. | |
25 | */ | |
26 | ||
1da177e4 LT |
27 | static inline unsigned char gsc_readb(unsigned long addr) |
28 | { | |
29 | long flags; | |
30 | unsigned char ret; | |
31 | ||
1da177e4 LT |
32 | __asm__ __volatile__( |
33 | " rsm 2,%0\n" | |
34 | " ldbx 0(%2),%1\n" | |
35 | " mtsm %0\n" | |
36 | : "=&r" (flags), "=r" (ret) : "r" (addr) ); | |
37 | ||
38 | return ret; | |
39 | } | |
40 | ||
41 | static inline unsigned short gsc_readw(unsigned long addr) | |
42 | { | |
43 | long flags; | |
44 | unsigned short ret; | |
45 | ||
1da177e4 LT |
46 | __asm__ __volatile__( |
47 | " rsm 2,%0\n" | |
48 | " ldhx 0(%2),%1\n" | |
49 | " mtsm %0\n" | |
50 | : "=&r" (flags), "=r" (ret) : "r" (addr) ); | |
51 | ||
52 | return ret; | |
53 | } | |
54 | ||
55 | static inline unsigned int gsc_readl(unsigned long addr) | |
56 | { | |
57 | u32 ret; | |
58 | ||
1da177e4 LT |
59 | __asm__ __volatile__( |
60 | " ldwax 0(%1),%0\n" | |
61 | : "=r" (ret) : "r" (addr) ); | |
62 | ||
63 | return ret; | |
64 | } | |
65 | ||
66 | static inline unsigned long long gsc_readq(unsigned long addr) | |
67 | { | |
68 | unsigned long long ret; | |
1da177e4 | 69 | |
513e7ecd | 70 | #ifdef CONFIG_64BIT |
1da177e4 LT |
71 | __asm__ __volatile__( |
72 | " ldda 0(%1),%0\n" | |
73 | : "=r" (ret) : "r" (addr) ); | |
74 | #else | |
75 | /* two reads may have side effects.. */ | |
76 | ret = ((u64) gsc_readl(addr)) << 32; | |
77 | ret |= gsc_readl(addr+4); | |
78 | #endif | |
79 | return ret; | |
80 | } | |
81 | ||
82 | static inline void gsc_writeb(unsigned char val, unsigned long addr) | |
83 | { | |
84 | long flags; | |
1da177e4 LT |
85 | __asm__ __volatile__( |
86 | " rsm 2,%0\n" | |
87 | " stbs %1,0(%2)\n" | |
88 | " mtsm %0\n" | |
89 | : "=&r" (flags) : "r" (val), "r" (addr) ); | |
90 | } | |
91 | ||
92 | static inline void gsc_writew(unsigned short val, unsigned long addr) | |
93 | { | |
94 | long flags; | |
1da177e4 LT |
95 | __asm__ __volatile__( |
96 | " rsm 2,%0\n" | |
97 | " sths %1,0(%2)\n" | |
98 | " mtsm %0\n" | |
99 | : "=&r" (flags) : "r" (val), "r" (addr) ); | |
100 | } | |
101 | ||
102 | static inline void gsc_writel(unsigned int val, unsigned long addr) | |
103 | { | |
1da177e4 LT |
104 | __asm__ __volatile__( |
105 | " stwas %0,0(%1)\n" | |
106 | : : "r" (val), "r" (addr) ); | |
107 | } | |
108 | ||
109 | static inline void gsc_writeq(unsigned long long val, unsigned long addr) | |
110 | { | |
513e7ecd | 111 | #ifdef CONFIG_64BIT |
1da177e4 LT |
112 | __asm__ __volatile__( |
113 | " stda %0,0(%1)\n" | |
114 | : : "r" (val), "r" (addr) ); | |
115 | #else | |
116 | /* two writes may have side effects.. */ | |
117 | gsc_writel(val >> 32, addr); | |
118 | gsc_writel(val, addr+4); | |
119 | #endif | |
120 | } | |
121 | ||
122 | /* | |
123 | * The standard PCI ioremap interfaces | |
124 | */ | |
125 | ||
126 | extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); | |
127 | ||
1b52d7c2 KM |
128 | /* Most machines react poorly to I/O-space being cacheable... Instead let's |
129 | * define ioremap() in terms of ioremap_nocache(). | |
1da177e4 | 130 | */ |
1b52d7c2 | 131 | extern inline void __iomem * ioremap(unsigned long offset, unsigned long size) |
1da177e4 | 132 | { |
1b52d7c2 | 133 | return __ioremap(offset, size, _PAGE_NO_CACHE); |
1da177e4 | 134 | } |
1b52d7c2 | 135 | #define ioremap_nocache(off, sz) ioremap((off), (sz)) |
1da177e4 | 136 | |
01232e93 | 137 | extern void iounmap(const volatile void __iomem *addr); |
1da177e4 | 138 | |
1da177e4 LT |
139 | static inline unsigned char __raw_readb(const volatile void __iomem *addr) |
140 | { | |
141 | return (*(volatile unsigned char __force *) (addr)); | |
142 | } | |
143 | static inline unsigned short __raw_readw(const volatile void __iomem *addr) | |
144 | { | |
145 | return *(volatile unsigned short __force *) addr; | |
146 | } | |
147 | static inline unsigned int __raw_readl(const volatile void __iomem *addr) | |
148 | { | |
149 | return *(volatile unsigned int __force *) addr; | |
150 | } | |
151 | static inline unsigned long long __raw_readq(const volatile void __iomem *addr) | |
152 | { | |
153 | return *(volatile unsigned long long __force *) addr; | |
154 | } | |
155 | ||
156 | static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr) | |
157 | { | |
158 | *(volatile unsigned char __force *) addr = b; | |
159 | } | |
160 | static inline void __raw_writew(unsigned short b, volatile void __iomem *addr) | |
161 | { | |
162 | *(volatile unsigned short __force *) addr = b; | |
163 | } | |
164 | static inline void __raw_writel(unsigned int b, volatile void __iomem *addr) | |
165 | { | |
166 | *(volatile unsigned int __force *) addr = b; | |
167 | } | |
168 | static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr) | |
169 | { | |
170 | *(volatile unsigned long long __force *) addr = b; | |
171 | } | |
1da177e4 LT |
172 | |
173 | /* readb can never be const, so use __fswab instead of le*_to_cpu */ | |
174 | #define readb(addr) __raw_readb(addr) | |
175 | #define readw(addr) __fswab16(__raw_readw(addr)) | |
176 | #define readl(addr) __fswab32(__raw_readl(addr)) | |
177 | #define readq(addr) __fswab64(__raw_readq(addr)) | |
178 | #define writeb(b, addr) __raw_writeb(b, addr) | |
179 | #define writew(b, addr) __raw_writew(cpu_to_le16(b), addr) | |
180 | #define writel(b, addr) __raw_writel(cpu_to_le32(b), addr) | |
181 | #define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr) | |
182 | ||
183 | #define readb_relaxed(addr) readb(addr) | |
184 | #define readw_relaxed(addr) readw(addr) | |
185 | #define readl_relaxed(addr) readl(addr) | |
186 | #define readq_relaxed(addr) readq(addr) | |
187 | ||
188 | #define mmiowb() do { } while (0) | |
189 | ||
190 | void memset_io(volatile void __iomem *addr, unsigned char val, int count); | |
191 | void memcpy_fromio(void *dst, const volatile void __iomem *src, int count); | |
192 | void memcpy_toio(volatile void __iomem *dst, const void *src, int count); | |
193 | ||
1da177e4 LT |
194 | /* Port-space IO */ |
195 | ||
196 | #define inb_p inb | |
197 | #define inw_p inw | |
198 | #define inl_p inl | |
199 | #define outb_p outb | |
200 | #define outw_p outw | |
201 | #define outl_p outl | |
202 | ||
203 | extern unsigned char eisa_in8(unsigned short port); | |
204 | extern unsigned short eisa_in16(unsigned short port); | |
205 | extern unsigned int eisa_in32(unsigned short port); | |
206 | extern void eisa_out8(unsigned char data, unsigned short port); | |
207 | extern void eisa_out16(unsigned short data, unsigned short port); | |
208 | extern void eisa_out32(unsigned int data, unsigned short port); | |
209 | ||
210 | #if defined(CONFIG_PCI) | |
211 | extern unsigned char inb(int addr); | |
212 | extern unsigned short inw(int addr); | |
213 | extern unsigned int inl(int addr); | |
214 | ||
215 | extern void outb(unsigned char b, int addr); | |
216 | extern void outw(unsigned short b, int addr); | |
217 | extern void outl(unsigned int b, int addr); | |
218 | #elif defined(CONFIG_EISA) | |
219 | #define inb eisa_in8 | |
220 | #define inw eisa_in16 | |
221 | #define inl eisa_in32 | |
222 | #define outb eisa_out8 | |
223 | #define outw eisa_out16 | |
224 | #define outl eisa_out32 | |
225 | #else | |
226 | static inline char inb(unsigned long addr) | |
227 | { | |
228 | BUG(); | |
229 | return -1; | |
230 | } | |
231 | ||
232 | static inline short inw(unsigned long addr) | |
233 | { | |
234 | BUG(); | |
235 | return -1; | |
236 | } | |
237 | ||
238 | static inline int inl(unsigned long addr) | |
239 | { | |
240 | BUG(); | |
241 | return -1; | |
242 | } | |
243 | ||
244 | #define outb(x, y) BUG() | |
245 | #define outw(x, y) BUG() | |
246 | #define outl(x, y) BUG() | |
247 | #endif | |
248 | ||
249 | /* | |
250 | * String versions of in/out ops: | |
251 | */ | |
252 | extern void insb (unsigned long port, void *dst, unsigned long count); | |
253 | extern void insw (unsigned long port, void *dst, unsigned long count); | |
254 | extern void insl (unsigned long port, void *dst, unsigned long count); | |
255 | extern void outsb (unsigned long port, const void *src, unsigned long count); | |
256 | extern void outsw (unsigned long port, const void *src, unsigned long count); | |
257 | extern void outsl (unsigned long port, const void *src, unsigned long count); | |
258 | ||
259 | ||
260 | /* IO Port space is : BBiiii where BB is HBA number. */ | |
261 | #define IO_SPACE_LIMIT 0x00ffffff | |
262 | ||
263 | ||
264 | #define dma_cache_inv(_start,_size) do { flush_kernel_dcache_range(_start,_size); } while (0) | |
265 | #define dma_cache_wback(_start,_size) do { flush_kernel_dcache_range(_start,_size); } while (0) | |
266 | #define dma_cache_wback_inv(_start,_size) do { flush_kernel_dcache_range(_start,_size); } while (0) | |
267 | ||
268 | /* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32 | |
269 | * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit | |
270 | * mode (essentially just sign extending. This macro takes in a 32 | |
271 | * bit I/O address (still with the leading f) and outputs the correct | |
272 | * value for either 32 or 64 bit mode */ | |
273 | #define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL))) | |
274 | ||
275 | #include <asm-generic/iomap.h> | |
276 | ||
277 | /* | |
278 | * Convert a physical pointer to a virtual kernel pointer for /dev/mem | |
279 | * access | |
280 | */ | |
281 | #define xlate_dev_mem_ptr(p) __va(p) | |
282 | ||
283 | /* | |
284 | * Convert a virtual cached pointer to an uncached pointer | |
285 | */ | |
286 | #define xlate_dev_kmem_ptr(p) p | |
287 | ||
288 | #endif |