Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * include/asm-parisc/serial.h | |
3 | */ | |
4 | ||
5 | /* | |
6 | * This assumes you have a 7.272727 MHz clock for your UART. | |
7 | * The documentation implies a 40Mhz clock, and elsewhere a 7Mhz clock | |
8 | * Clarified: 7.2727MHz on LASI. Not yet clarified for DINO | |
9 | */ | |
10 | ||
11 | #define LASI_BASE_BAUD ( 7272727 / 16 ) | |
12 | #define BASE_BAUD LASI_BASE_BAUD | |
13 | ||
14 | /* | |
15 | * We don't use the ISA probing code, so these entries are just to reserve | |
16 | * space. Some example (maximal) configurations: | |
17 | * - 712 w/ additional Lasi & RJ16 ports: 4 | |
18 | * - J5k w/ PCI serial cards: 2 + 4 * card ~= 34 | |
19 | * A500 w/ PCI serial cards: 5 + 4 * card ~= 17 | |
20 | */ | |
21 | ||
22 | #define STD_SERIAL_PORT_DEFNS \ | |
23 | { 0, }, /* ttyS0 */ \ | |
24 | { 0, }, /* ttyS1 */ \ | |
25 | { 0, }, /* ttyS2 */ \ | |
26 | { 0, }, /* ttyS3 */ \ | |
27 | { 0, }, /* ttyS4 */ \ | |
28 | { 0, }, /* ttyS5 */ \ | |
29 | { 0, }, /* ttyS6 */ \ | |
30 | { 0, }, /* ttyS7 */ \ | |
31 | { 0, }, /* ttyS8 */ | |
32 | ||
33 | ||
34 | #define SERIAL_PORT_DFNS \ | |
35 | STD_SERIAL_PORT_DEFNS | |
36 |