Commit | Line | Data |
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d3d2176a DG |
1 | #ifndef _ASM_POWERPC_HVCALL_H |
2 | #define _ASM_POWERPC_HVCALL_H | |
88ced031 | 3 | #ifdef __KERNEL__ |
1da177e4 LT |
4 | |
5 | #define HVSC .long 0x44000022 | |
6 | ||
706c8c93 SB |
7 | #define H_SUCCESS 0 |
8 | #define H_BUSY 1 /* Hardware busy -- retry later */ | |
9 | #define H_CLOSED 2 /* Resource closed */ | |
b13a96cf | 10 | #define H_NOT_AVAILABLE 3 |
706c8c93 | 11 | #define H_CONSTRAINED 4 /* Resource request constrained to max allowed */ |
b13a96cf | 12 | #define H_PARTIAL 5 |
706c8c93 | 13 | #define H_IN_PROGRESS 14 /* Kind of like busy */ |
b13a96cf HS |
14 | #define H_PAGE_REGISTERED 15 |
15 | #define H_PARTIAL_STORE 16 | |
706c8c93 SB |
16 | #define H_PENDING 17 /* returned from H_POLL_PENDING */ |
17 | #define H_CONTINUE 18 /* Returned from H_Join on success */ | |
18 | #define H_LONG_BUSY_START_RANGE 9900 /* Start of long busy range */ | |
19 | #define H_LONG_BUSY_ORDER_1_MSEC 9900 /* Long busy, hint that 1msec \ | |
20 | is a good time to retry */ | |
21 | #define H_LONG_BUSY_ORDER_10_MSEC 9901 /* Long busy, hint that 10msec \ | |
22 | is a good time to retry */ | |
23 | #define H_LONG_BUSY_ORDER_100_MSEC 9902 /* Long busy, hint that 100msec \ | |
24 | is a good time to retry */ | |
25 | #define H_LONG_BUSY_ORDER_1_SEC 9903 /* Long busy, hint that 1sec \ | |
26 | is a good time to retry */ | |
27 | #define H_LONG_BUSY_ORDER_10_SEC 9904 /* Long busy, hint that 10sec \ | |
28 | is a good time to retry */ | |
29 | #define H_LONG_BUSY_ORDER_100_SEC 9905 /* Long busy, hint that 100sec \ | |
30 | is a good time to retry */ | |
31 | #define H_LONG_BUSY_END_RANGE 9905 /* End of long busy range */ | |
32 | #define H_HARDWARE -1 /* Hardware error */ | |
33 | #define H_FUNCTION -2 /* Function not supported */ | |
34 | #define H_PRIVILEGE -3 /* Caller not privileged */ | |
35 | #define H_PARAMETER -4 /* Parameter invalid, out-of-range or conflicting */ | |
36 | #define H_BAD_MODE -5 /* Illegal msr value */ | |
37 | #define H_PTEG_FULL -6 /* PTEG is full */ | |
38 | #define H_NOT_FOUND -7 /* PTE was not found" */ | |
39 | #define H_RESERVED_DABR -8 /* DABR address is reserved by the hypervisor on this processor" */ | |
40 | #define H_NO_MEM -9 | |
41 | #define H_AUTHORITY -10 | |
42 | #define H_PERMISSION -11 | |
43 | #define H_DROPPED -12 | |
44 | #define H_SOURCE_PARM -13 | |
45 | #define H_DEST_PARM -14 | |
46 | #define H_REMOTE_PARM -15 | |
47 | #define H_RESOURCE -16 | |
b13a96cf HS |
48 | #define H_ADAPTER_PARM -17 |
49 | #define H_RH_PARM -18 | |
50 | #define H_RCQ_PARM -19 | |
51 | #define H_SCQ_PARM -20 | |
52 | #define H_EQ_PARM -21 | |
53 | #define H_RT_PARM -22 | |
54 | #define H_ST_PARM -23 | |
55 | #define H_SIGT_PARM -24 | |
56 | #define H_TOKEN_PARM -25 | |
57 | #define H_MLENGTH_PARM -27 | |
58 | #define H_MEM_PARM -28 | |
59 | #define H_MEM_ACCESS_PARM -29 | |
60 | #define H_ATTR_PARM -30 | |
61 | #define H_PORT_PARM -31 | |
62 | #define H_MCG_PARM -32 | |
63 | #define H_VL_PARM -33 | |
64 | #define H_TSIZE_PARM -34 | |
65 | #define H_TRACE_PARM -35 | |
66 | ||
67 | #define H_MASK_PARM -37 | |
68 | #define H_MCG_FULL -38 | |
69 | #define H_ALIAS_EXIST -39 | |
70 | #define H_P_COUNTER -40 | |
71 | #define H_TABLE_FULL -41 | |
72 | #define H_ALT_TABLE -42 | |
73 | #define H_MR_CONDITION -43 | |
74 | #define H_NOT_ENOUGH_RESOURCES -44 | |
75 | #define H_R_STATE -45 | |
76 | #define H_RESCINDEND -46 | |
77 | ||
1da177e4 LT |
78 | |
79 | /* Long Busy is a condition that can be returned by the firmware | |
80 | * when a call cannot be completed now, but the identical call | |
81 | * should be retried later. This prevents calls blocking in the | |
706c8c93 | 82 | * firmware for long periods of time. Annoyingly the firmware can return |
1da177e4 LT |
83 | * a range of return codes, hinting at how long we should wait before |
84 | * retrying. If you don't care for the hint, the macro below is a good | |
85 | * way to check for the long_busy return codes | |
86 | */ | |
706c8c93 SB |
87 | #define H_IS_LONG_BUSY(x) ((x >= H_LONG_BUSY_START_RANGE) \ |
88 | && (x <= H_LONG_BUSY_END_RANGE)) | |
1da177e4 LT |
89 | |
90 | /* Flags */ | |
91 | #define H_LARGE_PAGE (1UL<<(63-16)) | |
92 | #define H_EXACT (1UL<<(63-24)) /* Use exact PTE or return H_PTEG_FULL */ | |
93 | #define H_R_XLATE (1UL<<(63-25)) /* include a valid logical page num in the pte if the valid bit is set */ | |
94 | #define H_READ_4 (1UL<<(63-26)) /* Return 4 PTEs */ | |
95 | #define H_AVPN (1UL<<(63-32)) /* An avpn is provided as a sanity test */ | |
96 | #define H_ANDCOND (1UL<<(63-33)) | |
97 | #define H_ICACHE_INVALIDATE (1UL<<(63-40)) /* icbi, etc. (ignored for IO pages) */ | |
98 | #define H_ICACHE_SYNCHRONIZE (1UL<<(63-41)) /* dcbst, icbi, etc (ignored for IO pages */ | |
99 | #define H_ZERO_PAGE (1UL<<(63-48)) /* zero the page before mapping (ignored for IO pages) */ | |
100 | #define H_COPY_PAGE (1UL<<(63-49)) | |
101 | #define H_N (1UL<<(63-61)) | |
102 | #define H_PP1 (1UL<<(63-62)) | |
103 | #define H_PP2 (1UL<<(63-63)) | |
104 | ||
368a6ba5 DB |
105 | /* VASI States */ |
106 | #define H_VASI_INVALID 0 | |
107 | #define H_VASI_ENABLED 1 | |
108 | #define H_VASI_ABORTED 2 | |
109 | #define H_VASI_SUSPENDING 3 | |
110 | #define H_VASI_SUSPENDED 4 | |
111 | #define H_VASI_RESUMED 5 | |
112 | #define H_VASI_COMPLETED 6 | |
113 | ||
fd9648df AB |
114 | /* DABRX flags */ |
115 | #define H_DABRX_HYPERVISOR (1UL<<(63-61)) | |
116 | #define H_DABRX_KERNEL (1UL<<(63-62)) | |
117 | #define H_DABRX_USER (1UL<<(63-63)) | |
118 | ||
b13a96cf HS |
119 | /* Each control block has to be on a 4K bondary */ |
120 | #define H_CB_ALIGNMENT 4096 | |
121 | ||
1da177e4 LT |
122 | /* pSeries hypervisor opcodes */ |
123 | #define H_REMOVE 0x04 | |
124 | #define H_ENTER 0x08 | |
125 | #define H_READ 0x0c | |
126 | #define H_CLEAR_MOD 0x10 | |
127 | #define H_CLEAR_REF 0x14 | |
128 | #define H_PROTECT 0x18 | |
129 | #define H_GET_TCE 0x1c | |
130 | #define H_PUT_TCE 0x20 | |
131 | #define H_SET_SPRG0 0x24 | |
132 | #define H_SET_DABR 0x28 | |
133 | #define H_PAGE_INIT 0x2c | |
134 | #define H_SET_ASR 0x30 | |
135 | #define H_ASR_ON 0x34 | |
136 | #define H_ASR_OFF 0x38 | |
137 | #define H_LOGICAL_CI_LOAD 0x3c | |
138 | #define H_LOGICAL_CI_STORE 0x40 | |
139 | #define H_LOGICAL_CACHE_LOAD 0x44 | |
140 | #define H_LOGICAL_CACHE_STORE 0x48 | |
141 | #define H_LOGICAL_ICBI 0x4c | |
142 | #define H_LOGICAL_DCBF 0x50 | |
143 | #define H_GET_TERM_CHAR 0x54 | |
144 | #define H_PUT_TERM_CHAR 0x58 | |
145 | #define H_REAL_TO_LOGICAL 0x5c | |
146 | #define H_HYPERVISOR_DATA 0x60 | |
147 | #define H_EOI 0x64 | |
148 | #define H_CPPR 0x68 | |
149 | #define H_IPI 0x6c | |
150 | #define H_IPOLL 0x70 | |
151 | #define H_XIRR 0x74 | |
152 | #define H_PERFMON 0x7c | |
153 | #define H_MIGRATE_DMA 0x78 | |
154 | #define H_REGISTER_VPA 0xDC | |
706c8c93 | 155 | #define H_CEDE 0xE0 |
1da177e4 | 156 | #define H_CONFER 0xE4 |
706c8c93 | 157 | #define H_PROD 0xE8 |
1da177e4 LT |
158 | #define H_GET_PPP 0xEC |
159 | #define H_SET_PPP 0xF0 | |
160 | #define H_PURR 0xF4 | |
706c8c93 | 161 | #define H_PIC 0xF8 |
1da177e4 LT |
162 | #define H_REG_CRQ 0xFC |
163 | #define H_FREE_CRQ 0x100 | |
164 | #define H_VIO_SIGNAL 0x104 | |
165 | #define H_SEND_CRQ 0x108 | |
706c8c93 | 166 | #define H_COPY_RDMA 0x110 |
fd9648df | 167 | #define H_SET_XDABR 0x134 |
1da177e4 LT |
168 | #define H_STUFF_TCE 0x138 |
169 | #define H_PUT_TCE_INDIRECT 0x13C | |
170 | #define H_VTERM_PARTNER_INFO 0x150 | |
171 | #define H_REGISTER_VTERM 0x154 | |
172 | #define H_FREE_VTERM 0x158 | |
b13a96cf HS |
173 | #define H_RESET_EVENTS 0x15C |
174 | #define H_ALLOC_RESOURCE 0x160 | |
175 | #define H_FREE_RESOURCE 0x164 | |
176 | #define H_MODIFY_QP 0x168 | |
177 | #define H_QUERY_QP 0x16C | |
178 | #define H_REREGISTER_PMR 0x170 | |
179 | #define H_REGISTER_SMR 0x174 | |
180 | #define H_QUERY_MR 0x178 | |
181 | #define H_QUERY_MW 0x17C | |
182 | #define H_QUERY_HCA 0x180 | |
183 | #define H_QUERY_PORT 0x184 | |
184 | #define H_MODIFY_PORT 0x188 | |
185 | #define H_DEFINE_AQP1 0x18C | |
186 | #define H_GET_TRACE_BUFFER 0x190 | |
187 | #define H_DEFINE_AQP0 0x194 | |
188 | #define H_RESIZE_MR 0x198 | |
189 | #define H_ATTACH_MCQP 0x19C | |
190 | #define H_DETACH_MCQP 0x1A0 | |
191 | #define H_CREATE_RPT 0x1A4 | |
192 | #define H_REMOVE_RPT 0x1A8 | |
193 | #define H_REGISTER_RPAGES 0x1AC | |
194 | #define H_DISABLE_AND_GETC 0x1B0 | |
195 | #define H_ERROR_DATA 0x1B4 | |
196 | #define H_GET_HCA_INFO 0x1B8 | |
197 | #define H_GET_PERF_COUNT 0x1BC | |
198 | #define H_MANAGE_TRACE 0x1C0 | |
199 | #define H_QUERY_INT_STATE 0x1E4 | |
706c8c93 | 200 | #define H_POLL_PENDING 0x1D8 |
43ccf202 | 201 | #define H_JOIN 0x298 |
368a6ba5 | 202 | #define H_VASI_STATE 0x2A4 |
43ccf202 | 203 | #define H_ENABLE_CRQ 0x2B0 |
1da177e4 LT |
204 | |
205 | #ifndef __ASSEMBLY__ | |
206 | ||
207 | /* plpar_hcall() -- Generic call interface using above opcodes | |
208 | * | |
209 | * The actual call interface is a hypervisor call instruction with | |
210 | * the opcode in R3 and input args in R4-R7. | |
211 | * Status is returned in R3 with variable output values in R4-R11. | |
212 | * Only H_PTE_READ with H_READ_4 uses R6-R11 so we ignore it for now | |
213 | * and return only two out args which MUST ALWAYS BE PROVIDED. | |
214 | */ | |
215 | long plpar_hcall(unsigned long opcode, | |
216 | unsigned long arg1, | |
217 | unsigned long arg2, | |
218 | unsigned long arg3, | |
219 | unsigned long arg4, | |
220 | unsigned long *out1, | |
221 | unsigned long *out2, | |
222 | unsigned long *out3); | |
223 | ||
224 | /* Same as plpar_hcall but for those opcodes that return no values | |
225 | * other than status. Slightly more efficient. | |
226 | */ | |
227 | long plpar_hcall_norets(unsigned long opcode, ...); | |
228 | ||
d3d2176a | 229 | /* |
1da177e4 LT |
230 | * Special hcall interface for ibmveth support. |
231 | * Takes 8 input parms. Returns a rc and stores the | |
232 | * R4 return value in *out1. | |
233 | */ | |
234 | long plpar_hcall_8arg_2ret(unsigned long opcode, | |
235 | unsigned long arg1, | |
706c8c93 | 236 | unsigned long arg2, |
1da177e4 LT |
237 | unsigned long arg3, |
238 | unsigned long arg4, | |
239 | unsigned long arg5, | |
240 | unsigned long arg6, | |
241 | unsigned long arg7, | |
242 | unsigned long arg8, | |
243 | unsigned long *out1); | |
d3d2176a | 244 | |
1da177e4 LT |
245 | /* plpar_hcall_4out() |
246 | * | |
d3d2176a DG |
247 | * same as plpar_hcall except with 4 output arguments. |
248 | * | |
1da177e4 LT |
249 | */ |
250 | long plpar_hcall_4out(unsigned long opcode, | |
251 | unsigned long arg1, | |
252 | unsigned long arg2, | |
253 | unsigned long arg3, | |
254 | unsigned long arg4, | |
255 | unsigned long *out1, | |
256 | unsigned long *out2, | |
257 | unsigned long *out3, | |
258 | unsigned long *out4); | |
259 | ||
b13a96cf HS |
260 | long plpar_hcall_7arg_7ret(unsigned long opcode, |
261 | unsigned long arg1, | |
262 | unsigned long arg2, | |
263 | unsigned long arg3, | |
264 | unsigned long arg4, | |
265 | unsigned long arg5, | |
266 | unsigned long arg6, | |
267 | unsigned long arg7, | |
268 | unsigned long *out1, | |
269 | unsigned long *out2, | |
270 | unsigned long *out3, | |
271 | unsigned long *out4, | |
272 | unsigned long *out5, | |
273 | unsigned long *out6, | |
274 | unsigned long *out7); | |
275 | ||
276 | long plpar_hcall_9arg_9ret(unsigned long opcode, | |
277 | unsigned long arg1, | |
278 | unsigned long arg2, | |
279 | unsigned long arg3, | |
280 | unsigned long arg4, | |
281 | unsigned long arg5, | |
282 | unsigned long arg6, | |
283 | unsigned long arg7, | |
284 | unsigned long arg8, | |
285 | unsigned long arg9, | |
286 | unsigned long *out1, | |
287 | unsigned long *out2, | |
288 | unsigned long *out3, | |
289 | unsigned long *out4, | |
290 | unsigned long *out5, | |
291 | unsigned long *out6, | |
292 | unsigned long *out7, | |
293 | unsigned long *out8, | |
294 | unsigned long *out9); | |
295 | ||
1da177e4 | 296 | #endif /* __ASSEMBLY__ */ |
88ced031 | 297 | #endif /* __KERNEL__ */ |
d3d2176a | 298 | #endif /* _ASM_POWERPC_HVCALL_H */ |